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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
Cover SheetCustom
1 45Monday, October 29, 2007
2006/02/13 2006/03/10Compal Electronics, Inc.
Compal confidentialSchematics Document
Mobile Penryn uFCPGA with IntelCantiga_GM+ICH9-M SFF core logic
2007-10-26
SKYY
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
Block DiagramCustom
2 45Monday, October 29, 2007
2006/02/13 2006/03/10Compal Electronics, Inc.
File Name : LA-4021PCompal confidential
Thermal SensorEMC2103 Clock Generator
ICS9LPRS397
Fan Control
SPI ROMAT26DF321
Mobile PenymuFCPGA-956 CPU - SFF
FSB667/800/1066MHz 1.05V
H_A#(3..35)H_D#(0..63)
FCBGA 1363 - SFF
Intel Cantiga GMS
SPI
Power On/Off CKT.
LPC BUS
CardBus ControllerRico R5C833
DC/DC Interface CKT.
SATA ODD Connector
PCI BUS
RTC CKT.
WBMMAP-569 - SFFIntel ICH9-M
TPM1.2
page 21
Power OK CKT.
page 32
page 32page 33
page 30
page 31
Touch Pad CONN. Int.KBDpage 35
page 36
page 30
page 19
SMSC KBC 1091
SD/MMC Slot
10/100/1000 LANIntel Boaz GbE
RJ45 CONN
PCI-E BUS
LED
2.5" SATA HDD Connector
SATA0
SATA1
1394 port
MDC V1.5
SKYY
page 29
page 16
page 14,15
page 8,9,10,11,12,13
page 4
page 4
page 4,5,6,7
page 34
page 31
page 28
page 27
page 21
page 25
page 24
page 20,21,22,23
CK505
LCD conn
TrackPoint CONN.
BANK 0, 1, 2, 3DDR2-SO-DIMM X 2DDR2 800MHz 1.8V
Dual Channel
page 21
CRT
SLB9635TT
AD1984HDAudio CKT
AMP & Audio JackTPA6043
USB x1(Docking)
USB conn x 3(For I/O)USB2.0
daughter boardFingerPrinter AES2810USBx1
BT Conn USB x 1Azalia
DMI X4
PHY
LV/ULV Dual Core
S-Video to Docking
24HST1041A-3
CRT to docking
Express Card 54
page 25
PCIE X1 + USB X1
Docking CONN.(Opus 1.0)*RJ-45(LED*2)*CRT*S-VIDEO OUT*LINE IN*LINE OUT*USB x4*DC JACK
*Power on signal*Docked indicatorsignal*AC present indicatorsignal
USB x1(Camara)
WWAN Card
page 25
WWAN + PCIE X1+ USB X1
OR
1.8" SATA HDD Connector
page 30page 30
page 30
page 18
page 18
page 17
page 34
page 34
LIS302DLTR
page 26
Accelerometer
A
A
1 1
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
Notes ListCustom
3 45Monday, October 29, 2007
2005/03/10 2006/03/10Compal Electronics, Inc.
( O MEANS ON X MEANS OFF )Voltage Rails
O
O
X
+0.9V
S3
+3VS
X
X
+3VALW
+5VS
S1
O
+CPU_CORE
OO
OO
X
X X
+VCCP
powerplane
O
O
O
O
O
X
S5 S4/ Battery only
X X X
+B
State
+1.5VS
+1.8V
S5 S4/AC & Batterydon't exist
S5 S4/AC
+5VALW
S0
O
O
Symbol Note :
: means Digital Ground
: means Analog Ground
@ : means just reserve , no build
V V V
V
SERIALSENSOR(CPU)
SMB_EC_CK2
SOURCE
KB926
INVERTER BATT EEPROMTHERMAL
SODIMM CLK CHIP
SMBUS Control Table
SMB_CK_CLK1SMB_CK_DAT1 ICH9
MINI CARD
SMB_EC_DA2
SMB_EC_CK1SMB_EC_DA1
KB926
LCD_CLKLCD_DAT Cantiga
LCD
XX
X
X X
X
X X
X
X X
X
X XX
X X
XX
X
XX X
X
X
V VV
I2C / SMBUS ADDRESSING
1 0 1 0 0 0 0 0D2A0
CLOCK GENERATOR (EXT.)
HEX ADDRESS
DDR SO-DIMM 01 1 0 1 0 0 1 0
DEVICE
+0.9V
+3VM
+1.05VM
CONN@ : means ME part.45@ : means install after SMT.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_THERMDCH_THERMDA
H_THERMDC_R
H_A#32
H_A#34H_A#35
H_A#33
H_A#3
H_A#18
H_A#10
H_A#30
H_A#27H_A#26
H_A#13
H_A#21
H_A#11
H_A#17
H_A#7
H_A#9
H_A#16
H_A#20
H_A#6
H_A#25
H_A#8
H_A#12
H_A#28H_A#29
H_A#19
H_A#23H_A#24
H_A#15
H_A#5
H_A#14
H_A#22
H_A#4
H_A#31
XDP_HOOK1
XDP_HOOK1
XDP_DBRESET#_R
XDP_PRE
XDP_DBRESET#XDP_DBRESET#_R
XDP_TDI
XDP_TMS
XDP_TCK
XDP_TRST#
XDP_TCK
XDP_TDO
H_RESET#
XDP_TRST#
XDP_TMS
XDP_TDO
XDP_TDI
H_PWRGOOD_R
H_RESET#_R
XDP_BPM#5
XDP_BPM#3
XDP_BPM#0XDP_BPM#1
XDP_BPM#2
XDP_BPM#4XDP_BPM#5
XDP_BPM#0
XDP_BPM#2XDP_BPM#3
XDP_TRST#
XDP_BPM#1
XDP_TCK
XDP_TMSXDP_TDOXDP_TDI
XDP_DBRESET#
XDP_BPM#5_RXDP_BPM#4
H_THERMDA_R
REMOTE2-
H_RESET#
H_THERMDA
H_THERMDC
+3VS_THER
REMOTE2+
REMOTE2+
REMOTE2-
FAN_PWM
TACH
XDP_BPM#5
H_ADS# 8H_BNR# 8
H_BPRI# 8
H_THERMTRIP# 8,21
CLK_CPU_BCLK 16CLK_CPU_BCLK# 16
H_A#[3..16]8
H_ADSTB#08
H_REQ#08H_REQ#18H_REQ#28
H_A#[17..35]8
H_ADSTB#18
H_A20M#21H_FERR#21
H_IGNNE#21
H_STPCLK#21H_INTR21
H_NMI21H_SMI#21
H_REQ#48
H_PWRGOOD5,21 CLK_CPU_XDP 16CLK_CPU_XDP# 16
H_DEFER# 8H_DRDY# 8H_DBSY# 8
H_BR0# 8
H_INIT# 21
H_LOCK# 8
H_RESET# 8H_RS#0 8H_RS#1 8H_RS#2 8
H_TRDY# 8
H_HIT# 8H_HITM# 8
XDP_DBRESET# 22
H_REQ#38
H_PROCHOT# 42THERM_SCI#22
ICH_SM_DA22,26 ICH_SM_CLK 22,26
MAINPWON37,39
+VCCP
+3VS
+VCCP+VCCP
+VCCP
+5VS
+VCCP
+3VS
+3VS
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
Penryn(1/3)-AGTL+/ITP-XDPCustom
4 45Monday, October 29, 2007
2006/02/13 2006/03/10Compal Electronics, Inc.
Place R191 within 200ps(~1") to CPU
This shall place near CPU
XDP Connector
Thermal Sensor EMC2103-2 with CPU PWM FAN
H_THERMDA, H_THERMDC routing together,Trace width / Spacing = 10 / 10 mil
Place close to U1.
Update to right package for U2. 10/01
Change R23, R24 connect to +3VS and add PU/PD for U2. (9/3)
DEL U3 and add R13. (9/3)
place near the hottest spot area forNB & top SODIMM.
REMOTE thermal sensor
Layout Note:
9/14
9/20
Place Close to U1.
NI R23, reserve R324 and connect to MAINPWON. (10/5)
Add 0 ohm per EMI request.10/17
C3 2200P_0402_50V7K1 2
R12 200_0402_1%12
R20 68_0402_5% 1 2
T103PAD
R324 0_0402_5%@1 2
C1 0.1U_0402_16V4Z12
R21 0_0402_5%1 2
EB
CQ45MMBT3904W_SOT323-3
2
31
ADDR GRO
UP 0ADDR G
ROUP 1
CONT
ROL
XDP/
ITP
SIG
NALS
H CLK
THERMAL
RESERVED
ICH
U1A
PENRYN SFF_UFCBGA956
A[10]#AC5A[11]#AD2A[12]#AD4A[13]#AA5A[14]#AE5A[15]#AB2A[16]#AC1
A[17]#AN1A[18]#AK4A[19]#AG1A[20]#AT4A[21]#AK2A[22]#AT2A[23]#AH2A[24]#AF4A[25]#AJ5A[26]#AH4A[27]#AM4A[28]#AP4A[29]#AR5
A[3]#P2
A[30]#AJ1A[31]#AL1
RSVD01V2RSVD02Y2RSVD03AG5RSVD04AL5RSVD05J9
A[4]#V4A[5]#W1A[6]#T4A[7]#AA1A[8]#AB4A[9]#T2
A20M#C7
ADS# M4
ADSTB[0]#Y4
ADSTB[1]#AN5
RSVD06F4
BCLK[0] A35BCLK[1] C35
BNR# J5
BPM[0]# AY8BPM[1]# BA7BPM[2]# BA5BPM[3]# AY2
BPRI# L5
BR0# M2
DBR# J7
DBSY# J1
DEFER# N5DRDY# F38
FERR#D4
HIT# H2HITM# F2
IERR# B40
IGNNE#F10
INIT# D8
LINT0C9LINT1C5
LOCK# N1
PRDY# AV10PREQ# AV2
PROCHOT# D38
REQ[0]#R1REQ[1]#R5REQ[2]#U1REQ[3]#P4REQ[4]#W5
RESET# G5RS[0]# K2RS[1]# H4RS[2]# K4
SMI#E5
STPCLK#F8
TCK AV4TDI AW7
TDO AU1
THERMTRIP# B10
THERMDA BB34THERMDC BD34
TMS AW5
TRDY# L1
TRST# AV8
A[32]#AM2A[33]#AU5A[34]#AP2A[35]#AR1
RSVD07H8
R8 54.9_0402_1%1 2
U2
EMC2103-2-AX_QFN16_4X4
DN1
ALERT#6
GPIO14
GPIO25
DP2
VDD3
TACH 10
SMCLK 9
TRIP_SET 14
SHDN_SEL 13
DP2/DN3 16
PWM 11
GND 12
SYS_SHDN#7
SMDATA8
DN2/DP3 15
GN
D17
R11 22.6_0402_1%1 2
T99PADT100PAD
R480_0402_5%1 2
R22 0_0402_5%1 2
T101PAD
R5 54.9_0402_1%1 2
T98PAD
R140_0402_5%
1 2
R6 54.9_0402_1%@ 1 2
R3 54.9_0402_1%1 2
R16 10K_0402_5%1 2
R1 1K_0402_5%@1 2
R1568_0402_5%
12
R4 54.9_0402_1%1 2
C3142200P_0402_50V7K
1
2
JP1
SAMTE_BSH-030-01-L-D-Aconn@
GND01OBSFN_A03OBSFN_A15GND27OBSDATA_A09OBSDATA_A111GND413OBSDATA_A215OBSDATA_A317GND619OBSFN_B021OBSFN_B123GND825OBSDATA_B027OBSDATA_B129GND1031OBSDATA_B233OBSDATA_B335GND1237PWRGOOD/HOOK039HOOK141VCC_OBS_AB43HOOK245HOOK347GND1449SDA51SCL53TCK155TCK057GND1659
GND1 2OBSFN_C0 4OBSFN_C1 6
GND3 8OBSDATA_C0 10OBSDATA_C1 12
GND5 14OBSDATA_C2 16OBSDATA_C3 18
GND7 20OBSFN_D0 22OBSFN_D1 24
GND9 26OBSDATA_D0 28OBSDATA_D1 30
GND11 32OBSDATA_D2 34OBSDATA_D3 36
GND13 38ITPCLK/HOOK4 40
ITPCLK#/HOOK5 42VCC_OBS_CD 44
RESET#/HOOK6 46DBR#/HOOK7 48
GND15 50TD0 52
TRST# 54TDI 56
TMS 58GND17 60
C20.1U_0402_16V4Z
1
2R
10 56_0
402_
5%
12
R18 10K_0402_5%1 2
T97PAD
R23 10K_0402_5%@1 2
T102PAD
R2 54.9_0402_1%1 2
JP2
ACES_85204-03001conn@
112233 G1 4
G2 5
R13 10K_0402_5%1 2
R2410K_0402_5%1 2
R17 10K_0402_5%1 2
R91K_0402_5%
12
R7 51_0402_1%
1 2
R60951_0402_1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
V_CPU_GTLREF
H_D#4
H_D#14
H_D#10H_D#9
H_D#3
H_D#13
H_D#6
H_D#2
H_D#8
H_D#12
H_D#1
H_D#5
H_D#7
H_D#11
H_D#0
H_D#15
H_D#27
H_D#25
H_D#31
H_D#24
H_D#20
H_D#30
H_D#23
H_D#19
H_D#29
H_D#16
H_D#18
H_D#22
H_D#26
H_D#28
H_D#17
H_D#21
H_DINV#0
H_DINV#1
H_DINV#2
H_DSTBN#2
H_DSTBP#1H_DSTBN#1
H_DSTBP#0H_DSTBN#0
H_DSTBP#3
H_D#48
H_D#56
H_D#59
H_D#63
H_D#55
H_D#62
H_D#58
H_D#50
H_D#61H_D#60
V_CPU_GTLREFTEST1TEST2
VSSSENSE
VCCSENSE
H_D#43H_D#42
H_D#37
H_D#35H_D#36
H_D#45H_D#44
TEST3
TEST6
VSSSENSE
VCCSENSE
H_PSI#
COMP0
COMP2COMP3
H_D#39
H_DSTBP#2
H_D#38
H_D#32
H_DSTBN#3
H_D#47
H_D#57
H_D#54
COMP1
H_D#46
H_D#41
H_D#53H_D#52
H_D#34
H_D#40
H_DINV#3
H_D#51
H_D#49
H_D#33
TEST5TEST4
VCCSENSE 42
VSSSENSE 42
H_D#[0..15]8
H_DSTBN#08H_DSTBP#08H_DINV#08H_D#[16..31]8
H_DSTBN#18H_DSTBP#18H_DINV#18
CPU_BSEL016CPU_BSEL116CPU_BSEL216
H_D#[32..47] 8
H_DSTBN#2 8H_DSTBP#2 8H_DINV#2 8H_D#[48..63] 8
H_DSTBN#3 8H_DSTBP#3 8H_DINV#3 8
CPU_VID0 42CPU_VID1 42CPU_VID2 42CPU_VID3 42CPU_VID4 42CPU_VID5 42CPU_VID6 42
H_DPRSTP# 8,21,42H_DPSLP# 21
H_CPUSLP# 8
H_DPWR# 8H_PWRGOOD 4,21
+VCCP
+VCCP
+1.5VS
+VCC_CORE +VCC_CORE
+VCC_CORE
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
Penryn(2/3)-AGTL+/ITP-XDPCustom
5 45Monday, October 29, 2007
2006/02/13 2006/03/10Compal Electronics, Inc.
Close to CPU pin AW43within 500mils.
CPU_BSEL CPU_BSEL2 CPU_BSEL1
166
200
0 1
0 1
CPU_BSEL0
1
0
Resistor placed within0.5" of CPU pin.Traceshould be at least 25mils away from any othertoggling signal.COMP[0,2] trace width is18 mils. COMP[1,3] tracewidth is 4 mils.
Length match within 25 mils.The trace width/space/other is20/7/25.
Close to CPU pinwithin 500mils.
Near pin B34
layout note: Route TEST3 & TEST5 traces onground referenced layer to the TPs
266 0 0 0
Near pin D34
Cause CPU core power change to1 phase, and not need supportthe pin, leave it as TP. 10/02
R36
100_0402_1%
1 2
R33
54.9
_040
2_1%
12
T105
C6
0.01
U_0
402_
16V7
K
1
2
R38
100_0402_1%
1 2
R26 0_0402_5%1 2
R31
54.9
_040
2_1%
12
T106
R32
27.4
_040
2_1%
12
R28 0_0402_5% 1 2
T124
R27 0_0402_5% 1 2
R34
27.4
_040
2_1%
12
T2
C7
10U
_080
5_6.
3V6M
1
2
U1C
PENRYN SFF_UFCBGA956
VCC[001]F32VCC[002]G33VCC[003]H32VCC[004]J33VCC[005]K32VCC[006]L33VCC[007]M32VCC[008]N33VCC[009]P32VCC[010]R33VCC[011]T32VCC[012]U33VCC[013]V32VCC[014]W33VCC[015]Y32VCC[016]AA33VCC[017]AB32VCC[018]AC33VCC[019]AD32VCC[020]AE33VCC[021]AF32VCC[022]AG33VCC[023]AH32VCC[024]AJ33VCC[025]AK32VCC[026]AL33VCC[027]AM32VCC[028]AN33VCC[029]AP32VCC[030]AR33VCC[031]AT34VCC[032]AT32VCC[033]AU33VCC[034]AV32VCC[035]AY32VCC[036]BB32VCC[037]BD32VCC[038]B28VCC[039]B30VCC[040]B26VCC[041]D28VCC[042]D30VCC[043]F30VCC[044]F28VCC[045]H30VCC[046]H28VCC[047]D26VCC[048]F26VCC[049]H26VCC[050]K30VCC[051]K28VCC[052]M30VCC[053]M28VCC[054]K26VCC[055]M26VCC[056]P30VCC[057]P28VCC[058]T30VCC[059]T28VCC[060]V30VCC[061]V28VCC[062]P26VCC[063]T26VCC[064]V26VCC[065]Y30VCC[066]Y28VCC[067]AB30
VCC[068] AB28VCC[069] AD30VCC[070] AD28VCC[071] Y26VCC[072] AB26VCC[073] AD26VCC[074] AF30VCC[075] AF28VCC[076] AH30VCC[077] AH28VCC[078] AF26VCC[079] AH26VCC[080] AK30VCC[081] AK28VCC[082] AM30VCC[083] AM28VCC[084] AP30VCC[085] AP28VCC[086] AK26VCC[087] AM26VCC[088] AP26VCC[089] AT30VCC[090] AT28VCC[091] AV30VCC[092] AV28VCC[093] AY30VCC[094] AY28VCC[095] AT26VCC[096] AV26VCC[097] AY26VCC[098] BB30VCC[099] BB28VCC[100] BD30
VCCA[01] B34
VCCP_004 J37VCCP_005 K38VCCP_006 L37VCCP_007 N37VCCP_008 P38VCCP_009 R37VCCP_010 U37VCCP_011 V38VCCP_012 W37VCCP_013 AA37VCCP_014 AB38VCCP_015 AC37VCCP_016 AE37
VCCSENSE BD12
VID[0] BD8VID[1] BC7VID[2] BB10VID[3] BB8VID[4] BC5VID[5] BB4VID[6] AY4
VSSSENSE BC13
VCCA[02] D34
VCCP_001 J11VCCP_002 E11VCCP_003 G11
R351K_0402_1%
12
T4
DATA GRO
UP 0DATA G
ROUP 1
DATA
GRO
UP 2
DATA
GRO
UP 3
MISC
U1B
PENRYN SFF_UFCBGA956
COMP[0] AE43COMP[1] AD44COMP[2] AE1COMP[3] AF2
D[0]#F40D[1]#G43
D[10]#N41D[11]#T40D[12]#M40D[13]#G41D[14]#M44D[15]#L43
D[16]#P44D[17]#V40D[18]#V44D[19]#AB44
D[2]#E43
D[20]#R41D[21]#W41D[22]#N43D[23]#U41D[24]#AA41D[25]#AB40D[26]#AD40D[27]#AC41D[28]#AA43D[29]#Y40
D[3]#J43
D[30]#Y44D[31]#T44
D[32]# AP44D[33]# AR43D[34]# AH40D[35]# AF40D[36]# AJ43D[37]# AG41D[38]# AF44D[39]# AH44
D[4]#H40
D[40]# AM44D[41]# AN43D[42]# AM40D[43]# AK40D[44]# AG43D[45]# AP40D[46]# AN41D[47]# AL41
D[48]# AV38D[49]# AT44
D[5]#H44
D[50]# AV40D[51]# AU41D[52]# AW41D[53]# AR41D[54]# BA37D[55]# BB38D[56]# AY36D[57]# AT40D[58]# BC35D[59]# BC39
D[6]#G39
D[60]# BA41D[61]# BB40D[62]# BA35D[63]# AU43
D[7]#E41D[8]#L41D[9]#K44
TEST5AY10
DINV[0]#P40
DINV[1]#R43
DINV[2]# AJ41
DINV[3]# BC37
DPRSTP# G7DPSLP# B8DPWR# C41
DSTBN[0]#K40
DSTBN[1]#U43
DSTBN[2]# AK44
DSTBN[3]# AY40
DSTBP[0]#J41
DSTBP[1]#W43
DSTBP[2]# AL43
DSTBP[3]# AY38
GTLREFAW43
PSI# BD10
PWRGOOD E7SLP# D10
TEST3C43
BSEL[0]A37BSEL[1]C37BSEL[2]B38
TEST2D40
TEST4AE41
TEST6AC43
TEST1E37
R372K_0402_1%
12
+ C4330U_D2E_2.5VM_R7
1
2
T3
T104
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCC_CORE +VCCP
+VCCP
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
Penryn(3/3)-PowerCustom
6 45Monday, October 29, 2007
2006/02/13 2006/03/10Compal Electronics, Inc.
U1FPENRYN SFF_UFCBGA956
VCC
_101
BD28
VCC
_102
BB26
VCC
_103
BD26
VCC
_104
B22
VCC
_105
B24
VCC
_106
D22
VCC
_107
D24
VCC
_108
F24
VCC
_109
F22
VCC
_110
H24
VCC
_111
H22
VCC
_112
K24
VCC
_113
K22
VCC
_114
M24
VCC
_115
M22
VCC
_116
P24
VCC
_117
P22
VCC
_118
T24
VCC
_119
T22
VCC
_120
V24
VCC
_121
V22
VCC
_122
Y24
VCC
_123
Y22
VCC
_124
AB24
VCC
_125
AB22
VCC
_126
AD24
VCC
_127
AD22
VCC
_128
AF24
VCC
_129
AF22
VCC
_130
AH24
VCC
_131
AH22
VCC
_132
AK24
VCC
_133
AK22
VCC
_134
AM24
VCC
_135
AM22
VCC
_136
AP24
VCC
_137
AP22
VCC
_138
AT24
VCC
_139
AT22
VCC
_140
AV24
VCC
_141
AV22
VCC
_142
AY24
VCC
_143
AY22
VCC
_144
BB24
VCC
_145
BB22
VCC
_146
BD24
VCC
_147
BD22
VCC
_148
B16
VCC
_149
B18
VCC
_150
B20
VCC
_151
D16
VCC
_152
D18
VCC
_153
F18
VCC
_154
F16
VCC
_155
H18
VCC
_156
H16
VCC
_157
D20
VCC
_158
F20
VCC
_159
H20
VCC
_160
K18
VCC
_161
K16
VCC
_162
M18
VCC
_163
M16
VCC
_164
K20
VCC
_165
M20
VCC
_166
P18
VCC
_167
P16
VCC
_168
T18
VCC
_169
T16
VCC
_170
V18
VCC
_171
V16
VCC
_172
P20
VCC
_173
T20
VCC
_174
V20
VCC
_175
Y18
VCC
_176
Y16
VCC
_177
AB18
VCC
_178
AB16
VCC
_179
AD18
VCC
_180
AD16
VCC
_181
Y20
VCC
_182
AB20
VCC
_183
AD20
VCC
_184
AF18
VCC
_185
AF16
VCC
_186
AH18
VCC
_187
AH16
VCC
_188
AF20
VCC
_189
AH20
VCC
_190
AK18
VCC
_191
AK16
VCC
_192
AM18
VCC
_193
AM16
VCC
_194
AP18
VCC
_195
AP16
VCC
_196
AK20
VCC
_197
AM20
VCC
_198
AP20
VCC
_199
AT18
VCC
_200
AT16
VCC
_201
AV18
VCC
_202
AV16
VCC
_203
AY18
VCC
_204
AY16
VCC
_205
AT20
VCC
_206
AV20
VCC
_207
AY20
VCC
_208
BB18
VCC
_209
BB16
VCC
_210
BD18
VCC
_211
BD16
VCC
_212
BB20
VCC
_213
BD20
VCC
_214
AM14
VCC
_215
AP14
VCC
_216
AT14
VCC
_217
AV14
VCC
_218
AY14
VCC
_219
BB14
VCC
_220
BD14
VCC
P_02
0AK
38
VCC
P_02
1AL
37VC
CP_
022
AN37
VCC
P_02
3AP
38VC
CP_
024
B32
VCC
P_02
5C
33VC
CP_
026
D32
VCC
P_02
7E3
5VC
CP_
028
E33
VCC
P_02
9F3
4VC
CP_
030
G35
VCC
P_03
1F3
6VC
CP_
032
H36
VCC
P_03
3J3
5VC
CP_
034
L35
VCC
P_03
5N
35VC
CP_
036
K36
VCC
P_03
7R
35VC
CP_
038
U35
VCC
P_03
9P3
6VC
CP_
040
V36
VCC
P_04
1W
35VC
CP_
042
AA35
VCC
P_04
3AC
35VC
CP_
044
AB36
VCC
P_04
5AE
35VC
CP_
046
AG35
VCC
P_04
7AJ
35VC
CP_
048
AF36
VCC
P_04
9AL
35VC
CP_
050
AN35
VCC
P_05
1AK
36VC
CP_
052
AP36
VCC
P_05
3B1
2VC
CP_
054
B14
VCC
P_05
5C
13VC
CP_
056
D12
VCC
P_05
7D
14VC
CP_
058
E13
VCC
P_05
9F1
4VC
CP_
060
F12
VCC
P_06
1G
13VC
CP_
062
H14
VCC
P_06
3H
12VC
CP_
064
J13
VCC
P_06
5K1
4VC
CP_
066
K12
VCC
P_06
7L1
3VC
CP_
068
L11
VCC
P_06
9M
14VC
CP_
070
N13
VCC
P_07
1N
11VC
CP_
072
K10
VCC
P_07
3P1
4VC
CP_
074
P12
VCC
P_07
5R
13VC
CP_
076
R11
VCC
P_07
7T1
4VC
CP_
078
U13
VCC
P_07
9U
11VC
CP_
080
V14
VCC
P_08
1V1
2VC
CP_
082
W13
VCC
P_08
3W
11VC
CP_
084
P10
VCC
P_08
5V1
0VC
CP_
086
Y14
VCC
P_08
7AA
13VC
CP_
088
AA11
VCC
P_08
9AB
14VC
CP_
090
AB12
VCC
P_09
1AC
13VC
CP_
092
AC11
VCC
P_09
3AD
14VC
CP_
094
AB10
VCC
P_09
5AE
13VC
CP_
096
AE11
VCC
P_09
7AF
14VC
CP_
098
AF12
VCC
P_09
9AG
13VC
CP_
100
AG11
VCC
P_10
1AH
14VC
CP_
102
AJ13
VCC
P_10
3AJ
11VC
CP_
104
AF10
VCC
P_10
5AK
14VC
CP_
106
AK12
VCC
P_10
7AL
13VC
CP_
108
AL11
VCC
P_10
9AN
13VC
CP_
110
AN11
VCC
P_11
1AP
12VC
CP_
112
AR13
VCC
P_11
3AR
11VC
CP_
114
AK10
VCC
P_11
5AP
10VC
CP_
116
AU13
VCC
P_11
7AU
11VC
CP_
118
L9VC
CP_
119
L7VC
CP_
120
N9
VCC
P_12
1N
7VC
CP_
122
R9
VCC
P_12
3R
7VC
CP_
124
U9
VCC
P_12
5U
7VC
CP_
126
W9
VCC
P_12
7W
7VC
CP_
128
AA9
VCC
P_12
9AA
7VC
CP_
130
AC9
VCC
P_13
1AC
7VC
CP_
132
AE9
VCC
P_13
3AE
7VC
CP_
134
AG9
VCC
P_13
5AG
7VC
CP_
136
AJ9
VCC
P_13
7AJ
7VC
CP_
138
AL9
VCC
P_13
9AL
7VC
CP_
140
AN9
VCC
P_14
1AN
7VC
CP_
142
AR9
VCC
P_14
3AR
7VC
CP_
144
A33
VCC
P_14
5A1
3
VCC
P_01
8AG
37VC
CP_
019
AJ37
VCC
P_01
7AF
38
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCCP
+VCC_CORE
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
Penryn(3/3)-GND/BypassCustom
7 45Monday, October 29, 2007
2006/02/13 2006/03/10Compal Electronics, Inc.
Mid Frequence Decoupling
Place these capacitors on L8(Sorth side,Secondary Layer)
Place these capacitors on L8(North side,Secondary Layer)
Place these capacitors on L8(Sorth side,Secondary Layer)
Place these capacitors on L8(North side,Secondary Layer)
ESR <= 1.5m ohmNear CPU CORE regulator
C556
1U_0603_10V4Z
1
2
C32
10U_0805_6.3V6M
1
2
C40
1U_0603_10V4Z
1
2
C19
10U_0805_6.3V6M
1
2
C13
10U_0805_6.3V6M
1
2
C555
1U_0603_10V4Z
1
2
C14
10U_0805_6.3V6M
1
2
C39
1U_0603_10V4Z
1
2
C9
10U_0805_6.3V6M
1
2
C553
1U_0603_10V4Z
1
2
C33
10U_0805_6.3V6M
1
2
C18
10U_0805_6.3V6M
1
2
C31
10U_0805_6.3V6M
1
2
C21
10U_0805_6.3V6M
1
2
C557
1U_0603_10V4Z
1
2
+C34
220U_D
2_2VK_R
9
1
2
C10
10U_0805_6.3V6M
1
2
C20
10U_0805_6.3V6M
1
2
U1D
PENRYN SFF_UFCBGA956
VSS[082] AM36
VSS[148] AW29
VSS[002]F44VSS[003]D44VSS[004]D42VSS[005]F42VSS[006]H42VSS[007]K42VSS[008]M42VSS[009]P42VSS[010]T42VSS[011]V42VSS[012]Y42VSS[013]AB42VSS[014]AD42VSS[015]AF42VSS[016]AH42VSS[017]AK42VSS[018]AM42VSS[019]AP42VSS[020]AY44VSS[021]AV44VSS[022]AT42VSS[023]AV42VSS[024]AY42VSS[025]BA43VSS[026]BB42VSS[027]C39VSS[028]E39VSS[029]G37VSS[030]H38VSS[031]J39VSS[032]L39VSS[033]M38VSS[034]N39VSS[035]R39VSS[036]T38VSS[037]U39VSS[038]W39VSS[039]Y38VSS[040]AA39VSS[041]AC39VSS[042]AD38VSS[043]AE39VSS[044]AG39VSS[045]AH38VSS[046]AJ39VSS[047]AL39VSS[048]AM38VSS[049]AN39VSS[050]AR39VSS[051]AR37VSS[052]AT38VSS[053]AU39VSS[054]AU37VSS[055]AW39VSS[056]AW37VSS[057]BA39VSS[058]BC41VSS[059]BD40VSS[060]BD38VSS[061]B36VSS[062]H34VSS[063]D36VSS[064]K34VSS[065]M34VSS[066]M36VSS[067]P34VSS[068]T34VSS[069]V34VSS[070]T36VSS[071]Y34VSS[072]AB34VSS[073]AD34VSS[074]Y36VSS[075]AD36VSS[076]AF34VSS[077]AH34VSS[078]AH36VSS[079]AK34VSS[080]AM34VSS[081]AP34 VSS[162] E23VSS[161] E25VSS[160] C25VSS[159] C23VSS[158] C21VSS[157] BC31VSS[156] BA31VSS[155] BC27VSS[154] BC29VSS[153] BA27VSS[152] BA29VSS[151] AW31
VSS[083] AR35VSS[084] AU35VSS[085] AV34VSS[086] AW35VSS[087] AW33VSS[088] AY34VSS[089] AT36VSS[090] AV36VSS[091] BA33VSS[092] BC33VSS[093] BB36VSS[094] BD36VSS[095] C27VSS[096] C29VSS[097] C31VSS[098] E29VSS[099] E27VSS[100] G29VSS[101] G27VSS[102] E31VSS[103] G31VSS[104] J29VSS[105] J27
VSS[107] L27VSS[108] N29VSS[109] N27VSS[110] J31VSS[111] L31VSS[112] N31VSS[113] R29VSS[114] R27VSS[115] U29VSS[116] U27VSS[117] R31VSS[118] U31VSS[119] W29VSS[120] W27VSS[121] W31VSS[122] AA29VSS[123] AA27VSS[124] AC29VSS[125] AC27VSS[126] AA31VSS[127] AC31VSS[128] AE29VSS[129] AE27VSS[130] AG29VSS[131] AG27VSS[132] AJ29VSS[133] AJ27VSS[134] AE31VSS[135] AG31VSS[136] AJ31VSS[137] AL29VSS[138] AL27VSS[139] AN29VSS[140] AN27VSS[141] AL31VSS[142] AN31VSS[143] AR29VSS[144] AR27VSS[145] AR31VSS[146] AU29
VSS[106] L29
VSS[001]B42
VSS[149] AW27VSS[150] AU31
VSS[147] AU27
VSS[163] E21
U1E
PENRYN SFF_UFCBGA956
VSS_164G25VSS_165G23VSS_166G21VSS_167J25VSS_168J23VSS_169J21VSS_170L25VSS_171L23VSS_172L21VSS_173N25VSS_174N23VSS_175N21VSS_176R25VSS_177R23VSS_178R21VSS_179U25VSS_180U23VSS_181U21VSS_182W25VSS_183W23VSS_184W21VSS_185AA25VSS_186AA23VSS_187AA21VSS_188AC25VSS_189AC23VSS_190AC21VSS_191AE25VSS_192AE23VSS_193AE21VSS_194AG25VSS_195AG23VSS_196AG21VSS_197AJ25VSS_198AJ23VSS_199AJ21VSS_200AL25VSS_201AL23VSS_202AL21VSS_203AN25VSS_204AN23VSS_205AN21VSS_206AR25VSS_207AR23VSS_208AR21VSS_209AU25VSS_210AU23VSS_211AU21VSS_212AW25VSS_213AW23VSS_214AW21VSS_215BA25VSS_216BA23VSS_217BA21VSS_218BC25VSS_219BC23VSS_220BC21VSS_221C17VSS_222C19VSS_223E19VSS_224E17VSS_225G19VSS_226G17VSS_227J19VSS_228J17VSS_229L19VSS_230L17VSS_231N19VSS_232N17VSS_233R19VSS_234R17VSS_235U19VSS_236U17VSS_237W19VSS_238W17VSS_239AA19VSS_240AA17VSS_241AC19VSS_242AC17VSS_243AE19VSS_244AE17VSS_245AG19VSS_246AG17VSS_247AJ19VSS_248AJ17VSS_249AL19VSS_250AL17VSS_251AN19VSS_252AN17VSS_253AR19VSS_254AR17VSS_255AU19VSS_256AU17VSS_257AW19VSS_258AW17VSS_259BA19VSS_260BA17VSS_261BC19VSS_262BC17VSS_263C11VSS_264C15VSS_265E15VSS_266G15VSS_267H10VSS_268M12VSS_269J15VSS_270L15VSS_271N15VSS_272M10VSS_273T12VSS_274R15VSS_275U15VSS_276W15VSS_277T10VSS_278Y12
VSS_280 AA15VSS_281 AC15VSS_282 Y10VSS_283 AD10VSS_284 AH12VSS_285 AE15VSS_286 AG15VSS_287 AJ15VSS_288 AH10VSS_289 AM12VSS_290 AL15VSS_291 AN15VSS_292 AR15VSS_293 AM10VSS_294 AT12VSS_295 AV12VSS_296 AW13VSS_297 AW11VSS_298 AY12VSS_299 AU15VSS_300 AW15VSS_301 AT10VSS_302 BA13VSS_303 BA11VSS_304 BB12VSS_305 BC11VSS_306 BA15VSS_307 BC15VSS_308 B6VSS_309 D6VSS_310 E9VSS_311 F6VSS_312 G9VSS_313 H6VSS_314 K8VSS_315 K6VSS_316 M8VSS_317 M6VSS_318 P8VSS_319 P6VSS_320 T8VSS_321 T6VSS_322 V8VSS_323 V6VSS_324 U5VSS_325 Y8VSS_326 Y6VSS_327 AB8VSS_328 AB6VSS_329 AD8VSS_330 AD6VSS_331 AF8VSS_332 AF6VSS_333 AH8VSS_334 AH6VSS_335 AK8VSS_336 AK6VSS_337 AM8VSS_338 AM6VSS_339 AP8VSS_340 AP6VSS_341 AT8VSS_342 AT6VSS_343 AU9VSS_344 AV6VSS_345 AU7VSS_346 AW9VSS_347 AY6VSS_348 BA9VSS_349 BB6VSS_350 BC9VSS_351 BD6VSS_352 B4VSS_353 C3VSS_354 E3VSS_355 G3VSS_356 J3VSS_357 L3VSS_358 N3VSS_359 R3VSS_360 U3VSS_361 W3VSS_362 AA3VSS_363 AC3VSS_364 AE3VSS_365 AG3VSS_366 AJ3VSS_367 AL3VSS_368 AN3VSS_369 AR3VSS_370 AU3VSS_371 AW3VSS_372 BA3VSS_373 BC3VSS_374 D2VSS_375 E1VSS_376 G1VSS_377 AW1VSS_378 BA1VSS_379 BB2VSS_380 A41VSS_381 A39VSS_382 A29VSS_383 A27VSS_384 A31VSS_385 A25VSS_386 A23VSS_387 A21VSS_388 A19VSS_389 A17VSS_390 A11VSS_391 A15VSS_392 A7VSS_393 A5VSS_394 A9
VSS_279AD12 VSS_395 BD4
+C35
220U_D
2_2VK_R
9
1
2
C22
10U_0805_6.3V6M
1
2
+C37
220U_D
2_2VK_R
9
1
2
C15
10U_0805_6.3V6M
1
2
C26
10U_0805_6.3V6M
1
2
C28
10U_0805_6.3V6M
1
2
C16
10U_0805_6.3V6M
1
2
C24
10U_0805_6.3V6M
1
2
C42
1U_0603_10V4Z
1
2
C38
1U_0603_10V4Z
1
2
C43
1U_0603_10V4Z
1
2
C27
10U_0805_6.3V6M
1
2
C23
10U_0805_6.3V6M
1
2
C12
10U_0805_6.3V6M
1
2
C552
1U_0603_10V4Z
1
2
C30
10U_0805_6.3V6M
1
2
+C36
220U_D
2_2VK_R
9
1
2
C554
1U_0603_10V4Z
1
2
C11
10U_0805_6.3V6M
1
2
C25
10U_0805_6.3V6M
1
2
C41
1U_0603_10V4Z
1
2
C8
10U_0805_6.3V6M
1
2
C29
10U_0805_6.3V6M
1
2
C17
10U_0805_6.3V6M
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PM_EXTTS#0
PM_EXTTS#1
SMRCOMP_VOHSMRCOMP_VOL
SMRCOMP#SMRCOMP
V_DDR_MCH_REF
H_RCOMP
H_SWNG
H_D#32
H_D#24
H_D#19
H_D#59
H_D#42
H_D#36
H_D#3
H_D#40
H_RCOMP
H_D#55
H_D#4
H_D#60
H_D#30
H_D#34
H_D#27
H_D#1
H_D#23
H_D#51
H_D#48
H_D#46
H_D#44
H_D#39
H_D#22
H_D#15H_D#14
H_D#9
H_D#56
H_D#54
H_D#8
H_D#37
H_D#35
H_D#28
H_D#25
H_D#12
H_D#38
H_D#26
H_D#11
H_D#7
H_D#53H_D#52
H_D#41
H_D#18
H_D#10
H_VREF
H_D#57
H_D#33
H_D#29
H_SWNG
H_D#6
H_D#45
H_D#43
H_D#20
H_D#61
H_D#17
H_D#63
H_D#58
H_D#21
H_D#16
H_D#50
H_D#62
H_D#5
H_D#49
H_D#31
H_D#2
H_D#47
H_D#13
H_D#0
PM_EXTTS#1PM_EXTTS#0
CL_VREF
TSATN#
H_A#7
H_A#12
H_A#32
H_A#24
H_A#3
H_A#18
H_A#21
H_A#16
H_A#19
H_A#31
H_A#27
H_A#5
H_A#30
H_A#9
H_A#26
H_A#14
H_A#11
H_A#22H_A#23
H_A#34
H_A#20
H_A#8
H_A#15
H_A#6
H_A#25
H_A#17
H_A#4
H_A#13
H_A#33
H_A#29H_A#28
H_A#10
H_A#35
H_VREF
SM_PWROK
TP_SM_DRAMRST#SM_REXT
V_DDR_MCH_REF
TCK
TMS
TDITDO
SMRCOMP_VOL
SMRCOMP_VOH
H_D#[0..63]5
H_CPUSLP#5
DDR_CKE0_DIMMA 14DDR_CKE1_DIMMA 14
DDR_CS0_DIMMA# 14DDR_CS1_DIMMA# 14
M_CLK_DDR0 14M_CLK_DDR1 14
M_CLK_DDR#0 14M_CLK_DDR#1 14
M_ODT0 14M_ODT1 14
DMI_TXP0 22
DMI_RXN0 22
DMI_RXP0 22
DMI_TXN0 22
CLKREQ#_B 16MCH_ICH_SYNC# 22
CL_CLK0 22CL_DATA0 22M_PWROK 22,35
H_RESET#4
DMI_TXN1 22DMI_TXN2 22DMI_TXN3 22
DMI_TXP1 22DMI_TXP2 22DMI_TXP3 22
DMI_RXN1 22DMI_RXN2 22DMI_RXN3 22
DMI_RXP1 22DMI_RXP2 22DMI_RXP3 22
PM_BMBUSY#22
PM_DPRSLPVR22,42
H_DPRSTP#5,21,42PM_EXTTS#014
H_THERMTRIP#4,21
CFG510
CFG910CFG1010
CFG610CFG710
CFG1310CFG1210
CFG1610
CFG2010CFG1910
MCH_CLKSEL016MCH_CLKSEL116MCH_CLKSEL216
PLT_RST#20,26,32
CL_RST# 22
CLK_MCH_3GPLL 16CLK_MCH_3GPLL# 16
CLK_MCH_DREFCLK 16CLK_MCH_DREFCLK# 16MCH_SSCDREFCLK 16MCH_SSCDREFCLK# 16
H_A#[3..35] 4
H_ADS# 4
H_ADSTB#1 4H_ADSTB#0 4
H_BPRI# 4H_BNR# 4
H_DEFER# 4H_BR0# 4
H_DBSY# 4
CLK_MCH_BCLK# 16H_DPWR# 5
CLK_MCH_BCLK 16
H_DRDY# 4H_HIT# 4H_HITM# 4H_LOCK# 4H_TRDY# 4
H_DSTBN#0 5H_DSTBN#1 5H_DSTBN#2 5H_DSTBN#3 5
H_REQ#3 4H_REQ#2 4H_REQ#1 4
H_REQ#4 4
H_REQ#0 4
H_DINV#0 5H_DINV#1 5H_DINV#2 5H_DINV#3 5
H_DSTBP#0 5H_DSTBP#1 5H_DSTBP#2 5H_DSTBP#3 5
H_RS#2 4H_RS#1 4H_RS#0 4
DFGT_VID_3 43DFGT_VID_2 43DFGT_VID_1 43DFGT_VID_0 43
GFXVR_EN 43
DFGT_VID_4 43
V_DDR_MCH_REF14,15
M_CLK_DDR2 15M_CLK_DDR3 15
M_CLK_DDR#2 15M_CLK_DDR#3 15
DDR_CKE2_DIMMB 15DDR_CKE3_DIMMB 15
DDR_CS2_DIMMB# 15DDR_CS3_DIMMB# 15
M_ODT2 15M_ODT3 15
PM_EXTTS#115PM_PWROK22,33,42,43
+VCCP+VCCP
+3VS
+1.8V
+1.8V
+1.05VM
+VCCP
+3VS
+1.8V
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
Cantiga(1/6)-AGTL/DMI/DDRCustom
8 45Monday, October 29, 2007
2006/02/13 2006/03/10Compal Electronics, Inc.
Layout Note:H_RCOMP / H_VREF / H_SWNG
trace width and spacing is 10/20
Layout Note: V_DDR_MCH_REF tracewidth and spacing is 20/20.
Near B6 pinwithin 100 mils from NB
layout note:
Route H_SCOMP and H_SCOMP# with trace width,spacing and impedance (55 ohm) same as FSB datatraces
Romoved, causedon't need HDMI.7/19
Trace < = 500mils
layout note:
Place them close to U4 pin BC51.
Modify in 9/26
Add R428 in 9/26
Del R48. 9/27
Add them for Boundary Scan. 10/23
R49 0_0402_5%1 2
R616 54.9_0402_1%1 2
T7
HOST
U4A
CANTIGA GMCH SFF_FCBGA1363
H_A#_10 J15H_A#_11 D16H_A#_12 C17H_A#_13 D14H_A#_14 K16H_A#_15 F16H_A#_16 B16H_A#_17 C21H_A#_18 D18H_A#_19 J19H_A#_20 J21H_A#_21 B18H_A#_22 D22H_A#_23 G19H_A#_24 J17H_A#_25 L21H_A#_26 L19H_A#_27 G21H_A#_28 D20H_A#_29 K22
H_A#_3 L15
H_A#_30 F18H_A#_31 K20
H_A#_4 B14H_A#_5 C15H_A#_6 D12H_A#_7 F14H_A#_8 G17H_A#_9 B12
H_ADS# F10H_ADSTB#_0 A15H_ADSTB#_1 C19
H_BNR# C9H_BPRI# B8
H_BREQ# C11
HPLL_CLK# AJ11
H_CPURST#J11
HPLL_CLK AH10
H_D#_0J7
H_REQ#_2 C13H_REQ#_3 G13
H_D#_1H6
H_D#_10M6
H_D#_20P10
H_D#_30W11
H_D#_40AC3
H_D#_50AD2
H_D#_60AF12
H_D#_8L1H_D#_9M10
H_DBSY# D6
H_D#_11N11H_D#_12L7H_D#_13K6H_D#_14M4H_D#_15K4H_D#_16P6H_D#_17W9H_D#_18V6H_D#_19V2
H_D#_2L11
H_D#_21W7H_D#_22N9H_D#_23P4H_D#_24U9H_D#_25V4H_D#_26U1H_D#_27W3H_D#_28V10H_D#_29U7
H_D#_3J3
H_D#_31U11H_D#_32AC11H_D#_33AC9H_D#_34Y4H_D#_35Y10H_D#_36AB6H_D#_37AA9H_D#_38AB10H_D#_39AA1
H_D#_4H4
H_D#_41AC7H_D#_42AD12H_D#_43AB4H_D#_44Y6H_D#_45AD10H_D#_46AA11H_D#_47AB2H_D#_48AD4H_D#_49AE7
H_D#_5G3
H_D#_51AD6H_D#_52AE3H_D#_53AG9H_D#_54AG7H_D#_55AE11H_D#_56AK6H_D#_57AF6H_D#_58AJ9H_D#_59AH6
H_D#_6K10
H_D#_61AH4H_D#_62AJ7H_D#_63AE9
H_D#_7K12
H_DEFER# E5
H_DINV#_0 L9H_DINV#_1 N7H_DINV#_2 AA7H_DINV#_3 AG3
H_DPWR# G11H_DRDY# H2
H_DSTBN#_0 K2H_DSTBN#_1 N3H_DSTBN#_2 AA3H_DSTBN#_3 AF4
H_DSTBP#_0 L3H_DSTBP#_1 M2H_DSTBP#_2 Y2H_DSTBP#_3 AF2
H_AVREFL17H_DVREFK18
H_TRDY# D8
H_HIT# C7H_HITM# F8H_LOCK# A11
H_REQ#_0 J13H_REQ#_1 L13
H_REQ#_4 G15
H_A#_32 F20H_A#_33 F22H_A#_34 B20H_A#_35 A19
H_SWINGB6
H_CPUSLP#G9
H_RCOMPD4
H_RS#_0 F4H_RS#_1 F2H_RS#_2 G7
T11
T27
T24
T92
T31
T10
R53
1K_0
402_
1%
12
T5
T18
T26 PAD
R327 0_0402_5%1 2
T9
C51
0.1U
_040
2_16
V4Z
@
1
2
R61
100_
0402
_1%
12
C47
0.01
U_0
402_
25V7
K
1
2
C50
0.1U
_040
2_16
V4Z
1
2
R51511_0402_1%
12
R60
24.9
_040
2_1%
12
PM
MISC
NC
CLK
DMIC
FG
RSVD
GRAPHICS VID
ME
HDA
DDR CLK/ CONTROL/COMPENSATION
U4B
CANTIGA GMCH SFF_FCBGA1363
SA_CK_0 BB32SA_CK_1 BA25SB_CK_0 BA33
SA_CK#_0 BA31SA_CK#_1 BC25SB_CK#_0 BC33
SA_CKE_0 BC35SA_CKE_1 BE33SB_CKE_0 BE37SB_CKE_1 BC37
SA_CS#_0 BK18SA_CS#_1 BK16SB_CS#_0 BE23SB_CS#_1 BC19
SA_ODT_0 BJ17SA_ODT_1 BJ19SB_ODT_0 BC17SB_ODT_1 BE17
SM_RCOMP BL25SM_RCOMP# BK26
SM_VREF BC51
CFG_2G25
CFG_0K26CFG_1G23
CFG_3J25CFG_4L25CFG_5L27CFG_6F24CFG_7D24CFG_8D26CFG_9J23CFG_10B26CFG_11A23CFG_12C23CFG_13B24CFG_14B22CFG_15K24CFG_16C25CFG_17L23
PM_SYNC#J35
PM_EXT_TS#_0J39PM_EXT_TS#_1L39PWROKAY39RSTIN#BB18
DPLL_REF_CLK B42DPLL_REF_CLK# D42
DPLL_REF_SSCLK B50DPLL_REF_SSCLK# D50
DMI_RXN_0 AG55DMI_RXN_1 AL49DMI_RXN_2 AH54DMI_RXN_3 AL47
DMI_RXP_0 AG53DMI_RXP_1 AK50DMI_RXP_2 AH52DMI_RXP_3 AL45
DMI_TXN_0 AG49DMI_TXN_1 AJ49DMI_TXN_2 AJ47DMI_TXN_3 AG47
DMI_TXP_0 AF50DMI_TXP_1 AH50DMI_TXP_2 AJ45DMI_TXP_3 AG45
RSVD10AN45
RSVD12AT44 RSVD11AP44
RSVD13AN47
PM_DPRSTP#F6
SB_CK_1 BA23
SB_CK#_1 BB24
RSVD5AN11RSVD6AM10RSVD7AK10RSVD8AL11
RSVD1J43RSVD2L43RSVD3J41RSVD4L41
GFX_VID_0 G33GFX_VID_1 G37GFX_VID_2 F38GFX_VID_3 F36
GFX_VR_EN G39
SM_RCOMP_VOH BK32SM_RCOMP_VOL BL31
THERMTRIP#K28DPRSLPVRK36
RSVD9F12
CL_CLK AK52CL_DATA AK54
CL_PWROK AW40CL_RST# AL53CL_VREF AL55
NC_1A7NC_2A49NC_3A52NC_4A54NC_5B54NC_6D55NC_7G55NC_8BE55NC_9BH55NC_10BK55NC_11BK54NC_12BL54NC_13BL52NC_14BL49NC_15BL7
SDVO_CTRLCLK B38SDVO_CTRLDATA A37
CLKREQ# C31
RSVD14C27
ICH_SYNC# K42
PEG_CLK# P50PEG_CLK R49
TSATN# D10NC_16BL4
GFX_VID_4 G35
NC_17BL2NC_18BK2NC_19BK1NC_20BH1NC_21BE1NC_22G1
DDPC_CTRLDATA F32DDPC_CTRLCLK F34
HDA_BCLK C29HDA_RST# B30
HDA_SDI D28HDA_SDO A27
HDA_SYNC B28
CFG_18L33CFG_19K32CFG_20K34
SM_PWROK AY37SM_REXT BH20
SM_DRAMRST# BA37
RSVD15D30
RSVD17J9
RSVD20AW42
RSVD22BB20RSVD23BE19RSVD24BF20RSVD25BF18
T19
R47 10K_0402_5%1 2
R54
221_
0603
_1% 1
2
C45
0.01
U_0
402_
25V7
K
1
2
T29
C52
0.1U
_040
2_16
V4Z
1
2
T91
R5210K_0402_1%
12
T20
R43 80.6_0402_1%1 2
T28
R46 10K_0402_5% 1 2
T32
T8
T6
T21
R2811K_0402_5% @1 2
R391K_0402_1%
12
T89
C48
0.1U
_040
2_16
V4Z
@
1
2
R428 100_0402_1% 1 2
R59
2K_0
402_
1%
12
T22
R403.01K_0402_1%
12
R44 10K_0402_1%
1 2
T25
R45 499_0402_1%1 2
T13
R411K_0402_1%
12
C49
0.1U_0402_16V4Z
1
2
C44
2.2U
_060
3_6.
3V4Z
1
2
T23
T88
C46
2.2U
_060
3_6.
3V4Z
1
2
T12
T93
R311 4.7K_0402_5%@1 2
R5510K_0402_1%
12
T30
T90
R2514.7K_0402_5%@1 2
R619 1K_0402_5% @1 2
R501K_0402_1%
12
R42 80.6_0402_1%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D63DDR_A_D62
DDR_A_D8
DDR_A_D3DDR_A_D4
DDR_A_D7
DDR_A_D5DDR_A_D6
DDR_A_D59DDR_A_D58DDR_A_D57DDR_A_D56
DDR_A_D47DDR_A_D46
DDR_A_D42DDR_A_D43
DDR_A_D34
DDR_A_D39
DDR_A_D44DDR_A_D45
DDR_A_D35
DDR_A_D41DDR_A_D40
DDR_A_D38
DDR_A_D36DDR_A_D37
DDR_A_D32DDR_A_D33
DDR_A_DQS#0
DDR_A_DQS#2
DDR_A_DQS#5
DDR_A_DQS#3
DDR_A_DQS#1
DDR_A_DQS#4
DDR_A_DQS#6
DDR_A_DM7
DDR_A_DM2
DDR_A_DM5DDR_A_DM4
DDR_A_DM1
DDR_A_DM6
DDR_A_DM3
DDR_A_DM0
DDR_A_D61DDR_A_D60
DDR_A_D2DDR_A_D1DDR_A_D0
DDR_A_D55DDR_A_D54
DDR_A_D51
DDR_A_D48
DDR_A_D50DDR_A_D49
DDR_A_D52DDR_A_D53
DDR_A_MA14
DDR_A_MA0
DDR_A_MA2DDR_A_MA1
DDR_A_MA4DDR_A_MA5
DDR_A_MA3
DDR_A_MA12
DDR_A_MA7DDR_A_MA6
DDR_A_MA9DDR_A_MA8
DDR_A_MA13
DDR_A_MA10DDR_A_MA11
DDR_A_DQS0
DDR_A_D31
DDR_A_DQS2DDR_A_DQS1
DDR_A_DQS6DDR_A_DQS5DDR_A_DQS4DDR_A_DQS3
DDR_A_DQS7
DDR_A_D14DDR_A_D15
DDR_A_D25DDR_A_D24
DDR_A_D26DDR_A_D27
DDR_A_D30
DDR_A_D9
DDR_A_D13DDR_A_D12
DDR_A_D10DDR_A_D11
DDR_A_D29DDR_A_D28
DDR_A_D19DDR_A_D20
DDR_A_D16
DDR_A_D21
DDR_A_D17
DDR_A_D22
DDR_A_D18
DDR_A_D23
DDR_A_DQS#7
DDR_B_D11
DDR_B_D57
DDR_B_D46
DDR_B_D7
DDR_B_D0
DDR_B_D44
DDR_B_D40
DDR_B_D30
DDR_B_D27
DDR_B_D15
DDR_B_D3
DDR_B_D35
DDR_B_D25
DDR_B_D23
DDR_B_D49
DDR_B_D37
DDR_B_D19
DDR_B_D48DDR_B_D47
DDR_B_D36
DDR_B_D18
DDR_B_D8
DDR_B_D62
DDR_B_D60
DDR_B_D9
DDR_B_D2
DDR_B_D52
DDR_B_D50
DDR_B_D22
DDR_B_D56
DDR_B_D51
DDR_B_D39
DDR_B_D28
DDR_B_D17
DDR_B_D45
DDR_B_D6
DDR_B_D61
DDR_B_D58
DDR_B_D1
DDR_B_D54
DDR_B_D41
DDR_B_D31
DDR_B_D12
DDR_B_D5
DDR_B_D38
DDR_B_D32
DDR_B_D20
DDR_B_D16
DDR_B_D14
DDR_B_D33
DDR_B_D63
DDR_B_D59
DDR_B_D42
DDR_B_D55
DDR_B_D53
DDR_B_D43
DDR_B_D29
DDR_B_D26
DDR_B_D13
DDR_B_D4
DDR_B_D34
DDR_B_D24
DDR_B_D21
DDR_B_D10
DDR_B_DQS7
DDR_B_MA9
DDR_B_MA0
DDR_B_MA7
DDR_B_DQS0
DDR_B_DM3
DDR_B_DQS1
DDR_B_DM1
DDR_B_DQS5
DDR_B_DM0
DDR_B_DQS#1
DDR_B_MA2
DDR_B_MA13
DDR_B_DM5
DDR_B_MA4
DDR_B_DQS#5
DDR_B_DQS#7
DDR_B_DM6
DDR_B_DQS4
DDR_B_MA5
DDR_B_MA3
DDR_B_MA11
DDR_B_MA6
DDR_B_DQS3
DDR_B_MA8
DDR_B_MA10
DDR_B_DQS#3DDR_B_DQS#4
DDR_B_DQS#0
DDR_B_DM7
DDR_B_MA12
DDR_B_DM4
DDR_B_MA1
DDR_B_DQS2
DDR_B_DQS6
DDR_B_DM2
DDR_B_DQS#6
DDR_B_DQS#2
DDR_B_MA14
DDR_A_BS1 14DDR_A_BS0 14
DDR_A_BS2 14
DDR_A_D[0..63]14
DDR_A_DQS#[0..7] 14
DDR_A_WE# 14
DDR_A_DM[0..7] 14
DDR_A_RAS# 14
DDR_A_MA[0..14] 14
DDR_A_DQS[0..7] 14
DDR_A_CAS# 14
DDR_B_D[0..63]15
DDR_B_BS0 15DDR_B_BS1 15DDR_B_BS2 15
DDR_B_RAS# 15DDR_B_CAS# 15DDR_B_WE# 15
DDR_B_DM[0..7] 15
DDR_B_DQS[0..7] 15
DDR_B_DQS#[0..7] 15
DDR_B_MA[0..14] 15
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
Cantiga(2/6)-DDR2 A/B CHCustom
9 45Monday, October 29, 2007
2006/02/13 2006/03/10Compal Electronics, Inc.
DDR SYSTEM MEMORY B
U4E
CANTIGA GMCH SFF_FCBGA1363
SB_DQ_0AP54SB_DQ_1AM52
SB_DQ_10BB52SB_DQ_11BC53SB_DQ_12AV52SB_DQ_13AW55SB_DQ_14BD52SB_DQ_15BC55SB_DQ_16BF54SB_DQ_17BE51SB_DQ_18BH48SB_DQ_19BK48
SB_DQ_2AR55
SB_DQ_20BE53SB_DQ_21BH52SB_DQ_22BK46SB_DQ_23BJ47SB_DQ_24BL45SB_DQ_25BJ45SB_DQ_26BL41SB_DQ_27BH44SB_DQ_28BH46SB_DQ_29BK44
SB_DQ_3AV54
SB_DQ_30BK40SB_DQ_31BJ39SB_DQ_32BK10SB_DQ_33BH10SB_DQ_34BK6SB_DQ_35BH6SB_DQ_36BJ9SB_DQ_37BL11SB_DQ_38BG5SB_DQ_39BJ5
SB_DQ_4AM54
SB_DQ_40BG3SB_DQ_41BF4SB_DQ_42BD4SB_DQ_43BA3SB_DQ_44BE5SB_DQ_45BF2SB_DQ_46BB4SB_DQ_47AY4SB_DQ_48BA1SB_DQ_49AP2
SB_DQ_5AN53
SB_DQ_50AU1SB_DQ_51AT2SB_DQ_52AT4SB_DQ_53AV4SB_DQ_54AU3SB_DQ_55AR3SB_DQ_56AN1SB_DQ_57AP4SB_DQ_58AL3SB_DQ_59AJ1
SB_DQ_6AT52
SB_DQ_60AK4SB_DQ_61AM4SB_DQ_62AH2SB_DQ_63AK2
SB_DQ_7AU53SB_DQ_8AW53SB_DQ_9AY52
SB_BS_0 BJ13SB_BS_1 BK12SB_BS_2 BK38
SB_CAS# BH14
SB_DM_0 AP52SB_DM_1 AY54SB_DM_2 BJ49SB_DM_3 BJ43SB_DM_4 BH12SB_DM_5 BD2SB_DM_6 AY2SB_DM_7 AJ3
SB_DQS_0 AR53SB_DQS_1 BA53SB_DQS_2 BH50SB_DQS_3 BK42SB_DQS_4 BH8SB_DQS_5 BB2SB_DQS_6 AV2SB_DQS_7 AM2
SB_DQS#_0 AT54SB_DQS#_1 BB54SB_DQS#_2 BJ51SB_DQS#_3 BH42SB_DQS#_4 BK8SB_DQS#_5 BC3SB_DQS#_6 AW3SB_DQS#_7 AN3
SB_MA_0 BJ15SB_MA_1 BJ33
SB_MA_10 BH16SB_MA_11 BK36SB_MA_12 BH38SB_MA_13 BJ11
SB_MA_2 BH24SB_MA_3 BA17SB_MA_4 BF36SB_MA_5 BH36SB_MA_6 BF34SB_MA_7 BK34SB_MA_8 BJ37SB_MA_9 BH40
SB_MA_14 BL37
SB_RAS# BE21
SB_WE# BK14
DDR SYSTEM MEMORY A
U4D
CANTIGA GMCH SFF_FCBGA1363
SA_DQ_0AP46SA_DQ_1AU47
SA_DQ_10AW49SA_DQ_11BA49SA_DQ_12BC49SA_DQ_13AV46SA_DQ_14BA47SA_DQ_15AY50SA_DQ_16BF46SA_DQ_17BC47SA_DQ_18BF50SA_DQ_19BF48
SA_DQ_2AT46
SA_DQ_20BC43SA_DQ_21BE49SA_DQ_22BA43SA_DQ_23BE47SA_DQ_24BF42SA_DQ_25BC39SA_DQ_26BF44SA_DQ_27BF40SA_DQ_28BB40SA_DQ_29BE43
SA_DQ_3AU49
SA_DQ_30BF38SA_DQ_31BE41SA_DQ_32BA15SA_DQ_33BE11SA_DQ_34BE15SA_DQ_35BF14SA_DQ_36BB14SA_DQ_37BC15SA_DQ_38BE13SA_DQ_39BF16
SA_DQ_4AR45
SA_DQ_40BF10SA_DQ_41BC11SA_DQ_42BF8SA_DQ_43BG7SA_DQ_44BC7SA_DQ_45BC9SA_DQ_46BD6SA_DQ_47BF12SA_DQ_48AV6SA_DQ_49BB6
SA_DQ_5AN49
SA_DQ_50AW7SA_DQ_51AY6SA_DQ_52AT10SA_DQ_53AW11SA_DQ_54AU11SA_DQ_55AW9SA_DQ_56AR11SA_DQ_57AT6SA_DQ_58AP6SA_DQ_59AL7
SA_DQ_6AV50
SA_DQ_60AR7SA_DQ_61AT12SA_DQ_62AM6SA_DQ_63AU7
SA_DQ_7AP50SA_DQ_8AW47SA_DQ_9BD50
SA_BS_0 BC21SA_BS_1 BJ21SA_BS_2 BJ41
SA_CAS# BK20
SA_MA_0 BC23SA_MA_1 BF22SA_MA_2 BE31SA_MA_3 BC31SA_MA_4 BH26SA_MA_5 BJ35SA_MA_6 BB34SA_MA_7 BH32SA_MA_8 BB26SA_MA_9 BF32
SA_MA_10 BA21SA_MA_11 BG25SA_MA_12 BH34SA_MA_13 BH18SA_MA_14 BE25
SA_DQS_0 AR47SA_DQS_1 BA45SA_DQS_2 BE45SA_DQS_3 BC41SA_DQS_4 BC13SA_DQS_5 BB10SA_DQS_6 BA7SA_DQS_7 AN7
SA_DQS#_0 AR49SA_DQS#_1 AW45SA_DQS#_2 BC45SA_DQS#_3 BA41SA_DQS#_4 BA13SA_DQS#_5 BA11SA_DQS#_6 BA9SA_DQS#_7 AN9
SA_DM_0 AT50SA_DM_1 BB50SA_DM_2 BB46SA_DM_3 BE39SA_DM_4 BB12SA_DM_5 BE7SA_DM_6 AV10SA_DM_7 AR9
SA_RAS# BH22
SA_WE# BL15
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PEGCOMP
CRT_VSYNC_R
CRT_HSYNC_R
D_GREEN
D_BLUE
D_RED
CFG108
CFG138
CFG128
CFG208
CFG198
CRT_VSYNC17
DDC2_CLK18DDC2_DATA18
BLON_PWM18ENABLT18
ENAVDD18
TXCLK_L-18TXCLK_L+18
TXOUT_L0+18TXOUT_L1+18TXOUT_L2+18
TXOUT_L0-18TXOUT_L1-18TXOUT_L2-18
CRT_HSYNC17
D_BLUE17
D_GREEN17
D_RED17
CRT_DDC_DATA17CRT_DDC_CLK17
CFG78
CFG98
CFG68
CFG58
CFG168
+VCC_PEG
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
Cantiga(3/6)-VGA/LVDS/TVCustom
10 45Monday, October 29, 2007
2006/02/13 2006/03/10Compal Electronics, Inc.
PEGCOMP trace widthand spacing is 20/25 mils.
000 = FSB 1066MHz
CFG[4:3] Reserved
CFG60 = The iTPM Host Interface is enable1 = The iTPM Host Interface is disable *
Reserved
CFG10 (PCIE Lookback enable)
(Default)11 = Normal Operation10 = All Z Mode Enabled00 = Reserved01 = XOR Mode Enabled
*
0 = Enable1 = Disable *
CFG9 (PCIE Graphics Lane Reversal)
CFG[2:0] FSB Freq select
Reserved
ReservedCFG[15:14]
Strap Pin Table
ReservedCFG[18:17]
(Lane number in Order)
Others = Reserved011 = FSB 667MHz010 = FSB 800MHz
*
1 = Reverse Lane
0 = Reverse Lane,15->0, 14->1
1 = Enabled
0 = Normal Operation
0 = Disabled
*
0 = DMI x 2
*
*
*
1 = PCIE/SDVO are operating simu.0 = Only PCIE or SDVO is operational. *
1 = Normal Operation,Lane Number in order
1 = DMI x 4
0 =(TLS)chiper suite with no confidentiality1 =(TLS)chiper suite with confidentiality
CFG5 (DMI select)
CFG19 (DMI Lane Reversal)
CFG16 (FSB Dynamic ODT)
CFG6
CFG7 (Intel Management Engine Crypto strap)
CFG20 (PCIE/SDVO concurrent)
CFG11CFG[13:12] (XOR/ALLZ)
CFG8
Close to pin D32 and keep30mil space to otherpart/trace.
layout note:
Place R64 <500mils to U4 pin U45&T44.
For EMI. 9/26
Tie to GND. 9/28
Del TV_LUMA & CRMA in 10/12.
Del R82, R83. 10/18
For make layout clearance, delTP for channel B. 10/18
10/18
10/18
10/19
10/19
Remove R84 ~ R86 sincealready have 75ohm ofpage17. 10/27
R90 4.02K_0402_1%@ 1 2
T33
R70 30.1_0402_1%
1 2
R93 2.21K_0402_1% @1 2
R336 75_0402_5%@1 2
R71 2.21K_0402_1% @1 2
R78 2.21K_0402_1%@1 2
R75 2.21K_0402_1% @1 2
R69 2.21K_0402_1% @1 2R72 30.1_0402_1%
1 2
R64 49.9_0402_1%1 2
R66 10K_0402_5%
1 2
R572 75_0402_5%@1 2
R92 4.02K_0402_1% @1 2
R337 75_0402_5%@1 2
R91 2.21K_0402_1% @1 2
R741.02K_0402_1%
12
LVDS
PCI-EXPRESS GRAPHICS
TVVGA
U4C
CANTIGA GMCH SFF_FCBGA1363
PEG_COMPI U45PEG_COMPO T44
PEG_RX#_0 D52PEG_RX#_1 G49PEG_RX#_2 K54PEG_RX#_3 H50PEG_RX#_4 M52PEG_RX#_5 N49PEG_RX#_6 P54PEG_RX#_7 V46PEG_RX#_8 Y50PEG_RX#_9 V52
PEG_RX#_10 W49PEG_RX#_11 AB54PEG_RX#_12 AD46PEG_RX#_13 AC55PEG_RX#_14 AE49PEG_RX#_15 AF54
PEG_RX_0 E51PEG_RX_1 F48PEG_RX_2 J55PEG_RX_3 J49PEG_RX_4 M54PEG_RX_5 M50PEG_RX_6 P52PEG_RX_7 U47PEG_RX_8 AA49PEG_RX_9 V54
PEG_RX_10 V50PEG_RX_11 AB52PEG_RX_12 AC47PEG_RX_13 AC53PEG_RX_14 AD50PEG_RX_15 AF52
PEG_TX#_0 L47
PEG_TX#_10 AB46
PEG_TX#_3 H54PEG_TX#_4 L55PEG_TX#_5 T46
PEG_TX#_7 U49PEG_TX#_8 T54PEG_TX#_9 Y46
PEG_TX#_1 F52
PEG_TX#_11 W53PEG_TX#_12 Y54PEG_TX#_13 AC49PEG_TX#_14 AF46PEG_TX#_15 AD54
PEG_TX#_2 P46
PEG_TX_0 J47PEG_TX_1 F54PEG_TX_2 N47PEG_TX_3 H52PEG_TX_4 L53PEG_TX_5 R47PEG_TX_6 R55PEG_TX_7 T50PEG_TX_8 T52PEG_TX_9 W47
PEG_TX_10 AA47PEG_TX_11 W55PEG_TX_12 Y52PEG_TX_13 AB50PEG_TX_14 AE47PEG_TX_15 AD52
L_CTRL_CLKK38
L_CTRL_DATAL37L_DDC_CLKJ37L_DDC_DATAL35
L_VDD_ENB36LVDS_IBGF50LVDS_VBGH46LVDS_VREFHP44LVDS_VREFLK46LVDSA_CLK#D46LVDSA_CLKB46
LVDSA_DATA#_0G45LVDSA_DATA#_1F46LVDSA_DATA#_2G41
LVDSA_DATA_1G47LVDSA_DATA_2F40
LVDSB_CLK#D44LVDSB_CLKB44
LVDSB_DATA#_0B40LVDSB_DATA#_1A41LVDSB_DATA#_2F42
LVDSB_DATA_1C41LVDSB_DATA_2G43
L_BKLT_ENC37
TVA_DACJ27TVB_DACE27TVC_DACG27
TVA_RTNF26
CRT_BLUEJ29
CRT_DDC_CLKD36CRT_DDC_DATAC35
CRT_GREENG29
CRT_HSYNCJ33CRT_TVO_IREFD32
CRT_REDF30
CRT_IRTNE29
CRT_VSYNCG31
LVDSA_DATA_0F44
LVDSB_DATA_0D40
L_BKLT_CTRLD38
TV_DCONSEL_0B34TV_DCONSEL_1D34
PEG_TX#_6 R53
LVDSA_DATA#_3C45
LVDSA_DATA_3A45
LVDSB_DATA#_3D48
LVDSB_DATA_3B48
R76 2.21K_0402_1% @1 2
R79 2.21K_0402_1% @1 2
R67 2.37K_0402_1%
1 2
R65 10K_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05VM_A_SM
+1.8V_TXLVDS
+3VS +3VS_DAC_BG
+3VS+3VS_TVDAC
+1.05VM_PEGPLL
+1.05VM_HPLL
+1.05VM_HPLL
+1.05VM_MPLL
+1.05VM
+1.05VM_PEGPLL
+V1.05VM_AXF
+1.05VM+1.05VM_DMI
+1.8V+1.8V_SM_CK
+1.05VM_DPLLA +1.05VM
+VCC_PEG
+VCCP
+1.8V_SM_CK
+3VS_HV
+VCC_PEG
+1.8V_TXLVDS
+1.5VS+1.5VS_QDAC
+1.05VM_DMI
+1.05VM_MPLL
+1.05VM_DPLLB
+1.05VM_HPLL
+1.05VM_DPLLA
+1.5VS_PEG_BG
+1.5VS
+1.05VM_PEGPLL
+V1.05VM_AXF
+1.05VM_DPLLB
+VCCP
+3VS
+VCCP_D
+3VS_HV
+1.5VS_TVDAC
+1.5VS_QDAC
+1.8V_TXLVDS +1.8V
+1.8V
+1.8V_LVDS
+3VS_DAC_CRT+3VS
+1.5VS_TVDAC +1.5VS
+1.05VM_A_SM_CK
+1.05VM
+1.05VM
+1.05VM
+1.05VM
+1.05VM
+1.05VM
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
Cantiga(4/6)-PWRCustom
11 45Monday, October 29, 2007
2006/02/13 2006/03/10Compal Electronics, Inc.
9/21
9/21
9/27
9/27
9/27
9/27
9/27
9/27
9/27
9/27
9/27
9/27
9/27
9/27
9/27
9/27
Tie to GND. 9/27
9/29
9/29
C100
0.47U_0603_10V
7K
1
2
C72
0.1U_0402_16V
4Z
1
2
C96
10U_0805_10V
4Z
1
2
R94
BLM18PG181SN1D_06031 2
C67
10U_0805_6.3V
6M
1
2
C84
4.7U_0805_10V
4Z
1
2
C56
1U_0603_10V
4Z
1
2
R104 0_0603_5% 1 2
C88
10U_0805_6.3V
6M
1
2
C91
0.1U_0402_16V
4Z 1
2
R111 0_0603_5% 12
R99 0_0805_5%
1 2
R106 0_0805_5% 1 2
C81
10U
_080
5_6.
3V6M
1
2
C87
4.7U_0805_10V
4Z
1
2
C71
0.01U_0402_16V
7K
1
2
+
C53
220U_D
2_4VM
1
2
C55
10U_0805_10V
4Z
1
2
C58
0.47U_0603_10V
7K
1
2
R107 0_0805_5%1 2
C62
0.1U_0402_16V
4Z
1
2
R95 0_0603_5%
1 2
C69
10U_0805_6.3V
6M
1
2
R113 0_0402_5% 1 2
C76
0.01U_0402_16V
7K
1
2
R59
70_
0603
_5%
12
R1010_0402_5%1 2
R102
BLM18PG181SN1D_06031 2
C92
10U_0805_6.3V
6M
1
2
C104
0.1U_0402_16V
4Z
1
2
C77
0.1U_0402_16V
4Z
1
2
C85
1U_0603_10V
4Z
1
2
C89
1000
P_0
402_
50V
7K
1
2
C68
0.1U_0402_16V
4Z
1
2
C99
1U_0603_10V
4Z
1
2
C54
0.1U
_040
2_16
V4Z
1
2
C59
2.2U_0805_16V
4Z
1
2
C9010U_0805_6.3V6M @
1
2
C731000P_0402_50V7K
1
2
R100
BLM18PG181SN1D_06031 2
R110 0_0603_5%
1 2
C98
0.1U
_040
2_16
V4Z
1
2
C65
0.01U_0402_16V
7K
1
2
C60
4.7U_0805_10V
4Z
1
2
+
C66
220U_D
2_4VM
1
2
C93
0.1U_0402_16V
4Z
1
2
C70
0.1U
_040
2_16
V4Z
1
2
POWER
CRT
PLL
A PEG
A SM
TV
D TV/CRT
LVDS
VTTLF
PEG
SM CK
AXF
VTT
DMI
HV
A LVDS
HDA
U4H
CANTIGA GMCH SFF_FCBGA1363
VCCA_CRT_DACJ31
VCCA_DPLLAJ45
VCCA_DPLLBL49
VCCA_HPLLAF10
VCCA_MPLLAE1 VCCA_TV_DAC K30
VCCD_PEG_PLLAE43
VTT_12 T2VTT_13 R1
VCCD_HPLLAH12
VTT_1 R13VTT_2 T12
VTT_4 T10VTT_5 R9VTT_6 T8VTT_7 R7VTT_8 T6VTT_9 R5
VTT_10 T4VTT_11 R3
VTT_3 R11
VCCA_DAC_BGL31
VCCD_TVDAC N32
VTTLF1 K14VTTLF2 Y12VTTLF3 P2
VCC_DMI_1 AM44VCC_DMI_2 AN43
VCC_SM_CK_1 BK24VCC_SM_CK_2 BL23VCC_SM_CK_3 BJ23VCC_SM_CK_4 BK22
VCCD_LVDS_1M46
VCCD_QDAC N34
VCC_AXF_1 M25VCC_AXF_2 N24VCC_AXF_3 M23
VCC_TX_LVDS T41
VCC_HV_1 C33VCC_HV_2 A33
VCC_PEG_1 AB44
VCCD_LVDS_2L45
VCC_PEG_2 Y44VCC_PEG_3 AC43VCC_PEG_4 AA43
VCC_DMI_3 AL43
VSSA_DAC_BGM33
VCC_HDA A31
VCCA_SM_CK_1AU31 VCCA_SM_CK_2AU29 VCCA_SM_CK_3AU28 VCCA_SM_CK_4AU27
VCCA_SM_1AW24VCCA_SM_2AU24VCCA_SM_3AW22VCCA_SM_4AU22VCCA_SM_5AU21VCCA_SM_6AW20VCCA_SM_7AU19VCCA_SM_8AW18VCCA_SM_9AU18VCCA_SM_10AW16VCCA_SM_11AU16VCCA_SM_12AT16VCCA_SM_13AR16VCCA_SM_14AU15VCCA_SM_15AT15VCCA_SM_16AR15VCCA_SM_17AW14
VCCA_PEG_BGAJ43
VCCA_PEG_PLLAG43
VCCA_LVDS1U43VCCA_LVDS2U41
VSSA_LVDSV44
VCCA_SM_CK_NCTF_1AT31VCCA_SM_CK_NCTF_2AR31VCCA_SM_CK_NCTF_3AT29VCCA_SM_CK_NCTF_4AR29VCCA_SM_CK_NCTF_5AT28VCCA_SM_CK_NCTF_6AR28VCCA_SM_CK_NCTF_7AT27VCCA_SM_CK_NCTF_8AR27
VCCA_SM_NCTF_1AT24VCCA_SM_NCTF_2AR24VCCA_SM_NCTF_3AT22VCCA_SM_NCTF_4AR22VCCA_SM_NCTF_5AT21VCCA_SM_NCTF_6AR21VCCA_SM_NCTF_7AT19VCCA_SM_NCTF_8AR19VCCA_SM_NCTF_9AT18VCCA_SM_NCTF_10AR18
C74
0.1U
_040
2_16
V4Z
1
2
R112 10_0402_5% 1 2C
614.7U
_0805_10V4Z
1
2
+
C86
220U_D
2_4VM
1
2
R96
BLM18PG181SN1D_060312
C94
0.1U_0402_16V
4Z
1
2
C78
0.1U_0402_16V4Z
1
2
C83
10U_0805_6.3V
6M
1
2
R108 0_0603_5% 1 2
+
C82
100U
_D2_
6.3V
M1
2
C64
0.1U_0402_16V
4Z
1
2
C97
0.1U
_040
2_16
V4Z
1
2
L1
BLM18PG121SN1D_06031 2
C102
0.47U_0603_10V
7K
1
2
R98
BLM18PG181SN1D_06031 2
C101
0.47U_0603_10V
7K
1
2
R105
BLM18PG181SN1D_06031 2
C80
0.1U
_040
2_16
V4Z
1
2
+
C57
330U
_D2E
_2.5
VM
_R7
1
2
R103
BLM18PG181SN1D_06031 2
R114
BLM18PG181SN1D_06031 2
R109 0_0603_5% 1 2C95
0.1U_0402_16V
4Z
1
2
D1 CH751H-40_SC76 2 1
C63
0.01U_0402_16V
7K
1
2
C103
0.01U_0402_16V
7K
1
2
R97
BLM18PG181SN1D_060312
C75
4.7U
_080
5_10
V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCCSM_LF2VCCSM_LF3
VCCSM_LF1
VCCSM_LF6VCCSM_LF7
VCCSM_LF4VCCSM_LF5
+VCCGFX
+1.05VM
+1.05VM
+1.8V
+VCCGFX
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
Cantiga(5/6)-PWR/GNDCustom
12 45Monday, October 29, 2007
2006/02/13 2006/03/10Compal Electronics, Inc.
3000mA
6326.84mA
Extnal Graphic: 1210.34mAintegrated Graphic: 1930.4mA
9/21
9/21
C10
60.
22U
_040
2_10
V4Z
1
2
+C117330U_D2E_2.5VM_R9
1
2
C109
10U_0805_6.3V6M
1
2
T46PAD
C116
0.1U_0402_16V4Z
1
2
C124
0.47U_0402_6.3V6K
1
2
C110
10U_0805_6.3V6M
1
2
C10
74.
7U_0
805_
10V4
Z 1
2C
1251U
_0603_10V4Z
1
2
C111
0.01U_0402_16V7K
1
2C
1261U
_0603_10V4Z
1
2
C11
9
10U
_080
5_10
V4Z
1
2
C10
50.
1U_0
402_
16V4
Z
1
2
C12
0
1U_0
603_
10V4
Z
1
2
C113
10U_0805_6.3V6M
1
2
C12
1
0.1U
_040
2_16
V4Z
1
2
+
C112
220U_D
2_4VM_R
15
1
2
T47PAD
C114
0.22U_0402_10V4Z
1
2
C122
0.22U_0603_10V7K
1
2
C127
0.1U_0402_16V4Z
1
2
+
C108
330U_D
2E_2.5VM
_R9
1
2
C123
0.22U_0603_10V7K
1
2
POWER
VCC SM
VCC GFX
VCC GFX NCTF
VCC SM LF
VCC GFX
U4G
CANTIGA GMCH SFF_FCBGA1363
VCC_SM_10AW30
VCC_SM_20BF28
VCC_SM_30AW26
VCC_SM_6BH30VCC_SM_7BF30VCC_SM_8BD30VCC_SM_9BB30
VCC_SM_11BL29VCC_SM_12BJ29VCC_SM_13BG29VCC_SM_14BE29VCC_SM_15BC29VCC_SM_16BA29VCC_SM_17AY29VCC_SM_18BK28VCC_SM_19BH28
VCC_SM_2BE35
VCC_SM_21BD28VCC_SM_22BB28VCC_SM_23BL27VCC_SM_24BJ27VCC_SM_25BG27VCC_SM_26BE27VCC_SM_27BC27VCC_SM_28BA27VCC_SM_29AY27
VCC_SM_3AW34
VCC_SM_31BF24
VCC_SM_33BB16
VCC_AXG_NCTF_11 R27VCC_AXG_NCTF_12 U25VCC_AXG_NCTF_13 T25VCC_AXG_NCTF_14 R25VCC_AXG_NCTF_15 U24VCC_AXG_NCTF_16 U22VCC_AXG_NCTF_17 T22VCC_AXG_NCTF_18 R22VCC_AXG_NCTF_19 U21VCC_AXG_NCTF_20 T21
VCC_AXG_NCTF_3 T31
VCC_AXG_NCTF_21 R21
VCC_AXG_NCTF_30 U19VCC_AXG_NCTF_29 W19VCC_AXG_NCTF_28 AC19VCC_AXG_NCTF_27 AD19VCC_AXG_NCTF_26 AE19VCC_AXG_NCTF_25 AG19VCC_AXG_NCTF_24 AH19VCC_AXG_NCTF_23 AL19
VCC_AXG_NCTF_4 R31
VCC_AXG_NCTF_42 U18VCC_AXG_NCTF_43 T18VCC_AXG_NCTF_44 R18
VCC_AXG_NCTF_41 W18VCC_AXG_NCTF_40 Y18VCC_AXG_NCTF_39 AA18VCC_AXG_NCTF_38 AC18VCC_AXG_NCTF_37 AD18VCC_AXG_NCTF_36 AE18VCC_AXG_NCTF_35 AG18
VCC_AXG_NCTF_5 U29
VCC_AXG_NCTF_34 AH18VCC_AXG_NCTF_33 AJ18VCC_AXG_NCTF_32 AL18
VCC_AXG_NCTF_22 AM19
VCC_AXG_NCTF_31 AM18
VCC_AXG_62 AJ16
VCC_AXG_NCTF_6 T29VCC_AXG_NCTF_7 R29VCC_AXG_NCTF_8 U28VCC_AXG_NCTF_9 U27
VCC_AXG_NCTF_10 T27
VCC_SM_4AW32VCC_SM_5BK30
VCC_AXG_NCTF_2 U31VCC_SM_1BB36
VCC_AXG_22AG27
VCC_AXG_24AD27VCC_AXG_25AC27
VCC_AXG_27Y27VCC_AXG_28W27
VCC_SM_LF1 AU45VCC_SM_LF2 BF52VCC_SM_LF3 BB38VCC_SM_LF4 BA19VCC_SM_LF5 BE9VCC_SM_LF6 AU9VCC_SM_LF7 AL9
VCC_AXG_26AA27
VCC_AXG_55AD21VCC_AXG_56AC21VCC_AXG_57AA21
VCC_AXG_29AH25VCC_AXG_30AD25VCC_AXG_31AC25VCC_AXG_32W25
VCC_AXG_58Y21
VCC_AXG_23AE27
VCC_AXG_50AA22
VCC_AXG_7Y31
VCC_AXG_20AA28
VCC_AXG_3AE31
VCC_AXG_54AH21
VCC_AXG_15Y29
VCC_AXG_53AJ21
VCC_AXG_49AC22
VCC_AXG_6AA31
VCC_AXG_13AC29
VCC_AXG_10AG29
VCC_AXG_52AL21
VCC_AXG_5AC31
VCC_AXG_2AG31
VCC_AXG_19AE28
VCC_AXG_12AD29
VCC_AXG_51AM21
VCC_AXG_9AH29
VCC_AXG_21AH27
VCC_AXG_14AA29
VCC_AXG_4AD31
VCC_AXG_18AG28 VCC_AXG_17AH28
VCC_AXG_11AE29
VCC_AXG_16W29
VCC_AXG_8W31
VCC_AXG_59W21VCC_AXG_60AM16
VCC_AXG_33AJ24VCC_AXG_34AH24VCC_AXG_35AG24VCC_AXG_36AE24VCC_AXG_37AD24VCC_AXG_38AC24VCC_AXG_39AA24VCC_AXG_40Y24VCC_AXG_41W24
VCC_AXG_61AL16
VSS_AXG_SENSEAE13 VCC_AXG_SENSEAG13
VCC_AXG_42AM22VCC_AXG_43AL22VCC_AXG_44AJ22VCC_AXG_45AH22VCC_AXG_46AG22VCC_AXG_47AE22
VCC_AXG_63 AH16VCC_AXG_64 AD16VCC_AXG_65 AC16VCC_AXG_66 AA16VCC_AXG_67 U16VCC_AXG_68 T16VCC_AXG_69 R16VCC_AXG_70 AM15VCC_AXG_71 AL15VCC_AXG_72 AJ15VCC_AXG_73 AH15VCC_AXG_74 AG15VCC_AXG_75 AE15VCC_AXG_76 AA15VCC_AXG_77 Y15VCC_AXG_78 W15VCC_AXG_79 U15VCC_AXG_80 T15
VCC_SM_32BL19
VCC_AXG_1W32
VCC_AXG_48AD22
VCC_AXG_NCTF_1 T32
C115
0.22U_0402_10V4Z
1
2
POWER
VCC NCTF
VCC CORE
U4F
CANTIGA GMCH SFF_FCBGA1363
VCC_NCTF_1 AT38
VCC_NCTF_20 AH37
VCC_NCTF_29 T37
VCC_NCTF_9 Y38VCC_NCTF_10 W38VCC_NCTF_11 U38VCC_NCTF_12 T38VCC_NCTF_13 R38VCC_NCTF_14 AT37VCC_NCTF_15 AR37
VCC_NCTF_17 AM37VCC_NCTF_18 AL37VCC_NCTF_19 AJ37
VCC_NCTF_2 AR38
VCC_NCTF_24 AC37VCC_NCTF_25 AA37
VCC_NCTF_3 AN38
VCC_NCTF_30 R37VCC_NCTF_31 AT35VCC_NCTF_32 AR35
VCC_NCTF_38 R34
VCC_NCTF_4 AM38VCC_NCTF_5 AL38VCC_NCTF_6 AG38VCC_NCTF_7 AE38VCC_NCTF_8 AA38
VCC_NCTF_33 U35VCC_NCTF_34 AT34VCC_NCTF_35 AR34VCC_NCTF_36 U34VCC_NCTF_37 T34
VCC_NCTF_26 Y37VCC_NCTF_27 W37VCC_NCTF_28 U37
VCC_NCTF_16 AN37
VCC_NCTF_21 AG37VCC_NCTF_22 AE37VCC_NCTF_23 AD37
VCC_1AT41VCC_2AR41VCC_3AN41VCC_4AJ41VCC_5AH41VCC_6AD41VCC_7AC41VCC_8Y41VCC_9W41VCC_10AT40VCC_11AM40VCC_12AL40
VCC_13AJ40VCC_14AH40VCC_15AG40VCC_16AE40VCC_17AD40VCC_18AC40VCC_19AA40VCC_20Y40VCC_21AN35VCC_22AM35VCC_23AJ35VCC_24AH35VCC_25AD35VCC_26AC35VCC_27W35VCC_28AM34VCC_29AL34VCC_30AJ34VCC_31AH34VCC_32AG34VCC_33AE34VCC_34AD34
VCC_35AC34VCC_36AA34
VCC_37Y34VCC_38W34VCC_39AM32VCC_40AL32VCC_41AJ32VCC_42AH32
VCC_46AM31VCC_47AL31VCC_48AJ31
VCC_50AM29VCC_51AL29VCC_52AM28VCC_53AL28
VCC_55AM27VCC_56AL27VCC_57AM25VCC_58AL25
VCC_61N36
VCC_43AE32VCC_44AD32VCC_45AA32
VCC_49AH31
VCC_54AJ28
VCC_59AJ25VCC_60AM24
C11
8
10U
_080
5_10
V4Z
1
2
C128
0.1U_0402_16V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MCHGND3
MCHGND1MCHGND2
MCHGND4
CRACK_BGA
MCHGND4
CRACK_BGA
MCHGND1
CRACK_BGA
MCHGND2
CRACK_BGA
MCHGND3
CRACK_BGA 23,33
+3VS+3VS +3VS +3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
Cantiga(6/6)-PWR/GNDCustom
13 45Monday, October 29, 2007
2006/02/13 2006/03/10Compal Electronics, Inc.
R225 0_0402_5%@1 2
G
D
SQ71RHU002N06_SOT323
2
13
VSS
U4I
CANTIGA GMCH SFF_FCBGA1363
VSS_1BA55
VSS_182 AN28
VSS_2AU55VSS_3AN55VSS_4AJ55VSS_5AE55VSS_6AA55VSS_7U55VSS_8N55VSS_9BD54VSS_10BG53VSS_11AJ53VSS_12AE53VSS_13AA53VSS_14U53VSS_15N53VSS_16J53VSS_17G53
VSS_19K52VSS_20BG51VSS_21BA51VSS_22AW51VSS_23AU51VSS_24AR51VSS_25AN51VSS_26AL51VSS_27AJ51VSS_28AG51VSS_29AE51VSS_30AC51VSS_31AA51VSS_32W51VSS_33U51VSS_34R51VSS_35N51VSS_36L51VSS_37J51VSS_38G51VSS_39C51VSS_40BK50VSS_41AM50VSS_42K50VSS_43BG49VSS_44E49VSS_45C49VSS_46BD48VSS_47BB48VSS_48AY48VSS_49AV48VSS_50AT48VSS_51AP48VSS_52AM48VSS_53AK48VSS_54AH48VSS_55AF48VSS_56AD48VSS_57AB48VSS_58Y48VSS_59V48VSS_60T48VSS_61P48VSS_62M48VSS_63K48VSS_64H48VSS_65BL47VSS_66BG47VSS_67E47VSS_68C47VSS_69A47VSS_70BD46VSS_71AY46VSS_72AM46VSS_73AK46VSS_74AH46VSS_75BG45VSS_76AE45VSS_77AC45VSS_78AA45VSS_79W45VSS_80R45VSS_81N45VSS_82E45VSS_83BD44VSS_84BB44VSS_85AV44VSS_86AK44VSS_87AH44
VSS_97R43
VSS_100 C43VSS_101 A43VSS_102 BD42VSS_103 H42VSS_104 BG41VSS_105 AY41VSS_106 AU41VSS_107 AM41VSS_108 AL41VSS_109 AG41VSS_110 AE41VSS_111 AA41VSS_112 R41VSS_113 M41VSS_114 E41VSS_115 BD40VSS_116 AU40VSS_117 AR40VSS_118 AN40VSS_119 W40VSS_120 U40VSS_121 T40VSS_122 R40VSS_123 K40VSS_124 H40VSS_125 BL39VSS_126 BG39VSS_127 BA39VSS_128 E39VSS_129 C39VSS_130 A39VSS_131 BD38VSS_132 AU38VSS_133 H38VSS_134 BG37VSS_135 AU37VSS_136 M37VSS_137 E37VSS_138 BD36VSS_139 AW36VSS_140 H36VSS_141 BL35VSS_142 BG35VSS_143 AY35VSS_144 AU35VSS_145 AL35VSS_146 AG35VSS_147 AE35VSS_148 AA35VSS_149 Y35VSS_150 M35VSS_151 E35VSS_152 A35VSS_153 BD34VSS_154 AU34VSS_155 AN34VSS_156 H34VSS_157 BL33VSS_158 BG33VSS_159 AY33VSS_160 E33VSS_161 BD32VSS_162 AU32VSS_163 AN32VSS_164 AG32VSS_165 AC32VSS_166 Y32
VSS_88AF44VSS_89AD44VSS_90K44VSS_91H44VSS_92BL43VSS_93BG43VSS_94AY43VSS_95AR43VSS_96W43
VSS_99E43
VSS_168 B32
VSS_170 BG31
VSS_172 AN31
VSS_18E53
VSS_175 N30
VSS_177 AN29
VSS_179 M29
VSS_181 AW28
VSS_167 H32
VSS_169 BJ31
VSS_171 AY31
VSS_174 E31
VSS_176 H30
VSS_178 AJ29
VSS_180 A29
VSS_98M43
VSS_183 AD28VSS_184 AC28VSS_185 Y28VSS_186 W28VSS_187 H28VSS_188 F28VSS_189 AN27VSS_190 AJ27VSS_191 M27VSS_192 BF26VSS_193 BD26VSS_194 N26
VSS_173 M31
VSS_195 H26VSS_196 BJ25VSS_197 AY25VSS_198 AU25
R39
8
100K
_040
2_5%
12
R224 0_0402_5%@1 2
VSS
VSS NCTF
VSS SCB
U4J
CANTIGA GMCH SFF_FCBGA1363
VSS_199AN25VSS_200AG25VSS_201AE25VSS_202AA25VSS_203Y25VSS_204E25VSS_205A25VSS_206BD24VSS_207AN24VSS_208AL24
VSS_210BG23
VSS_212E23VSS_213BD22VSS_214BB22VSS_215AN22VSS_216Y22VSS_217W22VSS_218H22
VSS_220BG21VSS_221AY21VSS_222AN21VSS_223AG21VSS_224AE21VSS_225M21VSS_226E21VSS_227A21
VSS_230BG19VSS_231AY19VSS_232M19VSS_233E19VSS_234BD18VSS_235N18VSS_236H18VSS_237BL17VSS_238BG17VSS_239AY17VSS_240M17VSS_241E17
VSS_243BD16VSS_244AN16VSS_245AG16VSS_246AE16VSS_247Y16VSS_248W16VSS_249N16VSS_250H16VSS_251BG15VSS_252AY15
VSS_261BL13 VSS_260H14 VSS_259BD14 VSS_258E15 VSS_257M15 VSS_256R15 VSS_255AC15
VSS_253AN15VSS_254AD15
VSS_219BL21
VSS_NCTF_1 AJ38VSS_NCTF_2 AH38VSS_NCTF_3 AD38VSS_NCTF_4 AC38VSS_NCTF_5 T35VSS_NCTF_6 R35VSS_NCTF_7 AT32VSS_NCTF_8 AR32VSS_NCTF_9 U32
VSS_NCTF_10 R32VSS_NCTF_11 T28VSS_NCTF_12 R28VSS_NCTF_13 AT25VSS_NCTF_14 AR25VSS_NCTF_15 T24
VSS_SCB_1 BL55VSS_SCB_2 BL1VSS_SCB_3 A55VSS_SCB_4 D1VSS_SCB_5 B55VSS_SCB_6 B2
VSS_347 AU43VSS_348 BB42VSS_349 AW38VSS_350 BA35VSS_351 L29VSS_352 N28VSS_353 N22VSS_354 N20VSS_355 N14
VSS_262BG13VSS_263AY13VSS_264AU13
VSS_209H24
VSS_211AY23
VSS_242A17
VSS_265AR13VSS_266AJ13VSS_267AC13VSS_268AA13VSS_269W13VSS_270U13
VSS_NCTF_16 R24VSS_NCTF_17 AN19VSS_NCTF_18 AJ19VSS_NCTF_19 AA19VSS_NCTF_20 Y19VSS_NCTF_21 T19VSS_NCTF_22 R19VSS_NCTF_23 AN18
VSS_333 C5VSS_334 BH4VSS_335 BE3VSS_336 U3VSS_337 E3VSS_338 BC1VSS_339 AW1VSS_340 AR1VSS_341 AL1VSS_342 AG1VSS_343 AC1VSS_344 W1VSS_345 N1VSS_346 J1
VSS_359 N42VSS_360 N40VSS_361 N38VSS_362 M39
VSS_228BD20VSS_229H20
VSS_SCB_7 A4
VSS_271M13VSS_272E13VSS_273A13VSS_274BD12VSS_275AV12VSS_276AP12VSS_277AM12VSS_278AK12VSS_279AB12VSS_280V12VSS_281P12VSS_282H12VSS_283BG11VSS_284AG11VSS_285E11VSS_286BD10VSS_287AY10VSS_288AP10VSS_289H10VSS_290BL9VSS_291BG9VSS_292E9VSS_293A9VSS_294BD8VSS_295BB8VSS_296AY8VSS_297AV8VSS_298AT8VSS_299AP8
VSS_300 AM8VSS_301 AK8
VSS_326 AA5VSS_327 W5VSS_328 U5VSS_329 N5VSS_330 L5VSS_331 J5VSS_332 G5
VSS_302 AH8VSS_303 AF8VSS_304 AD8VSS_305 AB8VSS_306 Y8VSS_307 V8VSS_308 P8VSS_309 M8VSS_310 K8VSS_311 H8VSS_312 BJ7VSS_313 E7VSS_314 BF6VSS_315 BC5VSS_316 BA5VSS_317 AW5VSS_318 AU5VSS_319 AR5VSS_320 AN5VSS_321 AL5VSS_322 AJ5VSS_323 AG5VSS_324 AE5VSS_325 AC5
VSS_356 AL13VSS_357 B10VSS_358 AN13
R25 0_0402_5%1 2
G
D
SQ70RHU002N06_SOT323
2
13
R222 0_0402_5%@1 2
R39
7
100K
_040
2_5%
12
R228 0_0402_5%@1 2
R27
0
100K
_040
2_5%
12
G
D
SQ68RHU002N06_SOT323
2
13
G
D
SQ69RHU002N06_SOT323
2
13
R39
6
100K
_040
2_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A ADDR_A_BS1
DDR_A_MA2
DDR_A_BS2
DDR_A_MA0
DDR_A_MA7
DDR_A_MA9
DDR_CKE0_DIMMA
DDR_A_MA4
DDR_A_MA12
DDR_A_MA5
DDR_A_MA1
DDR_A_CAS#
DDR_CS0_DIMMA#
DDR_A_BS0
DDR_A_MA8
DDR_A_MA3
DDR_A_MA10
DDR_A_RAS#
M_ODT1DDR_CS1_DIMMA#
DDR_A_WE#
DDR_A_MA13M_ODT0
DDR_A_MA6
DDR_A_D39
DDR_CS0_DIMMA#
DDR_A_BS1
DDR_A_D37
DDR_A_MA1
DDR_CKE0_DIMMA
DDR_A_D15DDR_A_D9
DDR_A_DQS1
DDR_A_D14
DDR_A_DQS5
DDR_A_D33
DDR_A_MA13
DDR_A_MA14
DDR_A_D11
M_ODT1
DDR_CS1_DIMMA#
DDR_A_D59
DDR_A_D43
DDR_A_MA6
DDR_A_D32
DDR_A_D24
DDR_A_DM6DDR_A_DQS#6
DDR_A_D46
DDR_A_D30
DDR_A_D13
DDR_A_D6
DDR_A_D44
DDR_A_BS0
DDR_A_MA3
DDR_A_MA8
DDR_A_MA4
DDR_A_D0
DDR_A_DM7
DDR_A_DQS#4
DDR_A_MA10
DDR_A_D55
DDR_A_D53
DDR_A_D45
DDR_A_D38
DDR_A_MA0
DDR_A_D31
DDR_A_D36
DDR_A_D8
V_DDR_MCH_REF
DDR_A_D47
DDR_A_D60
DDR_A_DQS6
DDR_A_D48
DDR_A_DQS#2
DDR_A_D42
M_ODT0
DDR_A_MA2
DDR_A_D25
DDR_A_D40
DDR_A_WE#
DDR_A_D62DDR_A_D58
DDR_A_D61
DDR_A_D50
DDR_A_D49
DDR_A_D28
DDR_A_D5
DDR_A_DQS4
DDR_A_D18
DDR_A_DQS#1
DDR_A_D4
DDR_A_DQS#7
DDR_A_D56
DDR_A_D34
DDR_A_DM4
DDR_A_MA11
DDR_A_D23
DDR_A_MA5
DDR_A_D57
DDR_A_D52
DDR_A_D22
DDR_A_D21
DDR_A_MA9DDR_A_MA12
DDR_A_DM3
DDR_A_D19
DDR_A_D2
DDR_A_DQS#0
DDR_A_DQS7
DDR_A_DQS#5
DDR_A_D10
DDR_A_D35
DDR_A_D27
DDR_A_RAS#
DDR_A_D20
DDR_A_DM1
DDR_A_D12
DDR_A_BS2
DDR_A_DQS2
DDR_A_D3
DDR_A_D1
DDR_A_D51
DDR_A_DM5
DDR_A_DQS#3
DDR_A_DM0
DDR_A_D26
DDR_A_D16
DDR_A_D54
DDR_A_D41
DDR_A_MA7
DDR_CKE1_DIMMA
DDR_A_D7
DDR_A_D29
DDR_A_DQS0
DDR_A_D63
DDR_A_DQS3
DDR_A_DM2
DDR_A_CAS#
DDR_A_D17
DDR_A_MA14DDR_CKE1_DIMMADDR_A_MA11
DDR_A_DQS#[0..7]9
DDR_A_DQS[0..7]9
DDR_A_D[0..63]9
DDR_A_DM[0..7]9
DDR_A_MA[0..14]9
V_DDR_MCH_REF 8,15
ICH_SMBCLK15,16,22ICH_SMBDATA15,16,22
M_CLK_DDR0 8M_CLK_DDR#0 8
DDR_CKE1_DIMMA 8
DDR_A_BS1 9DDR_A_RAS# 9DDR_CS0_DIMMA# 8
M_ODT0 8
M_CLK_DDR1 8
PM_EXTTS#0 8
M_CLK_DDR#1 8
DDR_CKE0_DIMMA8
DDR_A_BS29
DDR_A_BS09DDR_A_WE#9
DDR_A_CAS#9
M_ODT18
DDR_CS1_DIMMA#8
+1.8V +1.8V
+0.9V
+1.8V
+0.9V
+3VM
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
DDRII-SODIMM SLOT
14 45Monday, October 29, 2007
2006/02/13 2006/03/10Compal Electronics, Inc.
Top side
Layout Note:Place these resistorclosely JP9,alltrace length Max=1.5"
Layout Note:Place near JP36
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V
SO-DIMM A4mm Height
Change C131 to 330uF. 9/26
C141
0.1U_0402_16V4Z
1
2 C148
0.1U_0402_16V4Z
1
2
C15
4
2.2U
_060
3_6.
3V6K
1
2RP956_0404_4P2R_5%
1 42 3
RP2 56_0404_4P2R_5%
1423
RP13 56_0404_4P2R_5%
1423
RP6 56_0404_4P2R_5%
1423
C146
0.1U_0402_16V4Z
1
2C144
0.1U_0402_16V4Z
1
2
RP756_0404_4P2R_5%
1 42 3
RP356_0404_4P2R_5%
1 42 3
RP4 56_0404_4P2R_5%
1423
C129
2.2U_0805_16V4Z
1
2
R11756_0402_5%1 2
RP8 56_0404_4P2R_5%
1423
C137
0.1U_0402_16V4Z
1
2
C130
0.1U_0402_16V4Z
1
2
C145
0.1U_0402_16V4Z
1
2
RP1156_0404_4P2R_5%1 42 3
RP556_0404_4P2R_5%
1 42 3
C147
0.1U_0402_16V4Z
1
2
+C13
1
330U
_D2E
_2.5
VM_R
9
1
2
JP36
FOX_ASOA426-M2RN-7Fconn@
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39
VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199
VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22
VSS 24DM1 26VSS 28CK0 30
CK0# 32VSS 34
DQ14 36DQ15 38
VSS 40
VSS 42DQ20 44DQ21 46
VSS 48NC 50
DM2 52VSS 54
DQ22 56DQ23 58
VSS 60DQ28 62DQ29 64
VSS 66DQS3# 68
DQS3 70VSS 72
DQ30 74DQ31 76
VSS 78NC/CKE1 80
VDD 82NC/A15 84NC/A14 86
VDD 88A11 90
A7 92A6 94
VDD 96A4 98A2 100A0 102
VDD 104BA1 106
RAS# 108S0# 110
VDD 112ODT0 114
NC/A13 116VDD 118
NC 120VSS 122
DQ36 124DQ37 126
VSS 128DM4 130VSS 132
DQ38 134DQ39 136
VSS 138DQ44 140DQ45 142
VSS 144DQS5# 146
DQS5 148VSS 150
DQ46 152DQ47 154
VSS 156DQ52 158DQ53 160
VSS 162CK1 164
CK1# 166VSS 168DM6 170VSS 172
DQ54 174DQ55 176
VSS 178DQ60 180DQ61 182
VSS 184DQS7# 186
DQS7 188VSS 190
DQ62 192DQ63 194
VSS 196SA0 198SA1 200
RP156_0404_4P2R_5%
1 42 3
C135
2.2U_0805_16V4Z
1
2
C15
5
0.1U
_040
2_16
V4Z
1
2
C132
2.2U_0805_16V4Z
1
2
C136
2.2U_0805_16V4Z
1
2
C153
0.1U_0402_16V4Z
1
2
C139
0.1U_0402_16V4Z
1
2
C152
0.1U_0402_16V4Z
1
2
R11
610
K_04
02_5
%
12
C133
2.2U_0805_16V4Z
1
2
R11
510
K_04
02_5
%
12
RP12 56_0404_4P2R_5%
1423
C151
0.1U_0402_16V4Z
1
2
C138
0.1U_0402_16V4Z
1
2
C150
0.1U_0402_16V4Z
1
2
C134
2.2U_0805_16V4Z
1
2
C140
0.1U_0402_16V4Z
1
2
C143
0.1U_0402_16V4Z
1
2 C149
0.1U_0402_16V4Z
1
2
RP10 56_0404_4P2R_5%
1423
C142
0.1U_0402_16V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
V_DDR_MCH_REF
M_ODT3DDR_CS3_DIMMB# M_ODT2
DDR_B_MA13
DDR_B_WE#DDR_B_MA4
DDR_B_MA9
DDR_B_MA2
DDR_B_MA5
DDR_B_MA12
DDR_B_MA8
DDR_B_MA1
DDR_B_BS0
DDR_B_CAS#
DDR_B_MA0
DDR_B_RAS#
DDR_B_MA3
DDR_B_MA10
DDR_B_BS2
DDR_CS2_DIMMB#
DDR_B_BS1
DDR_CKE2_DIMMB
M_ODT2
DDR_B_MA11
DDR_B_MA2
DDR_B_MA6
DDR_B_MA4
DDR_B_MA0
DDR_B_RAS#DDR_B_BS1
DDR_B_MA7
DDR_B_MA13
DDR_CKE3_DIMMB
DDR_CS2_DIMMB#
M_ODT3
DDR_B_BS2
DDR_B_MA3
DDR_B_WE#
DDR_B_MA10DDR_B_BS0
DDR_B_MA5
DDR_B_MA1
DDR_B_MA8
DDR_B_MA12DDR_B_MA9
DDR_B_CAS#DDR_CS3_DIMMB#
DDR_CKE2_DIMMB
DDR_B_MA14
DDR_B_D62
DDR_B_D60DDR_B_D61
DDR_B_D58DDR_B_D52DDR_B_D53
DDR_B_D54DDR_B_D55
DDR_B_D48DDR_B_D49
DDR_B_D50DDR_B_D51
DDR_B_D46
DDR_B_D40
DDR_B_D42
DDR_B_D36
DDR_B_D38DDR_B_D35
DDR_B_DM0
DDR_B_DM7DDR_B_DQS#7DDR_B_DQS7
DDR_B_DQS#0DDR_B_DQS0
DDR_B_DM1
DDR_B_DM6
DDR_B_DQS1DDR_B_DQS#1
DDR_B_DQS#6DDR_B_DQS6
DDR_B_DM2
DDR_B_DM5
DDR_B_DQS2DDR_B_DQS#2
DDR_B_DQS#5DDR_B_DQS5
DDR_B_DM3
DDR_B_DM4
DDR_B_DQS#3DDR_B_DQS3
DDR_B_DQS#4DDR_B_DQS4
DDR_B_MA6
DDR_B_MA11
DDR_B_MA7
DDR_B_MA14DDR_CKE3_DIMMB
DDR_B_D2
DDR_B_D0DDR_B_D1
DDR_B_D3
DDR_B_D4
DDR_B_D7
DDR_B_D5
DDR_B_D6
DDR_B_D8DDR_B_D9
DDR_B_D10DDR_B_D11
DDR_B_D12 DDR_B_D13
DDR_B_D15DDR_B_D14
DDR_B_D16
DDR_B_D19
DDR_B_D17
DDR_B_D18
DDR_B_D21DDR_B_D20
DDR_B_D23DDR_B_D22
DDR_B_D29
DDR_B_D27DDR_B_D26
DDR_B_D24
DDR_B_D28DDR_B_D25
DDR_B_D30DDR_B_D31
DDR_B_D32
DDR_B_D34
DDR_B_D37DDR_B_D33
DDR_B_D39
DDR_B_D41
DDR_B_D43DDR_B_D47
DDR_B_D44DDR_B_D45
DDR_B_D56DDR_B_D57
DDR_B_D59
DDR_B_D63
DDR_B_DQS#[0..7]9
DDR_B_DQS[0..7]9
DDR_B_D[0..63]9
DDR_B_MA[0..14]9
DDR_B_DM[0..7]9
DDR_CKE3_DIMMB 8
DDR_CS2_DIMMB# 8
V_DDR_MCH_REF 8,14
DDR_B_WE#9
DDR_B_BS1 9DDR_B_RAS# 9
DDR_B_CAS#9
M_ODT38
DDR_CKE2_DIMMB8
DDR_CS3_DIMMB#8
DDR_B_BS29
DDR_B_BS09
M_ODT2 8
M_CLK_DDR2 8M_CLK_DDR#2 8
M_CLK_DDR3 8M_CLK_DDR#3 8
PM_EXTTS#1 8
ICH_SMBCLK14,16,22ICH_SMBDATA14,16,22
+1.8V +1.8V
+0.9V
+1.8V
+0.9V
+3VM +3VM
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
DDRII-SODIMM SLOT
15 45Monday, October 29, 2007
2006/02/13 2006/03/10Compal Electronics, Inc.
SO-DIMM B
Bottom side
Layout Note:Place near JP34
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V
Layout Note:Place these resistorclosely JP10,alltrace length Max=1.5"
REVERSE
Reserve C524. 9/26
C584
0.1U_0402_16V4Z
1
2
JP3
SUYIN_600008FB200G103ZL
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39
VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143
VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22
VSS 24DM1 26VSS 28CK0 30
CK0# 32VSS 34
DQ14 36DQ15 38
VSS 40
VSS 42DQ20 44DQ21 46
VSS 48NC 50
DM2 52VSS 54
DQ22 56DQ23 58
VSS 60DQ28 62DQ29 64
VSS 66DQS3# 68
DQS3 70VSS 72
DQ30 74DQ31 76
VSS 78NC/CKE1 80
VDD 82NC/A15 84NC/A14 86
VDD 88A11 90
A7 92A6 94
VDD 96A4 98A2 100A0 102
VDD 104BA1 106
RAS# 108S0# 110
VDD 112ODT0 114
NC/A13 116VDD 118
NC 120VSS 122
DQ36 124DQ37 126
VSS 128DM4 130VSS 132
DQ38 134DQ39 136
VSS 138DQ44 140DQ45 142
VSS 144VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199
DQS5# 146DQS5 148
VSS 150DQ46 152DQ47 154
VSS 156DQ52 158DQ53 160
VSS 162CK1 164
CK1# 166VSS 168DM6 170VSS 172
DQ54 174DQ55 176
VSS 178DQ60 180DQ61 182
VSS 184DQS7# 186
DQS7 188VSS 190
DQ62 192DQ63 194
VSS 196SAO 198SA1 200
RP2856_0404_4P2R_5%
1 42 3
C585
0.1U_0402_16V4Z
1
2
R8056_0402_5%1 2
RP25 56_0404_4P2R_5%
1423
C581
0.1U_0402_16V4Z
1
2
R77
10K_0402_5%
12
C568
2.2U_0805_16V4Z
1
2
RP3256_0404_4P2R_5%1 42 3
R73
10K_0402_5%
1 2
C579
0.1U_0402_16V4Z
1
2 C586
0.1U_0402_16V4Z
1
2C580
0.1U_0402_16V4Z
1
2C577
0.1U_0402_16V4Z
1
2
C571
0.1U_0402_16V4Z
1
2
RP2256_0404_4P2R_5%
1 42 3
RP2656_0404_4P2R_5%
1 42 3
C582
0.1U_0402_16V4Z
1
2
RP2456_0404_4P2R_5%
1 42 3
RP31 56_0404_4P2R_5%
1423
C565
0.1U_0402_16V4Z
1
2
C578
0.1U_0402_16V4Z
1
2
C58
9
0.1U
_040
2_16
V4Z
1
2
C564
2.2U_0805_16V4Z
1
2
RP34 56_0404_4P2R_5%
1423
C576
0.1U_0402_16V4Z
1
2C575
0.1U_0402_16V4Z
1
2
C574
0.1U_0402_16V4Z
1
2
RP33 56_0404_4P2R_5%
1423
C583
0.1U_0402_16V4Z
1
2
+C52
4
330U
_D2E
_2.5
VM_R
9
@
1
2
RP23 56_0404_4P2R_5%
1423
RP3056_0404_4P2R_5%
1 42 3
C567
2.2U_0805_16V4Z
1
2
C572
0.1U_0402_16V4Z
1
2
C587
0.1U_0402_16V4Z
1
2
RP29 56_0404_4P2R_5%
1423
C58
8
2.2U
_060
3_6.
3V6K
1
2
C573
0.1U_0402_16V4Z
1
2
C570
2.2U_0805_16V4Z
1
2
RP27 56_0404_4P2R_5%
1423
C566
2.2U_0805_16V4Z
1
2
C569
2.2U_0805_16V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FSC
FSB
FSA
FSC
27_SEL
CLK_48M_ICH
CLK_14M_ICH
CLK_XTAL_IN
CLK_XTAL_OUT
CLK_XTAL_IN
CLK_XTAL_OUT
FSB
FSA
27_SELITP_EN
ITP_EN
PCI2_TME
CLK_14M_KBC
CLK_48M_ICH
CLK_14M_ICH
CLK_PCI_ICH
CLK_14M_KBC
CLK_PCI_TCG
CLK_PCI_EC
CLK_PCI_DB
CLK_PCI_1394
CLK_PCI_DB
CLK_PCI_ICH
CLKREQ#_B_R
R_CPU_XDPR_CPU_XDP#
R_PCIE_ICHR_PCIE_ICH#
CLKREQ#_B_R
CLKREQ_WLAN#_RCLKSATAREQ#_R
CLKSATAREQ#_R
CLK_PCI_1394CLK_PCI_TCG
PCI2_TME
CLK_PCI_EC PCI_CLK3
CLKREQG_WWAN#_R
CLKREQG_WWAN#_R
CLKREQ_WLAN#_R
CPU_BSEL05
MCH_CLKSEL0 8
CLK_14M_ICH22
CLK_48M_ICH22
CLK_14M_KBC33
CPU_BSEL25
MCH_CLKSEL2 8
CPU_BSEL15
CLK_PCI_DB32
CLK_PCI_ICH20
CLKREQ#_B 8
CLK_CPU_XDP# 4CLK_CPU_XDP 4
H_STP_PCI# 22H_STP_CPU# 22
ICH_SMBCLK 14,15,22
CLK_CPU_BCLK# 4CLK_CPU_BCLK 4
CLK_MCH_BCLK# 8CLK_MCH_BCLK 8
ICH_SMBDATA 14,15,22
CLK_PCIE_SATA 21CLK_PCIE_SATA# 21
CK_PWRGD 22
CLK_MCH_3GPLL 8CLK_MCH_3GPLL# 8
CLKREQA# 26
CLKREQG_WWAN# 26 CLKREQ_WLAN# 26CLKSATAREQ# 22
CLK_PCI_139427CLK_PCI_TCG32CLK_PCI_EC33
CLK_PCIE_MCARD# 26CLK_PCIE_MCARD 26
CLK_PCIE_WAN 26CLK_PCIE_WAN# 26
CLK_PCIE_EXP 26CLK_PCIE_EXP# 26
MCH_SSCDREFCLK 8MCH_SSCDREFCLK# 8
CLK_MCH_DREFCLK 8CLK_MCH_DREFCLK# 8
CLK_PCIE_ICH 22CLK_PCIE_ICH# 22
MCH_CLKSEL1 8
CLK_PCI_DEBUG26
+VCCP
+3VS
+3VM_CK505
+3VM +3VM_CK505
+1.05VM_CK505
+3VS +3VS
+VCCP
+3VS
+3VS+3VS
+3VS
+1.05VM_CK505+1.05VM
+1.05VM_CK505
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
CLOCK GENERATOR
16 45Monday, October 29, 2007
2006/02/13 2006/03/10Compal Electronics, Inc.
1
1000
CLKSEL1
100
1
PCIMHz
200
0
SRCMHz
33.3
CPUMHzCLKSEL2
33.30
FSLACLKSEL0
166
FSLC
1
FSLB
Place close to U5
0 1000 2660 33.3
9/20
9/149/14
FSBMHz
1066
800
667
9/14
Add for PCIEport80 debugport. 10/18.
R14033_0402_1%
1 2
R14910K_0402_5%
12
R13322_0402_5%
1 2
R14710K_0402_5%
12
U5
ICS9LPRS397AKLFT_MLF72
X15
X24
USB_48MHz/FSLA20
GND30
VDDPLL327
PCI2/TME14
FSLB/TEST_MODE2
VDDSRC_IO52
SDATA 9
GND4822
VDD4819
PCI315
SRCC4_LPR 40
SRCT9_LPR 44
PCI_STOP# 54
GNDSRC34
GNDCPU69
SRCC9_LPR 45
SRCC11_LPR 47
SRCC7_LPR 60SRCT7_LPR 61
SRCT6_LPR 57
CPUT0_LPR_F 71
PCI13
PCI4/27_Select16
VDDSRC_IO38 VDDPLL3_IO31
VDD96_IO23
VDDPCI12
GNDSRC59
GND26
SCLK 10
NC 11
GNDPCI18
CPU_STOP# 53
PCI_F5/ITP_EN17
SRCT11_LPR 48
CPUC1_LPR_F 67
SRCT10_LPR 50SRCC10_LPR 51
FSLC/TEST_SEL/REF07
CPUC0_LPR_F 70
CPUT1_LPR_F 68
VDDREF6
GNDREF3
VDDSRC_IO62
SRCC6_LPR 56
VDDCPU_IO66
SRCC3_LPR 36
CR#4 41
CR#11 46
CR#9 43
VDDCPU72
GNDSRC42
CR#3 37
CR#A 21
CR#6 58
CR10# 49
SRCT4_LPR 39
SRCT3_LPR 35
VDDSRC55
REF1 8
CR7# 65
CPUT2_ITP_LPR/SRCT8_LPR 64CPUC2_ITP_LPR/SRCC8_LPR 63
SRCT2_LPR/SATAT_LPR 32SRCC2_LPR/SATAC_LPR 33
SRCT0_LPR/DOTT_96_LPR 24SRCC0_LPR/DOTC_96_LPR 25
27MHz_NonSS/SRCT1_LPR/SE1 2827MHz_SS/SRCC1_LPR/SE2 29
CK_PWRGD/PD# 1
R14133_0402_1%
1 2
R12756_0402_5%@
12
R1390_0402_5%
1 2
R144 1K_0402_5% 1 2
R14810K_0402_5%@
12
C16
00.
1U_0
402_
16V4
Z
1
2
R13222_0402_5%
1 2
R58 0_1206_5%
1 2
R124 475_0402_1% 12
R13533_0402_1%
1 2
R13633_0402_1%
1 2
R143 10K_0402_5% 12
R130 0_0402_5%1 2
C17833P_0402_50V8J
1
2
R125 475_0402_1% 12
R123 10K_0402_5%
1 2
C1654.7P_0402_50V8C@
12
R119 10K_0402_5% 1 2
C1565P_0402_50V8C@
12
R14233_0402_1%
1 2
R128 2.2K_0402_5%
12R126 10K_0402_5% 1 2
C1664.7P_0402_50V8C@
12
C17
30.
1U_0
402_
16V4
Z
1
2
C15
90.
1U_0
402_
16V4
Z
1
2
C16
30.
1U_0
402_
16V4
Z
1
2
R15010K_0402_5%@
12
R120 475_0402_1%
12
C1705P_0402_50V8C@
12
RP35 0_0404_4P2R_5%1 42 3
C17
50.
1U_0
402_
16V4
Z
1
2
RP14 0_0404_4P2R_5%1 42 3
C16
40.
1U_0
402_
16V4
Z
1
2
C17
410
U_0
805_
10V4
Z
1
2
C16
20.
1U_0
402_
16V4
Z
1
2
R1381K_0402_5%
1 2
R1311K_0402_5%@
12
R145 0_0402_5%1 2
R121 475_0402_1%
12
R129 1K_0402_5%
1 2
R1460_0402_5%@
12
C1695P_0402_50V8C@
12
C1574.7P_0402_50V8C@
12
R1371K_0402_5%@
12
R15110K_0402_5%
12
R118 0_1206_5%
1 2
R15210K_0402_5%@
12
R13433_0402_1%
1 2
C16
10.
1U_0
402_
16V4
Z
1
2
C1674.7P_0402_50V8C@
12
C17
60.
1U_0
402_
16V4
Z
1
2
C17
110
U_0
805_
10V4
Z
1
2
R122 10K_0402_5%
1 2
R33833_0402_1%@ 1 2
C17
20.
1U_0
402_
16V4
Z
1
2
C15
810
U_0
805_
10V4
Z
1
2
C17733P_0402_50V8J
1
2
R620_0402_5%@
12
Y1
14.31818MH
Z_20P_1BX14318BE1A
12
C1684.7P_0402_50V8C@
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
HSYNC D_HSYNC
VSYNC D_VSYNC
D_GREEN
D_BLUE
REDGREENBLUE
D_VSYNCD_HSYNC
D_RED
D_BLUE
D_RED
D_GREEN
RED
GREEN
BLUE
CRT_DDC_DATA 10
CRT_DDC_CLK 10
CRT_HSYNC10
CRT_VSYNC10
D_HSYNC 34
D_VSYNC 34
D_DDCDATA34
D_DDCCLK34
D_RED10
D_GREEN10
D_BLUE10
RED34GREEN34
BLUE34
BLUE_R34
GREEN_R34
RED_R34
+CRTVDD+RCRT_VCC+5VS
+CRTVDD
+5VS
+3VS
+5VS
+CRTVDD
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
CRT Connector
17 45Monday, October 29, 2007
2006/02/13 2006/07/26Compal Electronics, Inc.
layout note: D_HSYNC& D_VSYNC should berouted to dockingconnector then to VGAconnector
L Place cloce to GMCH
W=40mils
CRT Connector
L Place cloce to GMCH
L Place cloce to GMCH
RED_R, GREEN_R, & BLUE_R shouldstill be connected to output of RGBfilter (L17-2, L18-2, L19-2). JP4pins should only connect to RED,GREEN, & BLUE.
10/25
L3BK1608LL560-T 0603
1 2
C18
1
10P_
0402
_50V
8J1
2C1870.1U_0402_16V4Z
1 2
L190_0805_5% 1 2
L170_0805_5% 1 2
D5
DA
N21
7T14
6_SC
59-3
@
2 31
G
D S
Q3BSS138_SOT23
2
1 3
C179
0.1U_0402_16V4Z
1
2
U6SN74AHCT1G125GW_SOT353-5
A2 Y 4OE#
1G
3P
5
R15
475
_040
2_5%
12
L180_0805_5% 1 2
C18
4
10P_
0402
_50V
8J1
2
C18
2
10P_
0402
_50V
8J1
2
C18
3
10P_
0402
_50V
8J1
2
R16
02.
2K_0
402_
5%1
2
R15
575
_040
2_5%
12
R15
72.
2K_0
402_
5%1
2
C18
5
10P_
0402
_50V
8J1
2
JP4
SU
YIN
_070
546F
R01
5S23
5ZR
_15P
CO
NN
@
611
17
1228
1339
144
1015
5
1617
D3
DA
N21
7T14
6_SC
59-3
@
2 31
R15
92.
2K_0
402_
5%1
2
R161 0_0603_5%1 2
C18
0
10P_
0402
_50V
8J1
2
L4BK1608LL560-T 0603
1 2
D4
DA
N21
7T14
6_SC
59-3
@
2 31
R16
351
K_04
02_5
%
12
F11.1A_6VDC_FUSE
21
C189
5P_0402_50V8C@
1
2
D6
DA
N21
7T14
6_SC
59-3
@
2 31
C1860.1U_0402_16V4Z
1 2
R156 0_0603_5%1 2
R15
375
_040
2_5%
12
C188
5P_0402_50V8C@
1
2
D7
DA
N21
7T14
6_SC
59-3
@
2 31
L2BK1608LL560-T 0603
1 2
D2CH491D_SC592 1
U7SN74AHCT1G125GW_SOT353-5
A2 Y 4OE#
1G
3P
5
R15
82.
2K_0
402_
5%1
2
G
D S
Q2BSS138_SOT23
2
1 3
R16
251
K_04
02_5
%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DISPLAYOFF#
DISPLAYOFF#
ENAVDD10
TXOUT_L0- 10TXOUT_L0+ 10
TXOUT_L1- 10TXOUT_L1+ 10
TXOUT_L2- 10TXOUT_L2+ 10
TXCLK_L- 10TXCLK_L+ 10
DDC2_DATA 10DDC2_CLK 10
ALS_EN22
USB20_P1022USB20_N1022
ENABLT10
WEBCAM_ON/OFF#22
LID_SW#19,22,33
BLON_PWM10
LCDVDD
LCDVDD
+3VS
B+
B+_LCD
LCDVDD
+3VS +5VS
+5VS_KB
+3VALW
+3VS
+5V_WEBCAM
+5VALW +5V_WEBCAM
+5VS
+5VS_KB
+3VALW
+3VS
+5VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
LCD CONN & Q-Switch & GPIO Ext.
18 45Monday, October 29, 2007
2005/03/10 2006/03/10Compal Electronics, Inc.
LCD POWER CIRCUIT
LCD/PANEL BD. CONN.
HP request. (9/4)
HP request. (9/4)
9/14
Add for slow Q64on.9/14
Q8DTC124EKAT146_SC59-3
IN2
OU
T1
GN
D3
D41
DAP202U_SOT323-3
2
31
R16
54.
7K_0
402_
5%
12
R60
010
0K_0
402_
5%
12
C560
0.1U
_040
2_16
V4Z
1
2
G
DS
Q42N7002_SOT23
2
13
C1930.1U_0402_16V4Z
1
2
C313
0.01
U_0
402_
16V7
K
1
2
R167 1M_0402_5%1 2
C559
1U_0603_10V4Z
1
2
R493220K_0402_1%1 2
G
D
S Q7RHU002N06_SOT323
2
13
G
DS
Q5SI2301BDS_SOT23
2
13
G
D
S Q64BSS84LT1G_SOT23-3
2
13
R169100K_0402_1%
12
G
D
S
Q41RHU002N06_SOT323
2
13
R168 47K_0402_5%1 2
R59810K_0402_5%
12
C191 68P_0402_50V8J
12
G
D
S
Q65RHU002N06_SOT323 2
13
J9
PAD-No SHORT 2x2m
2 1
C5620.1U_0402_16V4Z
1
2
JP5
ACES_88242-3001_30PCONN@
13579
11131517192123252729
24681012141618202224262830
3132
R16
44.
7K_0
402_
5%
12
C1944.7U_0805_10V4Z
1
2
R60110K_0402_5%
12
C190 0.1U_0603_50V4Z12
C561
4.7U
_080
5_10
V4Z 1
2
R81100K_0402_1%
12
L5 0_0805_5% 1 2
C192 0.1U_0402_16V7K1 2
R166100_0402_1%
12
R87
2.2K
_040
2_5%
12
R59910K_0402_5%
12
G
D S
Q6AO3413_SOT23
2
1 3
J8
PAD-SHORT 2x2m
2 1
C1954.7U_0805_10V4Z@
1
2
R602 47K_0402_5% 1 2
C558
1U_0603_10V4Z
1
2
R88
2.2K
_040
2_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BT_LEDWL_LED
BT_LED
WL_LED
WL_LED
AMBER_BATLED#GREEN_BATLED#IDE_LED#
STB_LEDWL/BT_LED
HDD_STP#
WL/BT_LED
HDD_HALTLED
BT_LED31
WL_LED# 26
WL/BT_LED30
GREEN_BATLED#33AMBER_BATLED#33
IDE_LED#21
LID_SW#18,22,33
STB_LED30,34
WW_LED#26
HDD_HALTLED22
+3VS
+3VS+3VL+5VS
+3VS
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
LEDS & LIDCustom
19 45Monday, October 29, 2007
2006/02/13 2006/03/10Compal Electronics, Inc.
To LID switch Board
To LED BOARD
9/14
Add in 9/26
Cause space issue, move them from LED board to M/B. 10/09
JP8
ACES_85204-03001CONN@
112233 G1 4
G2 5
10K
47KQ32DTA114YKAT146_SOT23-3
2
13
10K
47K
Q79DTA114YKAT146_SOT23-3
2
13
10K
47KQ9DTA114YKAT146_SOT23-3
2
13
R57047K_0402_5%
12
G
D
S
Q102N7002_SOT23
2
13
R334100K_0402_5%
@
12
G
D
S
Q112N7002_SOT23
2
13
R170 100K_0402_5%
1 2
R171 100K_0402_5%
1 2
JP6
ACES_85201-1005NCONN@
1122334455667788991010GND11GND12
G
D
S
Q802N7002_SOT23
2
13
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCI_AD16
PCI_AD8
PCI_AD19
PCI_AD3
PCI_AD5
PCI_AD28
PCI_AD10
PCI_AD4
PCI_AD30
PCI_AD25
PCI_AD22
PCI_AD7
PCI_AD24
PCI_AD12
PCI_AD1
PCI_AD13
PCI_AD11
PCI_AD0
PCI_AD21
PCI_AD18
PCI_AD26
PCI_AD23
CLK_PCI_ICH
PCI_AD2
PCI_AD15
PCI_GNT3#
PCI_AD31
PCI_AD27
PCI_AD20
PCI_AD6
PCI_AD29
PCI_AD17
PCI_AD14
PCI_AD9
PLT_RST#CLK_PCI_ICH
PCI_SERR#
PCI_REQ3#
PCI_REQ1#
PCI_CBE#2PCI_CBE#3
PCI_REQ2#
PCI_CBE#0PCI_CBE#1
PCI_FRAME#PCI_TRDY#
PCI_DEVSEL#
PCI_STOP#
PCI_IRDY#PCI_PAR
PCI_PERR#PCI_PLOCK#
PCI_GNT0#
PCI_RST#
PCI_REQ0#
PCI_PIRQE#
PCI_PIRQG#
PCI_PIRQH#
PCI_REQ2#
PCI_REQ3#
PCI_PIRQD#
PCI_DEVSEL#
PCI_TRDY#
PCI_FRAME#
PCI_STOP#
PCI_PLOCK#
PCI_IRDY#
PCI_PERR#
PCI_SERR#
PCI_PIRQA#
PCI_PIRQC#
PCI_PIRQB#
PCI_REQ0#
PCI_REQ1#
ODD_DET#PCI_PME#
PCI_GNT0#
PCI_PIRQG#ODD_DET#PCI_PIRQE#
PCI_PIRQH#
PCI_PIRQA#PCI_PIRQB#
PCI_PIRQD#PCI_PIRQC#
PCI_GNT3#
PCI_AD[0..31]27
CLK_PCI_ICH 16
PCI_CBE#0 27PCI_CBE#1 27PCI_CBE#2 27PCI_CBE#3 27
PCI_IRDY# 27
PCI_FRAME# 27
PCI_PERR# 27
PCI_TRDY# 27
PCI_DEVSEL# 27
PCI_STOP# 27
PCI_PAR 27
PCI_SERR# 27,33
PLT_RST# 8,26,32
PCI_RST# 26,27
PCI_PME# 26
KBC_SPI_CS1#22
PCI_PIRQE# 27
ACCEL_INT# 26PCI_PIRQG# 27
PCI_REQ2# 27PCI_GNT2# 27
ODD_DET# 21
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
ICH9(1/4)-PCI/INT
20 45Monday, October 29, 2007
2006/02/13 2006/03/10Compal Electronics, Inc.
0
1
1
Boot BIOS Location
PCI
PCI_GNT0# SPI_CS#1
0
1
Boot BIOS Strap
*
LPC
SPI
Place closely pin B10A16 swap override Strap
PCI_GNT3#Low= A16 swap override EnbleHigh= Default *
1
DEL J3. 9/29
Change to ODD_DET#. 10/18
R190 0_0402_5%
12
R178 8.2K_0402_5%
1 2
R183 8.2K_0402_5%
1 2
R172 8.2K_0402_5%
1 2
R184 8.2K_0402_5%
1 2
C1968.2P_0402_50V
@1
2
R192 8.2K_0402_5%
1 2
T113 PAD
R1961K_0402_5%@
12
R187 8.2K_0402_5%
12
R189 8.2K_0402_5%
1 2
R180 8.2K_0402_5%
1 2
R1951K_0402_5%
12
R191 8.2K_0402_5%
1 2
R186 8.2K_0402_5%
1 2
R174 8.2K_0402_5%
1 2
R185 47K_0402_5%1 2
R1941K_0402_5% @
12
R176 8.2K_0402_5%
1 2
R177 8.2K_0402_5%
1 2
R188 8.2K_0402_5%
1 2
R173 8.2K_0402_5%
1 2
PCI
Interrupt I/F
U8B
ICH9-M SFF ES_FCBGA569
AD0A11AD1B12AD2A10AD3C12AD4A8AD5A12AD6E10AD7C11AD8B9AD9D8AD10A4AD11E8AD12A3AD13D9AD14C8AD15C2AD16D7AD17B3AD18D11AD19B6AD20D5AD21D3AD22F4AD23E3AD24E4AD25B2AD26C4AD27C1AD28D1AD29E2AD30J4AD31H2
REQ0# G4GNT0# E1
REQ1#/GPIO50 A9GNT1#/GPIO51 E12REQ2#/GPIO52 B11GNT2#/GPIO53 C10REQ3#/GPIO54 D6GNT3#/GPIO55 C6
C/BE0# D10C/BE1# A5C/BE2# E6C/BE3# C9
IRDY# C3PAR B1
PCIRST# T3DEVSEL# A7
PERR# D4PLOCK# C5
SERR# H5STOP# A6TRDY# A2
FRAME# B8
PLTRST# A21PCICLK B5
PME# T1
PIRQA#F1PIRQB#F5PIRQC#F2PIRQD#C7 PIRQH#/GPIO5 H4PIRQG#/GPIO4 F3PIRQF#/GPIO3 G1PIRQE#/GPIO2 G3
R182 8.2K_0402_5%
1 2R181 8.2K_0402_5%
1 2
R175 8.2K_0402_5%
1 2
R179 8.2K_0402_5%
1 2
R19310_0402_5%
@12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
KB_RST#GATEA20
SATA_TXP0SATA_TXN0
AC97_SDOUT
HDA_BITCLK
SM_INTRUDER#
ICH_SRTCRST#
SATA_TXP1SATA_TXN1
LAN100_SLP
ICH_INTVRMEN
GLAN_COMP
RTC1
ICH_RTCX2
HDA_BITCLK
H_FERR#
ICH_RTCX2
ICH_RTCRST#
CLK_PCIE_SATA#SATA_TXP0_C
SM_INTRUDER#
GATEA20
SATA_RXP0_C
LPC_AD3
ICH_RTCX1
CLK_PCIE_SATA
KB_RST#
SATA_RXN0_C
H_STPCLK#
SATA_TXP1_C
SATA_RXP1_C
SATA_TXN0_C
LPC_AD0
LAN100_SLP
H_FERR#_R
LPC_AD1
AC97_SDOUT
ICH_SRTCRST#
SATA_TXN1_C
H_DPRSTP_R#
H_SMI#
HDARST#
HDA_SYNC
THRMTRIP_ICH#
ICH_INTVRMEN
ICH_RTCX1
SATA_RXN1_C
LPC_AD2
RTC2
SATA_RXN1SATA_RXP1
SATA_RXN1_CSATA_RXP1_C
SATA_TXP1SATA_TXN1
SATA_RXP0_CSATA_RXN0_C
ICH_RSVD
SATA_TXN0SATA_TXP0
SATA_RXN0SATA_RXP0
H_DPSLP# 5H_DPRSTP# 5,8,42
H_FERR# 4
H_PWRGOOD 4,5
H_IGNNE# 4
H_INIT# 4
H_NMI 4H_SMI# 4
H_STPCLK# 4
H_THERMTRIP# 4,8
LPC_AD[0..3] 26,32,33
LPC_FRAME# 26,32,33
H_A20M# 4GATEA20 33
H_INTR 4KB_RST# 33
LAN_RSTSYNC24
LAN_RXD224LAN_RXD124LAN_RXD024
LAN_TXD124LAN_TXD224
LAN_TXD024
GLAN_CLK24
AC97_SYNC_CODEC28AC97_SYNC_MDC30
AC97_BITCLK_MDC30
AC97_RST#_CODEC28
AC97_BITCLK_CODEC28
AC97_RST#_MDC30
AC97_SDOUT_MDC30AC97_SDOUT_CODEC28
IDE_LED#19
CLK_PCIE_SATA# 16CLK_PCIE_SATA 16
G_BATLED#33
ICH_RSVD 22
AC97_SDIN130
ODD_DET# 20
+3VS
+RTCVCC
+3VS
+VCCP
+RTCVCC
+1.05VM
+1.5VS
+RTCVCC +3VL
+5VS +5VS
+3VS
+5VS
+5VS
AC97_SDIN028
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
ICH9(2/4)_LAN,HD,IDE,LPCCustom
21 45Monday, October 29, 2007
2006/02/13 2006/03/10Compal Electronics, Inc.
XOR CHAIN ENTRANCE STRAP:RSVD
0 00
01
11 1
ICH_RSVD HDA_SDOUT_CODEC
placed within 2" fromICH9M
-+L W=20mils
Place component'sclosely SATACONN.(JP9)
Place component'sclosely SATACONN.(JP10)
L
SATA CD-ROM Connector
L
1.8" SATA HDD CONN
Within 500 mils
Place Close to U8.
Description
RVXOR
Normal(D)PCIE Bit1
BT_COMBO# no longer neededfor p-class. Delete signaland R48. 10/12
9/27Del PU R203~R204for H_DPRSTP# &H_DPSLP#.
9/27
Swap in 9/28
Change from 180K to 20K& 0.1u to 1u. 9/29
Install. 10/03
C21
30.
1U_0
402_
16V4
Z
1
2
R212 33_0402_5%
1 2
R218 10K_0402_5%1 2
R197 330K_0402_1% 1 2
R217 33_0402_5%
1 2
Y2
32.768KH
Z_12.5P_1TJS125BJ2A251
OU
T4
IN1
NC
3
NC
2
RTC
LAN / GLAN
IHDA
SATA
LPC
CPU
U8A
ICH9-M SFF ES_FCBGA569
RTCX1F25RTCX2G25
INTVRMENE25
INTRUDER#C23
GLAN_CLKG22
LAN_RSTSYNCD14
LAN_RXD0A14LAN_RXD1D12LAN_RXD2B14
LAN_TXD0D13LAN_TXD1C13LAN_TXD2A13
HDA_BIT_CLKAE7HDA_SYNCAB7
HDA_RST#AA7
HDA_SDIN0AB6HDA_SDIN1AE6HDA_SDIN2AC6
HDA_SDOUTAC7
SATALED#AC9
SATA0RXNAE14SATA0RXPAD14SATA0TXNAC15SATA0TXPAD15
SATA1RXNAD13SATA1RXPAC13SATA1TXNAA14SATA1TXPAB14
SATA_CLKN AC16SATA_CLKP AB16
SATARBIAS# AD10SATARBIAS AE10
FWH0/LAD0 H3FWH1/LAD1 J3FWH2/LAD2 K5FWH3/LAD3 L3
LDRQ0# H1LDRQ1#/GPIO23 J1
FWH4/LFRAME# J2
A20GATE N3A20M# AB23
DPRSTP# AE23DPSLP# AE24
FERR# AD25
CPUPWRGD AE22
IGNNE# AD23
INIT# AE21INTR AD24
RCIN# L1
SMI# AC21NMI AD21
STPCLK# AC25
THRMTRIP# AC23
RTCRST#G24
GPIO56D15
GLAN_COMPOH21 GLAN_COMPIH22
HDA_SDIN3AA5
SATA4TXN AB12
SATA4RXN AD12
SATA4TXP AA12
SATA4RXP AE12
TP11 AC22
HDA_DOCK_EN#/GPIO33AD8HDA_DOCK_RST#/GPIO34AB8
LAN100_SLPD25
SATA5RXN AC11SATA5RXP AD11SATA5TXN AB10SATA5TXP AA10
SRTCRST#C24
T48 PAD
C20
712
P_04
02_5
0V8J
1
2
C21
110
U_0
805_
10V4
Z
1
2
R22356_0402_5%
12
R20756_0402_5%
12
C203 0.01U_0402_50V7K 1 2
D8
DAN202UT106_SC70-3
2
31
C205 0.01U_0402_50V7K 1 2
T49 PAD
C21
40.
1U_0
402_
16V4
Z
1
2
C59
3
0.1U
_040
2_16
V4Z1
2
R20
20_
0402
_5%
@12
R199 330K_0402_1%1 2
R229 10K_0402_5% 12
C2080.01U_0402_50V7K 12
T111 PAD
R198 1M_0402_5%1 2
ZZZ1
PCB-MB
C204 0.01U_0402_50V7K 1 2
R231
10M_0402_5%
1 2
T114PAD
C21
20.
1U_0
402_
16V4
Z
1
2
T50PAD
C22
20.
1U_0
402_
16V4
Z
1
2
R215 33_0402_5%
1 2
R221 33_0402_5%
1 2
R208 1K_0402_5%@1 2
R216 10K_0402_5%1 2
R20520K_0402_5%
1 2
R213 33_0402_5%
1 2
R211 33_0402_5%
1 2C
LRP
1S
HO
RT
PA
DS
12
R232 0_0402_5%1 2
C2090.01U_0402_50V7K 12
JP9OCTEK_SAT-22DE1G_NR SUYIN_127059-* FR022S305ZL
GND 1A+ 2A- 3
GND 4B- 5B+ 6
GND 7
DP 8V5 9V5 10
MD 11GND 12GND 13
C200 0.01U_0402_50V7K 1 2C201 0.01U_0402_50V7K 1 2
C198
1U_0603_10V4Z
1
2
R22710_0402_5%
@12
JBATT1
SUYIN_060003FA002G202NLCONN@
+1 - 2
C202 0.01U_0402_50V7K 1 2
R357 0_0402_5%1 2
R20
10_
0402
_5%
@12
R2331K_0402_5%
1 2
JP10
ACES_85205-10001CONN@
1122334455667788991010
G1 11
G2 12
R220 24.9_0402_1% 1 2
C20
612
P_04
02_5
0V8J
1
2
C19910P_0402_25V8K
@1
2
R214 33_0402_5%
1 2
C22
00.
1U_0
402_
16V4
Z
1
2
R230 24.9_0402_1%
1 2
BATT1
ML1220 MAXELL LITHIUM RTC BATTERY45@
C21
910
U_0
805_
10V4
Z
1
2
C210
1U_0603_10V4Z
1
2
R209 0_0402_5% 1 2
R226 54.9_0402_1%1 2
R219 33_0402_5%
1 2
R210 56_0402_5%1 2
C22
10.
1U_0
402_
16V4
Z
1
2
C197
1U_0603_10V4Z
1
2
R200 20K_0402_5%
1 2
R206 1K_0402_5%@1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SIRQ
LINKALERT#
ICH_RI#
PM_CLKRUN#
PCIE_C_TXP2PCIE_C_TXN2PCIE_RXP2PCIE_RXN2
USB_OC#7
THERM_SCI#
PCIE_WAKE#
GPIO19
GPIO22
GLAN_RXP
GLAN_TXP_C
GLAN_RXN
GLAN_TXN_C
USB_OC#7
USB_OC#5USB_OC#6
USB_OC#0
DMI_IRCOMP
CLK_PCIE_ICH#CLK_PCIE_ICH
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_RXN1
DMI_RXN3
DMI_RXP1
DMI_RXP2
DMI_RXP3
USBRBIAS
S4_STATE#
XDP_DBRESET#
SUS_PWR_ACKM_PWROK
ICH_SUSCLK
SB_SPKR
DMI_RXN0
SLP_S4#
GPIO39
ICH_SMB_DATA
CL_DATA0
CLK_14M_ICH
ME__EC_CLK1
CL_RST#1
XDP_DBRESET#
GPIO38
GPIO22
S4_STATE#
CK_PWRGD_R
DPRSLPVR
NPCI_RST#
SIRQ
CL_RST#
CL_DATA1
CL_CLK0
SLP_S3#
R_STP_CPU#
SUS_PWR_ACK
THERM_SCI#
H_STP_PCI#
GPIO21
LINKALERT#
DMI_RXP0
CL_VREF0_ICH
ICH_RI#
CL_CLK1
SLP_S5#
PCIE_WAKE#
PM_CLKRUN#
ME__EC_DATA1GPIO37
PM_BMBUSY#
CLK_48M_ICH
ICH_SMB_CLK
ICH_LOW_BAT#
PM_PWROK_R
ICH_RSVD
CL_VREF1_ICH
MCH_ICH_SYNC#
PCIE_C_TXP3PCIE_C_TXN3PCIE_RXP3PCIE_RXN3
PCIE_C_TXP4PCIE_C_TXN4PCIE_RXP4PCIE_RXN4
AC_PRESENT
AC_PRESENT
NPCI_RST#
ALS_EN#
ALS_EN#
DMI_RXN2
ISO_PREP#
LAN_PHYPC_R
KBC_SPI_CLK
KBC_SPI_SI
KBC_SPI_CS0#
LAN_STATUS#
ICH_SMB_DATA
ICH_SMB_CLKICH_SMBCLK
ICH_SMBDATA
ICH_SMB_DATA
ICH_SMB_CLK
ICH_SMBCLKICH_SMBDATA
ME__EC_DATA1
ME__EC_CLK1
VRMPWRGD
VRMPWRGD
CLK_14M_ICHCLK_48M_ICH
LAN_STATUS#_DLAN_STATUS#ISO_PREP#
KBC_SPI_CS1#
USB_OC#1USB_OC#2WXMIT_OFF#
USB_OC#0
XMIT_OFF#
USB_OC#4
XMIT_OFF#
RSMRST#
GPIO11
USB_OC#1USB_OC#6WXMIT_OFF#USB_OC#2
GPIO11
EXP_RST
ALS_EN#
GPIO21
GPIO37
GPIO19
ICH_LOW_BAT#
SLP_S3#
LAN_STATUS#_D
PM_PWROK_R
LAN_PHYPC_R
EXP_RST
USB_OC#4
USB_OC#5
H_STP_PCI#16H_STP_CPU#16
SB_SPKR28
PCIE_TXN226PCIE_RXP226PCIE_RXN226
PCIE_TXP226
USB20_N6 31USB20_P6 31
USB20_N5 31USB20_P5 31
USB20_N8 32USB20_P8 32
CK_PWRGD 16
SIRQ27,32,33THERM_SCI#4
VGATE42
OCP#44
GLAN_RXN24
GLAN_TXP24
GLAN_RXP24GLAN_TXN24
CLK_48M_ICH 16CLK_14M_ICH 16
SLP_S3# 24,26,28,33,36,41,42,44
SLP_S5# 36SLP_S4# 36,40
S4_STATE# 31
PM_DPRSLPVR 8,42
DMI_RXP0 8DMI_RXN0 8
DMI_TXP0 8DMI_TXN0 8
CLK_PCIE_ICH# 16CLK_PCIE_ICH 16
DMI_RXP1 8DMI_RXN1 8
DMI_TXP1 8DMI_TXN1 8
DMI_RXP2 8DMI_RXN2 8
DMI_TXP2 8DMI_TXN2 8
DMI_RXP3 8DMI_RXN3 8
DMI_TXP3 8DMI_TXN3 8
USB20_N0 31USB20_P0 31
PM_RSMRST# 33
USB20_P2 26USB20_N2 26
CLKSATAREQ#16
PM_CLKRUN#27,32,33
ICH_RSVD21
CL_DATA0 8
CL_RST# 8
XDP_DBRESET#4
CL_CLK0 8
M_PWROK 8,35
CL_CLK1 26
CL_DATA1 26
MCH_ICH_SYNC#8
CL_RST#1 26
PM_BMBUSY#8
PCIE_TXN326PCIE_RXP326PCIE_RXN326
PCIE_TXP326
PCIE_TXN426PCIE_RXP426PCIE_RXN426
PCIE_TXP426
USB20_N3 26USB20_P3 26
USB20_N7 26USB20_P7 26
AC_PRESENT 33
LAN_DISABLE_N 33
ON/OFFBTN# 30
USB20_P4 31USB20_N4 31
PREP#25,34
SUS_PWR_ACK 33
NPCI_RST# 33
LOW_BAT# 33
PM_SLP_M# 33,36,40,41
ALS_EN 18
RUNSCI_EC#33
LAN_PHYPC24,25
KBC_SPI_CLK_R33
KBC_SPI_SI_R33
KBC_SPI_CS0#_R33
LANLINK_STATUS#24,25,33
LPC_PD#32
PCIE_WAKE#26
ICH_SMBCLK14,15,16
ICH_SMBDATA14,15,16
ICH_SMB_CLK 26
ICH_SMB_DATA 26
ICH_SM_DA4,26
ICH_SM_CLK4,26
KBC_SPI_CS1#_R32,33
WEBCAM_ON/OFF#18
CLK_ENABLE# 42
FPR_OFF32
LID_SW#18,19,33
ISO_PREP#34
BT_OFF31
KBC_SPI_CS1#20
WXMIT_OFF#26
XMIT_OFF#26
RPGOOD 39
KBC_SPI_SO33
HDD_HALTLED19
PM_PWROK 8,33,42,43
EXP_RST26
LAN_WOL_EN 33,36
USB20_P9 34USB20_N9 34
USB20_P10 18USB20_N10 18
+3VALW
+3VALW
+3VALW
+3VM
+3VS
+3VS +3VALW
+1.5VS
+3VALW
+3VL
+3VS
+3VALW
+3VM
+3VM
+3VM
+3VS
+5VS
+3VS
+3VS
+3VM_LAN+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
ICH9(3/4)_DMI,USB,GPIO,PCIECustom
22 45Monday, October 29, 2007
2006/02/13 2006/03/10Compal Electronics, Inc.
Within 500 mils
low -->defaultHigh -->No boot
WLAN
GLA
NMB
DOCK
Bluetooth WWAN Fingerprint
Within 500 mils
R276
USB Camera
EXP
WWAN
EXPRESSWLAN
MBMB
Add for find tune timing.(If have glich issue)
Place closely pin H1Place closely pin AF3
Change in 7/13
Add in 9/14.
Reserve R254 at 9/19.
9/21
Del R261, R264, R267 cause no used in 9/21.
Del R244. 9/27 Del PU for GPIO39. 9/27
Change R238 connect to GPIO11. 9/27
Add RP15 back. 9/27
Add in 9/27
Change R269 to 10K. 9/29
Change fromODD_DET# toGPIO19. 10/18
Add R321 in 10/03.
Add R326 10K. 10/04
Change R251 to CH751. 10/04
Add in 10/04.
Reserve for DB1 test. 10/05
Reserve in 10/08.
Add R331 in 10/08.
Change design in 10/08.
Add EXP_RST# in 10/09.
Add in 10/10.
Add WOL_EN back. 10/10
Pin connection error, modify in 10/24.
R269 10K_0402_5%@1 2
R23910_0402_5%
@ 12
G
D
S
Q16RHU002N06_SOT323
2
13
T107PAD
R325 100K_0402_5% @1 2
R2872.2K_0402_5%
12
R253 0_0402_5%1 2
R321 10K_0402_5%
1 2
R262 0_0402_5%@1 2
C22
50.
1U_0
402_
16V4
Z
1
2
C223
4.7P_0402_50V8C
@ 1
2
G
DS
Q13RHU002N06_SOT3232
13
R284 24.9_0402_1% 1 2
R366 0_0402_5%1 2
R252 10K_0402_5%1 2
T95PAD
U10
SN74AHC1G08DCKR_SC70
IN1 1
IN2 2G3
O4
P5
R273 10K_0402_5%1 2
T58PAD
R2832.2K_0402_5%1
2
C547
0.1U_0402_16V4Z @
1
2
R289 15_0402_5%
1 2
R234 10K_0402_5%
1 2
G
DS
Q12RHU002N06_SOT323
2
13
D40 CH751H-40_SC76 21
R254 10K_0402_5%@ 1 2
R328 0_0402_5%1 2
R238 10K_0402_5%1 2
R595 10K_0402_5%
1 2
R24010_0402_5%
@12
R286 15_0402_5%
1 2
RP15
10K_1206_8P4R_5%
18273645
R2362.2K_0402_5%
12
R255 10K_0402_5% 1 2
C227 0.1U_0402_16V4Z 1 2
PCI-Express
Direct Media Interface
USB
SPI
U8D
ICH9-M SFF ES_FCBGA569
PERN1T25PERP1T24PETN1R24PETP1R23
PERN2P25PERP2P24PETN2P21PETP2P22
PERN3N23PERP3N24PETN3M21PETP3M22
PERN4M25PERP4M24PETN4L24PETP4L23
PERN5K24PERP5K25PETN5K21PETP5K22
PERN6/GLAN_RXNH24PERP6/GLAN_RXPH25PETN6/GLAN_TXNJ24PETP6/GLAN_TXPJ23
DMI0RXN V25DMI0RXP V24DMI0TXN U24DMI0TXP U23
DMI1RXN W23DMI1RXP W24DMI1TXN V21DMI1TXP V22
DMI2RXN Y24DMI2RXP Y25DMI2TXN Y21DMI2TXP Y22
DMI3RXN AB24DMI3RXP AB25DMI3TXN AA23DMI3TXP AA24
DMI_CLKN T21DMI_CLKP T22
DMI_ZCOMP AB21DMI_IRCOMP AB22
OC0#/GPIO59P4OC1#/GPIO40N4OC2#/GPIO41N1OC3#/GPIO42P5OC4#/GPIO43P1OC5#/GPIO29P2OC6#/GPIO30M3OC7#/GPIO31M2
USBP0N AE2USBP0P AD1USBP1N AD3USBP1P AD4USBP2N AC2USBP2P AC3USBP3N AC5USBP3P AB4USBP4N AB2USBP4P AB1USBP5N AA3USBP5P AA2USBP6N Y1USBP6P Y2USBP7N W2USBP7P W3
USBRBIAS#AD5 USBRBIASAE5
SPI_CLKE24SPI_CS0#E23SPI_CS1#/GPIO58/CLGPIO6F23
SPI_MOSIF22SPI_MISOG23
OC8#/GPIO44P3OC9#/GPIO45R1
USBP8P V2USBP8N V1
USBP9N Y5USBP9P Y4
USBP10N U3
USBP11N V4USBP10P U2
USBP11P V5
OC10#/GPIO46R4OC11#/GPIO47R2R292
330_0402_5%
12
RP16
10K_1206_8P4R_5%
18273645
R27
8
453_
0402
_1%
12
R256 0_0402_5%1 2
R508 8.2K_0402_5%
1 2
C22
60.
1U_0
402_
16V4
Z
1
2T57PAD
R331 10K_0402_5%1 2
R275 8.2K_0402_5% 1 2
G
D
S
Q63
RH
U00
2N06
_SO
T323
2
13
T116PAD
G
DS
Q14RHU002N06_SOT323
2
13
R27
4
453_
0402
_1%
12
R272 10K_0402_5%1 2
R2352.2K_0402_5%
12
R2822.2K_0402_5%
12
C233 0.1U_0402_16V4Z 1 2
R263 10K_0402_5%1 2
T96PAD
R242 8.2K_0402_5%@ 1 2
C228 0.1U_0402_16V4Z 1 2
T117PAD
D9 CH751H-40_SC76 2 1
T53 PAD
R237 8.2K_0402_5%
1 2
C234 0.1U_0402_16V4Z 1 2
C232 0.1U_0402_16V4Z 1 2
T56PAD
R260 10K_0402_5%
1 2
R2773.24K_0402_1%
1 2
C229 0.1U_0402_16V4Z 1 2
R603 10K_0402_5%1 2
R28010K_0402_5%
12 R332 0_0402_5%1 2
R265 0_0402_5%1 2
R268 0_0402_5%1 2
R244 8.2K_0402_5%@ 1 2
G
DS
Q15RHU002N06_SOT323
2
13
R258 10K_0402_5%
1 2
G
DS
Q17RHU002N06_SOT323
2
13
R29322.6_0402_1%
12
R276 1K_0402_5% @1 2
R335 10K_0402_5%1 2
R243 0_0402_5%@12
R259 1K_0402_5%1 2
R245 47K_0402_5%1 2
R24910K_0402_5%@
12
R2882.2K_0402_5%
12
R25710K_0402_5%
12
R266 10K_0402_5%1 2
R248 10K_0402_5%
1 2
R25010K_0402_5%@
12
SATA
SMB
SYS
GPIO
GPIO
GPIO
Clocks
Power MGT
Controller Link
MISC
U8C
ICH9-M SFF ES_FCBGA569
SATA0GP/GPIO21 AE19SATA1GP/GPIO19 AA18SATA4GP/GPIO36 AE20SATA5GP/GPIO37 AA20
SMBCLKC18SMBDATAC15LINKALERT#/GPIO60/CLGPIO4B21SMLINK0E18SMLINK1A24
SUS_STAT#/LPCPD#T5SYS_RESET#C25
PMSYNC#/GPIO0L2
GPIO1AE16GPIO6AE18GPIO7AD18GPIO8B25GPIO12C14
SMBALERT#/GPIO11A23
GPIO17AE17GPIO18K3
SCLOCK/GPIO22AC19
SATACLKREQ#/GPIO35M4
STP_PCI#/GPIO15B15STP_CPU#/GPIO25A20
SLOAD/GPIO38AB18SDATAOUT0/GPIO39AC18
CLKRUN#/GPIO32M5
SDATAOUT1/GPIO48AB19
WAKE#C21SERIRQL4THRM#AD20
VRMPWRGDB24
CLK14 K1CLK48 AB5
SUSCLK R3
SLP_S3# D18SLP_S4# B20SLP_S5# D16
PWROK D23
DPRSLPVR/GPIO16 M1
BATLOW# C16
PWRBTN# U4
LAN_RST# D22
RSMRST# D19
RI#C20
S4_STATE#/GPIO26 E14
GPIO27D17GPIO28E20
TP12A19
CK_PWRGD U1
CLPWROK T4
SLP_M# B23
GPIO20AC8
CL_CLK0 C22CL_CLK1 A18
CL_DATA0 E22CL_DATA1 B18
CL_VREF0 F21CL_VREF1 A17
CL_RST0# C17
GPIO10/SUS_PWR_ACK E16
WOL_EN/GPIO9 D21GPIO14/AC_PRESENT A15
MEM_LED/GPIO24 A22SPKRK4
TP3C19
CL_RST1# B17GPIO49AC20
GPIO13D20
GPIO57/CLGPIO5A16
TP10AD17
TP8AB17
MCH_SYNC#AB20
TP9AC17
R241 0_0402_5%@12
R291 0_0402_5%1 2
R294 10K_0402_5%
12
R290 15_0402_5%
1 2
C224
4.7P_0402_50V8C
@1
2
R326 10K_0402_5%
1 2
C231 0.1U_0402_16V4Z 1 2
R596 0_0402_5%1 2
C230 0.1U_0402_16V4Z 1 2
T54PAD
R246 8.2K_0402_5%
1 2
R2713.24K_0402_1%1 2
T55PAD
R68 8.2K_0402_5%
1 2
R285 15_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ICH_V5REF_RUN
VCC_DMI
ICH_V5REF_RUN
ICH_V5REF_SUS
VCC_LAN1_05_INT_ICH
ICH_V5REF_SUS
VCCSUS1_5_ICH_2
VCCCL1_05_ICH
VCCSUS1_5_ICH_1
VCCSUS1_05_ICH_1
+1.5VS_DMIPLL
VCCSUS1_05_ICH_2
ICHGND4
+1.5VS_GLAN
ICHGND1
ICHGND2
ICHGND1ICHGND2ICHGND3
CRACK_BGA
CRACK_BGA
ICHGND3
CRACK_BGA
ICHGND4
CRACK_BGACRACK_BGA13,33
+VCCP
+3VS
+RTCVCC
+1.5VS
+3VM_WOL
+3VALW
+3VS
+1.5VS
+1.5VS
+5VS +3VS +3VALW+5VALW
+3VS
+3VALW
+3VALW
+VCCP
+1.5VS_PCIE_ICH
+1.5VS
+3VS
VCC_DMI
+1.5VS_VCCSATAPLL
+1.5VS
+1.5VS_PCIE_ICH
+1.5VS_USBPLL
+VCCP
+3VS
+3VS
+3VS
+3VS
+1.5VS
+3VM_WOL
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
ICH9(4/4)_POWER&GNDCustom
23 45Monday, October 29, 2007
2006/02/13 2006/03/10Compal Electronics, Inc.
(DMI)
40 mils
20 mils
20 mils20 mils
9/19
9/21
9/21
9/29
9/29
9/29
G
D
SQ74RHU002N06_SOT323
2
13
C26
910
U_0
805_
10V4
Z
1
2
C26
10.
1U_0
402_
16V4
Z
1
2 R49
1
100K
_040
2_5%
12
C26
30.
1U_0
402_
16V4
Z
1
2
C264 1U_0603_10V4Z1 2
C23
70.
1U_0
402_
16V4
Z
1
2
C23
50.
1U_0
402_
16V4
Z
1
2
C23
9
10U
_080
5_10
V4Z
1
2
R368 0_0402_5%@1 2
C24
1
2.2U
_060
3_6.
3V4Z
1
2
C24
90.1U
_0402_16V4Z
1
2
C2170.1U_0402_16V4Z
1 2
C24
6
0.1U_0402_16V4Z
1
2
C24
0
10U
_080
5_10
V4Z
1
2
C26
50.
1U_0
402_
16V4
Z
1
2
D11
CH751H-40_SC76
21
R299
10_0402_5%
12
U8E
ICH9-M SFF ES_FCBGA569
VSS[001]B4VSS[002]B7VSS[003]B10VSS[004]B13VSS[005]B16VSS[006]B19VSS[007]B22VSS[008]D2VSS[009]D24VSS[010]E5VSS[011]E7VSS[012]E9VSS[013]E11VSS[014]E13VSS[015]E15VSS[016]E17VSS[017]E19VSS[018]E21VSS[019]F24VSS[020]G2VSS[021]G5VSS[022]G10VSS[023]G13VSS[024]G16VSS[025]G19VSS[026]G21VSS[027]H10VSS[028]H12VSS[029]H18VSS[030]H23VSS[031]J5VSS[032]J9VSS[033]J10VSS[034]J11VSS[035]J12VSS[036]J13VSS[037]J15VSS[038]J21VSS[039]J22VSS[040]J25VSS[041]K2VSS[042]K9VSS[043]K10VSS[044]K11VSS[045]K12VSS[046]K13VSS[047]K15VSS[048]K17VSS[049]K23VSS[050]L5VSS[051]L9VSS[052]L10VSS[053]L16VSS[054]L17VSS[055]L21VSS[056]L22VSS[057]L25VSS[058]M9VSS[059]M10VSS[060]M12VSS[061]M13VSS[062]M14VSS[063]M16VSS[064]M17VSS[065]M23VSS[066]N2VSS[067]N5VSS[068]N9VSS[069]N10VSS[070]N12VSS[071]N13VSS[072]N14VSS[073]N16VSS[074]N17VSS[075]N21VSS[076]N22VSS[077]N25VSS[078]P9VSS[079]P10VSS[080]P12VSS[081]P13VSS[082]P14VSS[083]P16VSS[084]P17VSS[085]P23VSS[086]R5VSS[087]R7VSS[088]R8VSS[089]R9VSS[090]R10VSS[091]R16VSS[092]R17VSS[093]R19VSS[094]R21VSS[095]R22VSS[096]R25VSS[097]T2
VSS[099]T10VSS[100]T11VSS[101]T12VSS[102]T13VSS[103]T14VSS[104]T15VSS[105]T16VSS[106]T23
VSS[107] U5VSS[108] U10VSS[109] W11VSS[110] U14VSS[111] W16VSS[112] U21VSS[113] U22VSS[114] U25VSS[115] V3VSS[116] V8VSS[117] V19VSS[118] V23VSS[119] W1VSS[120] W4VSS[121] W5VSS[122] W7VSS[123] W9VSS[124] W15VSS[125] W19VSS[126] W21VSS[127] W22VSS[128] W25VSS[129] Y3VSS[130] Y23VSS[131] AA1VSS[132] AA4VSS[133] AA6VSS[134] AA8VSS[135] AA11VSS[136] AA13VSS[137] AA15VSS[138] AA16VSS[139] AA17VSS[140] AA19VSS[141] AA21VSS[142] AA22VSS[143] AA25VSS[144] AB3VSS[145] AB9VSS[146] AB11VSS[147] AB13VSS[148] AB15VSS[149] AC24VSS[150] AC1VSS[151] AC4VSS[152] AC10VSS[153] AC12VSS[154] AC14VSS[155] AD2VSS[156] AD6VSS[157] AD9VSS[158] AD16VSS[159] AD19VSS[160] AD22VSS[161] AE3VSS[162] AE4VSS[163] AE11VSS[164] AE13VSS[165] AE15
VSS_NCTF[01] A1VSS_NCTF[02] A25VSS_NCTF[03] AE1VSS_NCTF[04] AE25
VSS[098]T8
VSS[166] V17VSS[167] AE8VSS[168] V9VSS[169] J16
C24
7
4.7U_0805_10V4Z
1
2
C251
1U_0603_10V4Z
1
2
R358 0_0402_5%@1 2R361 0_0402_5%@1 2
R399 0_0402_5%@1 2
C25
91U
_060
3_10
V4Z
1
2
C23
80.
1U_0
402_
16V4
Z
1
2
C25
3
0.1U
_040
2_16
V4Z
1
2
D12
CH751H-40_SC76
21
C25
50.
1U_0
402_
16V4
Z
1
2
R297
CHB1608U301_06031 2
C24
51U
_060
3_10
V4Z
1
2
R41
4
100K
_040
2_5%
12
G
D
SQ72RHU002N06_SOT323
2
13
C24
410
U_0
805_
10V4
Z
1
2
R298
100_0402_5%
12
+
C24
2
220U
_D2_
4VM
1
2
T59
C25
81U
_060
3_10
V4Z
1
2
C27
010
U_0
805_
10V4
Z
1
2
C23
6
0.1U
_040
2_16
V4Z
1
2
C26
00.
1U_0
402_
16V4
Z
1
2
C25
710
U_0
805_
10V4
Z
1
2
R300
CHB1608U301_0603 1 2
G
D
SQ73RHU002N06_SOT323
2
13
C24
8
0.1U_0402_16V4Z
1
2
T60CO
RE
VCCA3GPATX
ARXUSB CORE
PCI
GLAN POWER
VCCP
_COR
EVC
CPSU
SVC
CPUS
B
U8F
ICH9-M SFF ES_FCBGA569
V5REFG7
V5REF_SUSU7
VCC1_5_B[01]J19VCC1_5_B[02]K18VCC1_5_B[03]K19VCC1_5_B[04]L18VCC1_5_B[05]L19VCC1_5_B[06]M18VCC1_5_B[07]M19VCC1_5_B[08]N18VCC1_5_B[09]N19VCC1_5_B[10]P18VCC1_5_B[11]R18VCC1_5_B[12]T18VCC1_5_B[13]T19VCC1_5_B[14]U18VCC1_5_B[15]U19
VCC3_3[01] V18
VCCDMIPLL P19
VCC1_5_A[01]U13VCC1_5_A[02]V13VCC1_5_A[03]W13
VCCSATAPLLW17
VCC3_3[02] AE9
VCC1_5_A[04]U12VCC1_5_A[05]V12
VCCUSBPLLU8
VCCLAN1_05[1]G11VCCLAN1_05[2]H11
VCC1_05[01] L11VCC1_05[02] L12VCC1_05[03] L13VCC1_05[04] L14VCC1_05[05] L15VCC1_05[06] M11VCC1_05[07] M15VCC1_05[08] N11VCC1_05[09] N15VCC1_05[10] P11VCC1_05[11] P15VCC1_05[12] R11VCC1_05[13] R12VCC1_05[14] R13VCC1_05[15] R14VCC1_05[16] R15
VCCLAN3_3[1]G12VCCLAN3_3[2]H13
VCCHDA AD7
VCCSUSHDA V10
V_CPU_IO[1] V16V_CPU_IO[2] U16
VCC3_3[07] H7VCC3_3[08] H8
VCCRTCG17
VCCSUS3_3[01] G14VCCSUS3_3[02] G15VCCSUS3_3[03] H14
VCCSUS3_3[05] J7VCCSUS3_3[06] J8VCCSUS3_3[07] K7VCCSUS3_3[08] K8VCCSUS3_3[09] L7VCCSUS3_3[10] L8VCCSUS3_3[11] M7VCCSUS3_3[12] M8VCCSUS3_3[13] N7VCCSUS3_3[14] N8VCCSUS3_3[15] P7VCCSUS3_3[16] P8
VCCSUS1_05[1] T7VCCSUS1_05[2] H15
VCC1_5_A[12]H9
VCC1_5_A[13]V11VCC1_5_A[14]U11
VCCSUS3_3[04] W8
VCC3_3[06] G8
VCCGLAN1_5[2]J18 VCCGLAN1_5[1]H19
VCCGLAN3_3K16
VCCGLANPLLJ17
VCC3_3[03] AA9
VCCSUS1_5[1] H16
VCCSUS1_5[2] V7
VCC_DMI[2] U17VCC_DMI[1] T17
VCCCL1_05 G18
VCCCL3_3[2] K14VCCCL3_3[1] J14
VCCCL1_5 H17
VCC1_5_A[06]W12
VCC3_3[04] V14VCC3_3[05] W14
VCC1_5_A[10]W18
VCC1_5_A[11]G9
VCC1_5_A[09]V15 VCC1_5_A[08]U15
VCC1_5_A[07]W10
VCC1_5_A[15]T9VCC1_5_A[16]U9
C26
24.
7U_0
805_
10V4
Z
1
2
T62C25
61U
_060
3_10
V4Z
1
2
C25
0
0.1U_0402_16V4Z
1
2
R295
BLM18PG181SN1D_06031 2
R24
7
100K
_040
2_5%
12
C2670.1U_0402_16V4Z
12
C252
0.1U_0402_16V4Z
1
2
R303CHB1608U301_0603
1 2
G
D
SQ75RHU002N06_SOT323
2
13
C26
60.
1U_0
402_
16V4
Z
1
2
R301
CHB1608U301_0603 1 2
C24
30.
01U
_040
2_16
V7K
1
2
C26
80.
1U_0
402_
16V4
Z 1
2
R296
CHB1608U301_06031 2
C25
40.
1U_0
402_
16V4
Z
1
2
R48
8
100K
_040
2_5%
12
R302
CHB1608U301_0603 1 2
T61
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
IEEE_TEST_PIEEE_TEST_N
XTAL1
LAN_PHYPC
XTAL2
XTAL1XTAL2
LAN_CTRL_18
LAN_ACT#LANLINK_STATUS#
LAN_CTRL_18
+3VM_LAN_R
LAN_PHYPC
GLAN_RXP_CGLAN_RXN_C
GLANCLK
ADP_PRES33,38,39
SLP_S3#22,26,28,33,36,41,42,44
LAN_TXD021LAN_TXD121LAN_TXD221
LAN_RXD021
LAN_MDI1P 25LAN_MDI1N 25
LAN_MDI2N 25
LAN_MDI3P 25LAN_MDI3N 25
LAN_MDI2P 25
LAN_RXD221LAN_RXD121
LAN_RSTSYNC21
LAN_MDI0P 25LAN_MDI0N 25
LANLINK_STATUS#22,25,33LAN_ACT#25
LAN_PHYPC22,25
GLAN_RXP22GLAN_RXN22
GLAN_TXP22GLAN_TXN22
GLAN_CLK21
+1.8VM
+3VM_WOL +3VM_LAN
+3VM_LAN
+3VM_LAN
+1.8VM
+1.8VM_LAN+1.8VM_LAN
+3VM_LAN +3VM_LAN
+V1.0M_LAN
+V1.0M_LAN
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
Intel 82566 Nineveh
24 45Monday, October 29, 2007
2006/02/13 2006/07/26Compal Electronics, Inc.
ACBS is built into Nineveh, soreserve these parts for test.(9/4)
Add R309 back. 9/29
Install R308. 9/29
Change R315 to 1K and R316 to 10K. 10/10
Del R311 and modifynet name to+V1.0M_LAN. 10/18
T67PAD
R317 200_0402_5%@1 2
C28
40.
1U_0
402_
16V4
Z
1
2
C29
147
0P_0
402_
50V7
K
1
2
R316 10K_0402_5%1 2
C279 0.1U_0402_16V7K1 2
C29
20.
1U_0
402_
16V4
Z
1
2
C27110U_0805_10V4Z
1
2
R318 200_0402_5%@12
R308 0_0402_5%1 2
R3051M_0402_5%
12
R312 4.99K_0402_1%12
U9
82567LF_QFN56_8X8~D
LED_04
LED_21 LED_12
GND_PAD 57
RESERVED_NC 51
CTRL18 29CTRL10 31
JTXD_042
JRSTSYNC50 JKCLK45
JTXD_143JTXD_244
JRXD_047JRXD_148JRXD_249
RSET15
IEEE_TEST_P12IEEE_TEST_N13
DIS_REG1034
LAN_DISABLE_N37
GLAN_RXN56
GLAN_TXN53 GLAN_TXP52
XTAL110 XTAL29
TEST_EN36
JTAG
_TM
S39
JTAG
_TC
K40
JTAG
_TR
ST35
JTAG
_TD
I7
JTAG
_TD
O6
GLAN_RXP55
MDI_N_3 16MDI_P_3 17
MDI_P_2 21MDI_N_2 20
MDI_P_1 23MDI_N_1 22
MDI_P_0 27
AVDD_33_28 28
AVDD_18_30 30AVDD_18_32 32AVDD_18_54 54
AVDD_18_25 25AVDD_18_24 24AVDD_18_18 18AVDD_18_19 19AVDD_18_14 14AVDD_18_11 11
DVDD_10_38 38DVDD_10_33 33DVDD_10_8 8DVDD_10_5 5
VDDO_33_3 3VDDO_33_46 46
MDI_N_0 26
AVDD_18_41 41
C28
64.
7U_0
805_
10V4
Z
1
2
C28
80.
1U_0
402_
16V4
Z
1
2
R617 1K_0402_5%@1 2
C280 0.1U_0402_16V7K1 2
C27827P_0402_50V8J
1
2
C29
610
U_0
805_
10V4
Z
1
2
C29
047
0P_0
402_
50V7
K
1
2
R306100K_0402_5%
1 2
R30
74.
75K_
0402
_1%
12
G
D
S
Q22RHU002N06_SOT323 @
21
3
G
DS
Q18SI2301BDS_SOT23
2
13
T68
PA
D
R313 0_0402_5%@ 1 2
R315 1K_0402_5%
1 2
C27
4
0.1U
_040
2_16
V4Z
1
2
G
D
S
Q20BSS138_SOT23
2
13
C28
20.
1U_0
402_
16V4
Z
1
2
Q19BCP69_SOT223
1
24
3
C27
3
10U
_080
5_10
V4Z
1
2
C29
30.
1U_0
402_
16V4
Z
1
2
G
D
S
Q21RHU002N06_SOT323@
21
3
C27727P_0402_50V8J
1
2
C28
710
U_0
805_
10V4
Z
1
2
C28
94.
7U_0
805_
10V4
Z
1
2
C27
6
10U
_080
5_6.
3V6M
1
2
C27
5
0.1U
_040
2_16
V4Z
1
2
C28
10.
1U_0
402_
16V4
Z
1
2
R310 0_0603_5%1 2
T65PAD
C29
510
U_0
805_
10V4
Z
1
2
R3140_0603_5%1 2
R309 33_0402_5%1 2
C29
44.
7U_0
805_
10V4
Z
1
2
C28
54.
7U_0
805_
10V4
Z
1
2
C28
30.
1U_0
402_
16V4
Z
1
2
R304 0_1206_5%@1 2
R618 200_0402_5%@1 2
Y325MHZ_20P_1BG25000CK1A
1 2C
272
1000
P_04
02_5
0V7K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MCT1
TRM_CT
MCT0
MCT3
TRM_CT
TRM_CT
MCT2
TRM_CT
LAN_ACT#
LANLINK_STATUS#
MDO1+
MDO1-
MDO0+
MDO0-
MDO2-
MDO2+
MDO3+
MDO3-
LAN_ACT#
LANLINK_STATUS#
LAN_LINK_EN
MDO0+
MDO0-
MDO3+
MDO3-
MDO1+
MDO1-
MDO2+
MDO2-
PREP#22,34LANLINK_STATUS#22,24,33
LAN_ACT#24
MDO2-34
MDO2+34
MDO3+34
MDO3-34
MDO0+34
MDO0-34
MDO1+34
MDO1-34
LAN_PHYPC 22,24
LAN_ACT#_DOCK34
LANLINK_STATUS#_DOCK34
LAN_MDI0N24
LAN_MDI0P24
LAN_MDI3N24
LAN_MDI3P24
LAN_MDI1N24
LAN_MDI1P24
LAN_MDI2N24
LAN_MDI2P24
+1.8VM
+1.8VM
+1.8VM
+1.8VM
+3VM_LAN V_3P3_LAN_LED
V_3P3_LAN_LED
V_3P3_LAN_LED
+3VM_LAN
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
Magnetic & RJ45
25 45Monday, October 29, 2007
2006/02/13 2006/07/26Compal Electronics, Inc.
20 mil
20 mil
0125 EMI request
Del LAN ENERGY DET cause already inside the BOAZ. 9/27
LAN status/link level shift. 9/21
Delete all termination cause they are already inside BOAZMAN. 9/28
Pin Swap. 10/05
Swap P & N. 10/09
Change design. 10/12
Modify JP11 footprint tosame as Meson. 10/25
C307 0.01U_0402_50V7K 1 2
C308 0.01U_0402_50V7K 1 2
C312680P_0402_50V7K@1 2
C310 0.01U_0402_50V7K 1 2
G
D
S
Q242N7002_SOT23
2
13
R89 0_0402_5%@1 2
R341 300_0603_5%
1 2
R339 300_0603_5% 1 2
Q78A2N7002DW-T/R7_SOT363-6
61
2 R61510K_0402_5%1 2
C309 0.01U_0402_50V7K 1 2
R340100K_0402_5%
12
1:1
1:1
1:1
1:1
T69
24HST1041A-3_24P
TCT11
TD1+2
TD1-3
TCT24
TD21+5
TD2-6
TCT37
TD3+8
TD3-9
TCT410
TD4+11
TD4-12 MX4- 13
MX3- 16
MCT3 18
MX2- 19
MX2+ 20
MCT2 21
MX1- 22
MX1+ 23
MCT1 24
MX4+ 14
MCT4 15
MX3+ 17
C306 1000P_1808_3KV7K
1 2C305 0.1U_0402_16V7K
12
Q78B2N7002DW-T/R7_SOT363-6
3
5
4
R31975_0402_1%
12
C304 0.1U_0402_16V7K
12
R33075_0402_1%
12
C311680P_0402_50V7K@1 2
C297 0.1U_0402_16V7K
12
C299 0.1U_0402_16V7K
12
G
DS
Q23FDN338P_SOT232
13
JP11
SUYIN_100073FR014G303ZL_13P
PR1-2
PR1+1
PR2+3
PR3+4
PR3-5
PR2-6
PR4+7
PR4-8
Green LED-10
Green LED+9
Yellow LED-12
Yellow LED+11
SHLD1 14
SHLD1 15
DETECT PIN1 13
R32375_0402_1%
12
R32975_0402_1%
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
UIM_CLK
UIM_RST
M_WXMIT_OFF#
UIM_CLK
UIM_VPP
WW_LED#
UIM_RSTUIM_VPP
XMIT_D_OFF#
WW_LED#
WP_LED#
PCIE_C_RXP2PCIE_C_RXN2
WL_LED#
ICH_SMB_DATA
DEG_FRAME#DEBUG_AD3
DEBUG_AD0PCI_RST#_R
XMIT_D_OFF#
WW_LED#
WP_LED#
WL_LED#
PCIE_WAKE#
ICH_SMB_CLK
CL_CLK1CL_DATA1CL_RST#1
CLKREQA#
PCIE_WAKE#
ICH_SMB_DATAICH_SMB_CLK
PLT_RST#
CL_RST#1CL_DATA1CL_CLK1
UIM_PWR
M_WXMIT_OFF#
PERST#
CPPE#
PLT_RST#RCLKEN
PLT_RST#
NC_CP#
CLKREQA#
PCIE_PME#_R
PERST#
CPPE#
NC_CP#
PCIE_RX3P_RPCIE_RXN3_R
ICH_SMB_CLKICH_SMB_DATA
USBP2+_RUSBP2-_R
UIM_DATA
UIM_PWR
UIM_DATAUIM_PWR
WL_LED#
LPC_AD0
LPC_AD2LPC_AD1
LPC_AD3DEG_FRAME#DEBUG_AD3DEBUG_AD2DEBUG_AD1DEBUG_AD0
PCI_RST#_R
DEBUG_AD2DEBUG_AD1
WXMIT_OFF#22
USB20_N7 22USB20_P7 22
PCIE_WAKE#22
CLK_PCIE_MCARD16CLK_PCIE_MCARD#16
PLT_RST# 8,20,32
PCIE_TXN222PCIE_TXP222
WL_LED# 19
PCIE_RXP222PCIE_RXN222
ICH_SMB_CLK 22ICH_SMB_DATA 22
CL_RST#122
CL_CLK122CL_DATA122
XMIT_OFF# 22
USB20_N3 22USB20_P3 22
EXP_RST22
CLKREQA# 16
CLK_PCIE_WAN#16CLK_PCIE_WAN16
PCIE_RXN422PCIE_RXP422
PCIE_TXN422PCIE_TXP422
CLKREQ_WLAN#16
CLKREQG_WWAN#16
ACCEL_INT#20
ICH_SM_DA4,22ICH_SM_CLK4,22
WMC1_DISABLE33
MC2_DISABLE33
SLP_S3#22,24,28,33,36,41,42,44
PCI_PME#20
PCIE_TXN322PCIE_TXP322
PCIE_RXP322PCIE_RXN322
USB20_P222USB20_N222
CLK_PCIE_EXP16CLK_PCIE_EXP#16
WW_LED# 19
LPC_AD[0..3] 21,32,33
LPC_FRAME# 21,32,33
PCI_RST# 20,27
CLK_PCI_DEBUG16
+3V_WWAN
+3V_WWAN+3V_WWAN
+3V_WWAN
+3VS
+3VS_ACL
+1.5VS
+1.5VS
+3V_WLAN
+3V_WLAN
+3VS+3V_WLAN
+3V_WLAN
+3VS
+1.5VS_PEC+1.5VS
+3V_PEC+3VS
+3VS_PEC
+3V_PEC
+1.5VS_PEC
+3V
_WW
AN
+3VALW
+3V_WLAN
+3VALW
+3V_WWAN
+3VS_ACL_IO+3VS_ACL
+3VS_ACL
+3VS +3VS_ACL +3VS_ACL_IO
+3V_WWAN
+3VS_ACL
+3VS_PEC
+3VALW
+3VALW
+3VS_PEC
+1.5VS_PEC
+3V_PEC
+1.5VS_PEC
+3V_WWAN
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
WLAN&WWAN Mini-Card/Accelerometer
26 45Monday, October 29, 2007
2005/05/26 2006/07/26Compal Electronics, Inc.
Mini-Express Card--WWAN ACCELEROMETER
Mini-Express Card
Add to prevent leakage issue.
Express Card Power Switch
Express Card Slot
L Must be placed in the center of the system.
Change Power rail sameas pin2, 52. 8/16
Change Power rail sameas pin2, 52. 8/16
Note1
Note1
Note2Reserve for 800 & 900MHzEMI issue. 8/16
Note2
Close to JP14
DEL in 9/26
Change valueto 47K. 9/27 Add in 9/27
Add back 9/27
Del BT_COMBO# in 10/12.
Change Q66 fromSI2301BDS toSI2305DS. 10/25Use GPIO48 from ICH9 for this work. 10/9
RCLKEN haveinternal PU.
Reserve for port80 card use for FCS in factory side. 10/17
10/17
10/18
Change Q67 fromSI2301BDS toSI2305DS. 10/25
C33
40.
1U_0
402_
16V4
Z
1
2
R60
710
K_04
02_5
%
12
R352 0_0402_5%@1 2
T78 PAD
R606220K_0402_1%1 2
R529 0_0402_5%@1 2
R364 0_0402_5%@12
C34
3
0.1U
_040
2_16
V4Z
1
2
D13 CH751H-40_SC762 1
R363 0_0402_5%@12
R608220K_0402_1%
1 2
T77 PAD
D14CH751H-40_SC762 1
G
D
S
Q252N7002_SOT23@
2
13
U13
S DIO(BR) NUP4301MR6T1 TSOP-6@
CH11
Vn2
CH23 CH3 4
Vp 5
CH4 6
R409 0_0402_5%@1 2
R346 0_0402_5%1 2
R3440_0402_5%1 2
C59
039
P_0
402_
50V8
J
@
1
2
JP15
TAITW_PMPAT6-06GLBS7N14N0
VCC 1RST 2CLK 3
GND4VPP5I/O6
GND 8GND 9
DET7
C32
2
0.1U
_040
2_16
V4Z
1
2
C33
30.
01U
_040
2_16
V7K
1
2
R36
747
K_04
02_5
%
@
12
R343 0_0402_5%1 2
T80 PAD
C31
74.
7U_0
805_
10V4
Z
1
2R530 0_0402_5%@12
C34
0
0.1U
_040
2_16
V4Z
1
2
R350 0_0402_5%12
C59
239
P_0
402_
50V8
J
@
1
2
C32
3
4.7U
_080
5_10
V4Z
1
2
C330 0.1U_0402_16V4Z12
C327 0.1U_0402_16V7K 1 2
R360 0_0603_5%1 2
C32
04.
7U_0
805_
10V4
Z
1
2
C32
5
4.7U
_080
5_10
V4Z
1
2
R362 0_0402_5%@12
R34810K_0402_5%@
12
R522 0_0402_5%@1 2
C34
1
10U
_080
5_6.
3V6M
1
2
C59
139
P_0
402_
50V8
J
@
1
2
LIS302DLU12
LIS302DLTR_LGA14_3X5
VDD_IO1GND 2
RSVD 3
GND 4GND 5
VDD6
CS7
INT 18INT 29 GND 10
RSVD 11
SDO12SDA / SDI / SDO13SCL / SPC14
C33
6
18P
_040
2_50
V8J
@
1
2
JP14
MOLEX_67910-5700conn@
11 2 233 4 455 6 677 8 899 10 101111 12 121313 14 141515 16 161717 18 181919 20 202121 22 222323 24 242525 26 262727 28 282929 30 303131 32 323333 34 343535 36 363737 38 383939 40 404141 42 424343 44 444545 46 464747 48 484949 50 505151 52 52
GND153 GND2 54
C332 0.1U_0402_16V4Z12
C32
4
0.1U
_040
2_16
V4Z
1
2
G
D
S
Q262N7002_SOT23@
2
13
Q66SI2305DS-T1-E3_SOT23-3
2
31
C31
80.
01U
_040
2_16
V7K
1
2
C32
9
4.7U
_080
5_10
V4Z
1
2
R585 100K_0402_5%1 2
R351 0_0402_5%12
C33
54.
7U_0
805_
10V4
Z
1
2
R407 0_0402_5%@1 2
R3450_1206_5%@1 2
R365 10K_0402_5%12
C331 0.1U_0402_16V4Z12
D15DAN217T146_SC59-3@
2
31
R60
510
K_04
02_5
%
12
R354
0_1206_5% @1 2
C31
60.
1U_0
402_
16V4
Z
1
2
R342 0_0402_5%1 2
R353 0_0402_5%@1 2
C32
8
0.1U
_040
2_16
V4Z
1
2
C34
2
4.7U
_080
5_10
V4Z
1
2
JP13
FOX_AS0B226-S40N-7Fconn@
1133557799111113131515171719192121232325252727292931313333353537373939414143434545474749495151
GND153
2 24 46 68 8
10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 4042 4244 4446 4648 4850 5052 52
GND2 54
R349 0_0402_5%12
T79 PAD
Q67SI2305DS-T1-E3_SOT23-3
2
31
JP12
SANTA_130832-1_LBCONN@
GND-11USB_D-2USB_D+3CPUSB#4RSV-55RSV-66SMB_CLK7SMB_DATA8+1.5V-99+1.5V-1010WAKE#11+3.3VAUX12PERST#13+3.3V-1414+3.3V-1515CLKREQ#16CPPE#17REFCLK-18REFCLK+19GND-2020PERn021PERp022GND-2323PETn024PETp025GND-2626
GND-2727GND-2828
C31
50.
01U
_040
2_16
V7K
1
2
D16
CH751H-40_SC76
21
U11TPS2231PWPR_PWP24
GN
D11
OC# 23
3.3Vin153.3Vin26
1.5Vin1181.5Vin219
3.3Vaux_in21
3.3Vout1 73.3Vout2 8
Aux_out 20
1.5Vout1 161.5Vout2 17
CPUSB#14CPPE#15STBY#4SHDN#3 RCLKEN 22
PERST# 9
NC
11
NC
210
NC
312
NC
413
NC
524
SYSRST#2
R3550_0603_5%
1 2
C31
90.
1U_0
402_
16V4
Z
1
2
R528 0_0402_5%@1 2
C326 0.1U_0402_16V7K 1 2
R359 0_0603_5%1 2
R347 0_0402_5%1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCI_AD29PCI_AD30
PCI_AD28
PCI_AD31
PCI_AD26PCI_AD25
PCI_AD27
PCI_AD22PCI_AD23
PCI_AD20
PCI_AD24
PCI_AD21
PCI_AD18PCI_AD17
PCI_AD19
PCI_AD14
PCI_AD16
PCI_AD13
PCI_AD15
PCI_AD12PCI_AD11PCI_AD10PCI_AD9
PCI_AD7PCI_AD6
PCI_AD8
PCI_AD4PCI_AD5
PCI_AD1PCI_AD2PCI_AD3
PCI_AD0
PCI_PARPCI_FRAME#
PCI_STOP#PCI_DEVSEL#
PCI_TRDY#PCI_IRDY#
PCI_AD22 CBS_IDSEL
PCI_REQ2#PCI_GNT2#
PCI_PERR#PCI_SERR#
CBS_GRST#
CLK_PCI_1394
CLK_PCI_1394
CBS_GRST#
IEEE1394_TPAP0IEEE1394_TPAN0
IEEE1394_TPBP0IEEE1394_TPBN0
IEEE1394_TPBIAS0
R5C832XIR5C832XO
MSENXDEN
UDIO3UDIO4
UDIO3UDIO4
XDALE
MMC_D7
SD_CARD_DET#
SDDATA0_MSDATA0
SDDATA2_MSDATA2
MSCD#_XDCD1
XDWP#
SDDATA3_MSDATA3
SD_MMC_CMD
SDPWR0_MSPWR_XDPWR
MMC_D4
SDDATA1_MSDATA1
XDCLE
SDCLK_MMCCLK
XD_CE#
MMC_D6MMC_D5
SDPWR0_MSPWR_XDPWR
3IN1_LED#TP_MSEXTCK
TP_UDIO1SIRQ
TP_UDIO2
UDIO5
+3V_PHY
PCI_CBE#0PCI_CBE#1
PCI_CBE#3PCI_CBE#2
IEEE1394_TPBIAS0
UDIO5
IEEE1394_TPBP0
R5C832XI
R5C832XO
PME#
MMC_D4
SDCLK_MMCCLK
SDDATA3_MSDATA3
SD_MMC_CMD
SDDATA2_MSDATA2
SDDATA0_MSDATA0SDDATA1_MSDATA1
MMC_D7MMC_D6MMC_D5
SD_WPSD_CARD_DET#
SD_WP
MSENXDEN
IEEE1394_TPAP0
IEEE1394_TPBN0
IEEE1394_TPAN0
PCI_AD[0..31]20
PCI_PAR20PCI_FRAME#20PCI_TRDY#20PCI_IRDY#20PCI_STOP#20PCI_DEVSEL#20
PCI_PERR#20PCI_SERR#20,33
PCI_GNT2#20PCI_REQ2#20
PM_CLKRUN#22,32,33
PCI_PIRQE#20PCI_PIRQG#20
CLK_PCI_139416PCI_RST#20,26
SIRQ 22,32,33
PCI_CBE#020PCI_CBE#120PCI_CBE#220PCI_CBE#320
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3V_PHY
+3VS
+3VS
+SD_MMC_3VCC
+SD_MMC_3VCC +SD_MMC_3VCC
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
1394+3 in 1 Card Custom
27 45Monday, October 29, 2007
2006/08/04 2006/10/06Compal Electronics, Inc.
Layout Note: Shield GND forIEEE1394_TPA and TPB
MDIOPIN NameMDIO00
MDIO01
MDIO02
MDIO03
MDIO04
MDIO05
MDIO06
MDIO07
MDIO08
SD CardPIN NameSDCD#
SDWP#
SDPWR0
SDPWR1
SDLED#
SDCCMD
MDIO09 SDCCLK
MDIO10
MDIO11
MDIO12
MDIO13
MDIO14
MDIO15
MDIO16
MDIO17
MDIO18
MDIO19
SDCDAT0
SDCDAT1
SDCDAT2
SDCDAT3
MMC CardPIN Name
MMCDAT
MMCCMD
MMCCLK
MMCCD#
MMCPWR
MMCLED#
MS CardPIN Name
MSCD#
MSWR
MSLED#
MSEXTCK
MSCDAT0
MSCDAT1
MSCDAT2
MSCDAT3
MSBS
MSCCLK
XD CardPIN Name
XDCDAT0
XDCDAT1
XDCDAT2
XDCDAT3
XDCDAT4
XDCDAT5
XDCDAT6
XDCDAT7
XDCLE
XDALE
XDCD0#
XDCD1#
XDWP#
XDPWR
XDR/B#
XDLED#
XDWE#
XDCE#
XDRE#
Layout Note: Shield GND forCBS_CCLK_INTERNAL and CBS_CCLK
SD,MMC,MS,XD muti-function pin define
40mil
Layout Note: Place close to R5C833and Shield GND for SDCLK_MSCLK
Layout Note: Place close to R5C833and Shield GND for SD_CLK
Function set pin define
Pull-down
UDIO3 XDENMSENUDIO4 Function
Pull-up Enable SD,MMC CardPull-up Pull-down
Nea
r to
JP9
.
Layout Note: Place these cap close to U14.
Layout Note: Add GND shield.
Modify to same as Meson. 9/13
Layout Note: Add GND shield for SDCLK_MMCCLK.
Layout Note: Add GND shield for 1394.
GND
GND
GND
GND
GND
Reserve them for testif any EMI issue. 9/14
Layout Note: Please them close to U14.
9/21
Add TP. 10/02
Add TP. 10/02
T121PAD
C35
7
10U
_080
5_10
V4Z
1
2
C35
40.
47U
_060
3_16
V4Z
1
2
C53
6
0.01
U_0
402_
16V
7K
1
2
T122PAD
R375 100K_0402_5% 1 2
T118PAD
C36
80.
1U_0
402_
16V
4Z
1
2
R37
010
_040
2_5%
@
12
C347
15P_0603_50V8J
1 2
R36
910
0K_0
402_
5%
12
R380 0_0402_5%1 2
R384 10K_0402_5%1 2
R373 10K_0402_5% 1 2
C36
010
U_0
805_
6.3V
6M
1
2
R374 10K_0402_5% 1 2
C34
4
0.01
U_0
402_
16V
7K
1
2
R371 10K_0402_5% 1 2
C34
90.
1U_0
402_
16V
4Z
1
2
T82PAD
R377 10_0402_5%@
C36
91U
_060
3_10
V4Z
1
2
C52
2
0.01
U_0
402_
16V
7K
1
2
C36
20.
01U
_040
2_16
V7K
1
2
C54
84.
7U_0
805_
10V
4Z
1
2
R547 0_0402_5%1 2
C3581U_0603_10V4Z
1
2
R38
956
.2_0
402_
1%
12
C36
10.
01U
_040
2_16
V7K
1
2 C36
310
00P
_040
2_50
V7K
1
2
C36
60.
01U
_040
2_16
V7K
1
2
C34
5
10U
_080
5_10
V4Z
1
2
C53
4
0.01
U_0
402_
16V
7K
1
2
R39
556
.2_0
402_
1%
12
C35
60.
01U
_040
2_16
V7K
1
2
C37
10.
1U_0
402_
16V
4Z
1
2
C35
94.
7P_0
402_
50V
8C
@
1
2
C53
5
0.01
U_0
402_
16V
7K
1
2
C37
2
0.01
U_0
402_
16V
7K
1
2
C346
15P_0603_50V8J
1 2
C37
010
U_0
805_
10V
4Z
1
2
JP17SUYIN_020115FB004S512ZLCONN@
TPB-1TPB+2TPA-3TPA+4
GND 5GND 6GND 7GND 8
R39
456
.2_0
402_
1%
12
U15
RT9701CB_SOT25
VIN3VIN/CE4 VOUT 1
VOUT 5
GND2
T120PAD
R568 0_0402_5%1 2
R5C833
U14
R5C833-TQFP128P_TQFP128_14X14~D
AD31125AD30126AD29127AD281AD272AD263AD255AD246AD239AD2211AD2112AD2014AD1915AD1817AD1718AD1619AD1536AD1437AD1338AD1239AD1140AD1042AD943AD844AD746AD647AD548AD449AD350AD251AD152AD053
VCC_PCI3V 10VCC_PCI3V 20
VCC_RIN 61
VCC_ROUT 16VCC_ROUT 34
VCC_3V 67
VCC_MD3V 86
AVCC_PHY3V 98AVCC_PHY3V 106AVCC_PHY3V 110
TPBIAS0 113
MDIO00 80
MDIO03 77MDIO04 76MDIO05 75MDIO06 74MDIO07 73
MDIO10 82MDIO11 81MDIO12 93MDIO13 90
FIL0 96
VREF 100REXT 101
MDIO08 88MDIO09 84
MDIO01 79MDIO02 78
MDIO14 91MDIO15 89MDIO16 92MDIO17 87MDIO18 85MDIO19 83
C/BE3#7C/BE2#21C/BE1#35C/BE0#45
PAR33FRAME#23TRDY#25IRDY#24STOP#29DEVSEL#26IDSEL8PERR#30SERR#31
RSV97
TEST66 HWSPND#69
INTA#115INTB#116
PCICLK121PCIRST#119GBRST#71CLKRUN#117PME#70
REQ#124GNT#123
AGND111 AGND107 AGND103
GND 4GND 13GND 22GND 28
UDIO0/SRIRQ# 72UDIO1 60UDIO2 56UDIO3 65UDIO4 59UDIO5 57
XI 94XO 95
MSEN 58XDEN 55
AGND102 AGND99
GND 54GND 62GND 63GND 68GND 118GND 122
VCC_PCI3V 32VCC_PCI3V 27
VCC_PCI3V 41
VCC_ROUT 114VCC_ROUT 64
VCC_ROUT 120
VCC_PCI3V 128
AVCC_PHY3V 112
TPAP0 109TPAN0 108
TPBP0 105TPBN0 104
X124.576MHz_16P_1BG24576CKIA
12
C55
010
0P_0
402_
50V
8J
1
2
L6BLM21A601SPT_0805
1 2
C551 22P_0402_50V8J@1 2
R37
915
0K_0
402_
5%
12
R569 0_0402_5%1 2
C54
90.
1U_0
402_
16V
4Z
T119PAD
R381 10K_0402_5%
1 2C365 0.01U_0402_16V7K
1 2
R378 10K_0402_5%@1 2
C35
20.
01U
_040
2_16
V7K
1
2
JP16
TAI_PSDBT0-16GNBS7N14N0_15P
D31
CMD2
VDD 4
D612
D29
D07
D511 D410
D713
D18
CLK5 VSS1 3
WP 14
VSS2 6
CD 15
VSS3 16VSS4 17
C35
30.
01U
_040
2_16
V7K
1
2
R372100_0402_5% 1 2
C35
00.
01U
_040
2_16
V7K
1
2
T81PAD
R38
310
K_0
603_
1%
12
C36
410
00P
_040
2_50
V7K
1
2
C35
1
10U
_080
5_10
V4Z
1
2
C36
727
0P_0
402_
50V7
K
1
2
R39
215
0K_0
402_
5%
12
R38
85.
1K_0
402_
1%
12
R546 0_0402_5%1 2C
355
0.47
U_0
603_
16V
4Z
1
2 C34
80.
01U
_040
2_16
V7K
1
2
R376 10K_0402_5%1 2
T123PAD
R39
056
.2_0
402_
1%
12
C37
3
0.33
U_0
603_
16V
4Z
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SENSE_A_A
SENSE_A_B
MONO_IN_HD
R_SPK+
GA
IN0
GA
IN1
GAIN0
GAIN1
HP
_IN
L
HP
_IN
R
A_SD
HP_EN
R_SPK+
R_SPK-L_SPK+
L_SPK-
DV
CO
RE
AUD_REF
SENSE_A
MIC2_C
AC97_SDIN0_CODEC
MIC1_C
PIN42
+3VS_CODEC
HP_IN_L
HP_IN_R
MONO_IN_HD
INT_MICR_C
INT_MICL_C
LINE_OUTL
LINE_OUTR
SENSE_B
R_SPK-
LINE_OUT
LINE_C_OUTR
LINE_C_OUTL
LINE_OUTL
LINE_OUTR
HP_EN
SENSE_A_AMIC_BIAS_IN
MIC
_BIA
S_I
N
DVCORE
DLINE_IN_R_R DLINE_IN_RC_R
DLINE_IN_R_L DLINE_IN_RC_L
SENSE_A
SENSE_B SENSE_A_C
HP_IN_LHP_IN_R
A_SD
SB_SPKR22
LINE_IN_SENSE 34
MIC229
MIC129
MIC_SENSE 29
HP_OUTL 29HP_OUTR 29
INT_MIC229
AC97_RST#_CODEC21
AC97_SDOUT_CODEC21
AC97_SYNC_CODEC21
AC97_BITCLK_CODEC 21
SLP_S3# 22,24,26,33,36,41,42,44
INT_MIC129
HP_DET29
EAPD 33
DLINE_OUT_L 34
DLINE_OUT_R 34
SENSE_A29
DOCK_LINE_IN_L34
DOCK_LINE_IN_R34
AC97_SDIN0 21
VDDA_CODEC
VDDA_CODEC
VDDA_CODEC
+3VS
+5VALW
+5VALW
VDDA_CODEC
VDDA_CODEC
+5VALW
+5VALW
+5VALW
+5VALW
+5VALW
MIC_BIAS_BMIC_BIAS_C
VDDA_CODEC
VDDA_CODEC
A_SD 33
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
AC97 CODEC AD1981HD
28 45Monday, October 29, 2007
2007/05/29 2008/05/29Compal Electronics, Inc.
Place close to U14
GNDAGND
AMP. FOR INTERNAL SPEAKER
Close to Pin30
Close to Pin29
TPA6044 no longer needed. So delete BOM options & co-layoutcomponents for TPA6044. SGND and SGND1 nets can also bedeleted. Only TPA6041 will be supported. 9/5
Add R571, D37 in 9/26.
Change in 9/26
Change value. 9/28
Correct net name. 10/02
Delete PCM_SPK, Q32, R407, C387, R409. Leave circuitry to support SB_SPKR. 10/8
G
D
S
Q342N7002_SOT23
2
13
C410 1U_0603_10V4Z
1 2
U17
AD1984JCPZ-RL_LFCSP48_7X7
AUX114
AUX215
AUX417
AUX316
LINE_IN_L23
LINE_IN_R24
CD_GND19
MIC121
MIC222
SENSE_A/SRC_B13
PCBEEP 12
LINE_OUT_L 35
LINE_OUT_R 36
MONO_OUT 32
RESET#11
SYNC10
BIT_CLK 6
SDATA_OUT5
SDATA_IN 8
GPIO_2 30DM_1/DM_2 2
MIC_BIAS_C 29MIC_BIAS_B 28
VREF_FILT 27
DVC
OR
E1
DVD
D9
AVD
D1
25
AVD
D2
38
MIC
_BIA
S_IN
33
S/PDIF_OUT48
DVSS7
HP_LOUT_L 39
HP_LOUT_R 41
N/C 18
N/C 37
AVSS2 42AVSS1 26
N/C 43N/C 44
GPIO_0/EAPD 47GPIO_1/MIC_BIASE-E 31
SENSE_B/SRC_A34
DM_3/DM_4 4DM_CLK 46
DV
IO3
N/C 20
N/C 40N/C 45
D18PACDN042_SOT23~D@
231
R426100K_0402_5%
12
C4221U_0603_10V4Z
1
2
R41
010
K_04
02_5
%1
2
R40
010
0K_0
402_
5%1
2
L8CHB1608B121YZF_0603
12+C408 47U_B2_6.3V-M1 2
C39
10.
01U
_040
2_16
V7K
1
2
C409 1U_0603_10V4Z 1 2
L7CHB1608B121YZF_0603
12R415 4.7K_0402_5%12
G
D
S
Q352N7002_SOT23
2
13
R4110_0805_5%
12
R436100K_0402_5%
12
R42
3
20_0
402_
5%1
2
C39
21U
_060
3_10
V4Z
1
2
C386 0.47U_0402_6.3V6K
12
C385 0.47U_0402_6.3V6K
12
C39
51U
_060
3_10
V4Z
1
2
R437 0_1206_5%12
R424 10_0402_5%@12
R418 4.7K_0402_5%12
R403 0_0402_5%@12
C421 0.1U_0805_25V7M12
C397
0.1U
_040
2_16
V4Z
1
2
C388 0.1U_0402_16V4Z1 2
C37
810
0P_0
402_
50V8
J
1
2
C37
61U
_060
3_10
V4Z
1
2
C4240.1U_0402_16V4Z
1
2
C398
10U
_080
5_10
V4Z
1
2
JP18
ACES_85204-02001
1122G13G24
C390 0.47U_0402_6.3V6K
12
R405 17.4K_0603_1%1 2
R425 33_0402_5%12
C4134.7U_0805_10V4Z1
2
R416 60.4_0402_1% 12
C414 1U_0603_10V4Z1 2
R413100K_0402_5%1 2
R432 39.2K_0402_1% 1 2
C37
40.
1U_0
402_
16V4
Z
1
2
C4171U_0603_10V4Z
1
2
R430 2.67K_0402_1%1 2
G
D
S
Q332N7002_SOT23
2
13
C380 2.2U_0603_16V6K1 2
C40
31U
_060
3_10
V4Z 1
2
R420 4.7K_0402_5%12
R4290_0402_5%1 2
R43539.2K_0402_1%
1 2
+C406 47U_B2_6.3V-M1 2
C420 0.1U_0805_25V7M12
R431 2.67K_0402_1%1 2
C383 0.47U_0402_6.3V6K
12
C39
310
U_0
805_
10V4
Z
1
2
G
D
S
Q362N7002_SOT23
2
13
C415 1U_0603_10V4Z1 2
C4260.1U_0603_50V4Z
1
2
C407 1U_0603_10V4Z
1 2
D37 CH751H-40_SC762 1
R433 20K_0402_1% 1 2
R422 10K_0402_5%1 2
C400
0.1U
_040
2_16
V4Z
1
2
C37
910
0P_0
402_
50V8
J
1
2
C423 0.1U_0805_25V7M12
C377 2.2U_0603_16V6K1 2
R417 4.7K_0402_5%12
C381 1U_0603_10V4Z 12
C40
4
1U_0
603_
10V4
Z
1
2
C41
81U
_060
3_10
V4Z
1
2
R408 100K_0402_5%@1 2
R4060_0402_5%
1 2
R4340_0402_5%@
12
C37
510
U_0
805_
10V4
Z
1
2
R41210K_0402_5%
12
R421 10K_0402_5%1 2
C4254.7U_0805_10V4Z
1
2
C4014.7U_0805_10V4Z1
2
R40
110
0K_0
402_
5%1
2
C416 0.1U_0805_25V7M12
C41
90.
1U_0
402_
16V4
Z
1
2
C399
0.1U
_040
2_16
V4Z
1
2
R402 0_0402_5%@12
U16TPA6041A4RHBR QFN 32P
LOUT+6
C1N
12
SPVDD8
SPKR_LIN-4
SPKR_LIN+3
HPVDD 17
ROUT- 19
CPV
DD
9
LOUT-7
SPGND5
SPKR_RIN-1
SPKR_RIN+2
SPVDD 18
HPV
SS14
CPG
ND
11
HP
_OU
TR15
ROUT+ 20
C1P
10
CPV
SS13
HP
_OU
TL16
SPGND 21
HP_EN 22
SPKR_EN# 23
BYPASS 24REG
_EN
25
HP
_IN
R26
HP
_IN
L27
SGN
D28
REG
_OU
T29
VDD
30
GAI
N0
31
GAI
N1
32
TML
33
C389 0.47U_0402_6.3V6K
12
C405 1U_0603_10V4Z
1 2
C382 2.2U_0603_16V6K12
C412 1U_0603_10V4Z
1 2
C39
410
U_0
805_
10V4
Z
1
2
R571 15K_0402_1%1 2R427 0_0402_5%12
C411 10P_0402_25V8K@1 2
C396
0.1U
_040
2_16
V4Z
1
2
R419 60.4_0402_1% 12
C4020.1U_0402_16V4Z
1 2
C384 1U_0603_10V4Z 12
R4040_0402_5%
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4INT_MIC_1_1 INT_MIC_1_3
INT_MIC_1_4
EXT_MICA_2
MIC1EXT_MICA EXT_MICA_1
MIC_SENSE
MIC2
INT_MIC_1_2
EXT_MICB
EXT_MICA
EXT_MICB_2
INT_MIC_2_2
INT_MIC_2_1 INT_MIC_2_3
INT_MIC_2_4
INT_MIC_2_2
HP_OUT_L
EXT_MICB EXT_MICB_1MIC1 28
MIC_SENSE28
MIC2 28
INT_MIC228
INT_MIC128
HP_DET28
HP_OUTR28
HP_OUTL28
DOCK_HPS# 34
SENSE_A28
VDDA_CODECCODEC_REF
VDDA_CODEC
VDDA_CODEC
CODEC_REF
VDDA_CODEC
VDDA_CODEC
CODEC_REF
MIC_BIAS_B
VDDA_CODECCODEC_REF
VDDA_CODEC
MIC_BIAS_C
VDDA_CODEC
+5VALW
+V_AMP
CODEC_REF+V_AMPVDDA_CODEC
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
AMP & Audio Jack
29 45Monday, October 29, 2007
2007/05/29 2008/05/29Compal Electronics, Inc.
AMP. FOR EXTERNAL MICROPHONE
EXTERNAL MICROPHONE/LINE OUT JACK
AMP. FOR INTERNAL MICROPHONE
Modify to same as Meson. 10/02
C43
20.
1U_0
402_
16V4
Z
1
2
L12CHB1608B121YZF_0603
1 2
C435 100P_0402_50V8J
1 2
D19
PACDN042_SOT23~D@
2
31
R447 3.9K_0402_1% 1 2
R456 100K_0402_5% 1 2
C4270.1U_0402_16V4Z
1
2
C449 0.068U_0603_16V7K
1 2
R450 100_0402_5%
1 2
R4385.1K_0603_1%1 2
R446 0_0402_5%@1 2
R463 3K_0402_5%
1 2
R46210K_0402_5%
1 2
C43
147
0P_0
402_
50V7
K
1
2
R455 10K_0402_5%
1 2
R45147K_0402_5%
12
C4511U_0603_10V4Z
1
2
JP20
FOX_JA6033L-B5S3-7F_6PCONN@
12
3
4
5
6
L16HLC0603CSCCR10JT_0603
1 2
L11CHB1608B121YZF_0603
1 2
R4414.7K_0402_5%
12
C42
947
0P_0
402_
50V7
K
1
2
R44547K_0402_5%
12
C4531U_0603_10V4Z
1
2
G
D
S
Q372N7002_SOT23
2
13
U19ATLV2464_TSSOP14
P4
G11
OUT 1+3
-2
R448 3.9K_0402_1% 1 2
C44
6
0.1U
_040
2_16
V4Z
1
2
R460 3K_0402_5%
1 2
R44210K_0402_5%
12
R4573K_0402_5%
12
L14HLC0603CSCCR10JT_06031 2
L13HLC0603CSCCR10JT_06031 2
U18ATLV2464_TSSOP14
P4
G11
OUT 1+3
-2U18BTLV2464_TSSOP14
P4
G11
OUT 7+5
-6
C45268P_0402_50V8J
1
2
L10CHB1608B121YZF_0603
1 2
C43
7
100P
_040
2_50
V8J
1
2
R4613K_0402_5%
1 2
R459 100K_0402_5% 1 2
C444 220P_0402_50V7K 1 2
L15HLC0603CSCCR10JT_0603
1 2
C450 0.068U_0603_16V7K
1 2
R4643K_0402_5%
1 2
JP19
FOX_JA6033L-B5S3-7F_6PCONN@
12
3
4
5
6
U18DTLV2464_TSSOP14
P4
G11
OUT 14+12
-13
U18CTLV2464_TSSOP14
P4
G11
OUT 8+10
-9
JP21ACES_85204-04001CONN@
1 12 23 34 4
G1 5G2 6
L9CHB1608B121YZF_06031 2
C44268P_0402_50V8J
1
2
C44
8
0.1U
_040
2_16
V4Z
1
2
C440 0.47U_0402_6.3V6K
12
R44060.4_0402_1%
1 2
R444 0_0402_5%1 2
R452 100K_0402_5% 1 2
R46510K_0402_5%
1 2
C44
7
100P
_040
2_50
V8J
1
2
C42
847
0P_0
402_
50V7
K
1
2
C45468P_0402_50V8J
1
2
C43
8
100P
_040
2_50
V8J
1
2
R453 100K_0402_5% 1 2
R44947K_0402_5%
12
R44310K_0402_5%
12
C433
4.7U_0805_10V4Z
1
2
C4344.7U_0805_10V4Z
1
2
C44
5
100P
_040
2_50
V8J
1
2
R4583K_0402_5%
12
C44168P_0402_50V8J
1
2
C43
047
0P_0
402_
50V7
K
1
2
R43960.4_0402_1%
1 2
C443 680P_0402_50V7K
1 2
C436 100P_0402_50V8J
1 2
C439 0.47U_0402_6.3V6K
12R454 10K_0402_5%
1 2
AC97_SYNC_MDC
AC97_SDOUT_MDC
AC97_SDIN1_MDC
KSI[0..7]
KSO[0..11]
KSI0
KSI1
KSI5
KSI3
KSI4
KSI2
KSI_D_0
KSI_D_8
KSI_D_9
KSI_D_1
KSI_D_2KSI_D_5
KSI_D_10
KSI_D_11
KSI_D_3
KSI_D_13
KSI_D_12
KSI_D_4
KSI6KSI_D_14
KSI_D_6
KSO11KSO0KSO2KSO5KSI_D_14KSI_D_8KSI_D_12KSI_D_10KSI_D_0KSI_D_4KSI_D_2KSI_D_1
KSO11KSO0KSO2
KSI_D_3
KSO5
KSI_D_14
KSO3
KSI_D_8KSI_D_12KSI_D_10
KSI_D_0KSI_D_4KSI_D_2KSI_D_1
KSO8
KSI_D_3KSO3KSO8KSO4
KSO4
KSO7KSO6
KSO10KSO1
KSI_D_5KSI_D_6KSI7KSI_D_13
KSI_D_11KSI_D_9KSO9
KSO7KSO6
KSO10KSO1KSI_D_5KSI_D_6
KSI7KSI_D_13KSI_D_11KSI_D_9
KSO9
RIGHT
MOD_RINGMOD_TIP
ON/OFF#
LEFT
RIGHT
LEFT
MOD_TIPMOD_RING
ON/OFFBTN# 22
ON/OFFBTN_KBC# 33
AC97_SDIN121AC97_SYNC_MDC21
AC97_BITCLK_MDC 21
AC97_SDOUT_MDC21
AC97_RST#_MDC21
KSI[0..7]33
KSO[0..11]33
I2C_INT33
I2C_CLK33I2C_DAT33
WL/BT_LED19CAP_RST_EC33
STB_LED19,34
ON/OFF# 34
SP_CLK33SP_DATA33
TP_CLK33TP_DATA33
+3VS
+3VALW
+3VL
+3VL
+3VL +5VS
+5VS +5VS
+3VS
+3VL +3VS +3VL
+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
MDC/KBD/ON_OFF/LID
30 45Monday, October 29, 2007
2005/03/10 2006/03/10Compal Electronics, Inc.
MDC 1.5 Conn.
TrackPoint CONN. T/P BOARD.Power button
INT_KBD CONN.SWITCH BOARD.
RJ-11 Conn.Change design at 10/12.
JP27
ACES_87151-0807GCONN@
1122334455667788
U20SN74LVC1G14DCKR_SC70-5
NC
1
A2
G3
Y 4
V5
CP5
100P_1206_8P4C_50V8@
234 5
6781
CP3
100P_1206_8P4C_50V8@
234 5
6781
R469 33_0402_5%1 2
CP2
100P_1206_8P4C_50V8@
234 5
6781
D39UESD3.3DT5G SOT-723@
2 31
R46
65.
1K_0
402_
5%1
2
C4610.1U_0402_16V4Z
1
2
JP28
ACES
_871
51-0
4051
_4P
CO
NN
@
1234
56
D21
DAP202U_SOT323-3
2
31
R470 0_0402_5%12
R471100K_0402_5%
12
D27SF10402ML080C_0402@
1
2
CP4
100P_1206_8P4C_50V8@
234 5
6781
D28
CH751H-40_SC76
21
D25
DAP202U_SOT323-3
2
31
C45810P_0402_25V8K@
1 2
JP24ACES_88025-120L_12PCONN@
11335577991111
2 24 46 68 8
10 1012 12
GN
D13
GN
D14
GN
D15
GN
D16
GN
D17
GN
D18
JP23
ACES_87213-1000G
1122334455667788991010
GND111GND212 CP6
100P_1206_8P4C_50V8@
234 5
6781
JP22
HRS_FH28-60(30)SB-1SH(86)CONN@
112233445566778899101011111212131314141515161617171818191920202121222223232424
GND131GND232
252526262727282829293030
R46
810
K_04
02_5
%
12
C459220P_1808_3KV@
1
2C460
220P_1808_3KV @
1
2
D20
DAP202U_SOT323-3
2
31
D23
DAP202U_SOT323-3
2
31JP25
ACES_88266-02001CONN@
1 12 2
G2 4G1 3
C45
7
4.7U
_080
5_10
V4Z
@
1
2
C4641U_0603_10V4Z
1
2
JP26
ACES_85204-02001_2PCONN@
TIP1RING2
GND3GND4
D22
DAP202U_SOT323-3
2
31
G
D
S Q382N7002_SOT23
2
13
C45
6
0.1U
_040
2_16
V4Z
1
2
C45
5
1000
P_04
02_5
0V7K
1
2
D24
DAP202U_SOT323-3
2
31
R47
2
100K
_040
2_5%1
2
SW11BT002-0121L_4P3
2
1
4
5 6
D26
DAP202U_SOT323-3
2
31
CP7
100P_1206_8P4C_50V8@
234 5
6781
R473100K_0402_5%
1 2
R474 100K_0402_5%1 2
C4631U_0603_10V4Z
1
2
CP1
100P_1206_8P4C_50V8@
234 5
6781
C462
0.1U_0402_16V4Z
1
2
R46
75.
1K_0
402_
5%1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FAULTUSB_ISENSE1
USB_ISENSE2
S4_STATE#
S4_STATE#
S4_STATE#
USB20_P6_RUSB20_N6_R
USB20_N522USB20_P522
BT_OFF22
USB20_N6 22
USB20_P022USB20_N022
USB20_P422USB20_N422
S4_STATE#22
BT_LED 19
USB20_P6 22
+5VALW USB_VCCC
+3VAUX_BT+3VALW
+5VALW
USB_VCCA+5VALW
+5VALW
USB_VCCB+5VALW
+3VAUX_BT
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
USB & BT Connector
31 45Monday, October 29, 2007
2006/02/13 2006/07/26Compal Electronics, Inc.
W=160mils
USB CONNECTOR 3
BT Connector
W=100mils
(2A,100mils ,Via NO.=4)
3.75A nominal with 3.5A minimum
W=100mils
(2A,100mils ,Via NO.=4)
R484
1K_0805_1%
12
R477 0_0402_5%12
G
DS
Q39SI2301BDS_SOT23
2
13
D31
PA
CD
N04
2_SO
T23~
D
@
2 31
D29
PA
CD
N04
2_SO
T23~
D
@
2 31
C465
4.7U_0805_10V4Z
1
2
D30
PA
CD
N04
2_SO
T23~
D
@
2 31
C47
210
U_0
805_
10V4
Z
1
2
C48
10.
1U_0
402_
16V4
Z
1
2
C47
10.
1U_0
402_
16V4
Z
1
2
+
C47
522
0U 6
.3V
M F
601
2C
468
1000
P_04
02_5
0V7K1
2
C32
1
1000
P_04
02_5
0V7K
1
2
C48
5
1000
P_04
02_5
0V7K
1
2
R48110K_0402_5%
12
JP31
ACES_85204-04001CONN@
11223344G15G26
R47610K_0402_5%
12
+ C48
0
220U
_D_6
.3VM
1
2
+
C46
622
0U 6
.3V
M F
601
2
JP30
SUYIN_020173MR004S558ZL_4PCONN@
11223344GND5GND6GND7GND8
C474
4.7U_0805_10V4Z
1
2
C46
70.
1U_0
402_
16V4
Z
1
2
R475 0_0402_5%12
JP29
ACES_87213-0800G_8PCONN@
12345678
C48
4
1000
P_04
02_5
0V7K
1
2
R48
51K
_040
2_5%
12
R4830.01_2512_1%
1 2
C48
30.
1U_0
402_
16V4
Z
1
2
Q40
SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5 C
482
1000
P_04
02_5
0V7K
1
2
R482
220K_0402_1%
1 2
C47
90.
1U_0
402_
16V4
Z
1
2
JP32
SUYIN_020173MR004S558ZL_4PCONN@
11223344GND5GND6GND7GND8
U21
G548A2P1U
GND1IN2IN3EN#4 OC# 5OUT 6OUT 7OUT 8
R48010K_0402_5%
12
C47
60.
1U_0
402_
16V4
Z1
2
C48
6
2200
P_04
02_5
0V
1
2
U23
TPS2331IPWRG4_TSSOP14
GATE 1
DGND2
TIMER3VREG4
VSENSE 5AGND6
ISENSE 7
IN 8
AGND9
ISET 10FAULT11PWRGD12
ENABLE13
DISCH 14
R35610K_0402_5%
12
U22
G548A2P1U
GND1IN2IN3EN#4 OC# 5OUT 6OUT 7OUT 8
C48
7
0.1U
_040
2_16
V4Z
1
2
C47
710
00P_
0402
_50V
7K1
2
C47
82.
2U_0
805_
16V4
Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TPM_XTALO
TPM_XTALI
TPM_XTALI
TPM_XTALO
TPM_GPIO2TPM_GPIO
SPI_CS0#
SPI_CLK
SPI_WP#
SPI_HOLD#_0
SPI_SI SPI_SO_R
SPI_WP#
SPI_HOLD#_0SPI_SO_JP34SPI_SI_JP34SPI_SI
SPI_CLK
8051_RECOVER#
USB20_N1_PWR
LPC_AD0
LPC_FRAME#PLT_RST#
LPC_AD2LPC_AD1
SIRQ
LPC_AD3
8051_RECOVER#
SPI_CLK_JP34 SPI_CLK_JP34
SPI_CS0#SPI_CS0#_JP34
SPI_CS0#_JP34SPI_SI_JP34
SPI_SO_RSPI_SO_JP34
SIRQ
USB20_P822
CLK_PCI_TCG16
PM_CLKRUN#22,27,33
LPC_PD#22
PLT_RST#8,20,26
LPC_AD021,26,33LPC_AD121,26,33LPC_AD221,26,33LPC_AD321,26,33
VCC1_PWRGD33,35,39
8051RX338051_RECOVER#33
LPC_FRAME#21,26,33
CLK_PCI_DB16
SPI_CS0#33
SPI_CLK33
SPI_SI33 SPI_SO 33 8051TX33
FPR_OFF22
USB20_N822
SIRQ22,27,33
KBC_SPI_CS1#_R22,33
+3VS
+3VS
+3VS+3VS
+3VALW
B+
+3VL
+3VL
+3VL
+3VL
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
TCG/BIOS ROM/PS2/SW LPC DEBUG
32 45Monday, October 29, 2007
2005/03/10 2006/03/10Compal Electronics, Inc.
BIOS ROM
20mils
TPM1.2 on board
0 = 02Eh1 = 04Eh*
Base I/O Address
Finger printer
LPC Debug Port
7/20
7/20
7/20
20mils
20mils
Add SIRQ and connect topin5. 10/08
Add in 10/10.
Pin3, 23 tie to GND. 10/10
R492 0_0402_5%12
C48
9
0.1U
_040
2_16
V4Z
1
2
R506 0_0402_5%@1 2
C495 18P_0402_50V8J12
R56 0_0402_5%1 2
SLB 9635 TT 1.2
U24
SLB 9635 TT 1.2_TSSOP28
NC 1
GPIO2 2
NC 3
GN
D4
VSB
5
GPIO 6
PP7
TEST1 8TESTB1/BADD 9
VDD
10G
ND
11
NC 12
XTALI/32K IN13
XTALO14
CLKRUN#15
LRESET#16
LAD317
GN
D18
VDD
19
LAD220
LCLK21
LFRAME#22
LAD123 VDD
24G
ND
25
LAD026
SERIRQ27 LPCPD#28R489 10K_0402_5%1 2
R50
0
100K
_040
2_5%1
2
C49
0
0.1U
_040
2_16
V4Z
1
2
JP33
E&T_3801-04conn@
11223344
R494 10_0402_5%@12
R504 0_0402_5%1 2
&U1
SST25LF080A_SO8-200mil45@
D32PACDN042_SOT23~D@
231
G
DS
Q42SI2301BDS_SOT23
213
U25
WIESO_G6179-100000_8P
S1
VCC8
Q 2
HOLD7
VSS 4
D5
C6
W3
R507 0_0402_5%1 2
R4980_0402_5%
12
C56
310
U_0
805_
10V4
Z
1
2
R502 15_0402_5%
1 2
R505 3.3K_0402_5%1 2
T84PAD
R487220K_0402_1%1 2
R49910M_0402_5%
12
C49310P_0402_50V8K@
12
T83PAD
R4950_0402_5%
12
R4974.7K_0402_5%@
12
R4964.7K_0402_5%@
12
C496
0.1U_0402_16V4Z
1
2
R503 0_0402_5%12
C494 18P_0402_50V8J12
R501 3.3K_0402_5%1 2
JP34
ACES_87216-2404_24Pconn@
Ground1LPC_PCI_CLK2Ground3LPC_FRAME#4+V3S5LPC_RESET#6+V3S7LPC_AD08LPC_AD19LPC_AD210LPC_AD311VCC_3VA12PWR_LED#13CAPS_LED#14NUM_LED#15VCC1_PWRGD16SPI_CLK17SPI_CS#18SPI_SI19SPI_SO20SPI_HOLD#21Reserved22Reserved23Reserved24
C49
20.
1U_0
402_
16V4
Z
1
2
R4904.7K_0402_5%
12
C48
8
0.1U
_040
2_16
V4Z
1
2
R48610K_0402_5%
12
Y4
32.768KHZ_12.5P_1TJS125BJ2A251OUT 4
IN 1
NC3
NC2
C49
1
0.1U
_040
2_16
V4Z
1
2
KSI6
KSI4KSI5
KSI7
AB1B_DATA
SMB_EC_CK1
AB1B_CLKSMB_EC_DA1
RUNSCI_EC#
CRACK_BGA
PGD_IN
GREEN_BATLED#
KSI3KSI2KSI1
KSI0
EC_GPIO27
TP_CLK
TP_DATA
PS2_CLKSP_DATASP_CLK
PS2_DATA
TEST
EA#
PWR_GDVCC1_PWRGD
32K_CLK
AB1B_DATAAB1B_CLK
SMB_EC_CK1SMB_EC_DA1
KBRST#
GREEN_BATLED#
EC_GPIO27
KSO14
CRACK_BGAEC_GPIO9
AB2A_CLK
8051_RECOVER#
KSO15
AB2A_DATA
THM_TRAVEL#
KSO6
KSO8KSO7
KSO3
KSO1KSO0
KSO5
KSO9KSO10
KSO4
KSO11
KSO2
KSI4
KSI7
KSI3
KSI0
KSI5
KSI1KSI2
KSI6
SP_CLKSP_DATA
TP_CLKTP_DATA
PS2_DATAPS2_CLK
RUNSCI_EC#CLK_PCI_EC
C RY1C RY2
PM_PWROKPGD_IN
CLK_14M_KBC
PM_RSMRST#
VCC1_PWRGDPM_PWROK
BATCON
BATCON
THM_TRAVEL#
ADP_ID 44AMBER_BATLED# 19
8051RX 328051TX 32
PWR_GD 35,36,42VCC1_PWRGD 32,35,39
I2C_INT 30
SMB_EC_CK1 37SMB_EC_DA1 37
KB_RST# 21
CHGCTRL 38
KBC_PWR_ON 39GREEN_BATLED# 19
ADP_PRES 24,38,39
ON/OFFBTN_KBC# 30
SLP_S3# 22,24,26,28,36,41,42,44
GATEA20 21
LOW_BAT# 22
I2C_DAT 30I2C_CLK 30
PCI_SERR# 20,27
AC_PRESENT 22
KSO[0..11]30
EAPD 28
SUS_PWR_ACK 22
KSI[0..7]30
PM_SLP_M# 22,36,40,41
TP_CLK30TP_DATA30
SP_CLK30SP_DATA30
ADP_PS144
SIRQ22,27,32
LPC_AD321,26,32
LPC_AD021,26,32
LPC_AD221,26,32LPC_AD121,26,32
LPC_FRAME#21,26,32
PM_CLKRUN#22,27,32
CLK_PCI_EC16RUNSCI_EC#22
NPCI_RST#22
CAP_RST_EC 30
PM_PWROK 8,22,42,43ADP_EN 44
KBC_SPI_SI_R22
KBC_SPI_CS0#_R22
KBC_SPI_CLK_R22
KBC_SPI_CS1#_R22,32
SPI_CLK32
SPI_CS0#32
SPI_SO32
SPI_SI32
LID_SW# 18,19,22
ADP_PS0 44
A_SD 28
CLK_14M_KBC 16
8051_RECOVER# 32
CRACK_BGA 13,23
PM_RSMRST# 22
KBC_SPI_SO22
G_BATLED# 21
BAT_ID# 37
CELLS 38
LAN_WOL_EN22,36
MC2_DISABLE26
WMC1_DISABLE26
BAT_PWM_OUT 38LAN_DISABLE_N 22
LANLINK_STATUS# 22,24,25
+3VS
+5VS+3VL
+3VL
+3VL
+3VL
+3VL
+3VL
+3VL
+3VL
+3VS
+3VL
+RTCVCC
+VCC0
+VCC0
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
KBC1091
33 45Monday, October 29, 2007
2006/02/13 2006/07/26Compal Electronics, Inc.
AGND FILTER
9/27
9/21
9/21
Add in 9/26
Change in 10/08
Add in 10/03.
Change to 1K. 10/03
Del R522 cause already PU forADP_PS1 at P44. 10/4
Cause VCC2 is +3VS, Del D34 & R530 at 10/05.
Swap BAT_PWM_OUT and LAN_DISABLE_N. 10/08
LANLINK_STATUS# no longer read by KBC. AddR333 between signal and pin 65. 10/08Install R57. 10/08
Del BATSELB_A# pin since only onebattery. 10/18
10/24
10/24R521 10K_0402_5%
1 2
R527 0_0402_5%1 2R526 0_0402_5%1 2
R51
3
100K
_040
2_5%
12
C50
718
P_0
402_
50V8
J
1
2
D35 CH751H-40_SC762 1
C52
90.
1U_0
402_
16V4
Z
1
2
R537 2M_0402_5%@1 2
RP20
10K_1206_8P4R_5%
1 82 73 64 5
R512100K_0402_5%@
12
R534 0_0402_5%1 2
C4990.1U_0402_16V4Z
1
2
R604 10K_0402_5%1 2
C50
618
P_0
402_
50V8
J
1
2
R545 0_0402_5%1 2
R544 0_0402_5%@1 2
R543 10K_0402_5%12
R511 0_0402_5%12
General Purpose I/O Interface
Keyboard/Mouse Interface
LPCBus
Power Mgmt/SIRQ
Miscellaneous
Access Bus Interface
SMSC_1091-NU_TQFP-128P
U26
KBC1091-NU_TQFP128_14X14
AGN
D72
KSO021KSO120KSO219KSO318KSO417KSO516KSO613KSO712KSO810KSO99KSO108KSO117KSO12/GPIO00/KBRST6KSO13/GPIO185
KSI029KSI128KSI227KSI326KSI425KSI524KSI623KSI722
IMCLK35IMDAT36KCLK38KDAT40EMCLK41EMDAT42
CLKRUN#55SER_IRQ57PCI_CLK54EC_SCI#76
LAD[3]51LAD[2]50LAD[1]48LAD[0]46
LFRAME#52LRESET#53LPCPD#/GPIO2345
XTAL170XTAL271
VCC
114
TEST PIN 69
VSS
11VS
S37
VSS
47VS
S56
VSS
104
VSS
82VS
S11
7
VCC
139
VCC
158
VCC
184
VCC
110
6
VCC
111
9
VCC
249
OUT0 124OUT1/IRQ8# 125
OUT7/SMI# 123OUT8/KBRST 122OUT9/PWM2 121
OUT10/PWM0 120OUT11/PWM1 118
GPIO02 79GPIO03 80
GPIO04/KSO14 81GPIO05/KSO15 83
GPIO07/PWM3 85GPIO08/RXD 86GPIO09/TXD 87
GPIO11/AB2A_DATA 88GPIO12/AB2A_CLK 89
GPIO13/AB2B_DATA 90GPIO14/AB2B_CLK 91
GPIO15/FAN_TACH1 92GPIO16/FAN_TACH2 101
GPIO17/A20M 102
GPIO20/PS2CLK 103GPIO21/PS2DAT 105
AB1A_DATA 111AB1A_CLK 112
AB1B_DATA 109AB1B_CLK 110
PGM Strap/GPIO25 73
GPIO01 107
EA Strap#/GPIO26/KSO17 108CLOCKI 59
32KHZ_OUT/GPIO22 75RESET_OUT#/GPIO06 60
PWRGD 78VCC1_PWRGD 77
24MHZ_OUT/GPIO19/WINDMON 61
GPIO24/KSO16 4GPIO27 74
DMS_LED#/GPIO10 116BAT_LED# 113
PWR_LED#/8051TX 115FDD_LED#/8051RX 114
GPIO401HSTCLK2FLCLK3GPIO3930HSTCS1#31FLCS1#32GPIO3833GPIO3734NC43NC44
GPIO36 62GPIO35 63GPIO34 64GPIO33 65NC 66NC 67
HSTDATAIN94 FLDATAIN95 HSTCS0#96 FLCS0#97 HSTDATAOUT127 FLDATAOUT128 CAP 15
GPIO28 93GPIO29 98GPIO30 99GPIO31 100GPIO32 126
VCC068
C52
81U
_060
3_10
V4Z 1
2
R525 100K_0402_5%1 2
T86PAD
R5200_0402_5%@
1 2
C3394.7U_0805_10V4Z
1
2
R279 0_0402_5%1 2
R515 0_0402_5%1 2
C505 10P_0402_25V8K @1 2
R320 100K_0402_5%1 2
C510 0.1U_0402_16V4Z1 2
D36 CH751H-40_SC762 1
C504 4.7U_0805_10V4Z1 2
R517 0_0402_5%1 2
R535 10_0402_5% @1 2
R519 10K_0402_5%1 2
R533 10K_0402_5%1 2
G
D
S
Q442N7002_SOT23
2
13
R538 100K_0402_5%1 2
R523 100K_0402_5%1 2
RP214.7K_1206_8P4R_5%
1 82 73 64 5
R322 100K_0402_5%1 2
C5010.1U_0402_16V4Z
1
2
R333 0_0402_5%@1 2
C5034.7U_0805_10V4Z
1
2
R516 0_0402_5%1 2
R539120K_0402_5%
12
R524 10K_0402_5%1 2
R57 0_0402_5%1 2
T85PAD
RP19
10K_1206_8P4R_5%
1 82 73 64 5
R531 1K_0402_5%12
D33CH751H-40_SC76
21
R532 10K_0402_5%1 2
RP18
10K_1206_8P4R_5%
1 82 73 64 5
R536 1K_0402_5%1 2
C5000.1U_0402_16V4Z
1
2
C49
8
0.1U
_040
2_16
V4Z
1
2
T87PAD
Y532.768KHZ_12.5P_1TJS125BJ2A251
OU
T4
IN1
NC
3
NC
2C502
0.1U_0402_16V4Z
1
2
R5420_0402_5%
12
RED_R RED
GREEN_R
BLUE_R
GREEN
BLUE
PREP#
PREP#
BLUE_RGREEN_RRED_R
BLUE
ISO_PREP#
BLUE_R
ISO_PREP#REDRED_R
ISO_PREP#
GREEN_RGREEN
MDO2- 25MDO2+ 25
MDO3+ 25MDO3- 25
MDO0+25MDO0-25MDO1+25MDO1-25
LANLINK_STATUS#_DOCK 25LAN_ACT#_DOCK 25
ADP_SIGNAL 37,44ON/OFF# 30
D_DDCDATA 17D_DDCCLK 17D_HSYNC 17D_VSYNC 17
PREP# 22,25
LINE_IN_SENSE 28DOCK_HPS# 29DOCK_LINE_IN_L 28DOCK_LINE_IN_R 28
STB_LED19,30
USB20_P922USB20_N922
DLINE_OUT_R28DLINE_OUT_L28
RED17BLUE17
ISO_PREP#22
BLUE_R17RED_R17
GREEN_R17GREEN17
VA
+5VALW +5VALW
+5VS
VA
+3VS +3VS+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
DOCK CONNCustom
34 45Monday, October 29, 2007
2005/03/10 2006/03/10Compal Electronics, Inc.
DOCKING CONNECT
9/21
Del R610, Q43. 10/24
10/23
10/23
Change for can't charge issue. 10/24
C5200.1U_0402_16V4Z
1 2
C51
60.
1U_0
402_
50V
1
2
T125
C5190.1U_0402_16V4Z
1 2
C51
20.
1U_0
402_
50V
1
2
C51
30.
1U_0
402_
50V
1
2
C51
80.
1U_0
402_
50V
1
2
C5210.1U_0402_16V4Z
1 2
C51
50.
1U_0
402_
50V
1
2
U29
FSA66P5X_SC70-5
A1B2
GND3
OE4
VCC5
R550 0_0402_5%@ 1 2
JP35FOX_QL0127L-C24E51-4F_54P-TCONN@
38 3836 3634 3432 3230 3028 2826 2624 2422 2220 2018 1816 1614 1412 1210 10
8 86 64 42 2
4949474745454343
373735353333313129292727252523232121191917171515131311119977553311
54 54
52 52
5353
5151
5656
5555
50 5048 4846 4644 44
C51
40.
1U_0
402_
50V
1
2
U28
FSA66P5X_SC70-5
A1B2
GND3
OE4
VCC5U27
FSA66P5X_SC70-5
A1B2
GND3
OE4
VCC5
C51
10.
1U_0
402_
50V
1
2
R548 0_0402_5%@ 1 2
C51
70.
1U_0
402_
50V
1
2
T126
R549 0_0402_5%@ 1 2
M_PWROK
M_PWROKM_PWROK
2VREF_393
2VREF_393
M_PWROK 8,22
PWR_GD 33,36,42
DDR2_PG40
M_PROK41
VCC1_PWRGD 32,33,39
+1.5VS_PG41
+5VALW
+5VALW
+3VS
+5VS
2VREF_8734
+3VS
+3VALW
+3VM
+VCCP
+0.9V
VL
+3VL
VLVL
+3VL
2VREF_8734
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
POK CKT
35 45Monday, October 29, 2007
2005/05/26 2006/07/26Compal Electronics, Inc.
KBC Power OK
Mini Card STANDOFF WWAN Card STANDOFF
MDC STANDOFF
Update per change list. 9/14
update KBC power good. 9/19
Del LAN reset schematic. 9/26
9/21
9/21
Del H29. 10/17
H30HOLEA
1
FM31
H13HOLEA
1
FM21
H10HOLEA
1
H21HOLEA
1
H17HOLEA
1
R560 10K_0402_5%
1 2
FM11
H3HOLEA
1
H4HOLEA
1
R58
4
100K
_040
2_5%1
2
R566 76.8K_0402_1%
1 2
R514 1M_0402_5%12
H5HOLEA
1
R564 10K_0402_5%
1 2
R556 20K_0402_5%
12
H28HOLEA
1
R509 21K_0402_1%
1 2
H9HOLEA
1
R56140.2K_0402_1%
12
R5511M_0402_5%
12
R565 20K_0402_5%
12 H12HOLEA
1
R386 10K_0402_5%
1 2
U3A
LM393M_SO8
+3
-2 O 1
P8
G4
H23HOLEA
1
R479 44.2K_0402_1%12
R562 1M_0402_5%
12
H18HOLEA
1
R558 30.1K_0402_5%
12
H20HOLEA
1
H19HOLEA
1
U30B
LM393M_SO8
+5
-6 O 7
P8
G4
H14HOLEA
1
J6 SHORT PADS1 2
R59251.1K_0402_1%
12
R56
718
7K_0
402_
1%
12
D38 CH751H-40_SC7621
R552 23.7K_0402_1%1 2
C5271000P_0402_50V7K
1
2
H25HOLEA
1
C526
1000P_0402_50V7K
1
2
H15HOLEA
1
R554 10K_0402_5%
12
H31HOLEA
1
R55310K_0402_5%
12
R56310K_0402_5%
12
H16HOLEA
1
R5101M_0402_5%
12
R559 113K_0603_0.1%12
H26HOLEA
1
H27HOLEA
1
FM41
H11HOLEA
1
G
D
S
Q12N7002_SOT232
13
C2150.1U_0402_16V4Z
1 2
H8HOLEA
1
C5231000P_0402_50V7K
1
2
H24HOLEA
1
H6HOLEA
1
C21
6
2200
P_04
02_5
0V7K
1
2
R59123.7K_0402_1%
12
R611 10K_0402_5%1 2
U30A
LM393M_SO8
+3
-2 O 1
P8
G4
H22HOLEA
1
H7HOLEA
1
H1HOLEA
1
R555 169K_0603_1%
12
R478 35.7K_0402_1%1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
RUNON
SLP
SLP_S3
SLP_S3 SLP_S3
RUNON
SLP_S3
SLP
LAN_WOL_EN#
3VM_WOL_EN
PM_SLP_M#
SLP
LAN_EN#LAN_EN#
RUNON
SLP
SLP_S3
LAN_WOL_EN#
LAN_EN#
3VM_EN
PM_SLP_M#
SLP_S5#22
PWR_GD 33,35,42
SLP_S4#22,40
LAN_WOL_EN22,33
PM_SLP_M#22,33,40,41
SLP_S3#22,24,26,28,33,41,42,44
+5VS+5VALW
+3VS+5VS
+3VS+3VALW
+0.9V+1.5VS +1.8V
B+
+1.05VM +3VM
+3VL
B+
+3VALW +3VM_WOL
+3VALW
+3VALW
+VCCP+1.05VM
+3VL
+3VM_WOL
B+
+3VALW
+3VALW
+3VM
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4021P 0.1
DC/DC Circuits
36 45Monday, October 29, 2007
2006/02/13 2006/07/26Compal Electronics, Inc.
Discharge circuit-1
+5VALW to +5VS Transfer
+3VALW to +3VS Transfer
+3VALW to +3VM_WOL Transfer Discharge circuit-2 for V-MModify at 7/31 after discuss with power team.
+1.05VM to +VCCP Transfer
Design Change at 9/14.
+3VALW to +3VM Transfer
Add in 9/21
Add in 9/21
Q51SI4362DY-T1-E3_SO8~N
365
78
2
4
1
J7SHORT PADS
12
R575470_0402_5%
12
U36SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5
G
D
S
Q47BSS138_SOT23
2
13
C47
0
0.1U
_040
2_16
V4Z
1
2
G
D
S Q60RHU002N06_SOT323
2
13
C49
710
U_0
805_
10V4
Z
1
2
R590
470_0402_5%
12
C47310U_0805_10V4Z
1
2
R577100K_0402_5%@
12
C53310U_0805_10V4Z
1
2
C59
610
U_0
805_
10V4
Z
1
2
R583100K_0402_5%
12
G
D
S Q58RHU002N06_SOT323
2
13
C5370.01U_0402_25V7Z
1
2
C4690.01U_0402_25V7Z
1
2
R581470_0402_5%
12
G
D
SQ53RHU002N06_SOT323
2
13
C5410.01U_0402_25V7Z
1
2
R578330K_0402_5%
12
G
D
SQ77RHU002N06_SOT323
2
13
R586
470_0402_5%
12
R582100K_0402_5%
12
R574100K_0402_5%
12
R614470_0402_5%
12
U32
SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5
G
D
S
Q48BSS138_SOT23
2
13
G
D
S
Q52RHU002N06_SOT323
2
13
R588
470_0402_5%
12
R589
470_0402_5%
12
R613470_0402_5%
12
U33
SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5
G
D
SQ55RHU002N06_SOT323@
2
13
C53810U_0805_10V4Z
1
2
C54
30.
1U_0
402_
16V4
Z
1
2
G
D
SQ56RHU002N06_SOT323
2
13
G
D
S Q59RHU002N06_SOT323
2
13
U35SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5
G
D
SQ57RHU002N06_SOT323
2
13
R573100K_0402_5%
12
R518100K_0402_5%
12 G
D
SQ54RHU002N06_SOT323
2
13
R580470_0402_5%
12
C21810U_0805_10V4Z
1
2
G
D
S
Q50BSS138_SOT23
2
13
G
D
S
Q76BSS138_SOT23
2
13
C53
90.
1U_0
402_
16V4
Z
1
2
R612100K_0402_5%
12
C54
20.
1U_0
402_
16V4
Z
1
2
C54
010
U_0
805_
10V4
Z1
2
C54
50.
1U_0
402_
16V4
Z
1
2
G
D
S
Q49BSS138_SOT23
2
13
C53110U_0805_10V4Z
1
2
R579470_0402_5%
12
G
D
S Q61RHU002N06_SOT323
2
13
R587
470_0402_5%
12
R576100K_0402_5%
12
C54610U_0805_10V4Z
1
2
C54410U_0805_10V4Z
1
2
G
D
S Q62RHU002N06_SOT323
21
3C
532
0.1U
_040
2_16
V4Z
1
2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
SMB_EC_DA1
EC_SMC
SMB_EC_CK1
ADPIN
EC_SMD
SMB_EC_CK1 33
SMB_EC_DA1 33
MAINPWON 4,39
BAT_ID# 33
ADP_SIGNAL 34,44 VIN
VMB BATT
Vin
Vin
Vin
+3VL
+3VL
VA
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3261P UMA
BATTERY CONNCustom
37 45Monday, October 29, 2007
2005/03/10 2006/03/10Compal Electronics, Inc.
CPU
Recovery at 47 +-3 degree C
PH1 under CPU botten side :CPU thermal protection at 90 +-3 degree C
2007/9/29
2007/10/04
2007/10/17 2007/10/17
PC51000P_0402_50V7K
12
PR7@150K_0402_1%
1 2
PR1891K_0402_1%
12
PL2
SMB3025500YA_2P1 2
PR6@15K_0603_1%1 2
PD11BAV99_SOT323-3
2 31
PC21000P_0402_50V7K
12
PC60.01U_0402_50V4Z
12
PCN2SUYIN_200275MR005G187ZL
1 1
3 34 45 5GND6
GND7
2 2
PCN1
FOX_JPD113D-LBA21-7F
ID 3
V+ 1
V+ 2
V-5
V-4
GND_16
GND_27
GND_38
GND_49
PR9@150K_0402_1%
12
[email protected]_0603_10V7K
12
PJP9
PAD-OPEN 4x4m
1 2
PC
904
100P
_040
2_50
V8J
12 PU14B
LM393DG_SO8
+5
-6 O 7
P8
G4
PR5@10K_0402_5%
12
G
D
S
PQ1@RHU002N06_SOT323-3
2
13
[email protected]_0603_1%
12
PL1
SMB3025500YA_2P1 2
PC
110
0P_0
402_
50V
8J
12
PD12BAV99_SOT323-3
2 31
PC
310
0P_0
402_
50V
8J 12
PC
410
00P
_040
2_50
V7K
12
PC
905
100P
_040
2_50
V8J
12PC903
100P_0402_50V8J
12
PD10BAV99_SOT323-3
2 31
PR4@47K_0402_1%1 2
PC8@1000P_0402_50V7K
12
PR1@15K_0402_5%
12
PR2100_0402_5%
12
PR187210K_0402_1%
1 2
PD8@PJSOT24C_SOT23
2 31
PR3100_0402_5%
12
PH1@10K_TH11-3H103FT_0603_1%
12
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
DL_CHG
DH_CHG
LX_CHG
CHGEN#
CHGEN#
BST_CHG
REGNVADJ
BATT
AC_AND_CHG
ADP_PRES
CHG AC_AND_CHG
CHGCTRL
ACDET
ACDETACDET
ACPACN
ACNACP
IADAPT
ADP_PRES 24,33,39
CHGCTRL 33
BATCAL#44
ADP_EN# 44
BAT_PWM_OUT33
SRSET 44
CELLS 33
IADAPT44
VIN
BATT
P2+3VL
VL
CHG_B+
B+P2
P2
P2
BQ24740VREF
+3VL
BQ24740VREF
2VREF_87342VREF_8734
+3VL
+3VL
+3VL
B+
CHG_B+
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3941P 0.1
Charger
38 45Monday, October 29, 2007
2007/05/29 2008/05/29Compal Electronics, Inc.
Charge DetectorHigh 17.588Low 16.706
AC DetectorHigh 13.774Low 13.357
2007/9/26
2007/9/26
2007/9/26
2007/9/26
2007/9/21
2007/9/20
2007/9/212007/9/26
2007/9/27
2007/9/27
2007/9/27
2007/9/28
2007/10/08
2007/10/12
PR32110K_0402_5%
12
PR310
210K_0402_1%12
PC
317
4.7U
_080
5_25
V6M
12
PC3111U_0603_10V6K1
2
PC
302
4.7U
_080
5_25
V6M
12
PR324
10K_0402_5%1 2
PU302ALM393DG_SO8
+3
-2 O 1
P8
G4
PR314
255K_0402_1%1 2
BQ24740RHDR_QFN28_5X5PU301
AC
P3
LPM
D4
CH
GE
N1
AC
N2
AC
DE
T5
AC
SE
T6
IADSLP8
SR
P19
BA
T17
IAD
AP
T15
PGND 22
SR
SE
T16
ISYNSET14
VADJ12
VDAC11
LPR
EF
7
VREF10
DP
MD
ET
21
LODRV 23
CE
LLS
20
SR
N18
AGND9
REGN 24
EXTPWR13
PH 25
HIDRV 26
BTST 27
PVCC 28
TP 29
PR3151M_0402_1%
12
PR3320_0402_5%1 2
PU30074LVC1G14GW_SOT353-5
A2 Y 4
P5
NC
1
G3
PR302
200K_0402_5%1 2
PR312
681K_0402_1%1 2
PR32010K_0402_1%
12
PC
316
4.7U
_080
5_25
V6M
12
PD302
RLS4148_LL34-2
12
PC
308
4.7U
_080
5_25
V6M
12
[email protected]_0603_25V7K
12
PL300HCB2012KF-121T50_08051 2
G
D
S PQ3062N7002KW_SOT323-3
21
3
PR31975K_0402_1%
12 PR325
1K_0402_5%
1 2
G
D
S
PQ3052N7002KW_SOT323-3
2
13
PR311147K_0402_1%
12
PL30110U_LF919AS-100M-P3_4.5A_20%
1 2
PQ302FDS4435BZ_SO8
3 65
78
2
4
1
PR3040_0402_5%
12
PC3220.1U_0603_25V7K
12
PC3051U_0805_25V5K
1 2
PC3100.1U_0402_10V7K
1 2
PC3121U_0603_10V6K
12
[email protected]_0603_25V7K
12
PD3011SS355_SOD323-2
12
PC
309
4.7U
_080
5_25
V6M
12
PR327220K_0402_5%
12
PR328
4.32K_0402_1%1 2
PR31357.6K_0402_1%
12 PU302B
LM393DG_SO8
+5
-6 O 7
P8
G4
PR33410_0805_5%1 2
PC321100P_0402_50V8J
12
PR329
11.3K_0402_1%1 2
PR318
@422K_0402_5%1 2
PR32210K_0603_0.1%
12
PC307
1U_0603_6.3V6M
1 2
PQ303AO4466_SO8S
1S
2S
3G
4
D8
D7
D6
D5
PR31710K_0603_0.1%
12
PC3060.1U_0402_10V7K
1 2
PC3040.01U_0402_16V7K
12
PC
318
0.1U
_060
3_25
V7K
12
PC3011U_0603_6.3V6M
1 2
PC3140.1U_0402_10V7K
12
PD300
RLS4148_LL34-2
12PR316453K_0402_1%
12
PC3000.22U_0603_16V7K1 2
PR306150K_0402_5%
12
PR303
200K_0402_5%1 2
PC3130.047U_0402_16V7K
12
PR330100K_0402_1%
12
PR333100K_0402_5%
12
G
D
SPQ3072N7002KW_SOT323-3
2
13
G
D
SPQ3082N7002KW_SOT323-3
2
13
PC3201U_0603_10V6K
12
PC
324
4.7U
_080
5_25
V6M
12
PC315
1000P_0402_50V7K
1 2
PR307150K_0402_5%
12
PR30939K_0402_5%
12
PQ300FDS4435BZ_SO8
3 65
78
2
4
1
PR
323
470K
_040
2_5%
12
PR
326
470K
_040
2_5%1
2
PR3310_0402_5%
1 2
PQ304AO4466_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PC
303
4.7U
_080
5_25
V6M
12
PQ301FDS4435BZ_SO8
365
78
2
4
1
PR301
56K_0402_1%1 2
PR3080.01_1206_1%1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DL3
DH3
LX5
BST3A
BST5B
BST5A
DL5
LX3
2VREF_8734
ON32VREF_8734
DH5
BST3B
ON3
MAINPWON 4,37
KBC_PWR_ON 33
ADP_PRES 24,33,38
RPGOOD 22
VCC1_PWRGD 32,33,35
B++
+3VALWP
VL
+5VALWP
B+
VL
B++
B++
2VREF_8734
+3VLP
VL
+3VL+3VLP
VL
B++
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3261P UMA 0.1
3.3V / 5V
B
39 45Monday, October 29, 2007
2005/03/01 2006/03/01
+3.3V/+5V
2007/10/172007/10/17
2007/10/17
PC410.1U_0603_50V4Z
12
PQ11AO4468_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PR530_0402_5%
12
PC
334.
7U_0
805_
25V6
M
12
PD4CHP202UPT_SOT323-3
231
PU5
MAX8734EEI_QSOP28
LX515DL519
BST514
DH516
OUT521FB59
SHDN#6ON54
GN
D23
ILIM5 11
DH3 26
LX3 27
TON
13
DL3 24
OUT3 22
FB3 7PGOOD 2SKIP#12
ON33
REF8
PRO
#10
VCC
17
V+20
ILIM3 5
BST3 28
LDO
325
LD05
18
N.C.1
PR
500_
0402
_5%
12
PC450.047U_0603_16V7K
12
G
D
SPQ13
RHU002N06_SOT323-3
2
13
PC
430.
22U
_060
3_10
V7K
12
PR
4449
9K_0
402_
1%
12
PD131SS355_SOD323-2
12
PR56499K_0402_1%
12
PC270.1U_0603_50V4Z
1 2
PR
4747
K_04
02_5
% 12
+
PC
4222
0U_6
.3VM
_R15 1
2
PR
4047
_040
2_5%
12
PR51
@0_0402_5%1 2
PR410_0402_5%
12
PR
550_
0402
_5%
12
PL74.7UH_SIQB745-4R7_4A_30%
12
PC
304.
7U_0
805_
25V6
M
12
PR390_0402_5%
12
PQ10AO4468_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PC
444.
7U_0
805_
10V4
Z1
2
G
D
S PQ14RHU002N06_SOT323-3
2
13
PR
46@
10.2
K_04
02_1
%
12
PR480_0402_5%
1 2
PQ9AO4468_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PL64.7UH_PCMC063T-4R7MN_5.5A_20%
12
PQ12AO4468_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PC
314.
7U_0
805_
25V6
M
12
PC280.1U_0603_50V4Z
1 2
PR57330K_0402_5%
12
PR
52@
3.57
K_04
02_1
%
12
+
PC
4022
0U_6
.3VM
_R15 1
2
PJP1
PAD-OPEN 2x2m
2 1
PC
3222
00P_
0402
_50V
7K
12
PR84330K_0402_5%1 2
PR
4310
0K_0
402_
1%12
PC
381U
_080
5_16
V7K
12
PC
2922
00P_
0402
_50V
7K1
2
PR490_0402_5%1 2
PR
4549
9K_0
402_
1%
12
PR
4220
0K_0
402_
1%
12
PC350.1U_0402_16V7K
12
G
D
S PQ15@RHU002N06_SOT323-3
2
13
PR902@0_0402_5%
12
PC
364.
7U_0
805_
10V4
Z1
2
PL5HCB2012KF-121T50_0805
12
PC
37
0.1U
_060
3_50
V4Z
12
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
DL_1.8V
DH_1.8V
BST_1.8V BST_1.8V_LX
LX_1.8V
1.8V_B+
SLP_S4#22,36
PM_SLP_M#22,33,36,41
DDR2_PG35
+1.5VS+1.5VSP
+1.8V+1.8VP
+1.05VM+1.05VMP
+0.9VP
+5VALW
+5VALW
+1.8VP
+5VALWP +3VALWP+5VALW +3VALW
+1.8VP
B+
+0.9V+0.9VP
+1.8VP
+VCCGFX +VCCP
+5VALW
+5VALW
+1.8VP
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3941P 0.1
1.8VP/0.9VSP/2.5VSP
40 45Monday, October 29, 2007
2007/05/29 2008/05/29Compal Electronics, Inc.
(6A,240mils ,Via NO.= 12)
(4A,160mils ,Via NO.=8)(8A,320mils ,Via NO.= 16)
(4.5A,180mils ,Via NO.= 9) (3A,120mils ,Via NO.= 6)
(2A,80mils ,Via NO.= 4) (5A,200mils ,Via NO.= 10)
2007/9/21
2007/9/21
PC
484.
7U_0
805_
25V
6M
12
PR63
14.3K_0603_0.1%1 2
PC51
0.1U_0402_16V7K1 2
PQ16AO4468_SO8
S1
S2
S3
G4
D8
D7
D6
D5 P
C47
4.7U
_080
5_25
V6M
12
PR58
18.2K_0402_1%1 2
PR661K_0402_1%
12
PR6410K_0603_0.1%
12
PC
530.
1U_0
402_
16V
7K
12
PC
540.
1U_0
402_
16V
7K
12
PU6
SC412AMLTRT_MLPQ16_3X3
VCC 3
DL 4
LX 1
BST 2
GN
D5
RTN
6
FB9
DH
16
ILIM
13
EN12
NC
7
NC
8
PGOOD11
VOUT10
NC
14
NC
15
TP17
PR901
0_0402_5%12
PC591U_0603_16V6K
12
PC50@1000P_0402_5%
12
PC6110U_0805_6.3V6M
12
PJP3
PAD-OPEN 4x4m
1 2
PQ17FDS6690AS_SO8S
1S
2S
3G
4
D8
D7
D6
D5
PC9021U_0603_10V6K
1 2
PC9010.01U_0402_16V7K
12
PL92.2UH_PCMC063T-2R2MN_8A_20%
1 2
PJP4
PAD-OPEN 4x4m
1 2
[email protected]_0402_16V7K
12
PC49680P_0402_50V7K
12
PU7
G2992F1U_SO8
VOUT4
NC 5GND2
VREF3
VIN1 VCNTL 6
NC 7
NC 8
TP 9
PC55
@680P_0603_50V7K12
PR651K_0402_1%
12
PJP7
PAD-OPEN 4x4m
1 2
[email protected]_1206_5%
12
PC
4622
00P
_040
2_50
V7K
12
+
PC
5222
0U_D
2_4V
Y_R
25M1
2
PJP2
PAD-OPEN 4x4m
1 2
PC
600.
1U_0
402_
16V
7K
12
PR590_0402_5%
1 2
G
D
S
PQ18RHU002N06_SOT323-3
2
13
PJP5
PAD-OPEN 3x3m
1 2
PC
58@
10U
_080
5_10
V4Z
12
PJP11
PAD-OPEN 4x4m
1 2
PJP8
PAD-OPEN 4x4m
1 2
PR670_0402_5%
1 2
PC
5710
U_0
805_
10V
4Z
12
PR60
@10K_0402_5%1 2
PL8
HCB1608KF-121T30_06031 2
PD901
RLS4148_LL34-2
1 2
PC5610P_0402_50V8J
1 2
PR61
0_0402_5%1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BST_1.5V
LX_1.5V
UG1_1.5V
LG_1.5V
UG_1.5V
LG_1.05V
BST_1.05V
LX_1.05V
UG1_1.05V
UG_1.05V
SLP_S3#22,24,26,28,33,36,42,44
M_PROK35
PM_SLP_M# 22,33,36,40
+1.5VS_PG35
B+++
+1.5VSP
B+
+1.05VMP
+5VALWP
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3732P 0.2
1.2V_VP/1.5VSP/1.05VP
41 45Monday, October 29, 2007
2006/11/23 2007/11/23Compal Electronics, Inc.
2007/10/03
2007/10/03
+
PC
7222
0U_D
2_4V
Y_R
25M
1
2
+
PC
7422
0U_B
2_2.
5VM
1
2
[email protected]_0402_16V7K
12
[email protected]_0603_16V7K
1 2
PR6873.2K_0402_1%1 2
PL10HCB2012KF-121T50_0805
1 2
PR730_0402_5%1 2
PR7916.5K_0402_1%1 2
PC
65@
2200
P_0
402_
50V7
K
12
PC69
0.1U_0402_16V7K
12
PR823.3_0402_5%
12
PR760_0402_5%1 2
PR750_0402_5%1 2
PR8018.2K_0402_1%
12
PC761U_0603_10V6K
12
PC70
0.1U_0402_16V7K
1 2SP8K10S FD5 2N SOP8
PQ20
D22 G2 8
G13D1/S2/K 5
D21D1/S2/K 7
S1/A4 D1/S2/K 6
PC
674.
7U_0
805_
25V
6M
12
PR720_0402_5%
12
PL112.2UH_PCMC063T-2R2MN_8A_20%
1 2
PC
664.
7U_0
805_
25V
6M
12
PC734.7U_0805_6.3V6K1
2
PL123.3UH_PCMC063T-3R3MN_6A_20%
12
PC75@1000P_0402_50V7K
12
PC
644.
7U_0
805_
25V
6M
12P
C63
@22
00P
_040
2_50
V7K
12
PR780_0402_5%1 2
PU8
TPS51124RGER_QFN24_4x4
GN
D3
TON
SE
L4
VO
11
VFB
12
VFB
25
VO
26
EN28
DR VL1 19
TRIP
117
V5F
ILT
15
VBST1 22
V5I
N16
TRIP
214
DR VL212
LL211
PGOOD27
DR VH210 DR VH1 21
EN1 23
LL1 20
PG
ND
118
VBST29
PGOOD1 24
PG
ND
213
P PAD25
PR74
0_0402_5%1 2
PC714.7U_0805_6.3V6K
12
PC78@1000P_0402_50V7K
12
PR830_0402_5%1 2
PR7131.6K_0402_1%
1 2
PR810_0402_5%
12
PR770_0402_5%1 2
PR7075K_0402_1%
1 2
PQ19AO4468_SO8
365 7 8
2
4
1
PC
774.
7U_0
603_
6.3V
6M
12
[email protected]_0402_16V7K
12
PQ21FDS6690AS_NL_SO8
365 7 8
2
4
1
PR6975K_0402_1%1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VSUM
BOOT_CPU1
H_PROCHOT#
PHASE_CPU1
VSUM
+VCC_CORE
UGATE_CPU1
H_PROCHOT#
LGATE_CPU1
CP
U_V
ID2 5
VGATE22
PM_PWROK8,22,33,43
CP
U_V
ID5 5
H_DPRSTP#5,8,21 CP
U_V
ID6 5
VSSSENSE5
CP
U_V
ID3 5PM_DPRSLPVR8,22
CP
U_V
ID0 5
VCCSENSE5
CP
U_V
ID4 5
CP
U_V
ID1 5
PW
R_G
D
33,3
5,36
CLK_ENABLE#22
SLP_S3# 22,24,26,28,33,36,41,44
H_PROCHOT#4
+VCC_CORE
+5VS
+5VS
+CPU_B+
B+
+3VS
+CPU_B+
+VCCP
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
IAX00 0.1
+CPU_CORE
Custom
42 45Monday, October 29, 2007
2005/06/23 2006/10/22Compal Electronics, Inc.
2007/10/11
PR218
464K_0402_1%
1 2
PC2151U_0603_6.3V6M
12
PC
221
0.06
8U_0
402_
10V6
K
12PR2250_0402_5%
1 2
PC2121000P_0402_50V7K1
2
PD201B340A_SMA2
12
PR210
@40.2K_0402_1%1 2
PR217
6.81K_0402_1%
12
PR
226
4.53
K_04
02_1
%12
PC
205
1U_0
603_
6.3V
6M12
PC2191000P_0603_50V7K
12
PR2010_0402_5%
1 2
PR2041_0603_5%
12
PR2285.36K_0402_1%
1 2
PC2110.015U_0603_25V7K
1 2
PR2271K_0402_1%
1 2
PR22010_0603_5%
1 2
PR221
5.49K_0402_1%
1 2
PU201ISL6261ACRZ-T_QFN40_6X6
RBIAS3
VR_TT#4
FDE1
PMON2
NTC5
SOFT6
VW8
VSS
19
VSU
M17
DFB
15BOOT 22
VO16
DR
OO
P14
VSEN
12
VDIF
F11
OCSET7
FB10 NC 21
UGATE 23
VDD
20
VIN
18
COMP9
PHASE 24R
TN13
VSSP 25
LGATE 26
VCCP 27
VID0 28
VID1 29
VID2 30
VID
331
VID
432
VID
533
VID
634
VR_O
N35
DPR
SLPV
R36
DPR
STP#
37
CLK
_EN
38
3V3
39
PGO
OD
40
GN
D P
AD41
PC216
390P_0402_50V7K
1 2
[email protected]_0402_1%
12
PC220330P_0402_50V7K
12
PC
222
0.1U
_040
2_16
V7K
12
PR20968_0402_5%
12
PC
203
4.7U
_080
5_25
V6M
12
PC218 1000P_0603_50V7K1 2
PH202
@100K_0603_1%_TH11-4H104FT1 2
PC
202
4.7U
_080
5_25
V6M
12
[email protected]_0402_16V7K
12
PR215
@4.22K_0402_1%1 2
PQ201RQW130N03-FD5_PSOP8
35
2
4
1
PR
208
0_04
02_5
%12
PR211
147K_0402_1%1 2
PH201
10KB_0603_5%_ERTJ1VR103J
12
PC2170.22U_0603_16V7K
12
PR2230_0402_5%
1 2
PR2147.68K_0805_1%
12
PR2243.57K_0402_1%
12
PR2290_0402_5%
12
PC214 47P_0402_50V8J
1 2
PR222 2.21K_0402_1%1 2
PR216
6.34K_0402_1%1 2
PC2090.22U_0603_10V7K
1 2
PQ202SI7336ADP-T1-E3_SO8
35
2
4
1
PR206 0_0402_5%1 2
PR2050_0402_5%1 2
PC210680P_0603_50V8J
12
PC213
150P_0402_50V8J
12
PR2030_0402_5%1 2
PR202@0_0402_5%
1 2
PL2020.45UH_ETQP4LR45XFC_25A_-25+20%~D
1 2
PR2134.7_1206_5%
12
PC
201
4.7U
_080
5_25
V6M
12
PC223 330P_0402_50V7K1 2
PR21910_0603_5%
1 2
PC2240.22U_0603_10V7K 1
2
PL201HCB2012KF-121T50_0805
1 2
PC
207
1U_0
603_
6.3V
6M1
2
PQ203SI7336ADP-T1-E3_SO8
35
2
4
1
PC
206
0.01
U_0
402_
25V7
K 12
PR2120_0603_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BST_GFXDH_GFX
DL_GFX
VGAVR_ON
VCC_PRM
VCC_PRMVSUM1
LX_GFX
VGAVR_ON
DFGT_VID_48DFGT_VID_38DFGT_VID_28DFGT_VID_18
GFXVR_EN8
PM_PWROK8,22,33,42
DFGT_VID_08
+5VS
+3VS
B+
GFX_B+GFX_B+
+VCCGFXP
+3VS
+VCCGFX
+3VS
+5VS
+VCCGFXP +VCCGFX
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3261P UMA
VCCGFXB
43 45Monday, October 29, 2007
2005/03/10 2006/03/10Compal Electronics, Inc.
Parellel from VCCGFX and GND underneath GMCH at Interface Power pin
(5A,200mils ,Via NO.= 10)
2007/9/27
PR133
1_0402_5%
1 2
PR139
12.4K_0603_1%1 2 PR140
4.53K_0402_1%1 2
PC
116
0.01
U_0
402_
25V
7K1
2
PC1230.033U_0402_16V7K
1 2
PR142
1.91K_0402_1%
1 2
PC
131
1000
P_0
402_
50V7
K
12
PL15HCB1608KF-121T30_0603
12
PR147
4.99K_0402_1%
12
PR144
2.21K_0402_1%
12
PR123 0_0402_5%1 2
PR131
0_0402_5%
1 2
PU11
ISL6263_QFN32
D427D326D225D124D023
SPIR30
VO 12
VR_ON29
VSUM 13
UGATE 18
PHASE 19
PGND 20
COMP5
DFB 11
DROOP 10
VIN 14
LGATE 21
I2UA 28
FDE32
VSEN 8
SOFT2
BOOT 17
FB6
VCC16
VDIF
F7
PGOOD31
OCSET3
RTN 9
VW4
PVCC22
RBIAS1
VSS
15
EP33
PR125 0_0402_5%1 2
PR121@0_0402_5%1 2
PC
114
4.7U
_080
5_25
V6M
12
PR129@0_0402_5%1 2
PQ26AO4468_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PC
112
2200
P_0
402_
50V7
K1
2
PC1210.01U_0402_25V7K12
PR128 0_0402_5%1 2
PR141 6.98K_0402_1%1 2
PR1270_0402_5%1 2
PC
113
4.7U
_080
5_25
V6M
12
PC1250.1U_0402_16V7K
12
PR137
20K_0402_1%
1 2
PR11630K_0402_1%
12
PR1431K_0402_1%
1 2
PR13010K_0402_5%1 2
[email protected]_0402_1%
12
PH4
10KB_0603_5%_ERTJ1VR103J
1 2
PR145
0_0402_5%1 2
PC130
560P_0402_50V7K
12
PC1180.1U_0402_16V7K
12
PC
127
180P
_040
2_50
V8J
12
PR1347.68K_0805_1%
12
PR11910_0402_5%
12
PR122 0_0402_5%1 2
PC1202.2U_0603_6.3V6K
12
+
PC
119
330U
_D2E
_2.5
VM
_R9
1
2
PR11810_0402_5%
12
PC128330P_0402_50V7K
1 2
PC1221000P_0402_50V7K
1 2
PR124 0_0402_5%1 2
PC1171U_0603_10V6K
12
PR132 100K_0402_1%12
PR136150K_0402_1%
12
PC1291000P_0402_50V7K
12
PJP10
PAD-OPEN 4x4m
1 2
PR146374_0402_1%
12
PR138
3.57K_0402_1%
1 2
PC1321000P_0402_50V7K
12
PQ27FDS6690AS_NL_SO8 3
65 7 82
4
1
PL16
1.5UH_IHLP-2525CZ-01_9A_+-20%_15mohm
1 2
PR1350_0402_5%
12
PC1240.022U_0402_16V7K
1 2
PC12668P_0402_50V8J
12
PR148
0_0402_5%1 2
PR126 10K_0402_5%1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ADP_ID 33
ADP_EN 33
ADP_PS0 33
ADP_PS1 33
OCP# 22
SRSET 38
ADP_SIGNAL 34,37
ADP_EN# 38
BATCAL#38
SLP_S3#22,24,26,28,33,36,41,42
IADAPT38
+5VS
+5VS
+3VS
+3VS
+3VS
+3VS
+5VS
+3VL
+5VS
VIN
+3VL
VIN
+5VS
VIN
+5VS
BQ24740VREF
Title
Size Document Number R ev
Date: Sheet o f
LA-3941P 0.1
<Title>
Custom
44 45Monday, October 29, 2007
2007/9/20
2007/9/26
2007/9/26
2007/9/26
2007/9/26
2007/10/08 PR1581M_0402_5%1 2
PR190165K_0402_1%
1 2
PU13A
LM393DG_SO8
+3
-2 O 1
P8
G4
PR152
0_0402_5%1 2
PU12A
LM393DG_SO8
+3
-2 O 1
P8
G4
PR179200K_0603_1%
1 2
PR175220K_0402_5%
12
PR15410K_0402_5%
12
PR15110K_0402_5%
12
PR
177
80.6
K_0
402_
1%
12
PR150
10K_0402_5%
12
G
D
S
PQ33RHU002N06_SOT323-3
2
13
PR153
100_0402_1%1 2
PR19178.7K_0603_1%
12
PR18610K_0402_1%
12
PR1800_0402_5%1 2
PC
139
1U_0
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6K
12
PU13B
LM393DG_SO8
+5
-6 O 7
P8
G4
PR16771.5K_0402_1%
12
PR
155
3.9K
_040
2_5%1
2
PR169
100K_0402_5%
1 2
PR1731M_0402_5%1 2
PR164220K_0402_5%
12
PD6
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1 2
LMV321M5X-NOPB_SOT23-5PU9
V-2
+IN1
-IN3 OUTPUT 4
V+ 5
PR181191K_0402_1%
12
PR170
10K_0402_5%
12
PR19310K_0402_5%
1 2
PC1341U_0603_10V6K
12
PC1400.1U_0603_50V7K
1 2
PR16022.6K_0402_1%
12
PR15647K_0402_5%
12
PC
136
0.01
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12
PR16110K_0402_5%1 2
PU14ALM393DG_SO8
+3
-2 O 1
P8
G4
PR1621M_0402_5%
1 2
PR17110K_0402_1%
12
PR149
100K_0402_5%1 2
G
D
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PQ31RHU002N06_SOT323-3
2
13
G
D
S
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2
13
PR16547K_0402_5%
12
EB
CPQ28MMBT3904W_SOT323-3
2
31
PR16622.6K_0402_1%
12
PD14RLS4148_LL34-21
2PR157
470K_0402_5%
12
PR17621K_0603_1%1 2
PD91SS355_SOD323-2
12
PR16347K_0402_5%
12
PC
133
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K
1
2
PC135
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12 PR159
10K_0402_5%
12
PR1922.2K_0402_5%
1 2
PU12B
LM393DG_SO8
+5
-6 O 7
P8
G4
PR17221K_0603_1%
12
G
DS PQ29NDS0610_NL_SOT23-3
2
13
PR168133K_0402_1%
12
PR1783.48K_0402_1%
12
PR1881_0805_1%
12
PR17410K_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3732P 0.2
Changed-List History-1
45 45Monday, October 29, 2007
2006/02/28 2007/02/28Compal Electronics, Inc.
Version change list (P.I.R. List) Power section Page 1 of 1
Item Reason for change PG# Modify List Date Phase
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