B B High Energy Physics Group Instrumentation …idlab/taskAndSchedule... · B B High Energy Physics Group, Instrumentation Development Lab C CH65

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F F

E E

D D

C C

B B

A A

Gary S. VarnerModif. Date: 10-Oct-14

Revision:IDLAB design #:

Sheet of 111

Peter OrelPeter OrelProject: MB_SciFi_Tracker Drawn By:

Designer:

Approved By:

High Energy Physics Group, Instrumentation Development Lab

Sheet Title: Mother Board for Compact Scifi Tracker

CIDL_14_36

Variant: [No Variations]

Production Documentation for:

Compact SciFi Tracker

IDL num:Board Name MB_SciFi_Tracker

IDL_14_36Revision: C

Project Name:

Instrumentation Development Laboratory2505 Correa Road, Honolulu, HI 96822

High Energy Physics Group


1

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7

8

8

F F

E E

D D

C C

B B

A A



Sheet of 112


Designer:

Approved By:


Sheet Title: Functional Schematic

CIDL_14_36


MPPC Array - PLANE X

Clo

ck B

uffe

r

Tem

p Se

ns

Dia

g A

DC

MPP

C A

rray

- PL

AN

E Y

Dau

ghte

r B

oard

- ID

L_1

4_35

(GR

OU

P E

)

Dau

ghte

r B

oard

- ID

L_1

4_35

(GR

OU

P D

)

Dau

ghte

r B

oard

- ID

L_1

4_35

(GR

OU

P C

)

Dau

ghte

r B

oard

- ID

L_1

4_35

(GR

OU

P B

)

Dau

ghte

r B

oard

- ID

L_1

4_35

(GR

OU

P A

)

Daughter Board - IDL_14_35 (GROUP E)

Daughter Board - IDL_14_35 (GROUP D)

Daughter Board - IDL_14_35 (GROUP C)

Daughter Board - IDL_14_35 (GROUP B)

Daughter Board - IDL_14_35 (GROUP A)

SCROD rev.A4

J1

J2

J3

J4

Pow

er S

uppl

y In

put

Pow

er S

uppl

y C

ontr

olM

MC

X

GPIO

Temp Sens

Temp Sens

x15

x15

x15

x15

x15

x21

x21

x20

x20

x20

x20

x20

x20

x20

x20

x20

x20

x7

x24

x15

x15

x15

x15

x15

I2C

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

F F

E E

D D

C C

B B

A A



Sheet of 113


Designer:

Approved By:


Sheet Title: MPPC Analog Outputs X&Y Planes

CIDL_14_36


B1B2B3B4B5B6B7B8B9B10B11B12B13B14B15B16B17B18B19B20B21B22B23B24B25B26B27B28B29B30B31B32B33B34B35B36B37B38B39B40B41B42B43B44B45B46B47B48B49B50

CN1B

EU-5650405-5

A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15A16A17A18A19A20A21A22A23A24A25A26A27A28A29A30A31A32A33A34A35A36A37A38A39A40A41A42A43A44A45A46A47A48A49A50

M1

M2

CN1A

EU-5650405-5

C1C2C3C4C5C6C7C8C9C10C11C12C13C14C15C16C17C18C19C20C21C22C23C24C25C26C27C28C29C30C31C32C33C34C35C36C37C38C39C40C41C42C43C44C45C46C47C48C49C50

CN1C

EU-5650405-5

MPPC_X_CH01_nMPPC_X_CH01_p MPPC_X_CH02_n

MPPC_X_CH02_p MPPC_X_CH03_nMPPC_X_CH03_p












MPPC_X_CH20_p


MPPC_X_CH42_p






MPPC_X_CH50_p







MPPC_X_CH40_nMPPC_X_CH40_p

























B1B2B3B4B5B6B7B8B9B10B11B12B13B14B15B16B17B18B19B20B21B22B23B24B25B26B27B28B29B30B31B32B33B34B35B36B37B38B39B40B41B42B43B44B45B46B47B48B49B50

CN2B

EU-5650405-5

A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15A16A17A18A19A20A21A22A23A24A25A26A27A28A29A30A31A32A33A34A35A36A37A38A39A40A41A42A43A44A45A46A47A48A49A50

M1

M2

CN2A

EU-5650405-5

C1C2C3C4C5C6C7C8C9C10C11C12C13C14C15C16C17C18C19C20C21C22C23C24C25C26C27C28C29C30C31C32C33C34C35C36C37C38C39C40C41C42C43C44C45C46C47C48C49C50

CN2C

EU-5650405-5

X-Plane Analog Signal @MPPC Side Y-Plane Analog Signal @MPPC Side

CH1 CH2 CH3

CH4 CH5 CH6

CH7 CH8 CH9

CH10 CH11 CH12

CH13 CH14 CH15

CH16 CH17 CH18

CH19 CH20 CH21

CH22 CH23 CH24

CH25 CH26 CH27

CH28 CH29 CH30

CH31 CH32 CH33

CH34 CH35 CH36

CH37 CH38 CH39

CH40 CH41 CH42

CH43 CH44 CH45

CH46 CH47 CH48

CH49 CH50 CH51

CH52 CH53 CH54

CH55 CH56 CH57

CH58 CH59 CH60

CH61 CH62 CH63

CH64 CH65 CH66

CH67 CH68 CH69

CH70 CH71 CH72

CH73 CH74 CH75

CH1 CH2 CH3

CH4 CH5 CH6

CH7 CH8 CH9

CH10 CH11 CH12

CH13 CH14 CH15

CH16 CH17 CH18

CH19 CH20 CH21

CH22 CH23 CH24

CH25 CH26 CH27

CH28 CH29 CH30

CH31 CH32 CH33

CH34 CH35 CH36

CH37 CH38 CH39

CH40 CH41 CH42

CH43 CH44 CH45

CH46 CH47 CH48

CH49 CH50 CH51

CH52 CH53 CH54

CH55 CH56 CH57

CH58 CH59 CH60

CH61 CH62 CH63

CH64 CH65 CH66

CH67 CH68 CH69

CH70 CH71 CH72

CH73 CH74 CH75

MPPC_Y_CH01_nMPPC_Y_CH01_p MPPC_Y_CH02_n

MPPC_Y_CH02_p MPPC_Y_CH03_nMPPC_Y_CH03_p












MPPC_Y_CH20_p


MPPC_Y_CH42_p






MPPC_Y_CH50_p







MPPC_Y_CH40_nMPPC_Y_CH40_p

























1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

F F

E E

D D

C C

B B

A A



Sheet of 114


Designer:

Approved By:


Sheet Title: Pre-Amplifier Inputs XA, XB, XC

CIDL_14_36


169mA

HV_BIAS














































+5VA

-5VA

169mA

HV_BIAS

+5VA

-5VA

169mA

HV_BIAS

+5VA

-5VA

X-Plane Analog Signal Group XA@Pre-Amp Side X-Plane Analog Signal Group XB@Pre-Amp Side X-Plane Analog Signal Group XC@Pre-Amp Side

CH04

CH05

CH03

CH02

CH01

CH19

CH20

CH18

CH17

CH16

CH34

CH35

CH33

CH32

CH31

CH24

CH25

CH22

CH23

CH21

CH27

CH30

CH28

CH29

CH26

CH39

CH40

CH37

CH38

CH36

CH42

CH45

CH43

CH44

CH41

CH09

CH10

CH07

CH08

CH06

CH15

CH13

CH12

CH11

CH14

T49 49T50 50T51 51T52 52T53 53T54 54T55 55T56 56T57 57T58 58T59 59T60 60T61 61T62 62T63 63T64 64T65 65T66 66T67 67T68 68T69 69T70 70T71 71T72 72T73 73T74 74T75 75T76 76T77 77T78 78T79 79T80 80T81 81T82 82T83 83T84 84T85 85T86 86T87 87T88 88T89 89T90 90T91 91T92 92T93 93T94 94T95 95T96 96T97 97T98 98T99 99

T100 100T101 101T102 102T103 103T104 104T105 105T106 106T107 107T108 108T109 109T110 110T111 111T112 112T113 113T114 114T115 115T116 116T117 117T118 118T119 119T120 120

B49169B50170B51171B52172B53173B54174B55175B56176B57177B58178B59179B60180B61181B62182B63183B64184B65185B66186B67187B68188B69189B70190B71191B72192B73193B74194B75195B76196B77197B78198B79199B80200B81201B82202B83203B84204B85205B86206B87207B88208B89209B90210B91211B92212B93213B94214B95215B96216B97217B98218B99219B100220B101221B102222B103223B104224B105225B106226B107227B108228B109229B110230B111231B112232B113233B114234B115235B116236B117237B118238B119239B120240

CN3B

DDR3_DIMM_REC




CN4B

DDR3_DIMM_REC




CN5B

DDR3_DIMM_REC

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

F F

E E

D D

C C

B B

A A



Sheet of 115


Designer:

Approved By:


Sheet Title: Pre-Amplifier Inputs XD, XE

CIDL_14_36


169mA

HV_BIAS

+5VA

-5VA

169mA

HV_BIAS

+5VA

-5VA

X-Plane Analog Signal Group XD@Pre-Amp Side X-Plane Analog Signal Group XE@Pre-Amp Side




CN6B

DDR3_DIMM_REC




CN7B

DDR3_DIMM_REC
















CH67

CH62

CH66

CH61

CH63

CH72

CH65

CH70

CH64

CH69

CH75

CH74

CH71

CH73

CH68






CH60

CH59

CH56

CH58

CH53






CH57

CH50

CH55

CH49

CH54






CH52

CH47

CH48

CH46

CH51

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

F F

E E

D D

C C

B B

A A



Sheet of 116


Designer:

Approved By:


Sheet Title: Pre-Amplifier Inputs YA, YB, YC

CIDL_14_36





CN8B

DDR3_DIMM_REC




CN9B

DDR3_DIMM_REC




CN10B

DDR3_DIMM_REC

169mA

HV_BIAS

+5VA

-5VA

Y-Plane Analog Signal Group YA@Pre-Amp Side

169mA

HV_BIAS

+5VA

-5VA

Y-Plane Analog Signal Group YB@Pre-Amp Side

169mA

HV_BIAS

+5VA

-5VA

Y-Plane Analog Signal Group YC@Pre-Amp Side
















CH03

CH08

CH05

CH01

CH02

CH07

CH11

CH06

CH04

CH10

CH15

CH12

CH13

CH14

CH09
















CH16

CH23

CH20

CH18

CH17

CH22

CH26

CH21

CH19

CH25

CH30

CH27

CH29

CH28

CH24
















CH31

CH38

CH35

CH33

CH32

CH37

CH41

CH36

CH34

CH40

CH45

CH42

CH44

CH43

CH39

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

F F

E E

D D

C C

B B

A A



Sheet of 117


Designer:

Approved By:


Sheet Title: Pre-Amplifier Inputs YD, YE

CIDL_14_36





CN11B

DDR3_DIMM_REC




CN12B

DDR3_DIMM_REC

169mA

HV_BIAS

+5VA

-5VA

Y-Plane Analog Signal Group YD@Pre-Amp Side

169mA

HV_BIAS

+5VA

-5VA

Y-Plane Analog Signal Group YE@Pre-Amp Side






CH59

CH60

CH58

CH56

CH57






CH55

CH53

CH54

CH52

CH50






CH48

CH49

CH47

CH51

CH46
















CH66

CH64

CH62

CH63

CH61

CH70

CH68

CH69

CH67

CH65

CH74

CH75

CH73

CH71

CH72

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

F F

E E

D D

C C

B B

A A



Sheet of 118


Designer:

Approved By:


Sheet Title: X-Plane Digital IO @Pre-Aamp Side

CIDL_14_36


XA_SINXA_SCLKXA_PCLK

XA_SHout

XA_TRG_1XA_TRG_2XA_TRG_3

XA_TRG_4XA_TRG_5

XA_MON_Tim

XA_WR1_EnaXA_WR2_Ena

XA_SmplSI_Any

XA_SR_Clock

point-to-point

XA_WL_CLK_NXA_WL_CLK_P

XA_SXA_STin_PXA_SXA_STin_N

XA_DAC_CS1#XA_DAC_CS2#

point-to-multipoint within plane point-to-multipoint overall10*21 2*38 1210 76

T11T22T33T44T55T66T77T88T99T1010T1111T1212T1313T1414T1515T1616T1717T1818T1919T2020T2121T2222T2323T2424T2525T2626T2727T2828T2929T3030T3131T3232T3333T3434T3535T3636T3737T3838T3939T4040T4141T4242T4343T4444T4545T4646T4747T4848

B1 121B2 122B3 123B4 124B5 125B6 126B7 127B8 128B9 129

B10 130B11 131B12 132B13 133B14 134B15 135B16 136B17 137B18 138B19 139B20 140B21 141B22 142B23 143B24 144B25 145B26 146B27 147B28 148B29 149B30 150B31 151B32 152B33 153B34 154B35 155B36 156B37 157B38 158B39 159B40 160B41 161B42 162B43 163B44 164B45 165B46 166B47 167B48 168

CN3A

DDR3_DIMM_REC

+2V5

XA_Done

X_Ramp

X_CLR

X_SmplSel_S1

X_SmplSel_S2X_SmplSel_S3

X_SmplSel_S4

X_SmplSel_S5

X_SR_Clear

X_SR_SEL

X_RD_CS_S0

X_RD_CS_S1X_RD_CS_S2X_RD_CS_S3

X_RD_CS_S4X_RD_CS_S5

RegCLRX_RD_ENA

X_RD_RS_S0X_RD_RS_S1X_RD_RS_S2

XA_WR_AddrClr

X_DO_1X_DO_2X_DO_3

X_DO_4X_DO_5X_DO_6X_DO_7X_DO_8

X_DO_9X_DO_10X_DO_11


X_DAC_SCLKX_DAC_DIN

280mA+2V5

X-Plane Digital IO Signal Group XA@Pre-Amp Side


B1 121B2 122B3 123B4 124B5 125B6 126B7 127B8 128B9 129


CN4A

DDR3_DIMM_REC

XB_SINXB_SCLKXB_PCLK

XB_SHout

XB_TRG_1XB_TRG_2XB_TRG_3

XB_TRG_4XB_TRG_5

XB_MON_Tim

XB_WR1_EnaXB_WR2_Ena

XB_SmplSI_Any

XB_SR_Clock

XB_WL_CLK_NXB_WL_CLK_P

XB_SXB_STin_PXB_SXB_STin_N

XB_DAC_CS1#XB_DAC_CS2#

+2V5

XB_Done

X_Ramp

X_CLR

X_SmplSel_S1


X_SmplSel_S4

X_SmplSel_S5

X_SR_Clear

X_SR_SEL

X_RD_CS_S0



RegCLRX_RD_ENA


XB_WR_AddrClr

X_DO_1X_DO_2X_DO_3




X_DAC_SCLKX_DAC_DIN

280mA+2V5

X-Plane Digital IO Signal Group XB@Pre-Amp Side


B1 121B2 122B3 123B4 124B5 125B6 126B7 127B8 128B9 129


CN5A

DDR3_DIMM_REC

XC_SINXC_SCLKXC_PCLK

XC_SHout

XC_TRG_1XC_TRG_2XC_TRG_3

XC_TRG_4XC_TRG_5

XC_MON_Tim

XC_WR1_EnaXC_WR2_Ena

XC_SmplSI_Any

XC_SR_Clock

XC_WL_CLK_NXC_WL_CLK_P

XC_SXC_STin_PXC_SXC_STin_N

XC_DAC_CS1#XC_DAC_CS2#

+2V5

XC_Done

X_Ramp

X_CLR

X_SmplSel_S1


X_SmplSel_S4

X_SmplSel_S5

X_SR_Clear

X_SR_SEL

X_RD_CS_S0



RegCLRX_RD_ENA


XC_WR_AddrClr

X_DO_1X_DO_2X_DO_3




X_DAC_SCLKX_DAC_DIN

280mA+2V5

X-Plane Digital IO Signal Group XC@Pre-Amp Side


B1 121B2 122B3 123B4 124B5 125B6 126B7 127B8 128B9 129


CN6A

DDR3_DIMM_REC

XD_SINXD_SCLKXD_PCLK

XD_SHout

XD_TRG_1XD_TRG_2XD_TRG_3

XD_TRG_4XD_TRG_5

XD_MON_Tim

XD_WR1_EnaXD_WR2_Ena

XD_SmplSI_Any

XD_SR_Clock

XD_WL_CLK_NXD_WL_CLK_P

XD_SXD_STin_PXD_SXD_STin_N

XD_DAC_CS1#XD_DAC_CS2#

+2V5

XD_Done

X_Ramp

X_CLR

X_SmplSel_S1


X_SmplSel_S4

X_SmplSel_S5

X_SR_Clear

X_SR_SEL

X_RD_CS_S0



RegCLRX_RD_ENA


XD_WR_AddrClr

X_DO_1X_DO_2X_DO_3




X_DAC_SCLKX_DAC_DIN

280mA+2V5

X-Plane Digital IO Signal Group XD@Pre-Amp Side


B1 121B2 122B3 123B4 124B5 125B6 126B7 127B8 128B9 129


CN7A

DDR3_DIMM_REC

XE_SINXE_SCLKXE_PCLK

XE_SHout

XE_TRG_1XE_TRG_2XE_TRG_3

XE_TRG_4XE_TRG_5

XE_MON_Tim

XE_WR1_EnaXE_WR2_Ena

XE_SmplSI_Any

XE_SR_Clock

XE_WL_CLK_NXE_WL_CLK_P

XE_SXE_STin_PXE_SXE_STin_N

XE_DAC_CS1#XE_DAC_CS2#

+2V5

XE_Done

X_Ramp

X_CLR

X_SmplSel_S1


X_SmplSel_S4

X_SmplSel_S5

X_SR_Clear

X_SR_SEL

X_RD_CS_S0



RegCLRX_RD_ENA


XE_WR_AddrClr

X_DO_1X_DO_2X_DO_3




X_DAC_SCLKX_DAC_DIN

280mA+2V5

X-Plane Digital IO Signal Group XD@Pre-Amp Side

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

F F

E E

D D

C C

B B

A A



Sheet of 119


Designer:

Approved By:


Sheet Title: Y-Plane Digital IO @Pre-Aamp Side

CIDL_14_36


YA_SINYA_SCLKYA_PCLK

YA_SHout

YA_TRG_1YA_TRG_2YA_TRG_3

YA_TRG_4YA_TRG_5

YA_MON_Tim

YA_WR1_EnaYA_WR2_Ena

YA_SmplSI_Any

YA_SR_Clock

YA_WL_CLK_NYA_WL_CLK_P

YA_SYA_STin_PYA_SYA_STin_N

YA_DAC_CS1#YA_DAC_CS2#

+2V5

YA_Done

Y_Ramp

Y_CLR

Y_SmplSel_S1

Y_SmplSel_S2Y_SmplSel_S3

Y_SmplSel_S4

Y_SmplSel_S5

Y_SR_Clear

Y_SR_SEL

Y_RD_CS_S0

Y_RD_CS_S1Y_RD_CS_S2Y_RD_CS_S3

Y_RD_CS_S4Y_RD_CS_S5

RegCLRY_RD_ENA

Y_RD_RS_S0Y_RD_RS_S1Y_RD_RS_S2

YA_WR_AddrClr

Y_DO_1Y_DO_2Y_DO_3

Y_DO_4Y_DO_5Y_DO_6Y_DO_7Y_DO_8

Y_DO_9Y_DO_10Y_DO_11


Y_DAC_SCLKY_DAC_DIN

280mA+2V5

Y-Plane Digital IO Signal Group YA@Pre-Amp Side

YB_SINYB_SCLKYB_PCLK

YB_SHout

YB_TRG_1YB_TRG_2YB_TRG_3

YB_TRG_4YB_TRG_5

YB_MON_Tim

YB_WR1_EnaYB_WR2_Ena

YB_SmplSI_Any

YB_SR_Clock

YB_WL_CLK_NYB_WL_CLK_P

YB_SYB_STin_PYB_SYB_STin_N

YB_DAC_CS1#YB_DAC_CS2#

+2V5

YB_Done

Y_Ramp

Y_CLR

Y_SmplSel_S1


Y_SmplSel_S4

Y_SmplSel_S5

Y_SR_Clear

Y_SR_SEL

Y_RD_CS_S0



RegCLRY_RD_ENA


YB_WR_AddrClr

Y_DO_1Y_DO_2Y_DO_3




Y_DAC_SCLKY_DAC_DIN

280mA+2V5

Y-Plane Digital IO Signal Group YB@Pre-Amp Side

YC_SINYC_SCLKYC_PCLK

YC_SHout

YC_TRG_1YC_TRG_2YC_TRG_3

YC_TRG_4YC_TRG_5

YC_MON_Tim

YC_WR1_EnaYC_WR2_Ena

YC_SmplSI_Any

YC_SR_Clock

YC_WL_CLK_NYC_WL_CLK_P

YC_SYC_STin_PYC_SYC_STin_N

YC_DAC_CS1#YC_DAC_CS2#

+2V5

YC_Done

Y_Ramp

Y_CLR

Y_SmplSel_S1


Y_SmplSel_S4

Y_SmplSel_S5

Y_SR_Clear

Y_SR_SEL

Y_RD_CS_S0



RegCLRY_RD_ENA


YC_WR_AddrClr

Y_DO_1Y_DO_2Y_DO_3




Y_DAC_SCLKY_DAC_DIN

280mA+2V5

Y-Plane Digital IO Signal Group YC@Pre-Amp Side

YD_SINYD_SCLKYD_PCLK

YD_SHout

YD_TRG_1YD_TRG_2YD_TRG_3

YD_TRG_4YD_TRG_5

YD_MON_Tim

YD_WR1_EnaYD_WR2_Ena

YD_SmplSI_Any

YD_SR_Clock

YD_WL_CLK_NYD_WL_CLK_P

YD_SYD_STin_PYD_SYD_STin_N

YD_DAC_CS1#YD_DAC_CS2#

+2V5

YD_Done

Y_Ramp

Y_CLR

Y_SmplSel_S1


Y_SmplSel_S4

Y_SmplSel_S5

Y_SR_Clear

Y_SR_SEL

Y_RD_CS_S0



RegCLRY_RD_ENA


YD_WR_AddrClr

Y_DO_1Y_DO_2Y_DO_3




Y_DAC_SCLKY_DAC_DIN

280mA+2V5

Y-Plane Digital IO Signal Group YD@Pre-Amp Side

YE_SINYE_SCLKYE_PCLK

YE_SHout

YE_TRG_1YE_TRG_2YE_TRG_3

YE_TRG_4YE_TRG_5

YE_MON_Tim

YE_WR1_EnaYE_WR2_Ena

YE_SmplSI_Any

YE_SR_Clock

YE_WL_CLK_NYE_WL_CLK_P

YE_SYE_STin_PYE_SYE_STin_N

YE_DAC_CS1#YE_DAC_CS2#

+2V5

YE_Done

Y_Ramp

Y_CLR

Y_SmplSel_S1


Y_SmplSel_S4

Y_SmplSel_S5

Y_SR_Clear

Y_SR_SEL

Y_RD_CS_S0



RegCLRY_RD_ENA


YE_WR_AddrClr

Y_DO_1Y_DO_2Y_DO_3




Y_DAC_SCLKY_DAC_DIN

280mA+2V5

Y-Plane Digital IO Signal Group YD@Pre-Amp Side


B1 121B2 122B3 123B4 124B5 125B6 126B7 127B8 128B9 129


CN8A

DDR3_DIMM_REC


B1 121B2 122B3 123B4 124B5 125B6 126B7 127B8 128B9 129


CN9A

DDR3_DIMM_REC


B1 121B2 122B3 123B4 124B5 125B6 126B7 127B8 128B9 129


CN10A

DDR3_DIMM_REC


B1 121B2 122B3 123B4 124B5 125B6 126B7 127B8 128B9 129


CN11A

DDR3_DIMM_REC


B1 121B2 122B3 123B4 124B5 125B6 126B7 127B8 128B9 129


CN12A

DDR3_DIMM_REC

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

F F

E E

D D

C C

B B

A A



Sheet of 1110


Designer:

Approved By:


Sheet Title: SCROD rev.A4 Interface

CIDL_14_36


12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061

6263646566676869707172737475767778798081828384858687888990919293949596979899

100101102103104105106107108109110111112113114115116117118119120

CN13

FX8C-120P-SV6(91)

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061

6263646566676869707172737475767778798081828384858687888990919293949596979899

100101102103104105106107108109110111112113114115116117118119120

CN14

FX8C-120P-SV6(91)

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061

6263646566676869707172737475767778798081828384858687888990919293949596979899

100101102103104105106107108109110111112113114115116117118119120

CN15

FX8C-120P-SV6(91)

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061

6263646566676869707172737475767778798081828384858687888990919293949596979899

100101102103104105106107108109110111112113114115116117118119120

CN16

FX8C-120P-SV6(91)

J1 J2J3 J4

+5VSC +5VSC

XA_WL_CLK_NXA_WL_CLK_P

XA_SXA_STin_PXA_SXA_STin_N

XB_WL_CLK_NXB_WL_CLK_P

XB_SXB_STin_PXB_SXB_STin_N

XC_WL_CLK_NXC_WL_CLK_P

XC_SXC_STin_PXC_SXC_STin_N

XD_WL_CLK_NXD_WL_CLK_P

XD_SXD_STin_PXD_SXD_STin_N

XE_WL_CLK_NXE_WL_CLK_P

XE_SXE_STin_PXE_SXE_STin_N

YA_WL_CLK_NYA_WL_CLK_P

YA_SYA_STin_PYA_SYA_STin_N

YB_WL_CLK_NYB_WL_CLK_P

YB_SYB_STin_PYB_SYB_STin_N

YC_WL_CLK_NYC_WL_CLK_P

YC_SYC_STin_PYC_SYC_STin_N

YD_WL_CLK_NYD_WL_CLK_P

YD_SYD_STin_PYD_SYD_STin_N

YE_WL_CLK_NYE_WL_CLK_P

YE_SYE_STin_PYE_SYE_STin_N

XA_SINXA_SCLK

XA_PCLK

XA_SHout

XA_TRG_1XA_TRG_2XA_TRG_3

XA_TRG_4XA_TRG_5

XA_MON_Tim

XA_WR1_Ena

XA_WR2_Ena

XA_SmplSI_Any

XA_SR_Clock

XA_DAC_CS1#

XA_DAC_CS2#

XA_Done

X_Ramp

X_CLR

X_SmplSel_S1


X_SmplSel_S4

X_SmplSel_S5

X_SR_Clear

X_SR_SEL


X_RD_CS_S2


RegCLR

X_RD_ENA

X_RD_RS_S0

X_RD_RS_S1X_RD_RS_S2

XA_WR_AddrClr

X_DO_1X_DO_2

X_DO_3

X_DO_4X_DO_5

X_DO_6X_DO_7

X_DO_8X_DO_9 X_DO_10

X_DO_11

X_DO_12

X_DO_13

X_DO_14

X_DO_15

X_DO_16

X_DAC_SCLK

X_DAC_DIN XB_SIN

XB_SCLK

XB_PCLK

XB_SHout

XB_TRG_1

XB_TRG_2XB_TRG_3XB_TRG_4

XB_TRG_5

XB_MON_Tim

XB_WR1_EnaXB_WR2_Ena

XB_SmplSI_Any

XB_SR_Clock

XB_DAC_CS1#XB_DAC_CS2#

XB_Done

XB_WR_AddrClr

XC_SINXC_SCLK

XC_PCLK

XC_SHout

XC_TRG_1

XC_TRG_2XC_TRG_3XC_TRG_4

XC_TRG_5

XC_MON_Tim

XC_WR1_EnaXC_WR2_Ena

XC_SmplSI_Any

XC_SR_Clock

XC_DAC_CS1#

XC_DAC_CS2#XC_Done

XC_WR_AddrClr

XD_SIN

XD_SCLK

XD_PCLK

XD_SHout

XD_TRG_1XD_TRG_2XD_TRG_3

XD_TRG_4XD_TRG_5

XD_MON_Tim

XD_WR1_Ena

XD_WR2_Ena

XD_SmplSI_Any

XD_SR_Clock

XD_DAC_CS1#XD_DAC_CS2#

XD_Done

XD_WR_AddrClrXE_SIN

XE_SCLK

XE_PCLK

XE_SHout XE_TRG_1XE_TRG_2XE_TRG_3

XE_TRG_4XE_TRG_5

XE_MON_Tim

XE_WR1_Ena

XE_WR2_Ena

XE_SmplSI_Any

XE_SR_ClockXE_DAC_CS1#XE_DAC_CS2#

XE_Done

XE_WR_AddrClr

YA_SIN

YA_SCLK

YA_PCLK

YA_SHout

YA_TRG_1YA_TRG_2

YA_TRG_3YA_TRG_4YA_TRG_5

YA_MON_TimYA_WR1_EnaYA_WR2_Ena

YA_SmplSI_Any

YA_SR_Clock

YA_DAC_CS1#YA_DAC_CS2#

YA_Done

Y_Ramp

Y_CLR

Y_SmplSel_S1

Y_SmplSel_S2

Y_SmplSel_S3

Y_SmplSel_S4

Y_SmplSel_S5

Y_SR_Clear

Y_SR_SEL

Y_RD_CS_S0

Y_RD_CS_S1


Y_RD_CS_S4

Y_RD_CS_S5

Y_RD_ENA

Y_RD_RS_S0

Y_RD_RS_S1

Y_RD_RS_S2YA_WR_AddrClr

Y_DO_1

Y_DO_2Y_DO_3

Y_DO_4

Y_DO_5Y_DO_6

Y_DO_7Y_DO_8

Y_DO_9

Y_DO_10

Y_DO_11

Y_DO_12Y_DO_13

Y_DO_14

Y_DO_15

Y_DO_16

Y_DAC_SCLK

Y_DAC_DIN

YB_SINYB_SCLK

YB_PCLK

YB_SHout

YB_TRG_1YB_TRG_2

YB_TRG_3YB_TRG_4

YB_TRG_5YB_MON_TimYB_WR1_Ena

YB_WR2_Ena

YB_SmplSI_Any

YB_SR_Clock

YB_DAC_CS1#YB_DAC_CS2#

YB_Done

YB_WR_AddrClr

YC_SIN

YC_SCLK

YC_PCLK

YC_SHout

YC_TRG_1

YC_TRG_2

YC_TRG_3

YC_TRG_4YC_TRG_5

YC_MON_Tim

YC_WR1_Ena

YC_WR2_Ena

YC_SmplSI_Any

YC_SR_Clock

YC_DAC_CS1#

YC_DAC_CS2#

YC_Done

YC_WR_AddrClr

YD_SIN

YD_SCLKYD_PCLK

YD_SHout

YD_TRG_1

YD_TRG_2

YD_TRG_3YD_TRG_4

YD_TRG_5YD_MON_TimYD_WR1_Ena

YD_WR2_Ena

YD_SmplSI_Any

YD_SR_Clock

YD_DAC_CS1#

YD_DAC_CS2#

YD_Done

YD_WR_AddrClr

YE_SINYE_SCLK

YE_PCLK

YE_SHout

YE_TRG_1YE_TRG_2YE_TRG_3

YE_TRG_4YE_TRG_5

YE_MON_Tim

YE_WR1_Ena

YE_WR2_Ena

YE_SmplSI_Any

YE_SR_Clock

YE_DAC_CS1#YE_DAC_CS2#

YE_Done

YE_WR_AddrClr

SDASCL

R1 12

k

R212

k

+3V3SC

FPGA_GCLK_PFPGA_GCLK_N

FPGA_GCLK_CTRL

2V5EN

-5VAEN

HVEN+5VAEN

HVDAC_SDIHVDAC_SCK

HVDAC_CS#

GPIO01

GPIO02GPIO03GPIO04

GPIO05GPIO06GPIO07

GPIO08GPIO09

GPIO10GPIO11GPIO12

GPIO13GPIO14GPIO15

GPIO16GPIO17GPIO18

GPIO19GPIO20GPIO21

GPIO22GPIO23GPIO24

+3V3SC

+3V3SC

+3V3SC

+3V3SC

+3V3SC

+3V3SC

+3V3SC

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

F F

E E

D D

C C

B B

A A



Sheet of 1111


Designer:

Approved By:


Sheet Title: Diagnostics, Power Supply and Mechanical

CIDL_14_36


SCROD

PLANE X

Addr/Therm1

GND2Vdd3

SCL 4

EVENT 5

SDA 6U6

STTS751-1WB3F

Addr/Therm1

GND2Vdd3

SCL 4

EVENT 5

SDA 6U7

STTS751-1WB3F

PLANE Y

Addr/Therm1

GND2Vdd3

SCL 4

EVENT 5

SDA 6U8

STTS751-1WB3F

ADDR1

RDY2

GND 3

AIN0 4

AIN1 5

AIN2 6

AIN3 7

Vdd8

SDA9SCL10

U1

ADS1015IDGST

1

2

3

4

5

6

K1

MSTBV6R5.08VGND

+2V5

+5VA

-5VA

+5VSC

HV_BIAS

+3V3SCC

210

0nF

R2320k

R1912k

ADD=1001001

ADD=0111000

R1133k

R13

12k+3V3SC

R20

12k+3V3SC

R24

12k+3V3SC

+3V3SC

C3

100n

F

+3V3SC

C4

100n

F

ADD=0111001

ADD=1001000

R812k

R912k

SDASCL

+3V3SC

R1612k

R1712k

SDASCL

+3V3SC

R2112k

R2212k

SDASCL

+3V3SC

R712k

R612k

SDASCL

+3V3SC

+3V3SC

C1

100n

F

+2V5

+5VA

-5VA

+5VSC

HV_BIAS

R44k7

R3

1k

R104k7

2.06V

R5

5k6

2.06V

R144k7

2.16V

4.524V

-4.50V

R12

2k

R1847k

2.16V90V

R15

2M0

R1

RE2

DE3

D4 GND 5

A 6

B 7

Vcc 8U2

NB3N206SDG

+3V3SC

C5100nF

R254k7

+3V3SC

FPGA_GCLK_CTRL

Logic High enables the driver

Logic Low enables the receiver

K3

135-3701-201 C6100nF

FPGA_GCLK_PFPGA_GCLK_N

R26100R

RF_IO

1 23 45 67 89 10

CN17

PH-2X5-RA

1 23 45 67 89 10

11 1213 1415 1617 1819 2021 2223 2425 26

K2

PINHEADER2X13V

+3V3SC

GPIO01GPIO02GPIO03GPIO04GPIO05GPIO06GPIO07GPIO08GPIO09

GPIO10GPIO11GPIO12GPIO13GPIO14GPIO15GPIO16GPIO17GPIO18GPIO19GPIO20GPIO21 GPIO22

GPIO23GPIO24

HVDAC_CS# HVDAC_SCKHVDAC_SDI -5VAEN

2V5EN HVEN+5VAEN

Temperature SensorsDiagnostic ADC

General Purpose IO Connector

Power Supply

PS Control

PS Input

General Purpose Bidirectional Clock Buffer

Mechanical

FID1

FIDRTB

FID2

FIDRTB

FID3

FIDRTB

PCB

200MHz Max R2830R

R27

18R

44uA

Bill Of Material Compact SciFi Tracker

Source Data From: IDL_14_36_C.PrjPcb

Project: MB_SciFi_Tracker

Revision: C

Variant: None

IDLAB Design #: IDL_14_36 High Energy Physics Group

Report Date: 06:46:36 PM13-Oct-14 Instrumentation Development Lab

Print Date: 18:46 13-10-2014

Note: The components listed in this document can be purchased from different suppliers, following the original manufacturer's part number.

Standard components (resistors and capacitors) can be produced by different manufacturers, however they must adhere to the quality requirements specified for the original components defined in this document.

For all other components, the purchasing and assembly of alternatives, not specified in this document, must be authorized by the Instrumentation Development Laboratory

# Designator Quantity Description Comment Manufacturer Manufacturer No Supplier Supplier No Price

1 PCB 1 Printed Circuit Board 8 layer PCB... PCB Universe IDL_14_36 0

2 FID1, FID2, FID3 3 Fiducial top & bottom round open mask FIDRTB 0

3 R3 1 Chip Resistor 0603 1k Panasonic ERJ-3EKF1001V Digi-Key P1.00KHCT-ND 0.1

4 R4, R10, R14, R25 4 Chip Resistor 0603 4k7 Panasonic ERJ-3EKF4701V Digi-Key P4.70KHCT-ND 0.4

5 R5 1 Chip Resistor 0603 5k6 Vishay B. MCT06030C5601FP500 Digi-Key MCT0603-5.60K-CFCT-ND 0.08



8 R15 1 Chip Resistor 0603 2M0 Panasonic ERJ-3EKF2004V Digi-Key P2.00MHCT-ND 0.1



11 R26 1 Chip Resistor 0402 100R Panasonic ERJ-2RKF1000X Digi-Key P100LCT-ND 0.1

12 R27 1 Chip Resistor 0603 18R Panasonic ERJ-3EKF18R0V Digi-Key P18.0HCT-ND 0.1

13 R28 1 Chip Resistor 0603 30R Panasonic ERJ-3EKF30R0V Digi-Key P30.0HCT-ND 0.1

14 R1, R2, R6, R7, R8, R9, R13, R16, R17, R19, R20,

R21, R22, R24

14 Chip Resistor 0805 Precision 12k Panasonic ERJ-3EKF1202V Digi-Key P12.0KHCT-ND 1.4

15 C1, C2, C3, C4, C5, C6 6 Capacitor chip ceramic 0402 100nF Murata GRM155R71C104KA88D Digi-Key 490-3261-1-ND 0.6

16 U1 1 ADC 12bit 3.3ksps ADS1015IDG

ST

Texas Instruments ADS1015IDGST Digi-Key 296-25227-1-ND 3.42

17 U2 1 3.3 V Differential Multipoint Low Voltage M-LVDS

Driver Receiver

NB3N206SD

G

ON Semiconductor NB3N206SDG Digi-Key NB3N206SDGOS-ND 2.39

18 U6, U7, U8 3 2.25 V low-voltage local digital temperature sensor STTS751-

1WB3F

STMelectronics STTS751-1WB3F Digi-Key 497-10662-1-ND 5.4

19 CN13, CN14, CN15, CN16 4 Hirose Connector 120pin SMD R0.6mm male FX8C-120P-

SV6(91)

Hirose FX8C-120P-SV6(91) Digi-Key H11527-ND 22.76

20 CN17 1 PIN HEADER 2x5 R2.54mm Right-Angle PH-2X5-RA CNC Tech 3020-10-0200-00 Digi-Key 3020-10-0200-00 0.61

21 K1 1 Combicon header 6 pin vertical closed R5.08mm MSTBV6R5.0

8V

Phoenix Contact 1755778 Digi-Key 277-1154-ND 1.67

22 K2 1 PIN HEADER 2x13 R2.54mm PINHEADER

2X13V

FCI 68602-126HLF Digi-Key 609-3367-ND 1.03

23 K3 1 MMCX connector PCB vertical Jack 135-3701-201 Emerson 135-3701-201 Digi-Key J597-ND 4.37

24 CN1, CN2 2 150pin Europacard 2.54mm Connector EU-5650405-

5

TE Connectivity 5650405-5 Digi-Key A32848-ND 17.48

25 CN3, CN4, CN5, CN6, CN7, CN8, CN9, CN10,

CN11, CN12

10 DDR3 DIMM PCB Socket DDR3_DIMM

_REC

TE Connectivity 1-1932000-1 Digi-Key A97917-ND 40.3

Total

Quantity Notes:

Total

Price

Total components: 63 102.81

Approved

UHM-HEPG-ID Laboratory Bill of Materials by Supplier-IDL_14_36_C.xlsx 13-10-14 Page 1 of 1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

F F

E E

D D

C C

B B

A A



Sheet of 111


Designer:

Approved By:


Sheet Title: Mother Board for Compact Scifi Tracker

CIDL_14_36


Documentation for PCB:

Compact SciFi Tracker

IDL num:Board Name MB_SciFi_Tracker

IDL_14_36Revision: C

Project Name:

Instrumentation Development Laboratory2505 Correa Road, Honolulu, HI 96822

High Energy Physics Group

Documents

B B High Energy Physics Group Instrumentation …idlab/taskAndSchedule... · B B High Energy Physics Group, Instrumentation Development Lab C CH65