Atmel | SMART SAMA5D4 Seriesww1.microchip.com/downloads/en/DeviceDoc/Atmel-44005-32-bit-Cortex-A5-Microcontroller...J13 JTAG, 20 pin IDC connector J20 EDBG USB connector J9 Micro-SD

SMART

Atmel | SMART SAMA5D4 Series

SAMA5D4 Xplained Ultra Evaluation Kit

USER GUIDE

Introduction

This user guide introduces the Atmel® SAMA5D4 Xplained Ultra evaluation kit(SAMA5D4-XULT) and describes the development and debugging capabilities forapplications running on the Atmel | SMART SAMA5D4 ARM® Cortex®-A5-basedembedded microprocessor unit (eMPU).

Scope

This guide provides details on the SAMA5D4-XULT. It is made up of four mainsections:

Section 1. describes the evaluation kit content and its main features.

Section 2. provides instructions to power up the SAMA5D4-XULT board.

Section 3. provides an overview of the SAMA5D4-XULT board.

Section 4. describes the SAMA5D4-XULT board components.

Atmel-44005C-ATARM-SAMA5D4-Xplained-Ultra-User Guide_11-Aug-15

Kit Contents

The SAMA5D4-XULT includes:

Board

One SAMA5D4-XULT board

Cables

One Micro-AB type USB cable

Welcome letter

SAMA5D4 Xplained Ultra [USER GUIDE]Atmel-44005C-ATARM-SAMA5D4-Xplained-Ultra-User Guide_11-Aug-15

2

3SAMA5D4 Xplained Ultra [USER GUIDE]Atmel-44005C-ATARM-SAMA5D4-Xplained-Ultra-User Guide_11-Aug-15

Table of Contents

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Scope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Kit Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1. Evaluation Kit Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

1.1 Electrostatic Warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

1.2 Power Supply Warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2. Power Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.1 Power up the Board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.2 Sample Code and Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3. Hardware Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3.2 Equipment List. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3.3 Board Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4. Board Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

4.1 Board Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

4.2 Function Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4.3 PIO Usage and Interface Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

4.4 SAMA5D4-XULT Board Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

5. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72


4

1. Evaluation Kit Specifications

1.1 Electrostatic Warning

1.2 Power Supply Warning

Table 1-1. Evaluation Kit Specifications

Characteristic Specifications

Board SAMA5D4-XULT

Board supply voltageUSB powered

5VDC from optional jack connector or from “Arduino shield”

TemperatureOperating 0°C to +70°C

Storage -40°C to +85°C

Relative Humidity 0 to 90% (non-condensing)

Dimensions: Main board 135 × 88 × 20 mm

RoHS status Compliant

Board Identification SAMA5D4-XULT

WARNINGESD-Sensitive Electronic Equipment!

The evaluation kit is shipped in a protective anti-static package. The board system must not be subject to high electrostatic potentials.

We strongly recommend using a grounding strap or similar ESD protective device when handling the board in hostile ESD environments (offices with synthetic carpet, for example). Avoid touching the component pins or any other metallic element on the board.

Electrostaticsensitivedevice

WARNINGHardware Power Supply Limitation

Using a power adapter greater than 5Vcc (e.g., the 12Vcc power adapters from other kits such as Arduino kits) may damage the board.

WARNINGHardware Power Budget

Using the USB as the main power source (max. 500 mA) is acceptable only with the use of the on-board peripherals and low-power LCD extension.

When external peripheral or add-on boards need to be powered, we recommend the use of an external power adapter connected to the J4 DC jack (can provide up to 1.2A on the 3.3V node).


2. Power Source

Several options are available to power up the SAMA5D4-XULT board.

The board can be:

USB-powered through the USB Micro-AB connector (J11 - default configuration).

Powered through an external AC-to-DC adapter connected via a 2.1 mm center-positive plug into the optional power jack of the board (J4). The recommended output voltage range of the power adapter is 5V at 2A.

Powered through the Arduino shield.

Powered through the USB Micro-AB connector on the Atmel Embedded Debugger (EDBG) interface (J20).

2.1 Power up the Board

Unpack the board, taking care to avoid electrostatic discharge. Connect the USB Micro-AB cable to the connector(J11). Then connect the other end of the cable to a free USB port of your PC.

2.2 Sample Code and Technical Support

After boot up, you can run some sample code or your own application on the development kit. You can downloadsample code and get technical support from the Atmel website.

Linux software and demos can be found on the website Linux4SAM.

WARNINGUnlike Arduino Uno boards, the SAMA5D4-XULT board runs at 3.3V. The maximum voltage that the I/O pins can tolerate is 3.3V. Providing higher voltages (e.g., 5V) to an I/O pin could damage the board.

Table 2-1. Electrical Characteristics

Electrical Parameter Values

Input voltage 5 VCC

Maximum Input voltage (limits) 6 VCC

Max DC 3v3 current available 1.2A

I/O Voltage 3.3V only


6

3. Hardware Overview

3.1 Introduction

The Atmel SAMA5D4-XULT is a fully-featured evaluation platform for the Atmel SAMA5D4 series ARM-basedembedded microprocessor units (eMPU). It allows users to extensively evaluate, prototype and create application-specific designs.

3.2 Equipment List

The SAMA5D4-XULT board is based on the integration of an ARM Cortex-A5-based microprocessor with externalmemory, one Ethernet physical layer transceiver, two SD/MMC interfaces, two host USB ports and one deviceUSB port, one 24-bit RGB LCD and HDMI interface and debug interfaces.

Seven headers, compatible with Arduino R3 (Uno, Due) and two Xplained headers are available for various shieldconnections.

3.3 Board Features

Table 3-1. Board Specifications

Characteristics Specifications

Dimensions (L x W x H) 135 × 88 × 20 mm

Processor SAMA5D44 (361-ball BGA package), 16x16 mm body, pitch 0.8 mm

OscillatorsMPU, EDBG: 12 MHz quartzRTC: 32.768 kHzPHY: 25 MHz

Main Memory2 x DDR2 2 Gb 16 Meg x 16 x 8 banks (total 4 Gbit = 512 MB)1 x SLC NAND Flash 4 Gb 8-bit data (total 4 Gbit = 512 MB)

Accessory memoriesOne optional Serial EEPROM SPIOne EEPROM with Mac Address and Serial Number

SD/MMCOne 4-bit SD card connectorOne 4-bit Micro-SD card connector

USBTwo USB Hosts with power switchOne Micro-AB USB device

Display

One LCD interface connector, LCD TFT Controller with overlay, alpha-blending, rotation, scaling and color space conversion

One HDMI interface and connector

Ethernet One Ethernet PHY (RMII 10/100MHz)

Debug portOne JTAG interface connectorOne EDBG interfaceOne serial DBGU interface (3v3 level)

Expansion connectorArduino R3 compatible set of connectorsXPRO set of connectors

Board supply voltage5V from USB, power jack, and Arduino shieldOn-board power regulation by PMIC

Battery On-board battery socket

User interfaceReset, Wake-up and free user push buttonOne red user/power LEDOne blue user LED

4. Board Components

4.1 Board Overview

The fully-featured SAMA5D4-XULT board integrates multiple peripherals and interface connectors, as shown inFigure 4-1.

Figure 4-1. SAMA5D4-XULT Board Overview

ATSAMA5D44 CU

1427C AP6R245.00A ARM

EDBG

J17 PIO Expansion

2Gb DDR2 Memory

2Gb DDR2 Memory

4Gb Nand Flash Memory

System Buttons

EDBG LCD Connector

HDMI Driver & Interface

10/100 Ethernet

J18 PIO Expansion

Free User Push Button

ADC Inputs and CAN Interfaces

Debug Interface

SAMA5D44

Voltages and Reset Interface

ADC Inputs Expansion

Optional Supply Input

USB A DeviceSupply Input

SPI Interface

J19 PIO Expansion

J15 PIO Expansion

EDBG Interface

JTAG Interface

XPLAINED PROExpansion

G

1P

ATS

1

USB Host InterfacesU

H

L tor

D

F

AD

S

n

PLAINED PROExpansion Jn

J

y

ut

y

4

s

e

n

G

ceut

ce

e

XEx


Table 4-1 describes the interface connectors on the SAMA5D4-XULT.

Table 4-1. SAMA5D4-XULT Board Interface Connectors

Connector Interfaces to

J4 Main power supply

J11 USB A Device. Supports USB device using a type Micro-AB connector

J16 USB Host B and C. Supports USB host using a stacked type A connector

J1 Serial DBGU (3.3V level)

J13 JTAG, 20 pin IDC connector

J20 EDBG USB connector

J9 Micro-SD connector

J24 SD/MMC connector

J12 Ethernet ETH0

J2Expansion connector with all LCD controller signals for display module connection (QTouch®, TFT LCD display with touchscreen and backlight)

J5 HDMI connector type A

BAT1 CR1225 Battery holder

J6, J7, J8, J14, J15, J17, J18, J19

Expansion connectors with Arduino R3 compatible PIO signals

J21, J22, J23 Expansion connectors Xplained

J3 JTAG EDBG (not populated)

J10 PIOBU extension (not populated)


8

4.2 Function Blocks

4.2.1 Processor

The Atmel® | SMART SAMA5D4 Series is a high-performance, power-efficient ARM® Cortex®-A5 processor MPUcapable of running up to 600 MHz. It integrates the ARM NEON™ SIMD engine for accelerated signal processing,multimedia and graphics as well as a 128 KB L2-Cache for high system performance. The device features theARM TrustZone® enabling a strong security perimeter for critical software, as well as several hardware securityfeatures. The device also features advanced user interface and connectivity peripherals.

The SAMA5D4 devices have three software-selectable low-power modes: Idle, Ultra Low-power, and Backup. InIdle mode, the processor is stopped while all other functions can be kept running at normal operating busfrequency. In Ultra Low-power mode, the processor is stopped while all other functions can be kept running atminimum operating bus frequency. In Backup mode, only the real-time clock, real-time timer, backup SRAM,backup registers, and wake-up logic are running.

The SAMA5D4 features an internal multi-layer bus architecture associated with 32 DMA channels to sustain thehigh bandwidth required by the processor and the high-speed peripherals. The device supportsDDR2/LPDDR/LPDDR2 and SLC/MLC NAND Flash memory with 24-bit ECC.

The comprehensive peripheral set includes a 720p hardware video decoder, an LCD controller with overlays forhardware-accelerated image composition, a resistive touch screen function, and a CMOS sensor interface.Connectivity peripherals include a dual 10/100 Ethernet MAC with IEEE1588, three HS USB ports, UARTs, SPIsand I2Cs.

Security features includes an "on-the-fly" encryption-decryption process from the external DDR memory, tamperdetection pins, secure storage of critical data, an integrity check monitor (ICM) to detect modification of thememory contents and a secure boot. The product also includes a dedicated coprocessor for public keycryptography such as RSA and elliptic curves algorithms (ECC), as well as AES, 3DES, SHA function and TRNG.These features permit to protect the system against counterfeiting, to safeguard sensitive data, authenticate safeprogram or secure external data transfers.

The SAMA5D4 series is optimized for control panel/HMI applications needing video playback and applications thatrequire high levels of connectivity in the industrial and consumer market. Its security features make the SAMA5D4well suited for secure gateways or for the IoT.

4.2.2 Power Supply Topology and Power Distribution

4.2.2.1 Power Lines

Refer to the Power Supplies and Power Supply Connections tables in the SAMA5D4 datasheet.

4.2.2.2 Power-up and Power-down Considerations

Power-up and power-down considerations are described in section “Power Considerations” of the SAMA5D4Series datasheet.


4.2.2.3 SAMA5D44 Power Supplies Summary

Notes: 1. Both VDDIOP and VDDANA must rise at the same time due to internal constraints.

Table 4-2. SAMA5D44 Power Supplies

NameVoltage Range, Nominal

AssociatedGround Powers

VDDCORE 1.62–1.98V, 1.8V GNDCORE

Regulator that generates core power supply on VCCCORE

10 µF decoupling capacitor is to be connected to VCCCORE

MUST BE ESTABLISHED AFTER VDDIOP OR AT THE SAME TIME

VCCCORE 1.1–1.32V, 1.2V GNDCORE Core

VDDIODDR1.70–1.90V, 1.8V

GNDIODDRDDR2 Interface I/O lines

1.14–1.30V, 1.2V LP-DDR2 Interface I/O lines

VDDIOM1.65–1.95V, 1.8V

3.0–3.6V, 3.3VGNDIOM NAND and HSMC Interface I/O lines

VDDIOP (1) 3.0–3.6V, 3.3V GNDIOPPeripherals I/O lines

MUST BE ESTABLISHED PRIOR TO VDDCORE

VDDBU 1.88–2.12V, 2V GNDBUSlow Clock oscillator, the internal 64 kHz RC and a part of the System Controller

MUST BE ESTABLISHED FIRST

VDDUTMIC 1.1–1.32V, 1.2V GNDUTMIUSB device and host UTMI+ core and the UTMI PLL

MUST be connected to VCCCORE

VDDUTMII 3.0–3.6V, 3.3V GNDUTMI USB device and host UTMI+ interface

VDDPLLA 1.1–1.32V, 1.2V GNDPLLPLLA cell

MUST be connected to VCCCORE

VDDOSC 3.0–3.6V GNDOSC Main Oscillator cell

VDDANA(1) 3.0–3.6V, 3.3V GNDANAAnalog parts

MUST be connected to VDDIOP with filtering

VDDFUSE 2.25–2.75V, 2.5V GNDFUSEFuse box for programming

VDDFUSE must be 2.5V or 0V and must not be left floating


10

4.2.2.4 ACT8865 Power Management IC

The ACT8865 is a complete, cost-effective and highly-efficient ActivePMU™ power management solution,optimized to provide a single-chip power solution and voltage sequencing for Atmel SAMA5D3/SAMA5D4 andSAM9 series MPUs. It also meets the control requirements of these devices.

The ACT8865 features three step-down DC/DC converters and four low-noise, low-dropout linear regulators.

Figure 4-2. Board Power Management

Supply Group Configuration

The ACT8865 provides:

All power supplies required by the SAMA5D44 device:

1.8V VDDCORE

1.8V VDDIODDR

2.0V VDDBU

3.3V VDDIOP, VDDIOM, VDDANA, VDDUTMII

2.5V VDDFUSE

Power supplies to external chips on the main board:

1.2V HDMI

3.3V Ethernet PHY, HDMI, EDBG

WARNINGThere is a known error on the ACT8865 I²C implementation. The port must be shut off after configuration or problems may occur with devices using the same I²C channel, e.g., TM43xx LCD display.

Refer to the ACT8865 datasheet at www.active-semi.com for more details.

VDDREF

PWRHLD

PWRHLD

VDDREF

VDDCORE

VDDIODDR

VCC_1V8

1V2_HDMI

VCC_3V3

VCC_3V3

FUSE_2V5

VDDANA

VCC_5V

VOUT6

VDDIOP

VDDIOM

VDDUTMII

VDDIODDR_MPU

VCC_2V

VOUT7

VCC_EDBG

SHDN[9]

WKUP[9]

PMIC_IRQ_PE25[9]

PMIC_TWCK3_PC26[8]PMIC_TWD3_PC25[8]

NRST_3V3[10,12,14,15]

(3V3)

(1V8)

(2V5)

Place TP13 and TP14 to Bottom.

WAKE UP

RESETBP3 Tact SwitchBP3 Tact Switch

Q1IRLML2502

Q1IRLML2502

1

3

2

C1754.7uFC1754.7uF

C2510uFC2510uF

R17 1KR17 1K

TP13SMDTP13SMD

C1764.7uFC1764.7uF

L4 2.2uHL4 2.2uH

R22 0RR22 0R

C144.7uFC144.7uF

R54 0RR54 0R

U2 ACT8865QI305-TU2 ACT8865QI305-T

VP131VP226VP316

VDDREF23

VSEL20

NC118

PWREN17

nPBSTAT13

nIRQ12

nRSTO11

PWRHLD10

SCL21SDA22

REFBP32

nPBIN9

INL45 5INL67 6

SW1 30OUT1 1

SW2 27OUT2 24

SW3 15OUT3 19

OUT4 3

OUT5 4

OUT6 7

OUT7 8

GA

2

GP

129

GP

228

GP

314

EP

33

NC225

C3100nFC3100nF

L7

180ohm at 100MHz

L7

180ohm at 100MHz

1 2

R78 0RR78 0R

R18

10K

R18

10K

JP4DNP(Header 1X2)

JP4DNP(Header 1X2)

1 2

C2410uFC2410uF

R2 49.9K 1%R2 49.9K 1%

C164.7uFC164.7uF

C110uFC110uF

L26

180ohm at 100MHz

L26

180ohm at 100MHz

1 2

JP2DNP(Header 1X2)

JP2DNP(Header 1X2)

1 2L1 2.2uHL1 2.2uH

C10DNP(100nF)C10DNP(100nF)

C124.7uFC124.7uF

L24

180ohm at 100MHz

L24

180ohm at 100MHz

1 2

C1942.2uFC1942.2uF

C1902.2uFC1902.2uF

L3 2.2uHL3 2.2uH

R1100K 1%R1100K 1%

TP14SMDTP14SMD

C210uFC210uF

C184.7uFC184.7uF

R55 1R 1%R55 1R 1%

C2710uFC2710uF

R410 0RR410 0R

C410nFC4

10nF

R19

10K

R19

10K

L19

180ohm at 100MHz

L19

180ohm at 100MHz

1 2

BP2 Tact SwitchBP2 Tact Switch

C2610uFC2610uF

C6 100nFC6 100nF

C5 DNP(100nF)C5 DNP(100nF)

C1874.7uFC1874.7uF

JP5DNP(Header 1X2)

JP5DNP(Header 1X2)

1 2

C17747nFC17747nF

R1649.9K 1%R1649.9K 1%

JP3DNP(Header 1X2)

JP3DNP(Header 1X2)

1 2

L6

180ohm at 100MHz

L6

180ohm at 100MHz

1 2

C191uFC191uF

C2810uFC2810uF


4.2.2.5 Power Options

There are several power options for the SAMA5D4-XULT board.

The power sources are selected by a set of 0R resistors. The USB-powered operation is the default configuration.It comes from the USB device port connected to a PC or a 5V DC supply. The USB supply is sufficient to power theboard in most applications. It is important to note that when the USB supply is used, the USB Host ports do notfunction. If USB Host ports are required for the application, it is recommended that a DC supply be used.

Figure 4-3 provides the schematics of power options.

Figure 4-3. Input Powering Scheme Option

Note: USB-powered operation eliminates additional wires and batteries. It is the preferred mode of operation for any project that requires only a 5V source at up to 500 mA.

4.2.2.6 Wall Supply Source

A wall supply can be used to provide power to the board. A regulated 5V DC supply of at least 2A is required. IfUSB ports and expansion headers are used, a rating of 3A is preferred. A 2.1 mm plug with a center-hotconfiguration is required.

If the USB host ports or expansion board Arduino shields are used, additional current is necessary.

If the DC load required is greater than 500 mA per port, a higher current supply must be used.

4.2.2.7 Backup Power Supply

The SAMA5D4-XULT board requires a battery (3V lithium battery type CR1225 or equivalent) in order topermanently power the backup part of the SAMA5D4 device (refer to SAMA5D4 Series data sheet).

To avoid losing data and saved registers, the board must be powered on when replacing the battery.

Figure 4-4. VBAT Powering Scheme Option

4.2.2.8 Power Supply Control

In the ACT8865, three DCDCs (1.8V, 1.2V, 3.3V) and two LDO outputs are available.

All ACT8865 outputs can be controlled by the TWI interface through software.

The three DCDCs outputs can be enabled or disabled by the SAMA5D44 SHDN output:

SHDN = 0: The DCDCs output is disabled.

SHDN = 1: The DCDCs output is enabled.

VCC_5VVCC_5V_IN

USB_VBUS_5V[10]

EXP_5V[15]

EDBG_USB_VBUS_5V[14]

5V/2A Input

R400100K 1%R400100K 1%

R407100K 1%R407100K 1%

C2322uFC2322uF

R408 DNP(0R)R408 DNP(0R)

C1711uFC1711uF

U16

NCP349MNAETBG

U16

NCP349MNAETBG

IN1

FLAG 3EN6

OUT1 4

GND2

OUT2 5IN_pad7

R403100K 1%R403100K 1%

Q5IRLML6402

Q5IRLML6402

1

32


R409 0RR409 0R

C21100nFC21100nF

Q8IRLML6402

Q8IRLML6402

1

3 2

C170100nFC170100nF

R402 0RR402 0R

Q7IRLML6402

Q7IRLML6402

1

32

J4

DNP(DC Jack)

J4

DNP(DC Jack)

1

23

Q6IRLML6402

Q6IRLML6402

1

3 2

VDDBU_3V

VDDBU_2VVCC_2V

VCC_5V

EXP_VBAT[15]

C64100nFC64100nF

U13

NCP4682DSQ20T1G

U13

NCP4682DSQ20T1G

VIN4

GND2

CE1

VOUT 3

R333 DNP(0R)R333 DNP(0R)D11

BAT54C

D11

BAT54C

31

2

JP6DNP(Header 1X2)

JP6DNP(Header 1X2)

1 2

C85100nFC85100nF

C1091uFC1091uF

C821uFC821uF

BAT1

Battery Holder_3V

BAT1

Battery Holder_3V

VC

C1

GN

D2


12

Two push buttons are also available:

Wakeup push button: When pressed, the ACT8865 power outputs are restarted if the ACT8865 is in shutdown mode.

Reset push button: When pressed, the ACT8865 transfers the reset signal to NRST_3V3, and then to NRST_2V for the MPU by using a resistor divider.

4.2.3 Reset Circuitry

The reset sources for SAMA5D4-XULT board are:

Power-on reset from the Power Management Unit (PMIC)

Push button reset BP3

External reset from Arduino connectors

JTAG or EDBG reset from an in-circuit emulator

Figure 4-5. Reset/Wakeup and Shutdown Control

4.2.4 Clock Circuitry

The SAMA5D4-XULT board includes four clock sources:

Two clocks are alternatives for the SAMA5D44 processor (12 MHz, 32 kHz)

One crystal oscillator used for the Ethernet RMII chip (25 MHz)

One crystal oscillator used for the EDBG (12 MHz)

Figure 4-6. Clock Circuitry

PWRHLD

PWRHLD

VDDREF

SHDN[9]

PMIC_TWCK3_PC26[8]PMIC_TWD3_PC25[8]

WAKE UP


Q1IRLML2502

Q1IRLML2502

1

3

2

R17 1KR17 1K

TP13SMDTP13SMD

PWRHLD10

SCL21SDA22

REFBP32

nPBIN9

GA

2

GP

129

GP

228

GP

314

EP

33

R2 49.9K 1%R2 49.9K 1%


R1100K 1%R1100K 1%

TP14SMDTP14SMD

C410nFC4

10nF


C6 100nFC6 100nF


C17747nFC17747nF

R1649.9K 1%R1649.9K 1%

EDBG_XIN

EDBG_XOUT

C1520pFC1520pF

Y1

12MHz CL=15pF

Y1

12MHz CL=15pF

1 4

32C13

20pF

C13

20pF

R31 DNP(1M)R31 DNP(1M)ETH0_XI

ETH0_XOC153

20pF

C153

20pF

C152 20pFC152 20pF

R375DNP(1M)R375DNP(1M)

Y4

25MHz CL=20pF

Y4

25MHz CL=20pF

123 4

XOUT32

XIN32

XIN

XOUT

C3220pFC3220pF

C3320pFC3320pF

R206 DNP(1M)R206 DNP(1M)

C3920pFC3920pF Y2

32.768KHz CL=12.5pF

Y2

32.768KHz CL=12.5pF

1

23

4


Y3

12MHz CL=15pF

Y3

12MHz CL=15pF

1 4

32C3820pFC3820pF


4.2.5 Memory

4.2.5.1 Memory Organization

The SAMA5D4 features a DDR/SDR memory interface and an External Bus Interface (EBI) to permit interfacing toa wide range of external memories and to almost any kind of parallel peripheral.

This section describes the memory devices that equip the SAMA5D4-XULT board.

4.2.5.2 DDR2/SDRAM

Two DDR2/SDRAM (MT47H128M16 - 2 Gb - 16 Meg x 16 x 8 banks) are used as main system memory. The board provides 4 Gb on-board, soldered DDR2 (double data rate) SDRAM. The memory bus is 32 bits wide and operates with a frequency of up to 176 MHz.

Figure 4-7. DDR2

MPU_DDR2_A0MPU_DDR2_A1MPU_DDR2_A2MPU_DDR2_A3MPU_DDR2_A4MPU_DDR2_A5MPU_DDR2_A6MPU_DDR2_A7MPU_DDR2_A8MPU_DDR2_A9MPU_DDR2_A10MPU_DDR2_A11MPU_DDR2_A12MPU_DDR2_A13

MPU_DDR2_BA0MPU_DDR2_BA1MPU_DDR2_BA2

MPU_DDR2_CSnMPU_DDR2_RASnMPU_DDR2_CASnMPU_DDR2_WEn

MPU_DDR2_CK+

MPU_DDR2_CKEn

DDR2_VREF

MPU_DDR2_DM0MPU_DDR2_DM1

MPU_DDR2_DQS0+MPU_DDR2_DQS0-




MPU_DDR2_DM3MPU_DDR2_DM2

MPU_DDR2_A0MPU_DDR2_A1MPU_DDR2_A2MPU_DDR2_A3MPU_DDR2_A4MPU_DDR2_A5MPU_DDR2_A6MPU_DDR2_A7MPU_DDR2_A8MPU_DDR2_A9MPU_DDR2_A10MPU_DDR2_A11MPU_DDR2_A12MPU_DDR2_A13


MPU_DDR2_CSnMPU_DDR2_RASnMPU_DDR2_CASnMPU_DDR2_WEn

MPU_DDR2_CKEn

MPU_DDR2_CK+

MPU_DDR2_CK-

MPU_DDR2_CK-

DDR2_VREF

MPU_DDR2_CK+MPU_DDR2_CK-

MPU_DDR2_DQ0MPU_DDR2_DQ1MPU_DDR2_DQ2MPU_DDR2_DQ3MPU_DDR2_DQ4MPU_DDR2_DQ5MPU_DDR2_DQ6MPU_DDR2_DQ7MPU_DDR2_DQ8MPU_DDR2_DQ9MPU_DDR2_DQ10MPU_DDR2_DQ11MPU_DDR2_DQ12MPU_DDR2_DQ13MPU_DDR2_DQ14MPU_DDR2_DQ15

MPU_DDR2_DQ16MPU_DDR2_DQ17MPU_DDR2_DQ18MPU_DDR2_DQ19MPU_DDR2_DQ20MPU_DDR2_DQ21MPU_DDR2_DQ22MPU_DDR2_DQ23MPU_DDR2_DQ24MPU_DDR2_DQ25MPU_DDR2_DQ26MPU_DDR2_DQ27MPU_DDR2_DQ28MPU_DDR2_DQ29MPU_DDR2_DQ30MPU_DDR2_DQ31

VDDIODDR

VDDIODDR

VDDIODDR

VDDIODDR

DDR2

R171 0RR171 0R

C53100nFC53100nF

R347DNP(100R 1%)R347DNP(100R 1%)

U7

MT47H128M16RT-25E:C

U7

MT47H128M16RT-25E:C

A0M8A1M3A2M7A3N2A4N8A5N3A6N7A7P2A8P8A9P3

BA0L2BA1L3BA2L1

VD

D1

A1

VD

D2

E1

VD

D3

J9V

DD

4M

9V

DD

5R

1

VD

DQ

1A

9V

DD

Q2

C1

VD

DQ

3C

3V

DD

Q4

C7

VS

S1

A3

VS

S2

E3

VS

S3

J3V

SS

4N

1V

SS

5P

9

VSSDLJ7

VS

SQ

1A

7V

SS

Q2

B8

VS

SQ

3D

2V

SS

Q4

D8

VS

SQ

5E

7

RFU_R3 R3

DQ0 G8DQ1 G2DQ2 H7DQ3 H3DQ4 H1DQ5 H9DQ6 F1DQ7 F9

A10M2A11P7A12R2

LDQS F7LDQS E8

UDQS B7UDQS A8

DQ8 C8DQ9 C2

DQ10 D7DQ11 D3DQ12 D1DQ13 D9DQ14 B1DQ15 B9

VD

DQ

5C

9V

DD

Q6

E9

VD

DQ

7G

1V

DD

Q8

G3

VD

DQ

9G

7

VS

SQ

6F2

VS

SQ

7F8

VS

SQ

8H

2V

SS

Q9

H8

A13R8

NC_E2 E2NC_A2 A2

CKJ8CKK8CKEK2

CSL8RASK7CASL7WEK3

ODTK9

VREFJ2

LDM F3UDM B3

VD

DQ

10G

9

VDDLJ1 RFU_R7 R7

VS

SQ

10B

2

U4

MT47H128M16RT-25E:C

U4

MT47H128M16RT-25E:C

A0M8A1M3A2M7A3N2A4N8A5N3A6N7A7P2A8P8A9P3

BA0L2BA1L3BA2L1

VD

D1

A1

VD

D2

E1

VD

D3

J9V

DD

4M

9V

DD

5R

1

VD

DQ

1A

9V

DD

Q2

C1

VD

DQ

3C

3V

DD

Q4

C7

VS

S1

A3

VS

S2

E3

VS

S3

J3V

SS

4N

1V

SS

5P

9

VSSDLJ7

VS

SQ

1A

7V

SS

Q2

B8

VS

SQ

3D

2V

SS

Q4

D8

VS

SQ

5E

7

RFU_R3 R3

DQ0 G8DQ1 G2DQ2 H7DQ3 H3DQ4 H1DQ5 H9DQ6 F1DQ7 F9

A10M2A11P7A12R2

LDQS F7LDQS E8

UDQS B7UDQS A8

DQ8 C8DQ9 C2

DQ10 D7DQ11 D3DQ12 D1DQ13 D9DQ14 B1DQ15 B9

VD

DQ

5C

9V

DD

Q6

E9

VD

DQ

7G

1V

DD

Q8

G3

VD

DQ

9G

7

VS

SQ

6F2

VS

SQ

7F8

VS

SQ

8H

2V

SS

Q9

H8

A13R8

NC_E2 E2NC_A2 A2

CKJ8CKK8CKEK2

CSL8RASK7CASL7WEK3

ODTK9

VREFJ2

LDM F3UDM B3

VD

DQ

10G

9

VDDLJ1 RFU_R7 R7

VS

SQ

10B

2

R341 0RR341 0R

C136100nFC136100nF

C54100nFC54100nF

C158100nFC158100nF


14

4.2.5.3 DDR_CALP and DDR_CALN Analog Inputs

Two specific analog inputs, DDR_CALP and DDR_CALN, are used to calibrate all DDR I/Os.

Figure 4-8. DDR_CALP and DDR_CALN Analog Inputs

4.2.5.4 NAND Flash

One 512 MB NAND Flash is connected to the processor.

Figure 4-9. NAND Flash

Table 4-3. DDR_CALN and DDR_CALP

Memory Type CALP Pull-down CALN Pull-up

DDR2 200 ohm 200 ohm

LPDDR2 240 ohm 240 ohm


DDR2_VREF

VDDIODDRR244 200R 1%R244 200R 1%

R243 200R 1%R243 200R 1%

DDR_BA1D14DDR_BA2G13

DDR_BA0C15

DDR_CALNC19DDR_CALPB19

DDR_VREFK12

C97100nFC97100nF

NAND_CLE_PC18NAND_ALE_PC17NAND_REn_PC13NAND_WEn_PC14

NAND_IO0_PC5NAND_IO1_PC6NAND_IO2_PC7NAND_IO3_PC8NAND_IO4_PC9NAND_IO5_PC10NAND_IO6_PC11NAND_IO7_PC12

NAND_CEn_PC15

NAND_RDY_PC16

3V3_NAND3V3_NANDVCC_3V3

3V3_NAND

(NAND_WPn)

Nand FlashR288

DNP(100K 1%)

R288

DNP(100K 1%)

R283

10K

R283

10K

R286100K 1%

R286100K 1%

R287 0RR287 0R

C44100nFC44100nF

R285100K 1%

R285100K 1%

U9

MT29F4G08ABAEAWP:E

U9

MT29F4G08ABAEAWP:E

WE18

N.C66

VCC_2 37

CE9

RE8

N.C1120

WP19

N.C55

N.C11N.C22N.C33N.C44

N.C1221N.C1322N.C1423N.C1524

R/B7

N.C18 26N.C19 27N.C20 28

I/O0 29

VCC_3 34

N.C1635 VSS_2 36

DNU1 38

VCC_4 39

VCC_1 12

VSS_1 13

ALE17

N.C811 N.C710

N.C914N.C1015

CLE16

VSS_3 25

N.C21 33

I/O1 30

I/O3 32I/O2 31

DNU2 47

N.C24 46N.C23 45

I/O7 44I/O6 43I/O5 42I/O4 41

N.C22 40

VSS_4 48

C43100nFC43100nF

C45100nFC45100nF

C41100nFC41100nF

R282 0RR282 0R


4.2.5.5 CS Disable

The SAMA5D44 device boots according to the following sequence:

1. D CARD connected on MCI1

2. Optional Dataflash connected on NPCS0 SPI0

3. 8-bit NAND Flash connected to D0–D7

In this sequence, the first device found with bootable contents is selected as the boot source. The others aredisregarded.

On-board jumpers (JP7, JP8) control the selection (CS#) of the on-board bootable memory components (NANDFlash and Serial DataFlash) using a non-inverting 3-state buffer.

Figure 4-10. CS Disable

The rule of operation is:

JP7 = OFF (default) → enable normal boot from NAND Flash (or serial DataFlash if mounted)

JP7 = ON → booting from optional serial DataFlash or NAND Flash is disabled

JP8 (optional) also controls the serial DataFlash if mounted.

Refer to the SAMA5D4 Series datasheet for more information on standard boot strategies and sequencing.

4.2.6 Additional Memories

4.2.6.1 Serial Data Flash (optional)

The SAMA5D44 provides two high-speed Serial Peripheral Interface (SPI) controllers. One port is used tointerface with the optional on-board serial DataFlash.

The four main signals used in the SPI are Clock, Data In, Data Out, and Chip Select. The SPI is a serial interfacesimilar to the I2C bus interface but with three main differences:

It operates at a higher speed.

Transmit and receive data lines are separate.

Device access is chip select-based instead of address-based.

Figure 4-11. Optional Serial DataFlash

NAND_CEn_PC15NAND_NCS3_PC15

AT25_SPI0_CS0_PC3AT25_SPI0_NCPS0_PC3

VCC_3V3Nand & SPI Flash CS

BOOT_DIS

SPI Flash CS

NAND Flash CSThe jumper JP7 must be populated near the reset button

C42100nFC42100nF

JPR7JUMPERJPR7

JUMPER

C40100nFC40100nFR

279

10K

R27

910

K

R284 0RR284 0R

VCC

GND

U10

NL17SZ126DFT2G

VCC

GND

U10

NL17SZ126DFT2G

1

2

3

4

5

JP8DNP(Header 1X2)

JP8DNP(Header 1X2)

1 2

JPR8DNP(JUMPER)

JPR8DNP(JUMPER)

JP7Header 1X2

JP7Header 1X2

1 2

VCC

GND

U8

NL17SZ126DFT2G

VCC

GND

U8

NL17SZ126DFT2G

1

2

3

4

5

AT25_SPI0_MOSI_PC1AT25_SPI0_MISO_PC0AT25_SPI0_SPCK_PC2

AT25_SPI0_CS0_PC3

VCC_3V3

SPI Flash

C34100nFC34100nF

R211 100K 1%R211 100K 1%

U5

DNP(AT25DF321A)

U5

DNP(AT25DF321A)

HOLD 7

GND 4

VCC 8

CS1

SCK6

SI5SO2

WP 3


16

4.2.6.2 Serial EEPROM with Unique MAC Address

The SAMA5D4-XULT board embeds one Atmel AT24MAC402/602 EEPROM using a TWI0 interface.

The AT24MAC402/602 provides 2048 bits of Serial Electrically-Erasable Programmable Read-Only Memory(EEPROM) organized as 256 words of eight bits each and is accessed via an I2C-compatible (2-wire) serialinterface. In addition, the AT24MAC402/602 incorporates an easy and inexpensive method to obtain a globallyunique MAC or EUI address (EUI-48 or EUI-64).

The EUI-48/64 addresses can be assigned as the actual physical address of a system hardware device or node, orit can be assigned to a software instance. These addresses are factory-programmed by Atmel and permanentlywrite-protected in an extended memory block located outside of the standard 2-Kbit memory array.

In addition, the AT24MAC402/602 provides the value-added feature of a factory-programmed, guaranteed unique128-bit serial number located in the extended memory block (same area as the EUI address values).

The EEPROM device is used as a “soft label” to store board information such as chip type, manufacture name andproduction date, using the last two 16-byte blocks in memory.

Figure 4-12. EEPROM

WARNING The information contained in these blocks should not be modified.

EEPROM_WP

EEPROM_WP

VCC_3V3VCC_3V3_EEPROM

VCC_3V3_EEPROMVCC_3V3_EEPROM

EEPROM_TWD0_PA30 [7]

EEPROM_TWCK0_PA31 [7]

EEPROM

C161 100nFC161 100nF

R39

9D

NP

(10K

)R

399

DN

P(1

0K)

U15

AT24MAC402-MAHM-T

U15

AT24MAC402-MAHM-T

A01

A12

A23

GND4

VCC 8

WP 7

SCL 6

SDA 5

R37

210

KR

372

10K

R397

0R

R397

0R

R398 0RR398 0R


4.2.7 High-Speed Multimedia Card Interface (HSMCI)

4.2.7.1 Multimedia Card Interface (MCI)

The SAMA5D4-XULT board has two high-speed Multimedia Card interfaces (MCIs) that support the multimediacard (MMC) Specification V4.3, the SD Memory Card Specification V2.0 and the SDIO V1.1 specification:

MCI0 interface based on a 7-pin interface (clock, command, 4-bit data, power lines).

MCI1 Interface based on a 7-pin interface (clock, command, 4-bit data, power lines).

4.2.7.2 HSMCI Card Connector

A standard MMC/SD card (push and click type) connector, connected to MCI1, is mounted on the top side of theboard. It features a push-lock / push-eject mechanism and a card detection switch.

A micro SD card (push and click type) connector, connected to MCI0, is mountable as an option on the bottom sideof the board.

Figure 4-13. HSMCI0 & HSMCI1VCC_3V3VDD_MCI1

VCC_3V3

VCC_3V3

MCI1_PWR_PE4 [9]

MCI0_DA0_PC6[8]

MCI0_CK_PC4[8]

MCI0_DA3_PC9[8]

MCI0_CDA_PC5[8]

MCI0_DA2_PC8[8]MCI0_DA1_PC7[8]

MCI1_DA0_PE20[9]MCI1_DA1_PE21[9]

MCI1_DA2_PE22[9]MCI1_DA3_PE23[9]MCI1_CDA_PE19[9]

MCI1_CK_PE18[9]

MCI1_CD_PE3[9]

MCI0_CD_PE2[9]

(MCI0_DA0)

Micro SD CARD INTERFACE - MCI0

(MCI1_CD)

(MCI1_WP)

SD/MMCPlus CARD INTERFACE - MCI1

(MCI1_DA1)(MCI1_DA0)

(MCI1_CK)

(MCI1_CDA)(MCI1_DA3)(MCI1_DA2)

(MCI0_DA1)

(MCI0_CK)(MCI0_CDA)

(MCI0_DA3)(MCI0_DA2)

(MCI0_CD)

J9

DNP(MicroSD Card Connector)

J9

DNP(MicroSD Card Connector)

DAT07DAT18DAT21DAT32

VDD4VSS6

CD9PGND10

PGND_1 11PGND_2 12PGND_3 13

NC_1 14NC_2 15

CMD3CLK5

Q4IRLML6402Q4IRLML6402

1

3 2

R3960R R3960R

R33

768

KR

337

68K

R34

410

KR

344

10K

R17

268

KR

172

68K

J24

SD Card Connector

J24

SD Card Connector

8

5

76

43219

141516

13121110

R14

168

KR

141

68K

R357

DNP(4.7K)

R357

DNP(4.7K)

R19

410

KR

194

10K

R34

068

KR

340

68K

R16

3D

NP

(68K

)R

163

DN

P(6

8K)

R348100K 1%R348100K 1%

R13

868

KR

138

68K

R16

668

KR

166

68K

C14110uFC14110uF

C2910uFC2910uF

R39

068

KR

390

68K

C144100nFC144100nF

R38

610

KR

386

10K

R39

268

KR

392

68K

R14

210

KR

142

10K

C30100nFC30100nF


18

4.2.8 Communication Interfaces

The SAMA5D4-XULT board is equipped with EMAC and USB Host/Device communication interfaces.

4.2.8.1 Ethernet 10/100 (EMAC) Port

The SAMA5D4-XULT board contains a MICREL PHY device (KSZ8081) operating at 10/100 Mb/s. The boardsupports RMII interface modes. The Ethernet interface consists of two pairs of low-voltage differential pair signalsdesignated from GRX± and GTX± plus control signals for link activity indicators. These signals can be used toconnect to a 10/100 Base-T RJ45 connector integrated on SAMA5D4-XULT board.

Additionally, for monitoring and control purposes, LED functionality is carried on the RJ45 connectors to indicateactivity, link, and speed status information.

For more information about the Ethernet controller device, refer to the MICREL KSZ8081RN controllermanufacturer's datasheet.

Figure 4-14. Ethernet

ETH0_LED0

ETH0_LED0

ETH0_XI

ETH0_XO

TX+TX+

ETH0_XI

ETH0_XO

ETH0_LED1ETH0_LED1

TX-

RX+

RX-RX-

RX+

TX-

ETH0_VDD

ETH0_VDDEARTH_ETH0

EARTH_ETH0

GND_ETH0

ETH0_VDD

VCC_3V3 ETH0_VDD

GND_ETH0EARTH_ETH0ETH0_VDDA

ETH0_VDDA

ETH0_VDD

NRST_3V3 [4,10,14,15]

G0_RX0_PB8 [7]

G0_TX0_PB12 [7]

G0_RX1_PB9 [7]

G0_TXEN_PB2 [7]

G0_RXER_PB7 [7]G0_RXDV_PB6 [7]

G0_TX1_PB13 [7]

G0_IRQ_PE1 [9]G0_MDIO_PB17 [7]G0_MDC_PB16 [7]

G0_TXCK_PB0 [7]

10Base-T/100Base-TX

ETH0

LINK

ACT

Terminal Resistor close to output sideRouting top or bottom

100 ohms differential traceimpedance

top/bot

top/bot

top/bot

top/bot

1

2

3

6

4

5

7

8

75

75

75 75

1nF

TD+

TD-

CT

NC

RD-

CT

TX+

TX-

RX+

RX-

RD+

Left Green LED Right yellow LED

J12 RJ45 Connector1

2

3

6

4

5

7

8

75

75

75 75

1nF

TD+

TD-

CT

NC

RD-

CT

TX+

TX-

RX+

RX-

RD+

Left Green LED Right yellow LED

J12 RJ45 Connector

1

2

7

8

3

6

5

4

9101112

1314

1516

C126 100nFC126 100nF

C138100nFC138100nF

R358

1K

R358

1K

C116 2.2uFC116 2.2uF

C147100nFC147100nF

R36

110

KR

361

10K

R382

1K

R382

1K

R215 0RR215 0R

L21180ohm at 100MHz

L21180ohm at 100MHz

1 2

R393 0RR393 0R

C10610uFC10610uF

C153

20pF

C153

20pF

R38

010

KR

380

10K

C152 20pFC152 20pF

C16010uFC16010uF

R35110KR35110K

C35100nFC35100nF

R3836.49K 1% R3836.49K 1%

R36

810

KR

368

10K

R226 470RR226 470R

R35

010

KR

350

10K

R230 470RR230 470R

R34

910

KR

349

10K

R38

110

KR

381

10K

R37

910

KR

379

10K

R37

810

KR

378

10K

R375DNP(1M)R375DNP(1M)

R35210KR35210K

Y4

25MHz CL=20pF

Y4

25MHz CL=20pF

123 4

U14

KSZ8081RNB

U14

KSZ8081RNB

RXC/B-CAST_OFF 19

CRS/CONFIG1 29COL/CONFIG0 28

TXD1 25TXD0 24TXEN 23

RXD3/PHYAD0 13RXD2/PHYAD1 14RXD1/PHYAD2 15RXD0/DUPLEX 16

RXDV/CONFIG2 18RXER/ISO 20

MDC 12MDIO 11

INTRP/NAND 21

VDDA_3V3 3

VDDIO 17

RESET 32

TXP7

TXM6

RXP5

RXM4

VDD_1V22

GND1PADDLE33TXC22TXD226TXD327REXT10

XO8

XI9

LED0/NWAYEN30LED1/SPEED31

C37100nFC37100nF

L22180ohm at 100MHz

L22180ohm at 100MHz

1 2

R364 39RR364 39R


4.2.8.2 USB Host/Device A, B & C

The SAMA5D4-XULT board features three USB communication ports:

USB Host B/C High- and Full-speed Interface

Two USB host stacked type A connectors.

USB Host/Device A Interface

One USB device standard micro-AB connector. This port has a VBUS detection function made through the resistor ladder R218 and R214.

Figure 4-15. USB Host & Device Interface

The two USB Host ports are equipped with 500 mA high-side power switch for self-powered and bus-poweredapplications.

5V_USBC5V_USBB

EARTH_USB_A EARTH_USB_A

EARTH_USB_B/C

EARTH_USB_B/C

USB_VBUS_5V [4]

USBA_VBUS_PE31 [9]

USBA_DM [9]USBA_DP [9]

USBC_DM [9]USBC_DP [9]

USBB_DM[9]USBB_DP[9]

USB AUSB B & C

J7_USB_A_Upper J7_USB_B_LowerR218 100K 1%R218 100K 1%

VBUS

SHD

DMDPID

GND

J11MicroUSB AB Connector

VBUS

SHD

DMDPID

GND


12345

8 6

11 7

9

10

A

B

J16USB Connector

A

B

J16USB Connector

5

8

67

9 10

1234

1112

R214200KR214200K

L12180ohm at 100MHz

L12180ohm at 100MHz

1 2L15

180ohm at 100MHzL15

180ohm at 100MHz1 2

C3620pFC3620pF

5V_USBC

5V_USBB

VCC_5V

USBB_EN5V_PE11 [9]

USBC_EN5V_PE14 [9]

USB_OVCUR_PE0 [9]

ENA and ENB Active High

C6510uFC6510uF

C4910uFC4910uF

C63100nFC63100nF

L16180ohm at 100MHz

L16180ohm at 100MHz

1 2

C68100nFC68100nF

L18180ohm at 100MHz

L18180ohm at 100MHz

1 2 U12

SP2526A-1EN-L

U12

SP2526A-1EN-L

ENA 1

FLGA 2

ENB 4

OUTA8

GNG6 FLGB 3

IN7

OUTB5

C48100nFC48100nF


20

4.2.9 LCD TFT Interface

4.2.9.1 LCD

The SAMA5D4 provides 24 bits of data and control signals to the LCD interface. Other signals are used to controlthe LCD and are available on connector J2: TWI, SPI, 2 GPIOs for interrupt, 1-Wire and power supply lines.

4.2.9.2 LCD Expansion Header

J2 is a 1.27mm pitch 50-pin header; it gives access to the LCD signals.

Figure 4-16. LCD Expansion Header Interface

4.2.9.3 LCD Power

In order to operate correctly out of the processor with various LCD modules, two voltage lines are available: 3.3Vand 5 VCC (default), both selected by 0R resistors R416 and R417.

Figure 4-17. LCD Power

NRST_3V3

VCC_5V VCC_3V3

LCD_ID_PE15[9]

LCD_DAT6_PA6[7]LCD_DAT7_PA7[7]



LCD_DEN_PA29[7]LCD_HSYNC_PA27[7]LCD_VSYNC_PA26[7]LCD_PCK_PA28[7]

LCD_TWCK0_PA31[7]LCD_TWD0_PA30[7]LCD_DISP_PA25[7]

LCD_PWM_PA24[7]

LCD_PE9[9]LCD_PE10[9]

AD0_XP_PC27[8]LCD_SPI1_NPCS2_PB23[7]

AD1_XM_PC28[8]LCD_SPI1_MISO_PB18[7]

AD2_YP_PC29[8]LCD_SPI1_MOSI_PB19[7]

AD3_YM_PC30[8]LCD_SPI1_SPCK_PB20[7]

EDBG_ID_01[14]

LCD_DAT0_PA0[7]LCD_DAT1_PA1[7]LCD_DAT2_PA2[7]LCD_DAT3_PA3[7]


LCD_DAT11_PA11[7]LCD_DAT10_PA10[7]LCD_DAT9_PA9[7]LCD_DAT8_PA8[7]





(LCDDAT0)

(LCDDAT6)(LCDDAT5)(LCDDAT4)


(LCDDAT11)(LCDDAT10)(LCDDAT9)(LCDDAT8)

(LCDDAT7)

(LCDDAT16)

(LCDDAT15)(LCDDAT14)(LCDDAT13)(LCDDAT12)



(LCDDEN)(LCDHSYNC)(LCDVSYNC)(LCDPCK)

(LCDDAT23)

(IRQ1)(IRQ2)(LCDPWM)

(LCDDISP)

(ID_SYS)

LCD

R94 22RR94 22RR125 DNP(0R)R125 DNP(0R)


R53 0RR53 0R



R95 22RR95 22R



R74 22RR74 22R

R417 0RR417 0R

R50 22RR50 22R

J2

50 Pin FPC Connector

J2

50 Pin FPC Connector

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950

5251

R32 330RR32 330R

NRST_3V3

VCC_5V VCC_3V3 LCDR53 0RR53 0R


R417 0RR417 0R J2J2

47484950


4.2.10 HDMI Transmitter Interface

The SAMA5D4-XULT board features the Silicon Image SiI9022ACUN device to convert video signals to the HDMIstandard.

It features the following:

Compliance

HDMI 1.2a, Simply HD, DVI 1.0

Digital Video Output

Integrated TMDS core

DTV resolution support - 480i/576i/480p/576p/720p/1080i/1080p

PC resolution support - VGA/XGA/SXGA/WSXGA/UXGA

Flexible interface to HD MPEG decoders

Integrated YCbCr → RGB conversion

4:2:2 → 4:4:4 up-converter

Digital Audio Output

DVD-Audio support through 4 x I2S inputs

Supports 2-ch 192 kHz or 8-ch 96 kHz

Supports IEC60958 2-ch PCM or IEC61937 compressed audio (Dolby Digital, DTS, etc.)

Industry-standard S/PDIF input, Integrated MCLK generator

Power Management

1.2V and 1.8V cores provide low-power operation

Flexible power-down modes

Figure 4-18. HDMI Interface

VCC_5V_HDMI

HDMI_SCL

HDMI_TCK+

HDMI_TD1+

HDMI_TCK-

HDMI_TD0-

SIL_TD1-

SIL_TCK+SIL_TCK-

SIL_TD0-

SIL_TD2+SIL_TD2-

SIL_TD1+

SIL_TD0+

HDMI_TD2-

SIL_TD0+

SIL_TD2+ HDMI_TD2+

HDMI_TD0+

SIL_TD1- HDMI_TD1-

SIL_TCK+

SIL_TD1+

SIL_TD0-

SIL_TD2-

SIL_TCK-

HDMI_HPD

HDMI_SDA

HDMI_TD2+HDMI_TD2-

HDMI_TD1+HDMI_TD1-

HDMI_TD0+HDMI_TD0-

HDMI_TCK+HDMI_TCK-

HDMI_SCLHDMI_SDA

HDMI_HPD

VCC_5V_HDMI

HDMI_TCK+

HDMI_TD0+

HDMI_TCK-

HDMI_TD0-

HDMI_TCK-HDMI_TCK+

HDMI_TD0-HDMI_TD0+

HDMI_TD1-HDMI_TD1+

HDMI_TD2-

HDMI_TD1+

HDMI_TD2+ HDMI_TD2+HDMI_TD2-

HDMI_TD1-

1V2_HDMI

1V2_HDMI

VCC_5V

VCC_3V33V3_HDMI

3V3_HDMI

3V3_HDMI

3V3_HDMI

3V3_HDMI

EARTH_HDMI

EARTH_HDMI

HDMI_INT_PA25[7]

HDMI_DAT11_PA11[7]

HDMI_DAT9_PA9[7]

HDMI_DAT12_PA12[7]

HDMI_DAT5_PA5[7]

HDMI_DAT7_PA7[7]HDMI_DAT8_PA8[7]

HDMI_DAT10_PA10[7]


HDMI_DAT6_PA6[7]

HDMI_DAT0_PA0[7]HDMI_DAT1_PA1[7]HDMI_DAT2_PA2[7]

HDMI_DAT13_PA13[7]





HDMI_VSYNC_PA26[7]HDMI_HSYNC_PA27[7]

HDMI_PCK_PA28[7]

HDMI_DEN_PA29[7]

HDMI_TWD0_PA30[7]HDMI_TWCK0_PA31[7]

HDMI_TD0_PB28[7]

HDMI_TK0_PB27[7]HDMI_TF0_PB31[7]

HDMI_RST_PB15[7]

HDMI_MCK_PA24[7]

Close to SiI9022

HDMI Type A Connector

HDMI

Routing top or bottom

100 ohms differential traceimpedance

(PCK0)

Close to Pin56

IO_SEL: LOW=3.3V HIGH=1.8V

C184100nFC184100nF

C19110uFC19110uF

F11812L160/12

F11812L160/121 2

L8

DNP(WCM-2012HDMI-900T)

L8


1

2 3

4

C20100nFC20100nF

C1741nFC1741nF

TP7

SMD

TP7

SMD

R406 1KR406 1K

R23 10KR23 10K

L11180ohm at 100MHz

L11180ohm at 100MHz

1 2

C1691nFC1691nF

R405 4.7KR405 4.7K

L9


L9


1

2 3

4

D5RB160M-60TR

D5RB160M-60TR

R29 0RR29 0R

L29

60ohm at 100MHz

L29

60ohm at 100MHz

1 2

L27

60ohm at 100MHz

L27

60ohm at 100MHz

1 2

L2860ohm at 100MHz

L2860ohm at 100MHz

1 2

D7

BTR6V8UD

D7

BTR6V8UD

123

456

7

89

10

C178100nFC178100nF

C186100nFC186100nF

R411 4.3K 1%R411 4.3K 1%

L10


L10


1

2 3

4

J5

HDMI A Connector

J5

HDMI A Connector

DAT2-3DAT2+1DAT2_S2

SCL15SDA16

DAT-6DAT+4DAT1_S5

+5V 18DDC/CEC 17

HPLG19

DAT0-9DAT0+7DAT0_S8

CLK+10CLK-12CLK_S11

MTG1 20

MTG2 21

MTG3 22

MTG4 23

CEC 13NC 14

R252.2K 1%

R252.2K 1%

C182100nFC182100nF

C183100nFC183100nF

R404 DNP(4.7K)R404 DNP(4.7K)

R30

68K

R30

68K

U3 SiI9022ACUNU3 SiI9022ACUN

D032D131D230D329D428D527

D234

D625D724D823D920D1019D1118D1217D1316D1415D1514D1613D1711D1810D199D208D217D226

CLK22

VSYNC35HSYNC34DE33

INT

52H

PD

54

SC

L1

SD

A2

EXT_SWING 56

IOVCC18_2 21IOVCC18_1 3

TXC+ 59TXC- 58

TX0+ 62TX0- 61

TX1+ 65TX1- 64

TX2+ 68TX2- 67

SCLK45

SPDIF36

CVCC12_1 5CVCC12_2 12

CVCC12_4 42

TMO

DE

55

MCLK38

LRCLK44

DD

CS

CL

49D

DC

SD

A48

I2S041I2S140I2S239I2S337

AGND_1 57

AVCC_2 66AVCC_1 60

IOVCC18_3 46

CE

C_D

50C

EC

_A71

CI2

CA

72

VD

DQ

70

AGND_2 63

IO_SEL 69

CVCC12_5 47CVCC12_6 53

CGND 43

RESETN51

CVCC12_3 26

ePA

D73

C185100nFC185100nF

C173100nFC173100nF

C180100nFC180100nF

C168100nFC168100nF

D2

TVS

D2

TVS

C16410uFC16410uF

C1721nFC1721nF

C165100nFC165100nF

D9

BTR6V8UD

D9

BTR6V8UD

123

456

7

89

10

C19710uFC19710uF

R27 10KR27 10K

L5


L5


1

2 3

4

D1

TVS

D1

TVS

D3

TVS

D3

TVS

R28 2.2K 1%R28 2.2K 1%

C167100nFC167100nF

R242.2K 1%R242.2K 1%

R130 0RR130 0R

R137 0RR137 0R

C1791nFC1791nF

R132 0RR132 0R

C18110uFC18110uF

C166100nFC166100nF

R133 1KR133 1K

R139 0RR139 0R

R134 0RR134 0R

R111 0RR111 0R

R264.7KR264.7K

R143 0RR143 0R

R135 0RR135 0R


22

4.2.11 Indicators

There are two LEDs on the SAMA5D4-XULT board that can be controlled by the user:

The red LED provides an indication that power is supplied to the board and is controlled via software.

The blue LED is controlled via GPIO pins.

Figure 4-19. LED Indicators

4.2.12 Push Button Switches

The SAMA5D4-XULT features three push buttons:

One board Reset button (BP3). When pressed and released, it causes a power-on reset of the board.

One Wakeup push button to exit the processor from low-power mode (BP2).

One User momentary push button (BP1).

Figure 4-20. Push Buttons

4.2.13 Debug Interfaces

The SAMA5D4-XULT board includes a JTAG, a Debug serial COM port and an EDBG interface port, to providedebug level access to the SAMA5D4.

4.2.13.1 Debug JTAG

A 2x10-pin JTAG header is provided on the SAMA5D4-XULT board to facilitate the software development anddebugging by using various JTAG emulators. The interface signals have a voltage level of 3.3V.

Figure 4-21. JTAG Interface

PD30

LED_USER_PE15

VCC_3V3LED

LED_POWER_PD30 R144 100K 1%R144 100K 1%

TP19TP19

R140 470RR140 470R

R136 470RR136 470R

Q3

IRLML2502

Q3

IRLML2502

1

32

D10

BLUE

D10

BLUE

D8

RED

D8

RED

PE8

USER BUTTONPlace TP19 to Bottom

PB_USER_PE8

TP19SMDTP19SMD

IRLML2502IRLML2502


REDRED

PWRHLD

VDDREF

SHDN[9]

WAKE UP


Q1IRLML2502

Q1IRLML2502

1

3

2

R17 1KR17 1K

TP13SMDTP13SMD

REFBP32

nPBIN9

GA

2

GP

129

GP

228

GP

314

EP

33

R2 49.9K 1%R2 49.9K 1%


R1100K 1%R1100K 1%

TP14SMDTP14SMD

C410nFC4

10nF


C6 100nFC6 100nF


C17747nFC17747nF

R1649.9K 1%R1649.9K 1%

VCC_3V3

VCC_3V3

NRST_3V3 [4,12,14,15]

TDI [7,14]

TDO [7,14]

TMS [7,14]TCK [7,14]

NTRST [7]

JTAGR217

100K 1%

R217

100K 1%

R224100K 1%R224100K 1%

R227100K 1%R227100K 1%

R259 0RR259 0R

J13

Header 2X10

J13

Header 2X10

12345678910111213151719

14161820

R235 0RR235 0R

R220 0RR220 0R

R222100K 1%R222100K 1%


4.2.13.2 DBGU

The SAMA5D4-XULT board has a dedicated serial port for debugging, which is accessible through the 6-pin maleheader J1. Various interfaces can be used as USB/Serial DBGU port bridge, such as FTDI TTL-232R USB to TTLserial cable or basic breakout board for the RS232/USB converter.

Figure 4-22. DBGU Interface

R13 and R14 are optional (not implemented) resistors that can be used for power selection. Power can bedelivered either by the SAMA5D4-XULT board or by the debug interface tool. To avoid malfunction between thedebug interface (e.g., FTDI) and the on-board power system, ensure that the voltage level selected corresponds toapplication requirements.

VCC_3V3 VCC_5V

DBGU_RTS3_PE24[9]

DBGU_CTS3_PE5[9]

DBGU_RXD3_PE16[9,14]DBGU_TXD3_PE17[9,14]

(CTS3)

(RTS3)

(TXD3)

DEBUG

(RXD3)

R15

DN

P(6

8K)

R15

DN

P(6

8K)

R10

DN

P(6

8K)

R10

DN

P(6

8K)

J1

Header 1X6

J1

Header 1X6

123456

R12

68K

R12

68K

R11

68K

R11

68K

R13

DN

P(0

R)

R13

DN

P(0

R)

R14

DN

P(0

R)

R14

DN

P(0

R)


24

4.2.14 Embedded Debugger (EDBG) Interface

The Atmel Embedded Debugger (EDBG) (1) is an intuitive plug-and-play solution which adds full programming anddebugging support to embedded hardware kits containing Atmel microcontrollers. It enables seamless integrationbetween the target hardware and the Atmel Studio front end.

In addition to the Virtual COM port which provides a UART bridge to the target device, the EDBG provides a DataGateway Interface, through which the target device and host PC can communicate, facilitating high-levelapplication debugging, monitoring, graphing and logging of system information in real-time.

The EDBG is based on the Atmel UC3A4 high-performance low-power 32-bit AVR microcontroller running at up to60 MHz. The device includes an on-chip USB 2.0 high-speed hardware module with dedicated DMA channels,making it ideal for data communications.

By default, the EDBG is in Reset state and not usable. To use the EDBG interface, remove the jumper JP1. Toavoid any conflict with the debug signals, do not use the JTAG and EDBG at the same time.

Figure 4-23. EDBG Interface

1. Device and Ordering Information—The EDBG is a factory-programmed AT32UC3A4256J-C1UR standard microcontroller with ordering code AT32UC3A4256HHB-C1UR. For further information please contact [email protected].

EDBG_XIN

EDBG_XOUT

EDBG_USB_FS_DMEDBG_USB_FS_DP

EDBG_USB_DMEDBG_USB_VBUS_5V

TARGET_JTAG_NRST

EDBG_FORCE_BOOT

EDBG_CDC_UART_RXEDBG_CDC_UART_TX

ED

BG

_XIN

ED

BG

_XO

UT

TAR

GE

T_JT

AG

_TC

K

TAR

GE

T_JT

AG

_TM

STA

RG

ET_

JTA

G_T

DI

TARGET_JTAG_TCKTARGET_JTAG_TDO

TARGET_JTAG_TMSTARGET_JTAG_TDI

TARGET_JTAG_NRST

STATUS_LED_CTRLTARGET_RESET_SENSE

EDBG_JTAG_TCKEDBG_JTAG_TDIEDBG_JTAG_TDOEDBG_JTAG_TMS

EDBG_RESET_N

EDBG_JTAG_TCKEDBG_JTAG_TDOEDBG_JTAG_TMS

EDBG_JTAG_TDI

EDBG_USB_DP

EDBG_USB_DP

EDBG_USB_DM

EDBG_ID_01

EDBG_ID_04EDBG_ID_05

EDBG_ID_02

EDBG_ID_06

EDBG_ID_03

TAR

GE

T_JT

AG

_TD

O

EDBG_RESET_N

EDBG_ADC0

EDBG_RESET_N

ERASEEDBG_ID_07

EDBG_DGI_TWDEDBG_DGI_TWCK

VCC_EDBG

VCC_EDBGVCC_EDBG

VCC_EDBG

VCC_EDBG

EARTH_USB_EDBG

EARTH_USB_EDBG

VCC_EDBG

VCC_EDBG

VCC_5V

VCC_EDBG

EDBG_DGI_TWD[15]EDBG_DGI_TWCK[15]

EDBG_ID_01[10]

DBGU_RXD3_PE16[9,10]DBGU_TXD3_PE17[9,10]

TCK [7,10]TDO [7,10]

TMS [7,10]TDI [7,10]

NRST_3V3 [4,10,12,15]

NRST_3V3 [4,10,12,15]

EDBG_SPI_MISO [15]EDBG_SPI_MOSI [15]EDBG_SPI_SCK [15]EDBG_SPI_NCS [15]

EDBG_ID_04 [15]

EDBG_ID_05 [15]

EDBG_ID_06 [15]

EDBG_DGI_GPIO0[15]EDBG_DGI_GPIO1[15]EDBG_DGI_GPIO2[15]EDBG_DGI_GPIO3[15]

EDBG_USB_VBUS_5V [4]

EDBG_ID_02[15]EDBG_ID_03[15]

EDBG_ID_07 [15]

EDBG_USB_HS_DPEDBG_USB_HS_DM

EDBG_DGI_SDA

EDBG_DGI_SCL

POWER_LED_CTRL

EDBG

JTAG

(3V3)

EDBG_DIS

EDBG_TWI

Force s/n

C189

2.2uF

C189

2.2uF

R79 330RR79 330R

Q9Q91

3

2

C461nFC461nF C196

2.2uF

C196

2.2uF

R10

61K

R10

61K

C1520pFC1520pF

R413 0RR413 0R

R5 330RR5 330R

R104

100K 1%

R104

100K 1%

Q2Q21

3

2

R20 39RR20 39R

C193

100nF

C193

100nF

C71nFC71nF

L14180ohm at 100MHz

L14180ohm at 100MHz

1 2 JP1Header 1X2

JP1Header 1X2

1 2

C1110pFC1110pF

C195

100nF

C195

100nF

Y1

12MHz CL=15pF

Y1

12MHz CL=15pF

1 4

32

R80 330RR80 330R

TP6SMDTP6SMD

R7 330RR7 330R

R4200KR4200K

R6 330RR6 330R

TP2SMDTP2SMD

C13

20pF

C13

20pF

C471nFC471nF

JPR1JUMPERJPR1

JUMPERR8

10K

R8

10K

R10

21K

R10

21K

L13180ohm at 100MHz

L13180ohm at 100MHz

1 2

C22

2.2uF

C22

2.2uF

R10

51K

R10

51K

C9

100nF

C9

100nF

R13

147

0RR

131

470R

C188

100nF

C188

100nF

R107 330RR107 330R

R41

42.

2K 1

%R

414

2.2K

1%

R10

31K

R10

31K

C8

2.2uF

C8

2.2uF


TP1SMDTP1SMD R101 0RR101 0R

R57 330RR57 330R

D4REDD4RED

R9

6.8K 1%

R9

6.8K 1%

C192100nFC192100nF

C17100nFC17100nF

R41

52.

2K 1

%R

415

2.2K

1%

J3

DNP(Header 2X5)

J3

DNP(Header 2X5)

1 23 45 67 89 10

D6BLUED6BLUE

GND

VCC

IO1

IO2

U11

PRTR5V0U2X

GND

VCC

IO1

IO2

U11

PRTR5V0U2X1 234

R21 39RR21 39R

U1 AT32UC3A4256J-C1URU1 AT32UC3A4256J-C1UR

PA00 / PA18G8PA01 / PA17G10PA02 / PX47E1PA03F9PA04E9PA05G9PA06 / PA13E8PA07 / PA19H10PA08F8

PA10C10PA11C9PA12 / PA25G7PA14 / PX11K7PA15 / PX45J7PA16E7PA20 / PX18H9PA21 / PX22K10PA22 / PX20H6PA23 / PX46G6PA24 / PX17J10

PA09D8

PA26 / PB05F7PA27A2PA28A1PA29B4PA30A4PA31C2

USB_VBUSA10DMHSA9DPHSA8

DMFSB9DPFSB8

USB_VBIASC7

VD

DA

NA

J6G

ND

AN

AH

8

VD

DIN

_1D

9

VD

DC

OR

EE

10G

ND

CO

RE

F10

VD

DIN

_2D

10G

ND

PLL

B10

VD

DIO

_1E

5V

DD

IO_2

B5

VD

DIO

_3J5

VD

DIO

_4B

6V

DD

IO_5

F2V

DD

IO_6

F6

GN

DIO

_1F5

GN

DIO

_2C

3G

ND

IO_3

H3

GN

DIO

_4E

2G

ND

IO_5

C8

GN

DIO

_6E

6

PC

00 /

PX

14K

5P

C01

K6

PC

02A

5P

C03

A6

PC

04B

7P

C05

A7

PB

00B

1P

B01

B2

PB

02B

3P

B03

C4

PB

04A

3P

B06

D7

PB

07D

6P

B08

C6

PB

09C

5P

B10

D5

PB

11C

1

PX00 G4PX01 G2PX02 G3PX03 J1PX04 H1PX05 G1PX06 F3PX07 F4PX08 E3PX09 E4PX10 D2PX12 D1PX13 D3

PX15 / PX32 K4PX16 / PX53 D4PX19 / PX59 F1

PX21 H2PX23 K1PX24 J2PX25 H4PX26 J3PX27 K2PX28 K3PX29 J4PX30 G5PX31 H5

RESET_N J9

TMS H7TDO J8TDI K8TCK K9

R3100K 1%R3100K 1%

VBUS

SHD

DMDPID

GND


VBUS

SHD

DMDPID

GND


12345

8 6

11 7

9

10

L2180ohm at 100MHz

L2180ohm at 100MHz

1 2

R11

01K

R11

01K

R10

91K

R10

91K

R56

100K

1%

R56

100K

1%

R41

247

0RR

412

470R

R10

81K

R10

81K


4.2.15 Expansion Ports

4.2.15.1 Arduino

Five 8-pin, one 6-pin, one 10-pin and one 36-pin headers (J6, J7, J8, J14, J15, J17, J18, J19) are provided on theSAMA5D4-XULT board to enable the PIO connection of various expansion cards. These headers’ physical andelectrical implementation match the Arduino R3 extension (“shields”) scheme.

Due to multiplexing, different signals can be provided on each pin.

Figure 4-24. Expansion Boards Connectors

NRST_3V3

VCC_3V3

VCC_3V3

EXP_5V

EXP_5V

EXP_PD23 [9]EXP_PD31 [9]

EXP_PD10[9]

EXP_PC24[8]

EXP_PE28[9]

EXP/XPRO_PB18 [7]

EXP/XPRO_PC2 [8]

EDBG_DGI_TWCK [14]

EXP_PD9 [9]

NRST_3V3[4,10,12,14]

EXP_PB1 [7]

EXP_PE7 [9]

EXP/XPRO_PE22 [9]

EXP_PC20[8]EXP_PC23 [8]

EXP_PE8 [9]EXP/XPRO_PB19 [7]

EXP_PD24[9]EXP_PB4[7]

EXP_PB10[7]EXP/XPRO_PB26[7]

EXP/XPRO_PE21 [9]

EXP/XPRO_PB21 [7]

EXP_PD25 [9]EXP_PB5 [7]

EXP/XPRO_PC3[8]EXP_PD26[9]

EXP/XPRO_PC26[8]

EXP_PB4 [7]

EXP/XPRO_PE18 [9]

EXP_PE23 [9]

EXP_PC19 [8]

EXP/XPRO_PC25 [8]

EXP_PE31 [9]EXP_PD27 [9]

EXP_PB22 [7]

EXP/XPRO_PE19 [9]

EXP/XPRO_PB30[7]

EXP/XPRO_PC0[8]

EXP/XPRO_PB15[7]EXP/XPRO_PB14[7]EXP/XPRO_PC1[8]

EXP_PD30[9]EXP_PD22[9]

EXP_PE20 [9]

EXP/XPRO_PC1 [8]

EXP/XPRO_PC26 [8]

EXP_PE15 [9]

EXP_VBAT[4]

EXP/XPRO_PE26 [9]EXP/XPRO_PE27 [9]

EXP_PD16 [9]EXP/XPRO_PD17 [9]

EXP_PD19 [9]EXP_PE13 [9]

EXP/XPRO_PD15 [9]

EDBG_DGI_TWD [14]

EXP_5V[4]

EXP_TWD0_PA30 [7]


EXP/XPRO_PC3 [8]

EXP_PD28[9]

EXP_PC22[8]

EXP_PD20[9]EXP_PE25[9]

EXP_PD29 [9]

EXP_PB1 [7]

EXP_PB3 [7]

EXP_PC4[8]EXP_PD8[9]

EXP/XPRO_PD11 [9]


EXP/XPRO_PC25 [8]

EXP/XPRO_PB29[7]

AREF [7]

EXP/XPRO_PB27 [7]

EXP_PC21 [8]

EXP_PB3[7]

EXP_PD14[9]

EXP/XPRO_PB20 [7]

EXP/XPRO_PC0 [8]

EXP_PB11 [7]

EXP/XPRO_PC28[8]

EXP_PE5[9]EXP_PE24[9]

EXP_PB28[7]

EXP/XPRO_PC29[8]

EXP/XPRO_PC27[8]

EXP_PC31[8]EXP/XPRO_PC30[8]

EXP_PB31[7]

EXP_PE6 [9]


EXP_TWCK0_PA31 [7]

EDBG_SPI_MISO[14]EXP/XPRO_PB18[7]

EDBG_SPI_SCK[14]EXP/XPRO_PB20[7]

EDBG_SPI_MOSI [14]EXP/XPRO_PB19 [7]

EXP/XPRO_PE30 [9]

EXP/XPRO_PE29 [9]

EDBG_SPI_NCS [14]

EDBG_DGI_GPIO0 [14]

EDBG_DGI_GPIO1 [14]

EDBG_DGI_GPIO2 [14]

EDBG_DGI_GPIO3 [14]

EDBG_ID_05 [14]

EDBG_ID_07 [14]

EDBG_ID_04[14]

EDBG_ID_06[14]

ExpansionBoardsConnectors

SPI1_MISO

ISOM_1IPSKCPS_1IPS

R328 0RR328 0R

R316 0RR316 0R

R387DNP(0R) R387DNP(0R)

J7

Socket 1X8

J7

Socket 1X8

12345678

R3380R R3380R


J17

Socket 1X10

J17

Socket 1X10

12345678910

R298 DNP(330R)R298 DNP(330R)

R304 0RR304 0R

R238DNP(330R) R238DNP(330R)

R370 0RR370 0RR3660R R3660R

J18

Socket 1X8

J18

Socket 1X8

12345678

R3540R R3540R

R296 DNP(330R)R296 DNP(330R)

R232 0RR232 0R


J6

Socket 1X8

J6

Socket 1X8

12345678

R301 0RR301 0R

R343 0RR343 0R

R291 DNP(330R)R291 DNP(330R)


R297 0RR297 0R

R3230R R3230R


R219100R 1% R219100R 1%

J19

Socket 1X8

J19

Socket 1X8

12345678

R3770R R3770R

R290 DNP(330R)R290 DNP(330R)

R2290R R2290R


R233 DNP(330R)R233 DNP(330R)

R353 0RR353 0R

R24

2D

NP

(0R

)R

242

DN

P(0

R)

R3620R R3620R

R305 0RR305 0R

R225DNP(330R) R225DNP(330R)

R2360R R2360R

R309 0RR309 0R

R321 0RR321 0R

R317 0RR317 0R





R360 0RR360 0R


R295 0RR295 0R

R322 DNP(330R)R322 DNP(330R)

R3890R R3890R



R319 0RR319 0R


R294 0RR294 0R





R388 0RR388 0R



R292 0RR292 0R


R216 100R 1%R216 100R 1%

R308 DNP(330R)R308 DNP(330R)



J14

Header 2X3

J14

Header 2X3

1 23 45 6


R3250R R3250R

R289 0RR289 0R

R312 0RR312 0R


J8

Socket 1X8

J8

Socket 1X8

12345678

R24

0D

NP

(0R

)R

240

DN

P(0

R)

R300 0RR300 0R

J15

Socket 2X18

J15

Socket 2X18

1 23 45 67 89 10

11 1213151719

14161820

21 2223 2425 2627 2829 3031 3233 3435 36

R384 0RR384 0R

R314 DNP(330R)R314 DNP(330R)


26

4.2.15.2 Functions Available Through the Arduino Headers

The multiplexing of the SAMA5D44 I/Os (standard parallel I/O and up to three peripheral functions per pin) makesit possible to route alternate signals via Arduino extension headers. To enable these signals, SAMA5D44 PIOmultiplexing must be properly configured. For more details, refer to Section 4.3.15 of this document and thesection PIO Controller (PIO) in the SAMA5D4 Series datasheet.

In addition, on-board resistors may be unsoldered and moved to an alternate location to enable a differentconnection.

Table 4-5 to Table 4-11, together with the connector schematics, provide the alternate signals available for usewith Arduino connectors.

T I P

How to read the tables

For the example Figure 4-25 and Table 4-4 below, the information provided on alternate signals is read as follows:

Pin 3 of Jxx is normally connected to SAMA5D44 PD8 which has PCK0 as an alternate function.

By unsoldering R323 and soldering it on R324 footprint, pin 3 of J15 will be connected to SAMA5D44 PC4 which has SPI0_NPCS1, MCIO_CK and PCK1 as alternate functions.

Figure 4-25. Jxx Connector

Table 4-4. Jxx Connector Signals

Pin No. SAMA5D44 PIO Muxing Alternates On-board Alternates

3 PD8 PCK0 – – PC4 SPI0_NPCS1 MCI0_CK PCK1

EXP_5V

EXP_PC4[8]EXP_PD8[9]

R3230R R3230RR324DNP(0R) R324DNP(0R)

J15J15

13


Figure 4-26. J6 Connector

Table 4-5. J6 Connector Signals

Pin No. Signal On-board Alternates

1 EXP_VBAT – – – – – –

2 VCC_3V3 – – – – – –

3 NRST_3V3 – – – – – –

4 VCC_3V3 – – – – – –

5 EXP_5V – – – – – –

6 GND – – – – – –

7 GND – – – – – –

8 NC – – – – – –

VCC_3V3

NRST_3V3[4,10,12,14]

EXP_VBAT[4]

EXP_5V[4]

J6

Socket 1X8

J6

Socket 1X8

12345678

R216 100R 1%R216 100R 1%


28




1 PB28 SPI2_NPCS3 TD0 PWMH1 – – – –

2 PC27 AD0 SPI0_NPCS1 PWML0 – – – –

3 PC28 AD1 SPI0_NPCS2 PWML1 – – – –

4 PC29 AD2 SPI0_NPCS3 PWMFI0 – – – –

5 PC30 AD3 – PWMH0 – – – –

6 PC31 AD4 – PWMH1 – – – –

7 PE24 NCS0 RTS3 – – – – –

8 PE5 A5 CTS3 – – – – –

EXP/XPRO_PC28[8]

EXP_PE5[9]EXP_PE24[9]

EXP_PB28[7]

EXP/XPRO_PC29[8]

EXP/XPRO_PC27[8]

EXP_PC31[8]EXP/XPRO_PC30[8]

J7

Socket 1X8

J7

Socket 1X8

12345678





1 PB30 TWCK2 RF0 – –

2 PB29 TWD2 RD0 PWML1 –

3 PB26 PCK0 RK0 PWMH0 –

4 PB10 G0_RX2 PCK2 PWML1 –

5 PC0 SPI0_MISO PWMH2 ISI_D8 No DAC available

6 PC1 SPI0_MOSI PWML2 ISI_D9 No DAC available

7 PB14 G0_TX2 SPI2_NPCS1 PWMH0 No CAN available

8 PB15 G0_TX3 SPI2_NPCS2 PWML0 No CAN available

EXP_PB10[7]EXP/XPRO_PB26[7]

EXP/XPRO_PB30[7]

EXP/XPRO_PC0[8]

EXP/XPRO_PB15[7]EXP/XPRO_PB14[7]EXP/XPRO_PC1[8]

EXP/XPRO_PB29[7]

J8

Socket 1X8

J8

Socket 1X8

12345678


30


NRST_3V3

VCC_3V3 EXP_5V

EDBG_SPI_MISO[14]EXP/XPRO_PB18[7]

EDBG_SPI_SCK[14]EXP/XPRO_PB20[7]

EDBG_SPI_MOSI [14]EXP/XPRO_PB19 [7]

SPI1_MISO

ISOM_1IPSKCPS_1IPS

R238DNP(330R) R238DNP(330R)

R232 0RR232 0R

R219100R 1% R219100R 1%

R2290R R2290RR233 DNP(330R)R233 DNP(330R)

R24

2D

NP

(0R

)R

242

DN

P(0

R)

R225DNP(330R) R225DNP(330R)

R2360R R2360R J14

Header 2X3

J14

Header 2X3

1 23 45 6

R24

0D

NP

(0R

)R

240

DN

P(0

R)


Pin No. SAMA5D44 PIO Muxing Alternates On-board AlternatesEDBG

Alternate

1 PB18 SPI1_MISO D8 – – – – – DGI_SPI

2 5V – – – – – – – –

3 PB20 SPI1_SPCK D10 – – – – – DGI_SPI

4 PB19 SPI1_MOSI D9 – – – – – DGI_SPI

5 nRST – – – – – – – –

6 GND – – – – – – – –





1 5V – – – 5V – – –

2 5V – – – 5V – – –

3 PD8 PCK0 – – PC4 SPI0_NPCS1 MCI0_CK PCK1

4 PB27 SPI1_NPCS3 TK0 PWML0 – – – –

5 PB31 – TF0 – – – – –

6 PD29 SCK1 DIS – – – – –

7 PD14 CTS1 CDETB – – – – –

8 PD15 RTS1 SPI2_SPCK – – – – –

9 PE12 A12 TIOA1 PWMH2 PD18 – SENSE0 –

10 PE13 A13 TIOB1 PWML2 PD19 – SENSE1 –

11 PC20 ISI_D1 TF1 – – – – –

12 PC19 ISI_D0 TK1 – – – – –

EXP_5V

EXP_PD23 [9]EXP_PD31 [9]

EXP_PD10[9]

EXP_PC24[8]

EXP_PE28[9]

EXP_PD9 [9]

EXP_PB1 [7]

EXP_PC20[8]EXP_PC23 [8]

EXP_PD24[9]EXP_PB4[7] EXP_PD25 [9]

EXP_PB5 [7]

EXP/XPRO_PC3[8]EXP_PD26[9]

EXP/XPRO_PC26[8]

EXP_PC19 [8]

EXP/XPRO_PC25 [8]


EXP_PD30[9]EXP_PD22[9]

EXP_PD19 [9]EXP_PE13 [9]

EXP/XPRO_PD15 [9]

EXP_PD28[9]

EXP_PC22[8]


EXP_PD29 [9]EXP_PC4[8]EXP_PD8[9]

EXP/XPRO_PD11 [9]


EXP/XPRO_PB27 [7]

EXP_PC21 [8]

EXP_PB3[7]

EXP_PD14[9]

EXP_PB11 [7]

EXP_PB31[7]


EDBG_ID_05 [14]

EDBG_ID_07 [14]

EDBG_ID_04[14]

EDBG_ID_06[14]

R328 0RR328 0R


R3380R R3380R


R370 0RR370 0RR3660R R3660R

R3540R R3540R

R343 0RR343 0R

R3230R R3230R


R3770R R3770R


R353 0RR353 0R

R3620R R3620R



R360 0RR360 0R


R3890R R3890R

R371DNP(0R) R371DNP(0R) R365 DNP(0R)R365 DNP(0R)



R388 0RR388 0R




R3250R R3250R


J15

Socket 2X18

J15

Socket 2X18

1 23 45 67 89 10

11 1213151719

14161820

21 2223 2425 2627 2829 3031 3233 3435 36

R384 0RR384 0R


32

13 PC22 ISI_D3 RF1 – – – – –

14 PC21 ISI_D2 TD1 – – – – –

15 PC24 ISI_D5 RK1 PCK1 – – – –

16 PC23 ISI_D4 RD1 – – – – –

17 PC26 ISI_D7 TWCK3 UTXD1 – – – –

18 PC25 ISI_D6 TWD3 URXD1 – – – –

19 PE25 NCS1 SCK4 IRQ PD20 – SENSE2 –

20 PE0 A0/NBS0 MCI0_CDB CTS4 PD21 – SENSE3 –

21 PE28 NWAIT RTS4 A19 – – – –

22 PB1 G0_RXCK SCK2 ISI_PCK – – – –

23 PD30 – – – PD22 – SENSE4 –

24 PD31 SPI0_NPCS2 PCK1 – PD23 – SENSE5 –

25 PB3 G0_TXER CTS2 ISI_VSYNC – – – –

26 PB11 G0_RX3 RTS2 PWMH1 – – – –

27 PB4 G0_CRS RXD2 ISI_HSYNC PD24 – SENSE6 –

28 PB5 G0_COL TXD2 PCK2 PD25 – SENSE7 –

29 PD28 SCK0 – – – – – –

30 PD11 RTS0 SPI2_MISO – – – – –

31 PD10 CTS0 CDETA – – – – –

32 PD9 FIQ – – – – – –

33 PC3 SPI0_NPCS0 PWML3 ISI_D11 PD26 – SENSE8 –

34 PE31 ADTRG – – PD27 – SENSE9 –

35 GND – – – GND – – –

36 GND – – – GND – – –

Table 4-9. J15 Connector Signals (Continued)






Alternate

10 PE30 DIBN UTXD0 TWCK1 PB4 G0_CRS RXD2 ISI_HSYNC DGI_TWI

9 PE29 DIBP URXD0 TWD1 PB3 G0_TXER CTS2 ISI_VSYNC DGI_TWI

8 AREF – – – – – – – –

7 GND – – – – – – – –

6 PB20 SPI1_SPCK D10 – PE6 A6 TIOA3 –

5 PB18 SPI1_MISO D8 – PE7 A7 TIOB3 PWMFI1 –

4 PB19 SPI1_MOSI D9 – PE8 A8 TCLK3 PWML3 –

3 PB21 SPI1_NPCS0 D11 – – – – – DGI_SPI

2 PE21 A23 TIOA4 MCI1_DA1 – – – – –

1 PE22 A24 TIOB4 MCI1_DA2 – – – – –

EXP/XPRO_PB18 [7]

EDBG_DGI_TWCK [14]

EXP_PE7 [9]

EXP/XPRO_PE22 [9]

EXP_PE8 [9]EXP/XPRO_PB19 [7]

EXP/XPRO_PE21 [9]

EXP/XPRO_PB21 [7]

EXP_PB4 [7]

EDBG_DGI_TWD [14]EXP_PB3 [7]AREF [7]

EXP/XPRO_PB20 [7]EXP_PE6 [9]

EXP/XPRO_PE30 [9]

EXP/XPRO_PE29 [9]

EDBG_SPI_NCS [14]

R316 0RR316 0R

J17

Socket 1X10

J17

Socket 1X10

12345678910


R309 0RR309 0R

R321 0RR321 0R

R317 0RR317 0R


R322 DNP(330R)R322 DNP(330R)

R319 0RR319 0RR320 DNP(0R)R320 DNP(0R)

R308 DNP(330R)R308 DNP(330R)



R312 0RR312 0RR314 DNP(330R)R314 DNP(330R)


34




Alternate

1 PE23 A25 TCLK4 MCI1_DA3 – – – – –

2 PE18 A18 TIOA5 MCI1_CK – – – – DGI_GPIO0

3 PE19 A19 TIOB5 MCI1_CDA – – – – DGI_GPIO1

4 PB22 SPI1_NPCS1 D12 – PC1 SPI0_MOSI PWML2 ISI_D9 –

5 PE20 A20 TCLK5 MCI1_DA0 – – – – DGI_GPIO2

6 PE15 A15 SCK3 TIOA0 – – – – DGI_GPIO3

7 PC26 ISI_D7 TWCK3 UTXD1 PB1 G0_RXCK SCK2 ISI_PCK –

8 PC25 ISI_D6 TWD3 URXD1 PC0 SPI0_MISO PWMH2 ISI_D8 –

EXP/XPRO_PE18 [9]

EXP_PE23 [9]

EXP_PB22 [7]

EXP/XPRO_PE19 [9]

EXP_PE20 [9]

EXP/XPRO_PC1 [8]

EXP/XPRO_PC26 [8]

EXP_PE15 [9]

EXP_PB1 [7]

EXP/XPRO_PC25 [8]EXP/XPRO_PC0 [8]

EDBG_DGI_GPIO0 [14]

EDBG_DGI_GPIO1 [14]

EDBG_DGI_GPIO2 [14]

EDBG_DGI_GPIO3 [14]R298 DNP(330R)R298 DNP(330R)

J18

Socket 1X8

J18

Socket 1X8

12345678

R296 DNP(330R)R296 DNP(330R)


R301 0RR301 0R

R291 DNP(330R)R291 DNP(330R)

R297 0RR297 0R

R290 DNP(330R)R290 DNP(330R)


R295 0RR295 0R

R294 0RR294 0R


R292 0RR292 0R

R289 0RR289 0R

R300 0RR300 0R





1 PE27 NWR1/NBS1 TXD4 – – – – –

2 PE26 NCS2 RXD4 A18 – – – –

3 PD17 TXD1 SPI2_NPCS0 – – – – –

4 PD16 RXD1 DCENB – – – – –

5 PD13 TXD0 SPI2_MOSI – – – – –

6 PD12 RXD0 DCENA – – – – –

7 PA30 TWD0 – – PC3 SPI0_NPCS0 PWML3 ISI_D11

8 PA31 TWCK0 – – PC2 SPI0_SPCK PWMH3 ISI_D10

EXP/XPRO_PC2 [8]

EXP/XPRO_PE26 [9]EXP/XPRO_PE27 [9]


EXP_TWD0_PA30 [7]


EXP/XPRO_PC3 [8]

EXP_TWCK0_PA31 [7]

R304 0RR304 0R

J19

Socket 1X8

J19

Socket 1X8

12345678

R305 0RR305 0RR306 DNP(0R)R306 DNP(0R)



36

4.2.15.3 SAMA5D44 Peripheral Functions Available Through Arduino Headers

Table 4-13 provides details on access to the SAMA5D44 internal peripherals through the Arduino headers.

Note: Only one function at a time can be selected for each pin (refer to Section 4.3.15 in this document and the PIO controller section in SAMA5D4 Series datasheet).

Table 4-13. SAMA5D44 Peripheral Functions Available through the Arduino Headers

ConnectorSAMA5D44to Arduino

SystemFunction PCK ISI SSC SPI TWI

UART/USART ANALOG MISC

J14

PB18 – – – – SPI1_MISO – – – –

3v3/5v 3.3V/5V – – – – – – – –

PB20 – – – – SPI1_SPCK – – – –

PB19 – – – – SPI1_MOSI – – – –

nRST nRST – – – – – – – –

GND GND – – – – – – – –

J7

PB28 – – – TD0 SPI2_NPCS3 – – – PWMH1

PC27 – – – – SPI0_NPCS2 – – AD0 PWML0

PC28 – – – – SPI0_NPCS3 – – AD1 PWML1

PC29 – – – – – – – AD2 PWMFI0

PC30 – – – – – – – AD3 PWMH0

PC31 – – – – – – – AD4 PWMH1

PE24 – – – – – RTS3 – – –

PE5 – – – – – CTS3 – – –

J8

PB30 – – – RF0 – TWCK2 – – –

PB29 – – – RD0 – TWD2 – – PWML1

PB26 – PCK0 – RK0 – – – – PWMH0

PB10 – PCK2 – – – – – – PWML1

PC0 – – ISI_D8 – SPI0_MISO – – – PWMH2

PC1 – – ISI_D9 – SPI0_MOSI – – – PWML2

PB14 – – ISI_D10 – SPI0_SPCK – – – PWMH0

PB15 – – – – – – – – PWML0

J17

PE30 – – ISI_HSYNC – – TWCK1 RXD2 – –

PE29 – – ISI_VSYNC – – TWD1 CTS2 – –

AREF AREF – – – – – – – –

GND GND – – – – – – – –

PB20 – – – – SPI1_SPCK – – – TIOA3

PB18 – – – – SPI1_MISO – – – TIOB3

PB19 – – – – SPI1_MOSI – – – TCLK3

PB21 – – – – SPI1_NPCS0 – – – –

PE21 – – – – – – – – TIOA4

PE22 – – – – – – – – TIOB4


J18

PE23 – – – – – – – – TCLK4

PE18 – – – – – – – – TIOA5

PE19 – – – – – – – – TIOB5

PB22 – – ISI_D9 – SPI1_NPCS1 – – – –

PE20 – – – – SPI2_NPCS1 – – – TCLK5

PE15 – – – – SPI2_NPCS2 – – – TIOA0

PC26 – – ISI_D8 – – TWCK3 UTXD1 – PWMH2

PC25 – – ISI_PCK – – TWD3 URXD1 – –

J19

PE27 – – – – – – TXD4 – –

PE26 – – – – – – RXD4 – –

PD17 – – – – SPI2_NPCS0 – TXD1 – –

PD16 – – – – – – RXD1 – –

PD13 – – – – SPI2_MOSI – TXD0 – –

PD12 – – – – – – RXD0 – –

PA30 – – ISI_D11 – SPI0_NPCS0 TWD0 – – PWML3

PA31 – – ISI_D10 – SPI0_SPCK TWCK0 – – PWMH3

Table 4-13. SAMA5D44 Peripheral Functions Available through the Arduino Headers (Continued)





38

J15

5V 5V – – – – – – – –

5V 5V – – – – – – – –

PD8 –PCK0/PC

K1– TK0 – – TXD2 – –

PB27 – – – TF0 SPI1_NPCS3 – – – PWML0

PB31 – – – – – – – – –

PD29 – – – – – – SCK1 – –

PD14 – – – – – TWD0 CTS1 – –

PD15 – – – – SPI2_SPCK TWCK0 RTS1 – –

PE12 – – – – – – – – PWMH2

PE13 – – – – – – – – PWML2

PC20 – – ISI_D1 TF1 – – – – –

PC19 – – ISI_D0 TK1 – – – – –

PC22 – – ISI_D3 RF1 – – – – –

PC21 – – ISI_D2 TD1 – – – – –

PC24 – PCK1 ISI_D5 RK1 – – – – –

PC23 – – ISI_D4 RD1 – – – – –

PC26 – – ISI_D7 – – TWCK3 UTXD1 – –

PC25 – – ISI_D6 – – TWD3 URXD1 – –

PE25 – – – – SPI0_MOSI – SCK4 – –

PE0 – – – – SPI0_MISO – CTS4 – –

PE28 – – – – SPI0_NPCS0 – RTS4 – –

PB1 – – – – SPI0_SPCK – SCK2 – –

PD30 – – – – – – – – –

PD31 – PCK1 – – SPI0_NPCS2 – – – –

PB3 – – – – – – CTS2 – –

PB11 – – – – – – RTS2 – PWMH1

PB4 – – – – – – RXD2 – –

PB5 – PCK2 – – – – TXD2 – –

PD28 – – – – – – SCK0 – –

PD11 – – – – – – RTS0 – –

PD10 – – – – – – CTS0 – –

PD9 – – – – – – – – –

PC3 – – ISI_D11 SPI0_NPCS0 – – – PWML3

PE31 – – – – – – – – –

GND GND – – – – – – – –

GND GND – – – – – – – –

Table 4-13. SAMA5D44 Peripheral Functions Available through the Arduino Headers (Continued)





4.2.15.4 XPRO

The SAMA5D4-XULT board embeds three connectors to interface Xplained PRO wings.

Figure 4-34. XPRO Connectors

The standard extension headers include common signals. These are male 20-pin/100-mil/right-angled headers(extension boards feature a female 20-pin straight header).

Figure 4-35. XPRO Extension Headers

EXP_5V

VCC_3V3

VCC_3V3

VCC_5V

VCC_3V3

EXP/XPRO_PB14[7]

EDBG_ID_03[14]

EXP/XPRO_PC1 [8]EXP/XPRO_PC0[8]

EXP/XPRO_PD17[9]

EXP/XPRO_PE30 [9]

EXP/XPRO_PD11[9]

EXP/XPRO_PE19 [9]

EXP/XPRO_PD13 [9]

EXP/XPRO_PB15 [7]

EXP/XPRO_PD15 [9]

EXP/XPRO_PE26[9] EXP/XPRO_PE27 [9]

EXP/XPRO_PE18[9]EXP/XPRO_PC29[8]

EXP/XPRO_PE29[9]

EXP/XPRO_PC30 [8]

EXP/XPRO_PB26[7]

EDBG_ID_02[14]

EXP/XPRO_PC3 [8]EXP/XPRO_PC2[8]

EXP/XPRO_PB21[7]

EXP/XPRO_PB30 [7]

EXP/XPRO_PB18[7]

EXP/XPRO_PE22 [9]

EXP/XPRO_PB19 [7]

EXP/XPRO_PB27 [7]

EXP/XPRO_PB20 [7]

EXP/XPRO_PC25[8] EXP/XPRO_PC26 [8]

EXP/XPRO_PE21[9]EXP/XPRO_PC27[8]

EXP/XPRO_PB29[7]

EXP/XPRO_PC28 [8]

SPI2_NPCS2

SPI2_MISOSPI2_NPCS0

SPI1_NPCS3

SPI1_MISOSPI1_NPCS0

XPRO Connectors

XPRO Power

XPRO EXT1

XPRO EXT2

ID02AD0TIOA4PWMH3PCK0TWD2URXD1

ID03AD2TIOA5PWMH2SPI2_NPCS1TWD1RXD4

TWCK1TXD4SPI2_MOSISPI2_SPCK

TWCK2UTXD1SPI1_MOSISPI1_SPCK

PWML3TIOB4

TIOB5PWML2

AD1

AD3

J21

DNP(Header 2X2)

J21

DNP(Header 2X2)

13

24

J23

DNP(Header 2X10)

J23

DNP(Header 2X10)

1 23 45 67 89 10

11 1213151719

14161820

J22

DNP(Header 2X10)

J22

DNP(Header 2X10)

1 23 45 67 89 10

11 1213151719

14161820


40

4.3 PIO Usage and Interface Connectors

4.3.1 Power Supply

Figure 4-36. Power Supply Connector J4

Table 4-14. Power Supply Connector J4 Signal Description

Pin Mnemonic Signal Description

1 Center pin +5V

2 Spring blade GND

3 Fixing pin Floating


4.3.2 JTAG/ICE Connector

Figure 4-37. JTAG J13

Table 4-15. JTAG/ICE Connector J13 Signal Descriptions


1 VTref. 3.3V power This is the target reference voltage (main 3.3V).

2 Vsupply. 3.3V powerThis pin is not connected in SAM-ICE™ and reserved for compatibility with other equipment. Connected to main 3.3V.

3nTRST TARGET RESET - Active-low output signal that resets the target

JTAG Reset. Output from SAM-ICE to control the Reset signal on the target system.

4 GND Common ground

5TDI TEST DATA INPUT - Serial data output line, sampled on the rising edge of the TCK signal

JTAG data input into target CPU

6 GND Common ground

7 TMS TEST MODE SELECT JTAG mode set input into target CPU

8 GND Common ground

9TCK TEST CLOCK - Output timing signal, for synchronizing test logic and control register access

JTAG clock signal into target CPU

10 GND Common ground

11RTCK - Input Return test clock signal from the target

Some targets having too slow system clock must synchronize the JTAG inputs to internal clocks. In present case such synchronization is unneeded and TCK merely looped back into RTCK.


13TDO JTAG TEST DATA OUTPUT - Serial data input from the target

JTAG data output from target CPU


15 nSRST RESET Active-low reset signal. Target CPU reset signal.


17 RFU This pin is not connected in SAM-ICE.


19 RFU This pin is not connected in SAM-ICE.


1 3 5 7 9 11 13 15 17 19

2 4 6 8 10 12 14 16 18 20


42

4.3.3 EDBG USB Type Micro-AB

Figure 4-38. EDBG USB Type Micro-AB Connector J20

4.3.4 USB Type A Dual Port

Figure 4-39. USB Type A Dual Port J16

Table 4-16. EDBG USB Type Micro-AB Connector J20 Signal Descriptions


1 Vbus 5V power

2 DM Data minus

3 DP Data plus

4 ID On-the-go identification

5 GND Common ground

1 2 3 4 5

Table 4-17. USB Type A Dual Port J16 Signal Descriptions


A1 Vbus - USB_A 5V power

A2 DM - USB_A Data minus

A3 DP - USB_A Data plus

A4 GND Common ground

B1 Vbus - USB_A 5V power

B2 DM - USB_A Data minus

B3 DP - USB_A Data plus

B4 GND Common ground

Mechanical pins

– Shield


4.3.5 USB Micro-AB

Figure 4-40. USB Host/Device Micro-AB Connector J11

4.3.6 DEBUG Connector

Figure 4-41. DEBUG Connector J1

Table 4-18. USB Host/Device Micro-AB Connector J11 Signal Descriptions


1 Vbus 5V power

2 DM Data minus

3 DP Data plus

4 ID On-the-go identification

5 GND Common ground

1 2 3 4 5

Table 4-19. DEBUG Connector J1 Signal Descriptions

Pin Mnemonic PIO Signal Description

1 CTS3 PE5 Handshake input

2 TXD3 (Transmitted Data) PE17 RS232 serial data input signal

3 RXD3 (Received Data) PE16 RS232 serial data output signal

4 Power – 5V/3.3V (selected by resistors)

5 RTS3 PE24 Handshake output

6 GND – Common ground


44

4.3.7 SD/MMC Plus MCI0

Figure 4-42. SD/MMC Socket J24

Table 4-20. SD/MMC Socket J24 Signal Descriptions


1 DAT3 PE23 Data Bit

2 CMD PE19 Command Line

3 VSS – Common ground

4 VCC – Supply Voltage 3.3V

5 CLK PE18 Clock / Command Line

6 CD PE3 Card Detect




10 – Not connected Data Bit




14 WP GND Write Protection (deactivated)




4.3.8 MicroSD MCI1

Figure 4-43. MicroSD Socket J9

4.3.9 Ethernet ETH0 RJ45 Socket J12

Figure 4-44. Ethernet RJ45 Socket J12

Table 4-21. MicroSD Socket J9 Signal Descriptions


1 DAT2 PC8 Data Bit 2

2 CD/DAT3 PC9 Card Detect / Data Bit 3

3 CMD PC5 Command Line

4 VCC – Supply Voltage 3.3V

5 CLK PC4 Clock / Command Line




9 CD PE2 Card Detect

10 GND – Common ground

1 2 3 4 5 6 7 8

RJ-45


46

4.3.10 LCD Connector J2

Figure 4-45. LCD Connector J2

Table 4-22. LCD Connector J2 Signal Descriptions

Pin Signal PIO Signal RGB Interface Function Alternate

1 ID_SYS PE15 / ID00 ID Extension module identification EDBG_ID_01

2 – GND GND GND –

3 LCDDAT0 PA0 D0 Data line –




















23 LCDDAT16 PC14 D16 Data line –







30 LCDDAT22 PE27 D22 Data line –


31 LCDDAT23 PE28 D23 Data line –


33 LCDPCK PA28 PCLK Pixel clock –

34 LCDVSYNC PA26 VSYNC/CS Vertical sync –

35 LCDHSYNC PA27 HSYNC/WE Horizontal sync –

36 LCDDEN PA29 DATA_ENABLE/RE Data enable –

37 SPI1_SPCK PB20 SPI_SCK – AD3/YM PC30

38 SPI1_MOSI PB19 SPI_MOSI – AD2/YP PC29

39 SPI1_MISO PB18 SPI_MISO – AD1/XM PC28

40 SPI1_NPCS2 PB23 SPI_CS – AD0/XP PC27

41 LCDDISP PA25 ENABLE Display enable signal –

42 TWD0 PA30 TWI_SDA I2C data line (maXTouch®) –

43 TWCK0 PA31 TWI_SCL I2C clock line (maXTouch) –

44 GPIO PE9 IRQ1 maXTouch interrupt line –

45 GPIO PE10 IRQ2 Interrupt line for other I2C devices –

46 LCDPWM PA26 PWM Backlight control –

47 RESET – RESET Reset for both display and maXTouch –

48 Main_5v/3v3 VCC VCC 3.3V or 5V supply (0R) –

49 Main_5v/3v3 VCC VCC 3.3V or 5V supply (0R) –

50 GND GND GND GND –

Table 4-22. LCD Connector J2 Signal Descriptions (Continued)

Pin Signal PIO Signal RGB Interface Function Alternate


48

4.3.11 HDMI Connector

Figure 4-46. HDMI Type A Female Connector J5

Table 4-23. HDMI Type A Female Connector J5 Signal Descriptions

Signal Pin No. Signal

TMDS Data 2+ 1 2 TMDS Data 2 Shield

TMDS Data 2- 3 4 TMDS Data 1+

TMDS Data 1 Shield 5 6 TMDS Data 1-

TMDS Data 0+ 7 8 TMDS Data 0 Shield

TMDS Data 0- 9 10 TMDS Clock +

TMDS Clock Shield 11 12 TMDS Clock -

CEC (not connected) 13 14 Not connected

SCL 15 16 SDA

GND 17 18 +5V

Hot Plug Detect 19 20 DDC/CEC (GND)


4.3.12 XPRO Power Connector

Figure 4-47. XPRO Power Connector J21

4.3.13 XPRO Ext1 Connector

Figure 4-48. XPRO Ext1 Connector J22

Note: 1. Used by the EDBG interface.

Table 4-24. XPRO Power Connector J21 Signal Descriptions

Signal Pin No. Signal

EXP_5V 1 2 GND

VCC_5V 3 4 VCC_3v3

1 3

2 4

1 3 5 7 9 11 13 15 17 19

2 4 6 8 10 12 14 16 18 20

Table 4-25. XPRO Ext1 Connector J22 Signal Descriptions

SAMA5D44

XPRO Signal Pin No. XPRO Signal

SAMA5D44

Function Pin Function Pin

ID02(1) EDBG(1) ID 1 2 GND – –

AD0 PC27 ADC(+) 3 4 ADC(-) PC28 AD1

TIOA4 PE21 GPIO 5 6 GPIO PE22 TIOBA4

PWMH3 PC2 PWM(+) 7 8 PWM(-) PC3 PWML3

PCK0 PB26 IRQ/GPIO 9 10 SPI_SS_B/GPIO PB27 SPI1_NPCS3

TWD2 PB29 TWI_SDA 11 12 TWI_SCL PB30 TWCK2

URXD1 PC25 UART_RX 13 14 UART_TX PC26 UTXD1

SPI1_NPCS0 PB21 SPI_SS_A 15 16 SPI_MOSI PB19 SPI1_MOSI

SPI1_MISO PB18 SPI_MISO 17 18 SPI_SCK PB20 SPI1_SPCK

– – GND 19 20 VCC 3v3 – –


50

4.3.14 XPRO Ext2 Connector

Figure 4-49. XPRO Ext2 Connector J23

Note: 1. Used by the EDBG interface.

1 3 5 7 9 11 13 15 17 19

2 4 6 8 10 12 14 16 18 20

Table 4-26. XPRO Ext2 Connector J23 Signal Descriptions

SAMA5D44

XPRO Signal Pin No. XPRO Signal

SAMA5D44

Function Pin Function Pin

ID03(1) EDBG(1) ID 1 2 GND – –

AD2 PC29 ADC(+) 3 4 ADC(-) PC30 AD3

TIOA5 PE18 GPIO 5 6 GPIO PE19 TIOB5

PWMH2 PC0 PWM(+) 7 8 PWM(-) PC1 PWML2

SPI2_NPCS1 PB14 IRQ/GPIO 9 10 SPI_SS_B/GPIO PB15 SPI2_NPCS2

TWD1 PE29 TWI_SDA 11 12 TWI_SCL PE30 TWCK1

RXD4 PE26 UART_RX 13 14 UART_TX PE27 TXD4

SPI2_NPCS0 PD17 SPI_SS_A 15 16 SPI_MOSI PD13 SPI2_MOSI

SPI2_MISO PD11 SPI_MISO 17 18 SPI_SCK PD15 SPI2_SPCK

– – GND 19 20 VCC 3v3 – –


4.3.15 PIO Usage

The following tables provide the use of different PIO lines on the SAMA5D4-XULT, sorted by PIO lines.

Most of the signals can also be configured as either inputs or outputs from/to the processor.

Table 4-27. PIO A Pin Assignment and Signal Description

Power Rail I/O Type Primary SignalPeripheral A

SignalPeripheral B

SignalPeripheral C

Signal

VDDIOP GPIO PA0 LCDDAT0 – TMS

VDDIOP GPIO PA1 LCDDAT1 – –

VDDIOP GPIO_CLK PA2 LCDDAT2 G1_TXCK –

VDDIOP GPIO_CLK PA3 LCDDAT3 G1_RXCK –

VDDIOP GPIO PA4 LCDDAT4 G1_TXEN –

VDDIOP GPIO PA5 LCDDAT5 G1_TXER –

VDDIOP GPIO PA6 LCDDAT6 G1_CRS –


VDDIOP GPIO PA8 LCDDAT8 – TCK


VDDIOP GPIO PA10 LCDDAT10 G1_RXDV –

VDDIOP GPIO PA11 LCDDAT11 G1_RXER –

VDDIOP GPIO PA12 LCDDAT12 G1_RX0 –


VDDIOP GPIO PA14 LCDDAT14 G1_TX0 –


VDDIOP GPIO PA16 LCDDAT16 – NTRST






VDDIOP GPIO PA22 LCDDAT22 G1_MDC –

VDDIOP GPIO PA23 LCDDAT23 G1_MDIO –

VDDIOP GPIO_CLK PA24 LCDPWM PCK0 –

VDDIOP GPIO PA25 LCDDISP TD0 –

VDDIOP GPIO PA26 LCDVSYNC PWMH0 SPI1_NPCS1

VDDIOP GPIO PA27 LCDHSYNC PWML0 SPI1_NPCS2

VDDIOP GPIO_CLK2 PA28 LCDPCK PWMH1 SPI1_NPCS3

VDDIOP GPIO PA29 LCDDEN PWML1 –

VDDIOP GPIO PA30 TWD0 – –

VDDIOP GPIO PA31 TWCK0 – –


52

Table 4-28. PIO B Pin Assignment and Signal Description


SignalPeripheral B

SignalPeripheral C

Signal

VDDIOP GPIO_CLK PB0 G0_TXCK – –

VDDIOP GPIO_CLK PB1 G0_RXCK SCK2 ISI_PCK

VDDIOP GPIO PB2 G0_TXEN – –

VDDIOP GPIO PB3 G0_TXER CTS2 ISI_VSYNC

VDDIOP GPIO PB4 G0_CRS RXD2 ISI_HSYNC

VDDIOP GPIO PB5 G0_COL TXD2 PCK2

VDDIOP GPIO PB6 G0_RXDV – –

VDDIOP GPIO PB7 G0_RXER – –

VDDIOP GPIO PB8 G0_RX0 – –

VDDIOP GPIO PB9 G0_RX1 – –

VDDIOP GPIO_CLK PB10 G0_RX2 PCK2 PWML1

VDDIOP GPIO PB11 G0_RX3 RTS2 PWMH1

VDDIOP GPIO PB12 G0_TX0 – –

VDDIOP GPIO PB13 G0_TX1 – –

VDDIOP GPIO PB14 G0_TX2 SPI2_NPCS1 PWMH0

VDDIOP GPIO PB15 G0_TX3 SPI2_NPCS2 PWML0

VDDIOP GPIO PB16 G0_MDC – –

VDDIOP GPIO PB17 G0_MDIO – –

VDDIOP GPIO PB18 SPI1_MISO D8 –

VDDIOP GPIO PB19 SPI1_MOSI D9 –

VDDIOP GPIO_CLK PB20 SPI1_SPCK D10 –

VDDIOP GPIO PB21 SPI1_NPCS0 D11 –



VDDIOP GPIO PB24 DRXD D14 TDI

VDDIOP GPIO PB25 DTXD D15 TDO

VDDIOP GPIO_CLK PB26 PCK0 RK0 PWMH0

VDDIOP GPIO PB27 SPI1_NPCS3 TK0 PWML0

VDDIOP GPIO PB28 SPI2_NPCS3 TD0 PWMH1

VDDIOP GPIO PB29 TWD2 RD0 PWML1

VDDIOP GPIO PB30 TWCK2 RF0 –

VDDIOP GPIO PB31 – TF0 –


Table 4-29. PIO C Pin Assignment and Signal Description


SignalPeripheral B

SignalPeripheral C

Signal

VDDIOM GPIO PC0 SPI0_MISO PWMH2 ISI_D8

VDDIOM GPIO PC1 SPI0_MOSI PWML2 ISI_D9

VDDIOM GPIO_CLK PC2 SPI0_SPCK PWMH3 ISI_D10

VDDIOM GPIO PC3 SPI0_NPCS0 PWML3 ISI_D11

VDDIOM MCI_CLK PC4 SPI0_NPCS1 MCI0_CK PCK1

VDDIOM GPIO PC5 D0 MCI0_CDA –

VDDIOM GPIO PC6 D1 MCI0_DA0 –







VDDIOM GPIO PC13 NRD/NANDOE MCI0_DA7 –

VDDIOM GPIO PC14 NWE/NANDWE – –

VDDIOM GPIO PC15 NCS3 – –

VDDIOM GPIO PC16 NANDRDY – –

VDDIOM GPIO PC17 A21/NANDALE – –

VDDIOM GPIO PC18 A22/NANDCLE – –

VDDIOM GPIO PC19 ISI_D0 TK1 –

VDDIOM GPIO PC20 ISI_D1 TF1 –

VDDIOM GPIO PC21 ISI_D2 TD1 –

VDDIOM GPIO PC22 ISI_D3 RF1 –

VDDIOM GPIO PC23 ISI_D4 RD1 –

VDDIOM GPIO PC24 ISI_D5 RK1 PCK1

VDDIOM GPIO PC25 ISI_D6 TWD3 URXD1

VDDIOM GPIO PC26 ISI_D7 TWCK3 UTXD1

VDDANA GPIO_ANA PC27 AD0 SPI0_NPCS1 PWML0

VDDANA GPIO_ANA PC28 AD1 SPI0_NPCS2 PWML1

VDDANA GPIO_ANA PC29 AD2 SPI0_NPCS3 PWMFI0

VDDANA GPIO_ANA PC30 AD3 – PWMH0

VDDANA GPIO_ANA PC31 AD4 – PWMH1


54

Table 4-30. PIO D Pin Assignment and Signal Description

PIOD Mode Secure

Primary SignalPeripheral A

SignalPeripheral B

SignalPeripheral C

SignalPower Rail I/O Type

VDDIOP GPIO_CLK PD8 PCK0 – –

VDDIOP GPIO PD9 FIQ – –

VDDIOP GPIO PD10 CTS0 CDETA –

VDDIOP GPIO PD11 RTS0 SPI2_MISO –

VDDIOP GPIO PD12 RXD0 DCENA –

VDDIOP GPIO PD13 TXD0 SPI2_MOSI –

VDDIOP GPIO PD14 CTS1 CDETB –

VDDIOP GPIO PD15 RTS1 SPI2_SPCK –

VDDIOP GPIO PD16 RXD1 DCENB –

VDDIOP GPIO PD17 TXD1 SPI2_NPCS0 –

VDDANA GPIO_ANA PD18 – SENSE0 –










VDDIOP GPIO_CLK PD28 SCK0 – –

VDDIOP GPIO_CLK PD29 SCK1 DIS –

VDDIOP GPIO PD30 – – –

VDDIOP GPIO_CLK PD31 SPI0_NPCS2 PCK1 –


Table 4-31. PIO E Pin Assignment and Signal Description


SignalPeripheral B

SignalPeripheral C

Signal

VDDIOM MCI_CLK PE0 A0/NBS0 MCI0_CDB CTS4

VDDIOM EBI PE1 A1 MCI0_DB0 –




VDDIOM EBI PE5 A5 CTS3 –

VDDIOM EBI PE6 A6 TIOA3 –

VDDIOM EBI PE7 A7 TIOB3 PWMFI1

VDDIOM EBI PE8 A8 TCLK3 PWML3

VDDIOM EBI PE9 A9 TIOA2 –

VDDIOM EBI PE10 A10 TIOB2 –

VDDIOM EBI PE11 A11 TCLK2 –

VDDIOM EBI PE12 A12 TIOA1 PWMH2

VDDIOM EBI PE13 A13 TIOB1 PWML2

VDDIOM EBI PE14 A14 TCLK1 PWMH3

VDDIOM EBI PE15 A15 SCK3 TIOA0

VDDIOM EBI PE16 A16 RXD3 TIOB0

VDDIOM EBI PE17 A17 TXD3 TCLK0

VDDIOM EBI PE18 A18 TIOA5 MCI1_CK

VDDIOM EBI PE19 A19 TIOB5 MCI1_CDA

VDDIOM EBI PE20 A20 TCLK5 MCI1_DA0

VDDIOM EBI PE21 A23 TIOA4 MCI1_DA1

VDDIOM EBI PE22 A24 TIOB4 MCI1_DA2

VDDIOM EBI PE23 A25 TCLK4 MCI1_DA3

VDDIOM EBI PE24 NCS0 RTS3 –

VDDIOM EBI PE25 NCS1 SCK4 IRQ

VDDIOM EBI PE26 NCS2 RXD4 A18

VDDIOM EBI PE27 NWR1/NBS1 TXD4 –

VDDIOM EBI PE28 NWAIT RTS4 A19

VDDIOP DIB PE29 DIBP URXD0 TWD1

VDDIOP DIB PE30 DIBN UTXD0 TWCK1

VDDIOP GPIO PE31 ADTRG – –


56

4.4 SAMA5D4-XULT Board Schematics

This section contains the following schematics:

Block diagram

PIO Muxing Table

Power Supply

SAMA5D44 - Power

SAMA5D44 - DDR2

SAMA5D44 - PIOA and PIOB

SAMA5D44 - PIOC and Flash

SAMA5D44 - SYS, PIOD, and PIOE

JTAG, USB, DEBUG, and LCD

HDMI

Ethernet_ETH0_10/100M

HSMCI

EDBG

Expansion and XPRO Connectors


Figure 4-50. Block diagram

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

2 15A

XX

-XX

-XX

Xin

JQX

XX

Blo

ck D

iagr

am

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

2 15A

XX

-XX

-XX

Xin

JQX

XX

Blo

ck D

iagr

am

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

2 15A

XX

-XX

-XX

Xin

JQX

XX

Blo

ck D

iagr

am

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

USB

DEVICE

USB

Host

x2

Single

PMU

Solution

5V INPUT

USB A,B,C

HDMI

Connector

Reset

Force PwrOn

Push

Buttons

LCD

Connector

JTAG

EDBG

User LEDs

Push Buttons

PIO

SERIAL

DATA

FLASH

PIO A,...E

PIO A,...E

ATMEL

SAMA5D44

CORTEX(R)-A5 PROCESSOR

Expansion & XPRO Connectors

5V & 3V3

EBI

4Gb

DDR2

SDRAM

4Gb

NAND

FLASH

SD

CARD

Micro SD

CARD

10/100

FAST ETHERNET

ETH0

Power rails

VBAT

ANALOG Reference

MAC

Serial

EEPROM

USB

DEVICE

JTAG

Connector

Sheet 10

Sheet 15

Sheet 10

5V INPUT

Sheet 14

Sheet 11

Sheet 13

Sheet 13

Sheet 12

Sheet 8

Sheet 8

Sheet 8

Sheet 6

Sheet 9

Sheet 4

Sheet 4

Sheet 5: Power Part

Sheet 6: DDR2 CTL

Sheet 7: PIOA & PIOB

Sheet 8: PIOC & Flash

Sheet 9: SYS & PIOD & PIOE

Sheet 10

PIO C


58

Figure 4-51. PIO Muxing Table

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

3 15A

XX

-XX

-XX

Xin

JQX

XX

PIO

Mux

ing

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

3 15A

XX

-XX

-XX

Xin

JQX

XX

PIO

Mux

ing

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

3 15A

XX

-XX

-XX

Xin

JQX

XX

PIO

Mux

ing

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

CTS

1TX

D0/

SPI2

_MO

SIR

XD

0R

TS0/

SP

I2_M

ISO

CTS

0FI

Q

TXD

1/SP

I2_N

PCS0

RX

D1

RTS

1/S

PI2

_SP

CK

US

B_O

VC

UR

/CTS

4

TIO

A3

DB

GU

_CTS

3M

CI1

_PW

RM

CI1

_CD

MC

I0_C

DG

0_IR

Q

US

BB

_EN

5VLC

D_I

RQ

2LC

D_I

RQ

1P

B_U

SE

R/T

CLK

3TI

OB

3

DBG

U_R

XD3

LED

_USE

R/L

CD

_ID

/TIO

A0

TIO

B1/

PW

ML2

TIO

A1/

PW

MH

2

TIO

B4/M

CI1

_DA2

TIO

A4/M

CI1

_DA1

TCLK

5/M

CI1

_DA0

TIO

B5/M

CI1

_CD

ATI

OA5

/MC

I1_C

KD

BGU

_TXD

3

RTS

4TX

D4

RX

D4

DB

GU

_RTS

3TC

LK4/

MC

I1_D

A3

SP

I0_N

PC

S2/

PC

K1

LED

_PO

WE

RU

SB

A_V

BU

SU

TXD

0/TW

CK1

UR

XD0/

TWD

1

PIOE

PIOE

PIOD

PIOD

US

BC

_EN

5V

SE

NS

E3

SE

NS

E4

SE

NS

E0

SC

K1

SE

NS

E1

SE

NS

E2

PD

31

SC

K0

PD

21

PD

16P

D17

PD

18P

D19

PD

20

PE

0

PE

7

PE

1P

E2

PE

3P

E4

PE

9P

E10

PE

11

PE

5P

E6

PE

12P

E13

PE

14P

E15

PE

8

PD

30

PD

23P

D24

PD

25P

D26

PD

22

PD

27P

D28

PD

29

PE

20P

E21

PE

16P

E17

PE

24P

E23

PE

25

PE

18P

E19

PE

31

PE

27P

E26

PE

28

PE

22

PE

30P

E29

PM

IC_I

RQ

/SC

K4

PD

8

PD

10

PD

12P

D13

PD

14

PD

11

PD

15

PD

9S

EN

SE

7S

EN

SE

6S

EN

SE

5P

CK

0

SE

NS

E9

SE

NS

E8

PIO

Mux

ing

& J

umpe

r set

ting

1 2 9 103 4 5 6 7 8 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

ID_S

YS

LCD

DA

T1LC

DD

AT2

LCD

DA

T3

LCD

DA

T4LC

DD

AT5

LCD

DA

T6LC

DD

AT7

GN

D

GN

DLC

DD

AT8

LCD

DA

T9LC

DD

AT1

0LC

DD

AT1

1G

ND

LCD

DA

T12

LCD

DA

T13

LCD

DA

T14

LCD

DA

T15

GN

D

LCD

DA

T16

LCD

DA

T17

LCD

DA

T18

LCD

DA

T19

GN

D

LCD

DA

T20

LCD

DA

T21

LCD

DA

T22

LCD

DA

T23

GN

D

IRQ

2

TWD

0

LCD

VC

CV

CC

GN

D

LCD

DIS

P

LCD

VS

YN

C

LCD

DE

N

SPI1

_MIS

O/A

D1_

XM

SP

I1_S

PC

K/A

D3_

YM

LCD

DA

T0

Res

et

IRQ

1TW

CK

0

LCD

PW

M

LCD

HS

YN

C

LCD

PC

K

SP

I1_M

OS

I/AD

2_Y

P

SP

I1_N

PC

S2/

AD

0_X

P

GN

DLC

DD

AT1

LCD

DAT

0/JT

AG_T

MS

LCD

DA

T7LC

DD

AT6

LCD

DA

T5LC

DD

AT4

LCD

DA

T3LC

DD

AT2

LCD

DA

T12

LCD

DA

T11

LCD

DA

T10

LCD

DA

T9LC

DD

AT8/

JTAG

_TC

K

LCD

DA

T17

LCD

DAT

16/N

TRST

LCD

DA

T15

LCD

DA

T14

LCD

DA

T13

LCD

DA

T23

LCD

DA

T22

LCD

DA

T21

LCD

DA

T20

LCD

DA

T19

LCD

DA

T18

LCD

PC

KLC

DH

SY

NC

LCD

VS

YN

CLC

DD

ISP/

HD

MI_

INT

LCD

PW

M/H

DM

I_M

CK

SC

K2/

ISI_

PC

KG

0_TX

CK

TWC

K0

TWD

0LC

DD

EN

G0_

RXE

RG

0_R

XD

VTX

D2/

PCK2

RXD

2/IS

I_H

SYN

CC

TS2/

ISI_

VS

YN

CG

0_TX

EN

G0_

TX1

G0_

TX0

RTS

2/P

WM

H1

G0_

RX

1G

0_R

X0

G0_

MD

IOG

0_M

DC

SP

I2_N

PC

S2/

PW

ML0

/HD

MI_

RS

TS

PI2

_NP

CS

1/P

WM

H0

SP

I1_N

PC

S2

SP

I1_N

PC

S1

SP

I1_N

PC

S0

SP

I1_S

PC

KS

PI1

_MO

SI

SP

I1_M

ISO

SPI2

_NPC

S3/H

DM

I_TD

0/PW

MH

1S

PI1

_NP

CS

3/H

DM

I_TK

0/P

WM

L0P

CK

0/R

K0/

PW

MH

0JT

AG_T

DO

JTAG

_TD

I

SP

I0_M

ISO

/PW

MH

2/IS

I_D

8

PC

K2/

PW

ML1

HD

MI_

TF0

TWC

K2/

RF0

TWD

2/R

D0/

PW

ML1

MC

I0_C

DA

/NA

ND

_D0

MC

I0_C

K/P

CK

1S

PI0

_NP

CS

0/P

WM

L3/IS

I_D

11S

PI0

_SP

CK

/PW

MH

3/IS

I_D

10S

PI0

_MO

SI/P

WM

L2/IS

I_D

9

NA

ND

_NC

S3

NW

E/N

AN

D_W

EN

AN

D_R

E

NA

ND

_D6

NA

ND

_D5

MC

I0_D

A3/

NA

ND

_D4

MC

I0_D

A2/

NA

ND

_D3

MC

I0_D

A1/

NA

ND

_D2

MC

I0_D

A0/

NA

ND

_D1

AD

0_X

P/P

WM

L0

NA

ND

_CLE

NA

ND

_ALE

NA

ND

_RD

Y

NA

ND

_D7

AD

3_Y

M/P

WM

H0

AD

4/P

WM

H1

AD

2_Y

P/P

WM

FI0

AD

1_X

M/P

WM

L1

PIOA

PIOA

PIOC

PIOC

PIOB

PIOB

PA

17P

A18

PA

21P

A20

PA

19

PA

16

PA

24P

A23

PA

22

PA

27P

A26

PA

31

PA

25

PA

30P

A29

PA

28

PB

3P

B4

PB

0

PB

5P

B6

PB

7

PB

1P

B2

PB

13

PB

8

PB

12P

B11

PB

10P

B9

PB

15P

B14

PB

16P

B17

PB

18

PC

5

PC

0P

C1

PC

7P

C8

PC

9

PC

2P

C3

PC

4

PC

10P

C11

PC

12P

C13

PC

6

PC

14P

C15

PC

16P

C17

PC

19P

C20

PC

21

PC

29

PC

22P

C23

PC

24P

C25

PC

18

PC

31

PC

26P

C27

PC

28

PC

30

PB

19

PB

21

PB

29P

B28

PB

22P

B23

PB

24

PB

26

PB

30

PB

20

PB

31

PB

25

PB

27P

A11

PA

12

PA

6P

A7

PA

8P

A9

PA

10

PA

1P

A2

PA

3P

A4

PA

5

PA

0

PA

13P

A14

PA

15

ISI_

D2/

TD1

ISI_

D1/

TF1

ISI_

D0/

TK1

ISI_

D6/

TWD

3/U

RXD

1IS

I_D

5/R

K1/

PC

K1

ISI_

D4/

RD

1IS

I_D

3/R

F1

ISI_

D7/

TWC

K3/U

TXD

1

JP6

JP7

JUMPER DESCRIPTION

JP2

JP3

JP4

JP5

JP1

JP8

Dis

able

ED

BG

OP

EN

SH

OR

TI_

VC

C_3

V3

Mea

sure

men

tS

HO

RT

I_1V

2_H

DM

I Mea

sure

men

t

SH

OR

TI_

VD

DB

U M

easu

rem

ent

OP

EN

Dis

able

CS

SP

I&N

and

Flas

h M

emor

yD

NP

CS

SP

I Fla

sh M

emor

y

SH

OR

TI_

VD

DC

OR

E M

easu

rem

ent

SH

OR

TI_

VD

DIO

DD

R_M

PU

Mea

sure

men

t

EG

AS

UE

GA

SU

EGASU

EGASU

EGASU

EGASU

EGASU

EGASU

EGASU

EGASU

PART

DEFAULT

FUNCTION


Figure 4-52. Power Supply

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

VD

DR

EF

PW

RH

LD

PW

RH

LD

VD

DR

EF

VD

DB

U_3

V

VC

C_5

V

VD

DC

OR

E

VD

DIO

DD

R

VD

DB

U_2

V

VC

C_1

V8

1V2_

HD

MI VC

C_3

V3

VC

C_3

V3

FUS

E_2

V5 VD

DA

NA

VC

C_5

V

VO

UT6

VD

DIO

P

VD

DIO

M

VD

DU

TMII

VD

DIO

DD

R_M

PU

VC

C_2

V

VC

C_2

V

VC

C_3

V3

VO

UT7

VC

C_E

DB

G

VC

C_5

V

VC

C_5

V_I

N

SH

DN

[9]

WK

UP

[9]

PM

IC_I

RQ

_PE

25[9

]

PM

IC_T

WC

K3_

PC

26[8

]P

MIC

_TW

D3_

PC

25[8

]

NR

ST_

2V[9

]

NR

ST_

3V3

[10,

12,1

4,15

]

NR

ST_

3V3

[10,

12,1

4,15

]

US

B_V

BU

S_5

V[1

0]

EX

P_5

V[1

5]

ED

BG

_US

B_V

BU

S_5

V[1

4]

EX

P_V

BA

T[1

5]

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

4 15A

XX

-XX

-XX

Xin

JQX

XX

Pow

er S

uppl

y

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

4 15A

XX

-XX

-XX

Xin

JQX

XX

Pow

er S

uppl

y

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

4 15A

XX

-XX

-XX

Xin

JQX

XX

Pow

er S

uppl

y

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

(3V

3)

(1V

8)

(2V

5)

RES

ET

Pla

ce T

P13

and

TP

14 to

Bot

tom

.

WA

KE

UP

RES

ET5V/2

A In

put

BP

3Ta

ct S

witc

hB

P3

Tact

Sw

itch

R40

010

0K 1

%R

400

100K

1%

R40

710

0K 1

%R

407

100K

1%

C23 22

uFC

23 22uF

R40

8D

NP

(0R

)R

408

DN

P(0

R)

Q1

IRLM

L250

2Q

1IR

LML2

502

1

3 2

C17

11u

FC

171

1uF

C17

54.

7uF

C17

54.

7uF

U16

NC

P34

9MN

AE

TBG

U16

NC

P34

9MN

AE

TBG

IN1

FLA

G3

EN

6

OU

T14

GN

D2

OU

T25

IN_p

ad7

R18

8

110K

1%

R18

8

110K

1%

C64

100n

FC

6410

0nF

C25

10uF

C25

10uF

R17

1KR

171K

TP13

SM

DTP

13S

MD

C17

64.

7uF

C17

64.

7uF

L42.

2uH

L42.

2uH

R22

0RR

220R

C14

4.7u

FC

144.

7uF

U13

NC

P46

82D

SQ

20T1

G

U13

NC

P46

82D

SQ

20T1

G

VIN

4

GN

D2

CE

1

VO

UT

3

R54

0RR

540R

U2

AC

T886

5QI3

05-T

U2

AC

T886

5QI3

05-T

VP

131

VP

226

VP

316

VD

DR

EF

23

VS

EL

20

NC

118

PW

RE

N17

nPB

STA

T13

nIR

Q12

nRS

TO11

PW

RH

LD10

SC

L21

SD

A22

RE

FBP

32

nPB

IN9

INL4

55

INL6

76

SW

130

OU

T11

SW

227

OU

T224

SW

315

OU

T319

OU

T43

OU

T54

OU

T67

OU

T78

GA 2

GP1 29GP2 28GP3 14

EP 33

NC

225R40

310

0K 1

%R

403

100K

1%

C3

100n

FC

310

0nF

L7

180o

hm a

t 100

MH

z

L7

180o

hm a

t 100

MH

z

12

Q5

IRLM

L640

2Q

5IR

LML6

402

1

32

R78

0RR

780R

R40

1D

NP

(0R

)R

401

DN

P(0

R)

R16

1

4.7KR16

1

4.7K

R18 10KR18 10K

JP4

DN

P(H

eade

r 1X

2)JP

4D

NP

(Hea

der 1

X2)

12

C24

10uF

C24

10uF

R33

3D

NP

(0R

)R

333

DN

P(0

R)

PC

B1

SA

MA

5D4-

XU

LT P

CB

PC

B1

SA

MA

5D4-

XU

LT P

CB

R40

90R

R40

90R

R2

49.9

K 1

%R

249

.9K

1%

C16

4.7u

FC

164.

7uF

C1

10uF

C1

10uF

C21

100n

FC

2110

0nF

L26

180o

hm a

t 100

MH

z

L26

180o

hm a

t 100

MH

z

12

D11

BA

T54C

D11

BA

T54C

31 2

Q8

IRLM

L640

2Q

8IR

LML6

402

1

32

JP2

DN

P(H

eade

r 1X

2)JP

2D

NP

(Hea

der 1

X2)

12

C17

010

0nF

C17

010

0nF

R18

7

68K

R18

7

68K

R40

20R

R40

20R

Q7

IRLM

L640

2Q

7IR

LML6

402

1

32

L12.

2uH

L12.

2uH

C10

DN

P(1

00nF

)C

10D

NP

(100

nF)

C12

4.7u

FC

124.

7uF

L24

180o

hm a

t 100

MH

z

L24

180o

hm a

t 100

MH

z

12

C19

42.

2uF

C19

42.

2uF

C19

02.

2uF

C19

02.

2uF

J4

DN

P(D

C J

ack)

J4

DN

P(D

C J

ack)

1 23

L32.

2uH

L32.

2uH

R1

100K

1%

R1

100K

1%

TP14

SM

DTP

14S

MD

C2

10uF

C2

10uF

C18

4.7u

FC

184.

7uF

JP6

DN

P(H

eade

r 1X

2)JP

6D

NP

(Hea

der 1

X2)

12

C85

100n

FC

8510

0nF

R55

1R 1

%R

551R

1%

C27

10uF

C27

10uF

R41

00R

R41

00R

Q6

IRLM

L640

2Q

6IR

LML6

402

1

32

C4

10nF

C4

10nF

R19 10KR19 10K

C10

91u

FC

109

1uF

L19

180o

hm a

t 100

MH

z

L19

180o

hm a

t 100

MH

z

12

C82 1u

FC

82 1uF

BP

2Ta

ct S

witc

hB

P2

Tact

Sw

itch

C26

10uF

C26

10uF

C6

100n

FC

610

0nF

C5

DN

P(1

00nF

)C

5D

NP

(100

nF)

C18

74.

7uF

C18

74.

7uF

BA

T1

Bat

tery

Hol

der_

3V

BA

T1

Bat

tery

Hol

der_

3V

VCC1 GND 2

JP5

DN

P(H

eade

r 1X

2)JP

5D

NP

(Hea

der 1

X2)

12

C17

747

nFC

177

47nF

R16

49.9

K 1

%R

1649

.9K

1%

JP3

DN

P(H

eade

r 1X

2)JP

3D

NP

(Hea

der 1

X2)

12

L6

180o

hm a

t 100

MH

z

L6

180o

hm a

t 100

MH

z

12

C19 1u

FC

19 1uF

C28

10uF

C28

10uF


60

Figure 4-53. SAMA5D44 - Power

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

VD

DU

TMIC

VD

DP

LLA

VD

DU

TMIC

VD

DP

LLA

VD

DO

SC

VD

DO

SC

GN

DU

TMI

GN

DU

TMI

VD

DB

U_2

V

VC

CC

OR

E_1

V2

VC

CC

OR

E_1

V2

VD

DC

OR

E

VD

DIO

DD

R_M

PU

VD

DIO

P

VD

DU

TMII

VD

DIO

M

FUS

E_2

V5

VD

DA

NA

VC

C_3

V3

FUS

E_2

V5

VC

C_5

V

VD

DB

U_2

V

VC

C_3

V3

VC

CC

OR

E_1

V2

VC

C_1

V8

VC

C_E

DB

G

VO

UT6

VO

UT7

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

5 15A

XX

-XX

-XX

Xin

JQX

XX

SA

MA

5D44

- Pow

er

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

5 15A

XX

-XX

-XX

Xin

JQX

XX

SA

MA

5D44

- Pow

er

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

5 15A

XX

-XX

-XX

Xin

JQX

XX

SA

MA

5D44

- Pow

er

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

POW

ER T

EST

POIN

TS

A c

oppe

r pla

nfo

r GN

DU

TMI c

over

all U

SB

com

pom

ents

C90

clo

se to

Pin

P14

of U

6.

(1V

8)

(1V

2)

(1V

8)

(3V

3)

(3V

3)

(3V

3)

(3V

3)

(3V

3)

(1V

2)

(1V

2)

(2V

5)

(2V

)

C13

510

0nF

C13

510

0nF

C11

910

0nF

C11

910

0nF

C11

710

0nF

C11

710

0nF

C91

100n

FC

9110

0nF

C10

710

0nF

C10

710

0nF C

128

100n

FC

128

100n

F

C13

110

uFC

131

10uF

C89

100n

FC

8910

0nF

TP9

SM

DTP

9S

MD

C16

310

uFC

163

10uF

C14

010

0nF

C14

010

0nF

C95

100n

FC

9510

0nF

C84

100n

FC

8410

0nF

C11

810

0nF

C11

810

0nF

C55

4.7u

FC

554.

7uF

C13

010

0nF

C13

010

0nF

C98

100n

FC

9810

0nF

C10

310

0nF

C10

310

0nF

TP16

SM

DTP

16S

MD

C11

01n

FC

110

1nF

TP4

SM

DTP

4S

MD

L25

60oh

m a

t 100

MH

zL2

560

ohm

at 1

00M

Hz

12

C78

100n

FC

7810

0nFC

162

10uF

C16

210

uF

C76

10uF

C76

10uF

L23

60oh

m a

t 100

MH

zL2

360

ohm

at 1

00M

Hz

12

TP10

SM

DTP

10S

MD

C11

110

0nF

C11

110

0nF

C10

410

0nF

C10

410

0nF

TP17

SM

DTP

17S

MD

C10

21n

FC

102

1nF

C12

210

0nF

C12

210

0nF

C13

710

0nF

C13

710

0nF

L20

10uH

_150

mA

L20

10uH

_150

mA

TP5

SM

DTP

5S

MD

C90

100n

FC

9010

0nF

C13

910

0nF

C13

910

0nF

C10

010

0nF

C10

010

0nF

C88

100n

FC

8810

0nF

C87

100n

FC

8710

0nF

C77

100n

FC

7710

0nF

C92

100n

FC

9210

0nF

TP12

SM

DTP

12S

MD

C12

110

0nF

C12

110

0nF

TP15

SM

DTP

15S

MD

R35

50R

R35

50R

C11

410

0nF

C11

410

0nF

C11

510

0nF

C11

510

0nF

R33

41R

1%

R33

41R

1%

C99

100n

FC

9910

0nF

C11

310

0nF

C11

310

0nF

C13

210

uFC

132

10uF

C93

100n

FC

9310

0nF

TP8

SM

DTP

8S

MD

C96

100n

FC

9610

0nF

C73

100n

FC

7310

0nF

C11

210

uFC

112

10uF

TP11

SM

DTP

11S

MD

C10

110

0nF

C10

110

0nF

TP3

SM

DTP

3S

MD

TP18

SM

DTP

18S

MD

C12

310

0nF

C12

310

0nF

C12

410

0nF

C12

410

0nF

U6D

SA

MA

5D44

A-C

U

U6D

SA

MA

5D44

A-C

U

VD

DB

UW

4G

ND

BU

W1

VD

DC

OR

E_1

G8

GN

DC

OR

E_1

H8

VC

CC

OR

E_1

J7

VD

DIO

DD

R_1

E10

GN

DIO

DD

R_1

F10

VD

DIO

M_1

N7

GN

DIO

M_1

M7

VD

DIO

P_1

L5G

ND

IOP

_1G

6

VD

DU

TMIC

V13

VD

DU

TMII_

1W

13G

ND

UTM

IP

13

VD

DP

LLA

W10

GN

DP

LLL7

GN

DO

SC

N13

VD

DO

SC

P14

VD

DA

NA

_1C

9G

ND

AN

A_1

C10

VD

DFU

SE

R14

GN

DFU

SE

R15

GN

DIO

P_2

J6G

ND

IOP

_3L6

GN

DIO

P_4

N6

VD

DIO

P_2

K6

VD

DIO

P_3

M6

VD

DIO

P_4

H7

VC

CC

OR

E_2

K7

GN

DIO

M_2

N8

VD

DIO

M_2

M8

GN

DC

OR

E_2

J8

VC

CC

OR

E_3

K8

GN

DC

OR

E_3

L8G

ND

CO

RE

_4D

9G

ND

CO

RE

_5F9

VC

CC

OR

E_4

L9

GN

DC

OR

E_6

M9

VD

DC

OR

E_2

N9

GN

DIO

M_3

P9

VD

DIO

M_3

R9

GN

DC

OR

E_7

B10

GN

DC

OR

E_8

D10

GN

DC

OR

E_9

L10

GN

DC

OR

E_1

0M

10V

CC

CO

RE

_5N

10

GN

DIO

DD

R_2

E11

GN

DIO

DD

R_3

G11

VC

CC

OR

E_6

J11

GN

DC

OR

E_1

1K

11G

ND

CO

RE

_12

M11

GN

DC

OR

E_1

3J1

2G

ND

CO

RE

_14

L12

VC

CC

OR

E_7

L11

VD

DA

NA

_2N

11

VD

DIO

DD

R_2

E12

VD

DIO

DD

R_3

H12

GN

DIO

M_4

M12

GN

DA

NA

_2N

12V

DD

AN

A_3

P12

GN

DIO

DD

R_4

C13

GN

DIO

DD

R_5

J13

VD

DIO

DD

R_4

K13

GN

DIO

DD

R_6

L13

VD

DIO

DD

R_5

M13

VD

DIO

DD

R_6

C14

VD

DIO

DD

R_7

F14

GN

DIO

DD

R_7

G14

GN

DIO

DD

R_8

C17

GN

DIO

DD

R_9

G17

GN

DIO

DD

R_1

0K

18

VD

DIO

DD

R_8

D17

VD

DIO

DD

R_9

H16

VD

DIO

DD

R_1

0K

17

VD

DIO

M_4

P15

VD

DU

TMII_

2W

17

GN

DC

OR

E_1

5V

18G

ND

CO

RE

_16

W18

GN

DS

C1

F7

GN

DS

CIO

G7

GN

DS

CA

B8

GN

DS

CIO

AC

8

GN

DS

CB

E8

GN

DS

CIO

BF8

GN

DM

S_1

A11

GN

DM

S_2

H11

C70

100n

FC

7010

0nF

C10

81n

FC

108

1nF


Figure 4-54. SAMA5D44 - DDR2

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

MP

U_D

DR

2_A

0M

PU

_DD

R2_

A1

MP

U_D

DR

2_A

2M

PU

_DD

R2_

A3

MP

U_D

DR

2_A

4M

PU

_DD

R2_

A5

MP

U_D

DR

2_A

6M

PU

_DD

R2_

A7

MP

U_D

DR

2_A

8M

PU

_DD

R2_

A9

MP

U_D

DR

2_A

10M

PU

_DD

R2_

A11

MP

U_D

DR

2_A

12M

PU

_DD

R2_

A13

MP

U_D

DR

2_B

A0

MP

U_D

DR

2_B

A1

MP

U_D

DR

2_B

A2

MP

U_D

DR

2_C

Sn

MP

U_D

DR

2_R

AS

nM

PU

_DD

R2_

CA

Sn

MP

U_D

DR

2_W

En

MP

U_D

DR

2_C

K+

MP

U_D

DR

2_C

KE

n

DD

R2_

VR

EF

MP

U_D

DR

2_D

M0

MP

U_D

DR

2_D

M1

MP

U_D

DR

2_D

QS

0+M

PU

_DD

R2_

DQ

S0-

MP

U_D

DR

2_D

QS

1+M

PU

_DD

R2_

DQ

S1-

MP

U_D

DR

2_D

QS

2+M

PU

_DD

R2_

DQ

S2-

MP

U_D

DR

2_D

QS

3+M

PU

_DD

R2_

DQ

S3-

MP

U_D

DR

2_D

M3

MP

U_D

DR

2_D

M2

MP

U_D

DR

2_A

0M

PU

_DD

R2_

A1

MP

U_D

DR

2_A

2M

PU

_DD

R2_

A3

MP

U_D

DR

2_A

4M

PU

_DD

R2_

A5

MP

U_D

DR

2_A

6M

PU

_DD

R2_

A7

MP

U_D

DR

2_A

8M

PU

_DD

R2_

A9

MP

U_D

DR

2_A

10M

PU

_DD

R2_

A11

MP

U_D

DR

2_A

12M

PU

_DD

R2_

A13

MP

U_D

DR

2_B

A0

MP

U_D

DR

2_B

A1

MP

U_D

DR

2_B

A2

MP

U_D

DR

2_C

Sn

MP

U_D

DR

2_R

AS

nM

PU

_DD

R2_

CA

Sn

MP

U_D

DR

2_W

En

MP

U_D

DR

2_C

KE

n

MP

U_D

DR

2_C

K+

MP

U_D

DR

2_C

K-

MP

U_D

DR

2_C

K-

DD

R2_

VR

EF

DD

R2_

VR

EF

MP

U_D

DR

2_D

Q0

MP

U_D

DR

2_D

Q1

MP

U_D

DR

2_D

Q2

MP

U_D

DR

2_D

Q3

MP

U_D

DR

2_D

Q4

MP

U_D

DR

2_D

Q5

MP

U_D

DR

2_D

Q6

MP

U_D

DR

2_D

Q7

MP

U_D

DR

2_D

Q8

MP

U_D

DR

2_D

Q9

MP

U_D

DR

2_D

Q10

MP

U_D

DR

2_D

Q11

MP

U_D

DR

2_D

Q12

MP

U_D

DR

2_D

Q13

MP

U_D

DR

2_D

Q14

MP

U_D

DR

2_D

Q15

MP

U_D

DR

2_D

Q16

MP

U_D

DR

2_D

Q17

MP

U_D

DR

2_D

Q18

MP

U_D

DR

2_D

Q19

MP

U_D

DR

2_D

Q20

MP

U_D

DR

2_D

Q21

MP

U_D

DR

2_D

Q22

MP

U_D

DR

2_D

Q23

MP

U_D

DR

2_D

Q24

MP

U_D

DR

2_D

Q25

MP

U_D

DR

2_D

Q26

MP

U_D

DR

2_D

Q27

MP

U_D

DR

2_D

Q28

MP

U_D

DR

2_D

Q29

MP

U_D

DR

2_D

Q30

MP

U_D

DR

2_D

Q31

MP

U_D

DR

2_D

QS

0+M

PU

_DD

R2_

DQ

S0-

MP

U_D

DR

2_D

QS

1+M

PU

_DD

R2_

DQ

S1-

MP

U_D

DR

2_D

QS

2+M

PU

_DD

R2_

DQ

S2-

MP

U_D

DR

2_D

QS

3+M

PU

_DD

R2_

DQ

S3-

MP

U_D

DR

2_D

M0

MP

U_D

DR

2_D

M1

MP

U_D

DR

2_D

M2

MP

U_D

DR

2_D

M3

MP

U_D

DR

2_B

A2

MP

U_D

DR

2_B

A1

MP

U_D

DR

2_B

A0

MP

U_D

DR

2_W

En

MP

U_D

DR

2_C

AS

nM

PU

_DD

R2_

RA

Sn

MP

U_D

DR

2_C

Sn

MP

U_D

DR

2_C

KE

n

MP

U_D

DR

2_C

K+

MP

U_D

DR

2_C

K-

MP

U_D

DR

2_A

13M

PU

_DD

R2_

A12

MP

U_D

DR

2_A

11M

PU

_DD

R2_

A10

MP

U_D

DR

2_A

9M

PU

_DD

R2_

A8

MP

U_D

DR

2_A

7M

PU

_DD

R2_

A6

MP

U_D

DR

2_A

5M

PU

_DD

R2_

A4

MP

U_D

DR

2_A

3M

PU

_DD

R2_

A2

MP

U_D

DR

2_A

1M

PU

_DD

R2_

A0

MP

U_D

DR

2_C

K+

MP

U_D

DR

2_C

K-

MP

U_D

DR

2_D

Q0

MP

U_D

DR

2_D

Q1

MP

U_D

DR

2_D

Q2

MP

U_D

DR

2_D

Q3

MP

U_D

DR

2_D

Q4

MP

U_D

DR

2_D

Q5

MP

U_D

DR

2_D

Q6

MP

U_D

DR

2_D

Q7

MP

U_D

DR

2_D

Q8

MP

U_D

DR

2_D

Q9

MP

U_D

DR

2_D

Q10

MP

U_D

DR

2_D

Q11

MP

U_D

DR

2_D

Q12

MP

U_D

DR

2_D

Q13

MP

U_D

DR

2_D

Q14

MP

U_D

DR

2_D

Q15

MP

U_D

DR

2_D

Q16

MP

U_D

DR

2_D

Q17

MP

U_D

DR

2_D

Q18

MP

U_D

DR

2_D

Q19

MP

U_D

DR

2_D

Q20

MP

U_D

DR

2_D

Q21

MP

U_D

DR

2_D

Q22

MP

U_D

DR

2_D

Q23

MP

U_D

DR

2_D

Q24

MP

U_D

DR

2_D

Q25

MP

U_D

DR

2_D

Q26

MP

U_D

DR

2_D

Q27

MP

U_D

DR

2_D

Q28

MP

U_D

DR

2_D

Q29

MP

U_D

DR

2_D

Q30

MP

U_D

DR

2_D

Q31

DD

R2_

VR

EF

VD

DIO

DD

R

VD

DIO

DD

R

VD

DIO

DD

R

VD

DIO

DD

R

VD

DIO

DD

R

VD

DIO

DD

R

VD

DIO

DD

R

VD

DIO

DD

R

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

6 15A

XX

-XX

-XX

Xin

JQX

XX

SA

MA

5D44

- DD

R2

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

6 15A

XX

-XX

-XX

Xin

JQX

XX

SA

MA

5D44

- DD

R2

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

6 15A

XX

-XX

-XX

Xin

JQX

XX

SA

MA

5D44

- DD

R2

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

DD

R2

Add

ress

, con

trol a

nd d

ata

trace

s m

ay n

ot e

xcee

d 1.

3 in

ches

(33.

0 m

m).

Add

ress

, con

trol a

nd d

ata

trace

s m

ust b

e le

ngth

-mat

ched

to w

ithin

0.1

inch

(2.5

4mm

).A

ddre

ss, c

ontro

l and

dat

a tra

ces

mus

t mat

ch th

e da

ta g

roup

trac

e le

ngth

s to

with

in 0

.25

inch

es (6

.35m

m).

Kee

p ne

ts a

s sh

ort a

s po

ssib

le, t

here

fore

, DD

R2

devi

ces

have

to b

e pl

aced

clo

se a

s po

ssib

le o

f SA

MA

5D44

The

layo

ut E

BI D

DR

2 s

houl

d us

e co

ntro

lled

impe

danc

e tra

ces

of Z

O=

50oh

m c

hara

cter

istic

impe

danc

e.

MC

U_D

DR

Rou

ting

top

or b

otto

m

100

ohm

s di

ffere

ntia

l tra

ceim

peda

nce

Rou

ting

top

or b

otto

m

100

ohm

s di

ffere

ntia

l tra

ceim

peda

nce

R17

10R

R17

10R

C53

100n

FC

5310

0nF

C15

910

0nF

C15

910

0nF

C14

32.

2uF

C14

32.

2uF

R34

7D

NP

(100

R 1

%)

R34

7D

NP

(100

R 1

%)

L17

10uH

_150

mA

L17

10uH

_150

mA

R24

420

0R 1

%R

244

200R

1%

C14

810

0nF

C14

810

0nF

C51

100n

FC

5110

0nF

C61

2.2u

FC

612.

2uF

C14

910

0nF

C14

910

0nF

C12

710

0nF

C12

710

0nF

U7

MT4

7H12

8M16

RT-

25E

:C

U7

MT4

7H12

8M16

RT-

25E

:C

A0

M8

A1

M3

A2

M7

A3

N2

A4

N8

A5

N3

A6

N7

A7

P2

A8

P8

A9

P3

BA

0L2

BA

1L3

BA

2L1

VDD1A1VDD2E1VDD3J9VDD4M9VDD5R1

VDDQ1A9VDDQ2C1VDDQ3C3VDDQ4C7

VSS1 A3VSS2 E3VSS3 J3VSS4 N1VSS5 P9

VS

SD

LJ7

VSSQ1 A7VSSQ2 B8VSSQ3 D2VSSQ4 D8VSSQ5 E7

RFU

_R3

R3

DQ

0G

8D

Q1

G2

DQ

2H

7D

Q3

H3

DQ

4H

1D

Q5

H9

DQ

6F1

DQ

7F9

A10

M2

A11

P7

A12

R2

LDQ

SF7

LDQ

SE

8

UD

QS

B7

UD

QS

A8

DQ

8C

8D

Q9

C2

DQ

10D

7D

Q11

D3

DQ

12D

1D

Q13

D9

DQ

14B

1D

Q15

B9

VDDQ5C9VDDQ6E9VDDQ7G1VDDQ8G3VDDQ9G7

VSSQ6 F2VSSQ7 F8VSSQ8 H2VSSQ9 H8

A13

R8

NC

_E2

E2

NC

_A2

A2

CK

J8C

KK

8C

KE

K2

CS

L8R

AS

K7

CA

SL7

WE

K3

OD

TK

9

VR

EF

J2

LDM

F3U

DM

B3

VDDQ10G9

VD

DL

J1R

FU_R

7R

7

VSSQ10 B2

R24

320

0R 1

%R

243

200R

1%

C81

100n

FC

8110

0nF

C15

010

0nF

C15

010

0nF

C75

100n

FC

7510

0nF

C79

100n

FC

7910

0nF

U4

MT4

7H12

8M16

RT-

25E

:C

U4

MT4

7H12

8M16

RT-

25E

:C

A0

M8

A1

M3

A2

M7

A3

N2

A4

N8

A5

N3

A6

N7

A7

P2

A8

P8

A9

P3

BA

0L2

BA

1L3

BA

2L1

VDD1A1VDD2E1VDD3J9VDD4M9VDD5R1

VDDQ1A9VDDQ2C1VDDQ3C3VDDQ4C7

VSS1 A3VSS2 E3VSS3 J3VSS4 N1VSS5 P9

VS

SD

LJ7

VSSQ1 A7VSSQ2 B8VSSQ3 D2VSSQ4 D8VSSQ5 E7

RFU

_R3

R3

DQ

0G

8D

Q1

G2

DQ

2H

7D

Q3

H3

DQ

4H

1D

Q5

H9

DQ

6F1

DQ

7F9

A10

M2

A11

P7

A12

R2

LDQ

SF7

LDQ

SE

8

UD

QS

B7

UD

QS

A8

DQ

8C

8D

Q9

C2

DQ

10D

7D

Q11

D3

DQ

12D

1D

Q13

D9

DQ

14B

1D

Q15

B9

VDDQ5C9VDDQ6E9VDDQ7G1VDDQ8G3VDDQ9G7

VSSQ6 F2VSSQ7 F8VSSQ8 H2VSSQ9 H8

A13

R8

NC

_E2

E2

NC

_A2

A2

CK

J8C

KK

8C

KE

K2

CS

L8R

AS

K7

CA

SL7

WE

K3

OD

TK

9

VR

EF

J2

LDM

F3U

DM

B3

VDDQ10G9

VD

DL

J1R

FU_R

7R

7

VSSQ10 B2

R34

10R

R34

10R

C67

100n

FC

6710

0nF

C69

100n

FC

6910

0nF

C58

1nF

C58

1nF

C13

610

0nF

C13

610

0nF

C72

100n

FC

7210

0nF

C15

710

0nF

C15

710

0nF

C71

100n

FC

7110

0nF

C60

1nF

C60

1nF

C54

100n

FC

5410

0nF

R33

11R

1%

R33

11R

1%

C12

510

0nF

C12

510

0nF

U6B

SA

MA

5D44

A-C

U

U6B

SA

MA

5D44

A-C

U

DD

R_A

0F1

5D

DR

_A1

F16

DD

R_A

2E

17D

DR

_A3

G15

DD

R_A

4B

18D

DR

_A5

C16

DD

R_A

6E

15D

DR

_A7

F17

DD

R_A

8F1

8D

DR

_A9

D19

DD

R_A

10E

18D

DR

_A11

D18

DD

R_A

12C

18D

DR

_A13

D16

DD

R_D

0L1

4D

DR

_D1

K16

DD

R_D

2K

15D

DR

_D3

K14

DD

R_D

4J1

8D

DR

_D5

J17

DD

R_D

6J1

5D

DR

_D7

H19

DD

R_D

8H

18D

DR

_D9

J14

DD

R_D

10G

18D

DR

_D11

H17

DD

R_D

12H

15D

DR

_D13

H14

DD

R_D

14G

16D

DR

_D15

E19

DD

R_D

16E

14D

DR

_D17

E13

DD

R_D

18H

13D

DR

_D19

F13

DD

R_D

20B

15D

DR

_D21

A14

DD

R_D

22D

12D

DR

_D23

B14

DD

R_D

24B

13D

DR

_D25

G12

DD

R_D

26B

12D

DR

_D27

C12

DD

R_D

28F1

1D

DR

_D29

C11

DD

R_D

30D

11D

DR

_D31

B11

DD

R_D

QS

0J1

9

DD

R_D

QS

1F1

9

DD

R_D

QS

2A

15

DD

R_D

QS

3A

12

DD

R_D

QS

N0

K19

DD

R_D

QS

N1

G19

DD

R_D

QS

N2

A16

DD

R_D

QS

N3

A13

DD

R_D

QM

0L1

6D

DR

_DQ

M1

J16

DD

R_D

QM

2D

13D

DR

_DQ

M3

F12

DD

R_C

SB

16

DD

R_C

LKA

18D

DR

_CLK

NA

19

DD

R_C

KE

D15

DD

R_R

AS

B17

DD

R_C

AS

A17

DD

R_W

EE

16

DD

R_B

A1

D14

DD

R_B

A2

G13

DD

R_B

A0

C15

DD

R_C

ALN

C19

DD

R_C

ALP

B19

DD

R_V

RE

FK

12

C52

100n

FC

5210

0nF

C15

810

0nF

C15

810

0nF

C15

64.

7uF

C15

64.

7uF

C14

610

0nF

C14

610

0nF

C74

100n

FC

7410

0nF

C13

410

0nF

C13

410

0nF

R32

92.

2K 1

%R

329

2.2K

1%

C59

100n

FC

5910

0nF

C13

310

0nF

C13

310

0nF

C15

410

0nF

C15

410

0nF

C86

2.2u

FC

862.

2uF

C62

4.7u

FC

624.

7uF

C80

100n

FC

8010

0nF

C66

100n

FC

6610

0nF

C50

100n

FC

5010

0nF

C12

010

0nF

C12

010

0nF

C57

100n

FC

5710

0nF

C31

2.2u

FC

312.

2uF

R33

02.

2K 1

%R

330

2.2K

1%

C15

510

0nF

C15

510

0nF

C14

51n

FC

145

1nF

C56

100n

FC

5610

0nF

C15

11n

FC

151

1nF

C14

210

0nF

C14

210

0nF

C97

100n

FC

9710

0nF

C83

100n

FC

8310

0nF

C12

910

0nF

C12

910

0nF


62

Figure 4-55. SAMA5D44 - PIOA and PIOB

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

PA

14P

A15

PA

20P

A21

PA

0P

A1

PA

2P

A3

PA

4P

A5

PA

6P

A7

PA

8P

A9

PA

10P

A11

PA

12P

A13

PA

16P

A17

PA

18P

A19

PA

22P

A23

PA

28

PA

26P

A27

PA

1

PA

29

PA

3

PA

5

PA

6

PA

7

PA

8

PA

9

PA

0

PA

2

PA

10

PA

11

PA

12

PA

14

PA

15

PA

16

PA

17

PA

18

PA

19

PA

20

PA

21

PA

26

PA

13

PA

27

PA

28

PA

24P

A25

PA

30P

A31

PA

29

PA

25

PA

30

PA

4

PA

22

PA

23

PA

31

PB

26

PB

31

PB

27P

B28

PB

29P

B30

PB

20

PB

18P

B19

PB

15

PB

31

PB

28

PB

27

PB

15

PB

18

PB

19

PB

20

PB

26

PB

29

PB

30

PA

24

VC

C_3

V3

VD

DA

NA

VC

C_3

V3

HD

MI_

DA

T23_

PA

23[1

1]

HD

MI_

DA

T22_

PA

22[1

1]

HD

MI_

DA

T21_

PA

21[1

1]

HD

MI_

DA

T20_

PA

20[1

1]

HD

MI_

DA

T19_

PA

19[1

1]

HD

MI_

DA

T17_

PA

17[1

1]

HD

MI_

DA

T18_

PA

18[1

1]

HD

MI_

DA

T16_

PA

16[1

1]

HD

MI_

DA

T15_

PA

15[1

1]

HD

MI_

DA

T14_

PA

14[1

1]

HD

MI_

DA

T12_

PA

12[1

1]

HD

MI_

DA

T9_P

A9

[11]

HD

MI_

DA

T10_

PA

10[1

1]

HD

MI_

DA

T8_P

A8

[11]

HD

MI_

DA

T7_P

A7

[11]

HD

MI_

DA

T5_P

A5

[11]

HD

MI_

DA

T6_P

A6

[11]

HD

MI_

DA

T4_P

A4

[11]

HD

MI_

DA

T3_P

A3

[11]

HD

MI_

DA

T1_P

A1

[11]

HD

MI_

DA

T2_P

A2

[11]

HD

MI_

DA

T0_P

A0

[11]

TMS

[10,

14]

LCD

_HS

YN

C_P

A27

[10]

LCD

_DE

N_P

A29

[10]

LCD

_PC

K_P

A28

[10]

TCK

[10,

14]

HD

MI_

DA

T11_

PA

11[1

1]

NTR

ST

[10]

HD

MI_

DA

T13_

PA

13[1

1]

HD

MI_

VS

YN

C_P

A26

[11]

LCD

_VS

YN

C_P

A26

[10]

HD

MI_

HS

YN

C_P

A27

[11]

HD

MI_

PC

K_P

A28

[11]

HD

MI_

DE

N_P

A29

[11]

LCD

_TW

CK

0_P

A31

[10]

LCD

_TW

D0_

PA

30[1

0]

LCD

_DIS

P_P

A25

[10]

LCD

_DA

T0_P

A0

[10]

LCD

_DA

T1_P

A1

[10]

LCD

_DA

T2_P

A2

[10]

LCD

_DA

T3_P

A3

[10]

LCD

_DA

T4_P

A4

[10]

LCD

_DA

T5_P

A5

[10]

LCD

_DA

T6_P

A6

[10]

LCD

_DA

T7_P

A7

[10]

LCD

_DA

T8_P

A8

[10]

LCD

_DA

T9_P

A9

[10]

LCD

_DA

T10_

PA

10[1

0]

LCD

_DA

T11_

PA

11[1

0]

LCD

_DA

T12_

PA

12[1

0]

LCD

_DA

T13_

PA

13[1

0]

LCD

_DA

T14_

PA

14[1

0]

LCD

_DA

T15_

PA

15[1

0]

LCD

_DA

T16_

PA

16[1

0]

LCD

_DA

T17_

PA

17[1

0]

LCD

_DA

T18_

PA

18[1

0]

LCD

_DA

T19_

PA

19[1

0]

LCD

_DA

T20_

PA

20[1

0]

LCD

_DA

T21_

PA

21[1

0]

LCD

_DA

T22_

PA

22[1

0]

LCD

_DA

T23_

PA

23[1

0]

HD

MI_

TWD

0_P

A30

[11]

HD

MI_

TWC

K0_

PA

31[1

1]

EE

PR

OM

_TW

D0_

PA

30[8

]

EE

PR

OM

_TW

CK

0_P

A31

[8]

HD

MI_

INT_

PA

25[1

1]

EX

P_T

WC

K0_

PA

31[1

5]

EX

P_T

WD

0_P

A30

[15]

G0_

TX1_

PB

13[1

2]

EX

P_P

B3

[15]

EX

P_P

B4

[15]

G0_

MD

C_P

B16

[12]

EX

P_P

B5

[15]

G0_

MD

IO_P

B17

[12]

EX

P_P

B10

[15]

G0_

TXC

K_P

B0

[12]

TDI

[10,

14]

TDO

[10,

14]

AR

EF

[15]

G0_

RX

DV

_PB

6[1

2]G

0_R

XE

R_P

B7

[12]

G0_

RX

0_P

B8

[12]

G0_

TXE

N_P

B2

[12]

EX

P_P

B11

[15]

G0_

RX

1_P

B9

[12]

EX

P_P

B1

[15]

EX

P_P

B22

[15]

G0_

TX0_

PB

12[1

2]

EX

P/X

PR

O_P

B18

[15]

EX

P/X

PR

O_P

B19

[15]

EX

P/X

PR

O_P

B20

[15]

EX

P_P

B31

[15]

HD

MI_

TF0_

PB

31[1

1]

EX

P/X

PR

O_P

B27

[15]

EX

P_P

B28

[15]

HD

MI_

TD0_

PB

28[1

1]

HD

MI_

RS

T_P

B15

[11]

HD

MI_

TK0_

PB

27[1

1]

LCD

_SP

I1_M

ISO

_PB

18[1

0]

LCD

_SP

I1_M

OS

I_P

B19

[10]

LCD

_SP

I1_S

PC

K_P

B20

[10]

EX

P/X

PR

O_P

B15

[15]

LCD

_SP

I1_N

PC

S2_

PB

23[1

0]

EX

P/X

PR

O_P

B14

[15]

EX

P/X

PR

O_P

B21

[15]

EX

P/X

PR

O_P

B26

[15]

EX

P/X

PR

O_P

B29

[15]

EX

P/X

PR

O_P

B30

[15]

LCD

_PW

M_P

A24

[10]

HD

MI_

MC

K_P

A24

[11]

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

7 15A

XX

-XX

-XX

Xin

JQX

XX

SA

MA

5D44

- PIO

A &

PIO

B

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

7 15A

XX

-XX

-XX

Xin

JQX

XX

SA

MA

5D44

- PIO

A &

PIO

B

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

7 15A

XX

-XX

-XX

Xin

JQX

XX

SA

MA

5D44

- PIO

A &

PIO

B

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

PIO

A

PIO

B

TWI0

TWI2

R39

42.

2K 1

%R

394

2.2K

1%

R11

422

RR

114

22R

R41

22R

R41

22R

R70

22R

R70

22R

R36

939

RR

369

39R

R12

322

RR

123

22R

R98

22R

R98

22R

R62

22R

R62

22R

R17

422

RR

174

22R

R33

50R

R33

50R

R89

22R

R89

22R

R12

922

RR

129

22R

R44

22R

R44

22R

R10

022

RR

100

22R

R72

22R

R72

22R

R81

22R

R81

22R

R97

22R

R97

22R

R15

822

RR

158

22R

R11

622

RR

116

22R

R59

22R

R59

22R

R11

722

RR

117

22R

R46

22R

R46

22R

R73

22R

R73

22R

R36

22R

R36

22R

R14

822

RR

148

22R

R38

22R

R38

22R

R67

22R

R67

22R

R15

422

RR

154

22R

R12

722

RR

127

22R

R85

22R

R85

22R

U6E

SA

MA

5D44

A-C

U

U6E

SA

MA

5D44

A-C

UPB

0/G

0_TX

CK

C3

PB

1/G

0_R

XC

K/S

CK

2/IS

I_P

CK

A2

PB

2/G

0_TX

EN

B2

PB

3/G

0_TX

ER

/CTS

2/IS

I_V

SY

NC

C2

PB

4/G

0_C

RS

/RX

D2/

ISI_

HS

YN

CJ3

PB

5/G

0_C

OL/

TXD

2/P

CK

2H

2P

B6/

G0_

RX

DV

G2

PB

7/G

0_R

XE

RH

3P

B8/

G0_

RX

0F2

PB

9/G

0_R

X1

J2P

B10

/G0_

RX

2/P

CK

2/P

WM

L1F1

PB

11/G

0_R

X3/

RTS

2/P

WM

H1

K4

PB

12/G

0_TX

0D

2P

B13

/G0_

TX1

K3

PB

14/G

0_TX

2/S

PI2

_NP

CS

1/P

WM

H0

A1

PB

15/G

0_TX

3/S

PI2

_NP

CS

2/P

WM

L0E

2P

B16

/G0_

MD

CB

1P

B17

/G0_

MD

IOK

5P

B18

/SP

I1_M

ISO

/D8

K2

PB

19/S

PI1

_MO

SI/D

9C

1P

B20

/SP

I1_S

PC

K/D

10D

1P

B21

/SP

I1_N

PC

S0/

D11

L3P

B22

/SP

I1_N

PC

S1/

D12

G1

PB

23/S

PI1

_NP

CS

2/D

13H

1P

B24

/DR

XD

/D14

/TD

IE

1P

B25

/DTX

D/D

15/T

DO

J1P

B26

/PC

K0/

RK

0/P

WM

H0

M5

PB

27/S

PI1

_NP

CS

3/TK

0/P

WM

L0L2

PB

28/S

PI2

_NP

CS

3/TD

0/P

WM

H1

K1

PB

29/T

WD

2/R

D0/

PW

ML1

M3

PB

30/T

WC

K2/

RF0

M4

PB

31/T

F0L1

AD

CV

RE

FR

12

R15

122

RR

151

22R

R40

22R

R40

22R

R37

439

RR

374

39R

R12

122

RR

121

22R

R17

322

RR

173

22R

R17

722

RR

177

22R

R60

22R

R60

22R

R18

322

RR

183

22R

R88

22R

R88

22R

R14

922

RR

149

22R

R12

222

RR

122

22R

R82

22R

R82

22R

R11

522

RR

115

22R

R43

22R

R43

22R

R39

52.

2K 1

%R

395

2.2K

1%

R18

422

RR

184

22R

R64

22R

R64

22R

R45

22R

R45

22R

R12

422

RR

124

22R

R11

222

RR

112

22R

R37

22R

R37

22R

R66

22R

R66

22R

R17

822

RR

178

22R

R15

722

RR

157

22R

R99

22R

R99

22R

R92

22R

R92

22R

R12

022

RR

120

22R

R52

22R

R52

22R

R47

22R

R47

22R

R83

22R

R83

22R

R16

022

RR

160

22R

R61

22R

R61

22R

R86

22R

R86

22R

R87

22R

R87

22R

R17

622

RR

176

22R

R69

22R

R69

22R

R14

622

RR

146

22R

R48

22R

R48

22R

R37

339

RR

373

39R

U6A

SA

MA

5D44

A-C

U

U6A

SA

MA

5D44

A-C

U

PA

0/LC

DD

AT0

/TM

SA

7P

A1/

LCD

DA

T1F6

PA

2/LC

DD

AT2

/G1_

TXC

KE

6P

A3/

LCD

DA

T3/G

1_R

XC

KC

6P

A4/

LCD

DA

T4/G

1_TX

EN

D6

PA

5/LC

DD

AT5

/G1_

TXE

RB

6P

A6/

LCD

DA

T6/G

1_C

RS

A6

PA

7/LC

DD

AT7

E5

PA

8/LC

DD

AT8

/TC

KA

5P

A9/

LCD

DA

T9/G

1_C

OL

F4P

A10

/LC

DD

AT1

0/G

1_R

XD

VF5

PA

11/L

CD

DA

T11/

G1_

RX

ER

D5

PA

12/L

CD

DA

T12/

G1_

RX

0G

5P

A13

/LC

DD

AT1

3/G

1_R

X1

C5

PA

14/L

CD

DA

T14/

G1_

TX0

E4

PA

15/L

CD

DA

T15/

G1_

TX1

B5

PA

16/L

CD

DA

T16/

NTR

ST

H6

PA

17/L

CD

DA

T17

D4

PA

18/L

CD

DA

T18/

G1_

RX

2G

4P

A19

/LC

DD

AT1

9/G

1_R

X3

C4

PA

20/L

CD

DA

T20/

G1_

TX2

A3

PA

21/L

CD

DA

T21/

G1_

TX3

B4

PA

22/L

CD

DA

T22/

G1_

MD

CB

3P

A23

/LC

DD

AT2

3/G

1_M

DIO

A4

PA

24/L

CD

PW

M/P

CK

0H

5P

A25

/LC

DD

ISP

/TD

0F3

PA

26/L

CD

VS

YN

C/P

WM

H0/

SP

I1_N

PC

S1

E3

PA

27/L

CD

HS

YN

C/P

WM

L0/S

PI1

_NP

CS

2H

4P

A28

/LC

DP

CK

/PW

MH

1/S

PI1

_NP

CS

3G

3P

A29

/LC

DD

EN

/PW

ML1

J5P

A30

/TW

D0

D3

PA

31/T

WC

K0

J4

R76

1KR76

1K

R42

22R

R42

22R

R71

22R

R71

22R

R51

22R

R51

22R

R17

522

RR

175

22R

R18

122

RR

181

22R

R15

022

RR

150

22R

R63

22R

R63

22R

R36

7D

NP

(39R

)R

367

DN

P(3

9R)

R14

722

RR

147

22R

R90

22R

R90

22R

R18

022

RR

180

22R

R15

522

RR

155

22R

R96

22R

R96

22R

C94

100n

F

C94

100n

F

R18

222

RR

182

22R

R34

22R

R34

22R

R77

1KR77

1K

R11

322

RR

113

22R

R65

22R

R65

22R

R15

622

RR

156

22R

R11

922

RR

119

22R

R91

22R

R91

22R

R14

522

RR

145

22R

R84

22R

R84

22R

R11

822

RR

118

22R

R17

922

RR

179

22R

R35

22R

R35

22R

R12

822

RR

128

22R

R33

6D

NP

(0R

)R

336

DN

P(0

R)

R15

922

RR

159

22R

R18

622

RR

186

22R

R58

22R

R58

22R

R39

22R

R39

22R

R68

22R

R68

22R

R18

522

RR

185

22R

R93

22R

R93

22R


Figure 4-56. SAMA5D44 - PIOC and Flash

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

NA

ND

_CLE

_PC

18N

AN

D_A

LE_P

C17

NA

ND

_RE

n_P

C13

NA

ND

_WE

n_P

C14

NA

ND

_IO

0_P

C5

NA

ND

_IO

1_P

C6

NA

ND

_IO

2_P

C7

NA

ND

_IO

3_P

C8

NA

ND

_IO

4_P

C9

NA

ND

_IO

5_P

C10

NA

ND

_IO

6_P

C11

NA

ND

_IO

7_P

C12

PC

0P

C1

PC

2P

C3

NA

ND

_NC

S3_

PC

15

PC

26P

C25

NA

ND

_CE

n_P

C15

NA

ND

_NC

S3_

PC

15

PC

27

PC

29P

C30

AT2

5_S

PI0

_CS

0_P

C3

PC

3

PC

28

PC

2P

C4

NA

ND

_WE

n_P

C14

NA

ND

_ALE

_PC

17N

AN

D_C

LE_P

C18

NA

ND

_RD

Y_P

C16

PC

1

PC

0

PC

5P

C6

PC

7P

C8

PC

9P

C10

PC

11P

C12

PC

13N

AN

D_I

O0_

PC

5P

C5

NA

ND

_IO

1_P

C6

PC

6

NA

ND

_IO

2_P

C7

PC

7

NA

ND

_IO

3_P

C8

PC

8

NA

ND

_IO

4_P

C9

PC

9

NA

ND

_IO

5_P

C10

PC

10

NA

ND

_IO

6_P

C11

PC

11

NA

ND

_IO

7_P

C12

PC

12

NA

ND

_RE

n_P

C13

PC

13

AT2

5_S

PI0

_NC

PS

0_P

C3

NA

ND

_CE

n_P

C15

NA

ND

_RD

Y_P

C16

AT2

5_S

PI0

_MO

SI_

PC

1A

T25_

SP

I0_M

ISO

_PC

0A

T25_

SP

I0_S

PC

K_P

C2

AT2

5_S

PI0

_CS

0_P

C3

EE

PR

OM

_WP

EE

PR

OM

_WP

PC

4

PC

27

PC

28

PC

29

PC

30

AT2

5_S

PI0

_MIS

O_P

C0

AT2

5_S

PI0

_MO

SI_

PC

1

AT2

5_S

PI0

_SP

CK

_PC

2

AT2

5_S

PI0

_NC

PS

0_P

C3

PC

26

PC

25

VC

C_3

V3

VC

C_3

V3

3V3_

NA

ND

3V3_

NA

ND

VC

C_3

V3

3V3_

NA

ND

VC

C_3

V3

VC

C_3

V3_

EE

PR

OM

VC

C_3

V3_

EE

PR

OM

VC

C_3

V3_

EE

PR

OM

VC

C_3

V3

EE

PR

OM

_TW

D0_

PA

30[7

]

EE

PR

OM

_TW

CK

0_P

A31

[7]

PM

IC_T

WC

K3_

PC

26[4

]

PM

IC_T

WD

3_P

C25

[4]

EX

P/X

PR

O_P

C3

[15]

EX

P/X

PR

O_P

C2

[15]

EX

P/X

PR

O_P

C1

[15]

EX

P/X

PR

O_P

C0

[15]

MC

I0_C

K_P

C4

[13]

MC

I0_C

DA

_PC

5[1

3]

MC

I0_D

A0_

PC

6[1

3]

MC

I0_D

A1_

PC

7[1

3]

MC

I0_D

A2_

PC

8[1

3]

MC

I0_D

A3_

PC

9[1

3]

EX

P_P

C4

[15]

EX

P_P

C20

[15]

EX

P_P

C19

[15]

EX

P_P

C21

[15]

EX

P_P

C22

[15]

EX

P_P

C23

[15]

EX

P_P

C24

[15]

EX

P/X

PR

O_P

C25

[15]

EX

P/X

PR

O_P

C26

[15]

AD

1_X

M_P

C28

[10]

AD

0_X

P_P

C27

[10]

AD

2_Y

P_P

C29

[10]

AD

3_Y

M_P

C30

[10]

EX

P/X

PR

O_P

C27

[15]

EX

P/X

PR

O_P

C28

[15]

EX

P/X

PR

O_P

C29

[15]

EX

P/X

PR

O_P

C30

[15]

EX

P_P

C31

[15]

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

8 15A

XX

-XX

-XX

Xin

JQX

XX

SA

MA

5D44

- PIO

C &

FLA

SH

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

8 15A

XX

-XX

-XX

Xin

JQX

XX

SA

MA

5D44

- PIO

C &

FLA

SH

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

8 15A

XX

-XX

-XX

Xin

JQX

XX

SA

MA

5D44

- PIO

C &

FLA

SH

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

(PC

K1)

(NA

ND

_WPn

)

PIO

C

Nan

d Fl

ash

SPI F

lash

EEPR

OM

Nan

d &

SPI

Fla

sh C

S

TWI3

BO

OT_

DIS

SP

I Fla

sh C

S

NA

ND

Fla

sh C

STh

e ju

mpe

r JP

7 m

ust b

e po

pula

ted

near

the

rese

t but

ton

R20

422

RR

204

22R

C42

100n

FC

4210

0nF

R25

7D

NP

(0R

)R

257

DN

P(0

R)

R28

8

DN

P(1

00K

1%

)

R28

8

DN

P(1

00K

1%

)

JPR

7JU

MP

ER

JPR

7JU

MP

ER

R19

122

RR

191

22R

R26

222

RR

262

22R

R25

022

RR

250

22R

R28

3

10K

R28

3

10K

R28

610

0K 1

%R

286

100K

1%

R21

322

RR

213

22R

R19

722

RR

197

22R

R22

8D

NP

(0R

)R

228

DN

P(0

R)

R25

522

RR

255

22R

R28

70R

R28

70R

C16

110

0nF

C16

110

0nF

R25

62.

2K 1

%R

256

2.2K

1%

C44

100n

FC

4410

0nF

R20

339

RR

203

39R

R27

622

RR

276

22R

R20

122

RR

201

22R

R20

739

RR

207

39R

R26

022

RR

260

22R

C34

100n

FC

3410

0nF

R21

022

RR

210

22R

R17

022

RR

170

22R

C40

100n

FC

4010

0nF

R23

422

RR

234

22R

R20

522

RR

205

22R

R279 10KR279 10K

R19

522

RR

195

22R

R399 DNP(10K)R399 DNP(10K)

R20

822

RR

208

22R

R27

822

RR

278

22R

U15

AT2

4MA

C40

2-M

AH

M-T

U15

AT2

4MA

C40

2-M

AH

M-T

A0

1

A1

2

A2

3

GN

D4

VC

C8

WP

7

SC

L6

SD

A5

R24

922

RR

249

22R

R28

40R

R28

40R

R20

922

RR

209

22R

VC

C

GN

DU10

NL1

7SZ1

26D

FT2G

VC

C

GN

DU10

NL1

7SZ1

26D

FT2G

1 2 3

45

R27

722

RR

277

22R

R28

510

0K 1

%R

285

100K

1%

R372 10KR372 10K

R33

22.

2K 1

%R

332

2.2K

1%

U9

MT2

9F4G

08A

BA

EA

WP

:E

U9

MT2

9F4G

08A

BA

EA

WP

:E

WE

18

N.C

66

VC

C_2

37

CE

9

RE

8

N.C

1120

WP

19

N.C

55

N.C

11

N.C

22

N.C

33

N.C

44

N.C

1221

N.C

1322

N.C

1423

N.C

1524

R/B

7

N.C

1826

N.C

1927

N.C

2028

I/O0

29

VC

C_3

34

N.C

1635

VS

S_2

36

DN

U1

38

VC

C_4

39

VC

C_1

12

VS

S_1

13

ALE

17

N.C

811

N.C

710

N.C

914

N.C

1015

CLE

16

VS

S_3

25

N.C

2133

I/O1

30

I/O3

32I/O

231

DN

U2

47

N.C

2446

N.C

2345

I/O7

44I/O

643

I/O5

42I/O

441

N.C

2240

VS

S_4

48

R20

222

RR

202

22R

R21

110

0K 1

%R

211

100K

1%

U5

DN

P(A

T25D

F321

A)

U5

DN

P(A

T25D

F321

A)

HO

LD7

GN

D4

VC

C8

CS

1

SC

K6

SI

5S

O2

WP

3

R24

122

RR

241

22R

C43

100n

FC

4310

0nF

R23

7D

NP

(0R

)R

237

DN

P(0

R)

R16

922

RR

169

22R

R39

7

0RR39

7

0R

U6F

SA

MA

5D44

A-C

U

U6F

SA

MA

5D44

A-C

U

PC

0/S

PI0

_MIS

O/P

WM

H2/

ISI_

D8

V4

PC

1/S

PI0

_MO

SI/P

WM

L2/IS

I_D

9P

8P

C2/

SP

I0_S

PC

K/P

WM

H3/

ISI_

D10

V5

PC

3/S

PI0

_NP

CS

0/P

WM

L3/IS

I_D

11R

8P

C4/

SP

I0_N

PC

S1/

MC

I0_C

K/P

CK

1W

5P

C5/

D0/

MC

I0_C

DA

T8P

C6/

D1/

MC

I0_D

A0

W6

PC

7/D

2/M

CI0

_DA

1R

19P

C8/

D3/

MC

I0_D

A2

N15

PC

9/D

4/M

CI0

_DA

3U

8P

C10

/D5/

MC

I0_D

A4

V6

PC

11/D

6/M

CI0

_DA

5V

7P

C12

/D7/

MC

I0_D

A6

W7

PC

13/N

RD

/NA

ND

OE

/MC

I0_D

A7

V8

PC

14/N

WE

/NA

ND

WE

U9

PC

15/N

CS

3W

8P

C16

/NA

ND

RD

YV

9P

C17

/A21

/NA

ND

ALE

W9

PC

18/A

22/N

AN

DC

LEV

10P

C19

/ISI_

D0/

TK1

U14

PC

20/IS

I_D

1/TF

1V

11P

C21

/ISI_

D2/

TD1

U15

PC

22/IS

I_D

3/R

F1T1

5P

C23

/ISI_

D4/

RD

1U

16P

C24

/ISI_

D5/

RK

1/P

CK

1T1

6P

C25

/ISI_

D6/

TWD

3/U

RX

D1

V17

PC

26/IS

I_D

7/TW

CK

3/U

TXD

1R

16P

C27

/AD

0/S

PI0

_NP

CS

1/P

WM

L0U

12P

C28

/AD

1/S

PI0

_NP

CS

2/P

WM

L1T1

1P

C29

/AD

2/S

PI0

_NP

CS

3/P

WM

FI0

R13

PC

30/A

D3/

PW

MH

0T1

2P

C31

/AD

4/P

WM

H1

T13

JP8

DN

P(H

eade

r 1X

2)JP

8D

NP

(Hea

der 1

X2)

12

C45

100n

FC

4510

0nF

R20

022

RR

200

22R

C41

100n

FC

4110

0nF

R22

122

RR

221

22R

R19

622

RR

196

22R

R23

9D

NP

(0R

)R

239

DN

P(0

R)

JPR

8D

NP

(JU

MP

ER

)JP

R8

DN

P(J

UM

PE

R)

R19

022

RR

190

22R

R25

422

RR

254

22R

R23

122

RR

231

22R

R21

222

RR

212

22R

JP7

Hea

der 1

X2

JP7

Hea

der 1

X2

12

R28

20R

R28

20R

VC

C

GN

DU8

NL1

7SZ1

26D

FT2G

VC

C

GN

DU8

NL1

7SZ1

26D

FT2G

1 2 3

45

R39

80R

R39

80R


64

Figure 4-57. SAMA5D44 - SYS, PIOD, and PIOE

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

PD

30

PE

31

PE

24

PE

8

PE

25

PE

19

PE

15

PE

5

PE

0

PE

21

PE

23P

E22

PE

20

PE

18

PE

15

PE

18

PE

21

PE

22

PE

5

PE

20

PE

0

PE

19

PE

23

PE

24

PE

25

PE

31

LED

_US

ER

_PE

15

PIO

BU

5

PIO

BU

0

PIO

BU

7

PIO

BU

2

XIN

XO

UT

XO

UT3

2X

IN32

PIO

BU

3

PIO

BU

0P

IOB

U1

PIO

BU

4P

IOB

U6

PIO

BU

2

PIO

BU

4

XO

UT3

2

XIN

32

XIN

XO

UT

PIO

BU

1

PIO

BU

5P

D30

LED

_US

ER

_PE

15

PE

8

PIO

BU

6P

IOB

U7

PIO

BU

3

PD

30

PE

8

PE

8

PD

30

EX

P/X

PR

O_P

E30

EX

P/X

PR

O_P

E29

VD

DB

U_2

V

GN

DU

TMI

VC

C_3

V3

VC

C_3

V3

EX

P_P

D8

[15]

EX

P_P

D9

[15]

EX

P_P

D10

[15]

EX

P_P

D12

[15]

EX

P_P

D14

[15]

EX

P_P

D16

[15]

EX

P_P

D18

[15]

EX

P_P

D19

[15]

EX

P_P

D20

[15]

EX

P_P

D21

[15]

EX

P_P

D22

[15]

EX

P_P

D23

[15]

EX

P_P

D24

[15]

EX

P_P

D25

[15]

EX

P_P

D26

[15]

EX

P_P

D27

[15]

EX

P_P

D28

[15]

EX

P_P

D29

[15]

EX

P_P

D31

[15]

EX

P_P

D30

[15]

EX

P_P

E13

[15]

DB

GU

_TX

D3_

PE

17[1

0,14

]D

BG

U_R

XD

3_P

E16

[10,

14]

G0_

IRQ

_PE

1[1

2]

US

BB

_EN

5V_P

E11

[10]

EX

P_P

E6

[15]

MC

I1_C

D_P

E3

[13]

US

BC

_EN

5V_P

E14

[10]

EX

P_P

E12

[15]

MC

I0_C

D_P

E2

[13]

MC

I1_P

WR

_PE

4[1

3]

EX

P_P

E7

[15]

EX

P_P

E15

[15]

LCD

_ID

_PE

15[1

0]

EX

P/X

PR

O_P

E18

[15]

EX

P/X

PR

O_P

E21

[15]

MC

I1_D

A1_

PE

21[1

3]

DB

GU

_CTS

3_P

E5

[10]

MC

I1_C

K_P

E18

[13]

EX

P/X

PR

O_P

E22

[15]

MC

I1_D

A2_

PE

22[1

3]

EX

P_P

E5

[15]

EX

P_P

E20

[15]

MC

I1_D

A0_

PE

20[1

3]

EX

P_P

E8

[15]

US

B_O

VC

UR

_PE

0[1

0]

EX

P/X

PR

O_P

E19

[15]

EX

P_P

E0

[15]

MC

I1_C

DA

_PE

19[1

3]

EX

P_P

E23

[15]

MC

I1_D

A3_

PE

23[1

3]

EX

P_P

E24

[15]

DB

GU

_RTS

3_P

E24

[10]

EX

P_P

E28

[15]

PM

IC_I

RQ

_PE

25[4

]E

XP

_PE

25[1

5]

US

BA

_VB

US

_PE

31[1

0]E

XP

_PE

31[1

5]

LCD

_PE

9[1

0]LC

D_P

E10

[10]

SH

DN

[4] N

RS

T_2V

[4]

WK

UP

[4]

US

BC

_DP

[10]

US

BC

_DM

[10]

US

BB

_DP

[10]

US

BB

_DM

[10]

US

BA

_DP

[10]

US

BA

_DM

[10]

EX

P/X

PR

O_P

E26

[15]

EX

P/X

PR

O_P

E27

[15]

EX

P/X

PR

O_P

E29

[15]

EX

P/X

PR

O_P

E30

[15]

EX

P/X

PR

O_P

D11

[15]

EX

P/X

PR

O_P

D13

[15]

EX

P/X

PR

O_P

D15

[15]

EX

P/X

PR

O_P

D17

[15]

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

9 15A

XX

-XX

-XX

Xin

JQX

XX

SA

MA

5D44

- SY

S &

PIO

D &

PIO

E

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

9 15A

XX

-XX

-XX

Xin

JQX

XX

SA

MA

5D44

- SY

S &

PIO

D &

PIO

E

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

9 15A

XX

-XX

-XX

Xin

JQX

XX

SA

MA

5D44

- SY

S &

PIO

D &

PIO

E

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

PIO

DPI

OE

LED

USE

R B

UTT

ON

top/

bot

top/

bot

top/

bot

top/

bot

top/

bot

top/

bot

Pla

ce T

P19

to B

otto

m

Rou

ting

US

B

Rou

ting

top

or b

otto

m

Max

trac

e-le

ngth

mis

mat

chbe

twee

n U

SB

sig

nals

pai

rssh

ould

be

no g

reat

er th

an 3

.8m

m

90 o

hms

diffe

rent

ial t

race

impe

danc

e

R&

Cas

clo

se a

s po

ssib

le

LED

_PO

WE

R_P

D30

PB

_US

ER

_PE

8

PB

_US

ER

_PE

8

LED

_PO

WE

R_P

D30

SYS

TWI1

R19

933

0RR

199

330R

U6G

SA

MA

5D44

A-C

U

U6G

SA

MA

5D44

A-C

U

PD

8/P

CK

0M

1P

D9/

FIQ

M2

PD

10/C

TS0/

CD

ETA

N2

PD

11/R

TS0/

SP

I2_M

ISO

N3

PD

12/R

XD

0/D

CE

NA

N1

PD

13/T

XD

0/S

PI2

_MO

SI

P3

PD

14/C

TS1/

CD

ETB

P2

PD

15/R

TS1/

SP

I2_S

PC

KN

4P

D16

/RX

D1/

DC

EN

BR

2P

D17

/TX

D1/

SP

I2_N

PC

S0

R3

PD

18/S

EN

SE

0T9

PD

19/S

EN

SE

1P

11P

D20

/SE

NS

E2

T10

PD

21/S

EN

SE

3P

10P

D22

/SE

NS

E4

U11

PD

23/S

EN

SE

5R

10P

D24

/SE

NS

E6

U10

PD

25/S

EN

SE

7R

11P

D26

/SE

NS

E8

U13

PD

27/S

EN

SE

9T1

4P

D28

/SC

K0

R1

PD

29/S

CK

1P

1P

D30

N5

PD

31/S

PI0

_NP

CS

2/P

CK

1P

5

R19

333

0RR

193

330R

C32

20pF

C32

20pF

C33

20pF

C33

20pF

R20

6D

NP

(1M

)R

206

DN

P(1

M)

R35

65.

62K

1%

R35

65.

62K

1%

R26

822

RR

268

22R

R15

222

RR

152

22R

C39

20pF

C39

20pF

R16

533

0RR

165

330R

Y2

32.7

68K

Hz

CL=

12.5

pF

Y2

32.7

68K

Hz

CL=

12.5

pF

1 234

R14

410

0K 1

%R

144

100K

1%

R31

12.

2K 1

%R

311

2.2K

1%

R24

822

RR

248

22R

TP19

SM

DTP

19S

MD

R25

122

RR

251

22R

R16

833

0RR

168

330R

R24

622

RR

246

22R

R27

422

RR

274

22R

R26

622

RR

266

22R

R26

922

RR

269

22R

R27

139

RR

271

39R

R14

047

0RR

140

470R

R25

222

RR

252

22R

C10

510

pFC

105

10pF

R28

022

RR

280

22R

R27

522

RR

275

22R

R24

5D

NP

(22R

)R

245

DN

P(2

2R)

R19

233

0RR

192

330R

R22

3D

NP

(1M

)R

223

DN

P(1

M)

R26

122

RR

261

22R

R13

647

0RR

136

470R

R15

322

RR

153

22R

Q3

IRLM

L250

2

Q3

IRLM

L250

2

1

32

D10

BLU

E

D10

BLU

E

R28

1D

NP

(22R

)R

281

DN

P(2

2R)

R25

322

RR

253

22R

Y3

12M

Hz

CL=

15pF

Y3

12M

Hz

CL=

15pF

14 3

2

R27

039

RR

270

39R

J10

DN

P(H

eade

r 2X

5)

J10

DN

P(H

eade

r 2X

5)

12

34

56

78

910

U6C

SA

MA

5D44

A-C

U

U6C

SA

MA

5D44

A-C

U

TST

P4

XIN

W12

XO

UT

V12

XIN

32W

2X

OU

T32

W3

SH

DN

T2

WK

UP

V3

NR

ST

T1

JTA

GS

EL

V2

VB

GW

11

HH

SD

PC

W16

HH

SD

MC

V16

HH

SD

PB

W15

HH

SD

MB

V15

HH

SD

PA

W14

HH

SD

MA

V14

TSTA

NA

_BU

U1

PIO

BU

0U

3P

IOB

U1

T3P

IOB

U2

T4P

IOB

U3

U4

PIO

BU

4P

6P

IOB

U5

T5P

IOB

U6

R4

PIO

BU

7U

5P

IOB

U8

R5

PIO

BU

9U

6P

IOB

U10

R6

PIO

BU

11T6

PIO

BU

12R

7P

IOB

U13

U7

PIO

BU

14P

7P

IOB

U15

T7

NC

_H10

H10

NC

_G10

G10

NC

_K10

K10

NC

_J10

J10

NC

_K9

K9

NC

_J9

J9N

C_H

9H

9N

C_G

9G

9

NC

_A8

A8

NC

_A10

A10

NC

_E7

E7

NC

_E9

E9

NC

_B7

B7

NC

_D8

D8

NC

_C7

C7

NC

_A9

A9

NC

_D7

D7

NC

_B9

B9

BP

1Ta

ct S

witc

hB

P1

Tact

Sw

itch

D8

RE

D

D8

RE

D

R16

222

RR

162

22R

R27

222

RR

272

22R

R16

733

0RR

167

330R

R16

433

0RR

164

330R

U6H

SA

MA

5D44

A-C

U

U6H

SA

MA

5D44

A-C

U

PE

0/A

0/N

BS

0/M

CI0

_CD

B/C

TS4

W19

PE

1/A

1/M

CI0

_DB

0U

17P

E2/

A2/

MC

I0_D

B1

T17

PE

3/A

3/M

CI0

_DB

2P

16P

E4/

A4/

MC

I0_D

B3

U18

PE

5/A

5/C

TS3

R17

PE

6/A

6/TI

OA

3V

19P

E7/

A7/

TIO

B3/

PW

MFI

1U

19P

E8/

A8/

TCLK

3/P

WM

L3T1

9P

E9/

A9/

TIO

A2

T18

PE

10/A

10/T

IOB

2N

14P

E11

/A11

/TC

LK2

R18

PE

12/A

12/T

IOA

1/P

WM

H2

P17

PE

13/A

13/T

IOB

1/P

WM

L2P

18P

E14

/A14

/TC

LK1/

PW

MH

3N

17P

E15

/A15

/SC

K3/

TIO

A0

N18

PE

16/A

16/R

XD

3/TI

OB

0M

15P

E17

/A17

/TX

D3/

TCLK

0N

19P

E18

/A18

/TIO

A5/

MC

I1_C

KP

19P

E19

/A19

/TIO

B5/

MC

I1_C

DA

N16

PE

20/A

20/T

CLK

5/M

CI1

_DA

0M

14P

E21

/A23

/TIO

A4/

MC

I1_D

A1

M18

PE

22/A

24/T

IOB

4/M

CI1

_DA

2M

19P

E23

/A25

/TC

LK4/

MC

I1_D

A3

L18

PE

24/N

CS

0/R

TS3

L19

PE

25/N

CS

1/S

CK

4/IR

QM

17P

E26

/NC

S2/

RX

D4/

A18

L15

PE

27/N

WR

1/N

BS

1/TX

D4

M16

PE

28/N

WA

IT/R

TS4/

A19

L17

PE

29/D

IBP

/UR

XD

0/TW

D1

V1

PE

30/D

IBN

/UTX

D0/

TWC

K1

U2

PE

31/A

DTR

GL4

R26

522

RR

265

22R

R26

722

RR

267

22R

R26

422

RR

264

22R

R26

322

RR

263

22R

R31

02.

2K 1

%R

310

2.2K

1%

R25

822

RR

258

22R

R18

9D

NP

(10K

)R

189

DN

P(1

0K)

R24

722

RR

247

22R

R19

833

0RR

198

330R

C38

20pF

C38

20pF

R27

322

RR

273

22R


Figure 4-58. JTAG, USB, DEBUG, and LCD

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

NR

ST_

3V3

5V_U

SB

C

5V_U

SB

C5V

_US

BB

5V_U

SB

B

VC

C_5

VV

CC

_3V

3

VC

C_3

V3

VC

C_5

V

VC

C_3

V3

VC

C_3

V3

EA

RTH

_US

B_A

VC

C_5

V

EA

RTH

_US

B_A

EA

RTH

_US

B_B

/C

EA

RTH

_US

B_B

/C

DB

GU

_RTS

3_P

E24

[9]

DB

GU

_CTS

3_P

E5

[9]

DB

GU

_RX

D3_

PE

16[9

,14]

DB

GU

_TX

D3_

PE

17[9

,14]

NR

ST_

3V3

[4,1

2,14

,15]

TDI

[7,1

4]

TDO

[7,1

4]

TMS

[7,1

4]TC

K[7

,14]

NTR

ST

[7]

LCD

_ID

_PE

15[9

]

LCD

_DA

T6_P

A6

[7]

LCD

_DA

T7_P

A7

[7]

LCD

_DA

T14_

PA

14[7

]LC

D_D

AT1

5_P

A15

[7]

LCD

_DA

T23_

PA

23[7

]LC

D_D

AT2

2_P

A22

[7]LC

D_D

EN

_PA

29[7

]LC

D_H

SY

NC

_PA

27[7

]LC

D_V

SY

NC

_PA

26[7

]LC

D_P

CK

_PA

28[7

]

LCD

_TW

CK

0_P

A31

[7]

LCD

_TW

D0_

PA

30[7

]LC

D_D

ISP

_PA

25[7

]

LCD

_PW

M_P

A24

[7]

LCD

_PE

9[9

]LC

D_P

E10

[9]

AD

0_X

P_P

C27

[8]

LCD

_SP

I1_N

PC

S2_

PB

23[7

]

AD

1_X

M_P

C28

[8]

LCD

_SP

I1_M

ISO

_PB

18[7

]

AD

2_Y

P_P

C29

[8]

LCD

_SP

I1_M

OS

I_P

B19

[7]

AD

3_Y

M_P

C30

[8]

LCD

_SP

I1_S

PC

K_P

B20

[7]

ED

BG

_ID

_01

[14]

LCD

_DA

T0_P

A0

[7]

LCD

_DA

T1_P

A1

[7]

LCD

_DA

T2_P

A2

[7]

LCD

_DA

T3_P

A3

[7]

LCD

_DA

T5_P

A5

[7]

LCD

_DA

T4_P

A4

[7]

LCD

_DA

T11_

PA

11[7

]LC

D_D

AT1

0_P

A10

[7]

LCD

_DA

T9_P

A9

[7]

LCD

_DA

T8_P

A8

[7]

LCD

_DA

T12_

PA

12[7

]LC

D_D

AT1

3_P

A13

[7]

LCD

_DA

T17_

PA

17[7

]LC

D_D

AT1

6_P

A16

[7]

LCD

_DA

T19_

PA

19[7

]LC

D_D

AT1

8_P

A18

[7]

LCD

_DA

T21_

PA

21[7

]LC

D_D

AT2

0_P

A20

[7]

US

B_V

BU

S_5

V[4

]

US

BB

_EN

5V_P

E11

[9]

US

BC

_EN

5V_P

E14

[9]

US

B_O

VC

UR

_PE

0[9

]

US

BA

_VB

US

_PE

31[9

]

US

BA

_DM

[9]

US

BA

_DP

[9]

US

BC

_DM

[9]

US

BC

_DP

[9]

US

BB

_DM

[9]

US

BB

_DP

[9]

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

10 15A

XX

-XX

-XX

Xin

JQX

XX

JTA

G &

US

B &

DE

BU

G &

LC

D

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

10 15A

XX

-XX

-XX

Xin

JQX

XX

JTA

G &

US

B &

DE

BU

G &

LC

D

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

10 15A

XX

-XX

-XX

Xin

JQX

XX

JTA

G &

US

B &

DE

BU

G &

LC

D

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

(CTS

3)

(RTS

3)

(LC

DD

AT0

)

(LC

DD

AT6

)(L

CD

DA

T5)

(LC

DD

AT4

)

(LC

DD

AT3

)(L

CD

DA

T2)

(LC

DD

AT1

)

(LC

DD

AT1

1)(L

CD

DA

T10)

(LC

DD

AT9

)(L

CD

DA

T8)

(LC

DD

AT7

)

(LC

DD

AT1

6)

(LC

DD

AT1

5)(L

CD

DA

T14)

(LC

DD

AT1

3)(L

CD

DA

T12)

(LC

DD

AT2

2)(L

CD

DA

T21)

(LC

DD

AT2

0)

(LC

DD

AT1

9)(L

CD

DA

T18)

(LC

DD

AT1

7)

(LC

DD

EN

)(L

CD

HS

YN

C)

(LC

DV

SY

NC

)(L

CD

PC

K)

(LC

DD

AT2

3)

(IRQ

1)(IR

Q2)

(LC

DP

WM

)

(LC

DD

ISP

)

(ID_S

YS

)

LCD

(TX

D3)

DEB

UG (R

XD

3)

JTA

G

USB

A USB

B &

CJ7

_US

B_A

_Upp

erJ7

_US

B_B

_Low

er

EN

A a

nd E

NB

Act

ive

Hig

h

Thro

ugh

Hol

es

R21

7

100K

1%

R21

7

100K

1%

MH

3P

THM

H3

PTH 1

MH

1P

THM

H1

PTH 1

R15 DNP(68K)R15 DNP(68K)

R94

22R

R94

22R

R21

810

0K 1

%R

218

100K

1%

R12

5D

NP

(0R

)R

125

DN

P(0

R)

R12

6D

NP

(0R

)R

126

DN

P(0

R)

R10 DNP(68K)R10 DNP(68K)

R53

0RR

530R

R41

6D

NP

(0R

)R

416

DN

P(0

R)

C65

10uF

C65

10uF

VBUS

SHD

DM DP IDGN

D

J11

Mic

roU

SB

AB

Con

nect

or

VBUS

SHD

DM DP IDGN

D

J11

Mic

roU

SB

AB

Con

nect

or

1 2 3 4 5

8

6

11

7

9 10

C49

10uF

C49

10uF

J1

Hea

der 1

X6

J1

Hea

der 1

X6

1 2 3 4 5 6

A B

J16

US

B C

onne

ctor

A B

J16

US

B C

onne

ctor

5 86 7

910

1 2 3 4

1112

R21

420

0KR

214

200K

L12

180o

hm a

t 100

MH

zL1

218

0ohm

at 1

00M

Hz

12

R12 68KR12 68K

R11 68KR11 68K

C63

100n

FC

6310

0nF

R22

410

0K 1

%R

224

100K

1%


L16

180o

hm a

t 100

MH

zL1

618

0ohm

at 1

00M

Hz

12

R22

710

0K 1

%R

227

100K

1%

MH

2P

THM

H2

PTH 1

C68

100n

FC

6810

0nF

R33

DN

P(0

R)

R33

DN

P(0

R)

MH

4P

THM

H4

PTH 1

R95

22R

R95

22R

R25

90R

R25

90R

R49

DN

P(0

R)

R49

DN

P(0

R)

R75

DN

P(0

R)

R75

DN

P(0

R)

R74

22R

R74

22R

J13

Hea

der 2

X10

J13

Hea

der 2

X101

23

45

67

89

1011

1213 15 17 19

14 16 18 20

R23

50R

R23

50R

R41

70R

R41

70R

R50

22R

R50

22R

L15

180o

hm a

t 100

MH

zL1

518

0ohm

at 1

00M

Hz

12

C36

20pF

C36

20pF

R22

00R

R22

00R

L18

180o

hm a

t 100

MH

zL1

818

0ohm

at 1

00M

Hz

12

U12

SP

2526

A-1

EN

-L

U12

SP

2526

A-1

EN

-L

EN

A1

FLG

A2

EN

B4

OU

TA8

GN

G6

FLG

B3

IN7

OU

TB5

J2

50 P

in F

PC

Con

nect

or

J2

50 P

in F

PC

Con

nect

or

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950

52 51

C48

100n

FC

4810

0nF


R32

330R

R32

330R

R22

210

0K 1

%R

222

100K

1%


66

Figure 4-59. HDMI

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

VC

C_5

V_H

DM

I

HD

MI_

SC

L

HD

MI_

TCK

+

HD

MI_

TD1+

HD

MI_

TCK

-

HD

MI_

TD0-

SIL

_TD

1-

SIL

_TC

K+

SIL

_TC

K-

SIL

_TD

0-

SIL

_TD

2+S

IL_T

D2-

SIL

_TD

1+

SIL

_TD

0+

HD

MI_

TD2-

SIL

_TD

0+

SIL

_TD

2+H

DM

I_TD

2+

HD

MI_

TD0+

SIL

_TD

1-H

DM

I_TD

1-

SIL

_TC

K+

SIL

_TD

1+

SIL

_TD

0-

SIL

_TD

2-

SIL

_TC

K-HD

MI_

HP

D

HD

MI_

SD

A

HD

MI_

TD2+

HD

MI_

TD2-

HD

MI_

TD1+

HD

MI_

TD1-

HD

MI_

TD0+

HD

MI_

TD0-

HD

MI_

TCK

+H

DM

I_TC

K-

HD

MI_

SC

LH

DM

I_S

DA

HD

MI_

HP

D

VC

C_5

V_H

DM

I HD

MI_

TCK

+

HD

MI_

TD0+

HD

MI_

TCK

-

HD

MI_

TD0-

HD

MI_

TCK

-H

DM

I_TC

K+

HD

MI_

TD0-

HD

MI_

TD0+

HD

MI_

TD1-

HD

MI_

TD1+

HD

MI_

TD2-

HD

MI_

TD1+

HD

MI_

TD2+

HD

MI_

TD2+

HD

MI_

TD2-

HD

MI_

TD1-

1V2_

HD

MI

1V2_

HD

MI

VC

C_5

V

VC

C_3

V3

3V3_

HD

MI

3V3_

HD

MI

3V3_

HD

MI

3V3_

HD

MI

3V3_

HD

MI

EA

RTH

_HD

MI

EA

RTH

_HD

MI

HD

MI_

INT_

PA

25[7

]

HD

MI_

DA

T11_

PA

11[7

]

HD

MI_

DA

T9_P

A9

[7] H

DM

I_D

AT1

2_P

A12

[7]

HD

MI_

DA

T5_P

A5

[7]

HD

MI_

DA

T7_P

A7

[7]

HD

MI_

DA

T8_P

A8

[7] H

DM

I_D

AT1

0_P

A10

[7]

HD

MI_

DA

T3_P

A3

[7]

HD

MI_

DA

T4_P

A4

[7]

HD

MI_

DA

T6_P

A6

[7]

HD

MI_

DA

T0_P

A0

[7]

HD

MI_

DA

T1_P

A1

[7]

HD

MI_

DA

T2_P

A2

[7] H

DM

I_D

AT1

3_P

A13

[7]

HD

MI_

DA

T22_

PA

22[7

]H

DM

I_D

AT2

3_P

A23

[7]

HD

MI_

DA

T19_

PA

19[7

]H

DM

I_D

AT2

0_P

A20

[7]

HD

MI_

DA

T21_

PA

21[7

]

HD

MI_

DA

T16_

PA

16[7

]H

DM

I_D

AT1

7_P

A17

[7]

HD

MI_

DA

T18_

PA

18[7

]

HD

MI_

DA

T14_

PA

14[7

]H

DM

I_D

AT1

5_P

A15

[7]

HD

MI_

VS

YN

C_P

A26

[7]

HD

MI_

HS

YN

C_P

A27

[7]

HD

MI_

PC

K_P

A28

[7]

HD

MI_

DE

N_P

A29

[7]

HD

MI_

TWD

0_P

A30

[7] H

DM

I_TW

CK

0_P

A31

[7]

HD

MI_

TD0_

PB

28[7

]

HD

MI_

TK0_

PB

27[7

]H

DM

I_TF

0_P

B31

[7]

HD

MI_

RS

T_P

B15

[7]

HD

MI_

MC

K_P

A24

[7]

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

11 15A

XX

-XX

-XX

Xin

JQX

XX

HD

MI

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

11 15A

XX

-XX

-XX

Xin

JQX

XX

HD

MI

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

11 15A

XX

-XX

-XX

Xin

JQX

XX

HD

MI

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

Clos

e to

SiI

9022

HD

MI T

ype

A C

onne

ctor

HD

MI

Rou

ting

top

or b

otto

m

100

ohm

s di

ffere

ntia

l tra

ceim

peda

nce

(PC

K0)

Clos

e to

Pin

56 IO_S

EL:

LOW=

3.3V

HI

GH=1

.8V

C18

410

0nF

C18

410

0nF

C19

110

uFC

191

10uF

F118

12L1

60/1

2F1

1812

L160

/12

12

L8

DN

P(W

CM

-201

2HD

MI-9

00T)

L8

DN

P(W

CM

-201

2HD

MI-9

00T)

123 4

C20

100n

FC

2010

0nF

C17

41n

FC

174

1nF

TP7

SM

D

TP7

SM

D

R40

61K

R40

61K

R23

10K

R23

10K

L11

180o

hm a

t 100

MH

zL1

118

0ohm

at 1

00M

Hz

12

C16

91n

FC

169

1nF

R40

54.

7KR

405

4.7K

L9

DN

P(W

CM

-201

2HD

MI-9

00T)

L9

DN

P(W

CM

-201

2HD

MI-9

00T)

123 4

D5

RB

160M

-60T

RD

5R

B16

0M-6

0TR

R29

0RR

290R

L29

60oh

m a

t 100

MH

z

L29

60oh

m a

t 100

MH

z

12

L27

60oh

m a

t 100

MH

z

L27

60oh

m a

t 100

MH

z

12

L28

60oh

m a

t 100

MH

zL2

860

ohm

at 1

00M

Hz

12

D7

BTR

6V8U

D

D7

BTR

6V8U

D

1 2 3 4 5678910

C17

810

0nF

C17

810

0nF

C18

610

0nF

C18

610

0nF

R41

14.

3K 1

%R

411

4.3K

1%

L10

DN

P(W

CM

-201

2HD

MI-9

00T)

L10

DN

P(W

CM

-201

2HD

MI-9

00T)

123 4

J5

HD

MI A

Con

nect

or

J5

HD

MI A

Con

nect

or

DA

T2-

3D

AT2

+1

DA

T2_S

2

SC

L15

SD

A16

DA

T-6

DA

T+4

DA

T1_S

5

+5V

18D

DC

/CE

C17

HP

LG19

DA

T0-

9D

AT0

+7

DA

T0_S

8

CLK

+10

CLK

-12

CLK

_S11

MTG

120

MTG

221

MTG

322

MTG

423

CE

C13

NC

14

R25

2.2K

1%

R25

2.2K

1%

C18

210

0nF

C18

210

0nF

C18

310

0nF

C18

310

0nF

R40

4D

NP

(4.7

K)

R40

4D

NP

(4.7

K)

R30 68KR30 68K

U3

SiI9

022A

CU

NU

3S

iI902

2AC

UN

D0

32D

131

D2

30D

329

D4

28D

527

D23

4

D6

25D

724

D8

23D

920

D10

19D

1118

D12

17D

1316

D14

15D

1514

D16

13D

1711

D18

10D

199

D20

8D

217

D22

6

CLK

22

VS

YN

C35

HS

YN

C34

DE

33

INT52 HPD54

SCL1SDA2

EX

T_S

WIN

G56

IOV

CC

18_2

21IO

VC

C18

_13

TXC

+59

TXC

-58

TX0+

62TX

0-61

TX1+

65TX

1-64

TX2+

68TX

2-67

SC

LK45

SP

DIF

36

CV

CC

12_1

5C

VC

C12

_212

CV

CC

12_4

42

TMODE 55

MC

LK38

LRC

LK44

DDCSCL49 DDCSDA48

I2S

041

I2S

140

I2S

239

I2S

337

AG

ND

_157

AV

CC

_266

AV

CC

_160

IOV

CC

18_3

46

CEC_D50 CEC_A71

CI2CA72

VDDQ 70

AG

ND

_263

IO_S

EL

69

CV

CC

12_5

47C

VC

C12

_653

CG

ND

43

RE

SE

TN51

CV

CC

12_3

26

ePAD 73

C18

510

0nF

C18

510

0nF

C17

310

0nF

C17

310

0nF

C18

010

0nF

C18

010

0nF

C16

810

0nF

C16

810

0nF

D2

TVS

D2

TVS

C16

410

uFC

164

10uF

C17

21n

FC

172

1nF

C16

510

0nF

C16

510

0nF

D9

BTR

6V8U

D

D9

BTR

6V8U

D

1 2 3 4 5678910

C19

710

uFC

197

10uF

R27

10K

R27

10K

L5

DN

P(W

CM

-201

2HD

MI-9

00T)

L5

DN

P(W

CM

-201

2HD

MI-9

00T)

123 4

D1

TVS

D1

TVS

D3

TVS

D3

TVS

R28

2.2K

1%

R28

2.2K

1%

C16

710

0nF

C16

710

0nF

R24

2.2K

1%

R24

2.2K

1%

R13

00R

R13

00R

R13

70R

R13

70R

C17

91n

FC

179

1nF

R13

20R

R13

20R

C18

110

uFC

181

10uF

C16

610

0nF

C16

610

0nF

R13

31K

R13

31K

R13

90R

R13

90R

R13

40R

R13

40R

R11

10R

R11

10R

R26

4.7K

R26

4.7K

R14

30R

R14

30R

R13

50R

R13

50R


Figure 4-60. Ethernet_ETH0_10/100M

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

ETH

0_LE

D0

ETH

0_LE

D0

ETH

0_X

I

ETH

0_X

O

TX+

TX+

ETH

0_X

I

ETH

0_X

O

ETH

0_LE

D1

ETH

0_LE

D1

TX-

RX

+

RX

-R

X-

RX

+

TX-

ETH

0_V

DD

ETH

0_V

DD

EA

RTH

_ETH

0E

AR

TH_E

TH0

GN

D_E

TH0

ETH

0_V

DD

VC

C_3

V3

ETH

0_V

DD

GN

D_E

TH0

EA

RTH

_ETH

0E

TH0_

VD

DA

ETH

0_V

DD

A

ETH

0_V

DD

NR

ST_

3V3

[4,1

0,14

,15]

G0_

RX

0_P

B8

[7]

G0_

TX0_

PB

12[7

]

G0_

RX

1_P

B9

[7]

G0_

TXE

N_P

B2

[7]

G0_

RX

ER

_PB

7[7

]G

0_R

XD

V_P

B6

[7]

G0_

TX1_

PB

13[7

]

G0_

IRQ

_PE

1[9

]G

0_M

DIO

_PB

17[7

]G

0_M

DC

_PB

16[7

]

G0_

TXC

K_P

B0

[7]

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

12 15A

XX

-XX

-XX

Xin

JQX

XX

Eth

erne

t_E

TH0_

10/1

00M

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

12 15A

XX

-XX

-XX

Xin

JQX

XX

Eth

erne

t_E

TH0_

10/1

00M

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

12 15A

XX

-XX

-XX

Xin

JQX

XX

Eth

erne

t_E

TH0_

10/1

00M

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

10B

ase-

T/10

0Bas

e-TX

ETH

0

LINK

ACT

Terminal Resistor close to output side

Rou

ting

top

or b

otto

m

100

ohm

s di

ffere

ntia

l tra

ceim

peda

nce

A

t the

De-

Ass

ertio

n of

Res

et:

P

HY

AD

D[2

:0]-p

in15

/14/

13: 0

01 =

1

CO

NFI

G[2

:0]-p

in18

/29/

28:0

01,R

MII

mod

e

Dup

lex

Mod

e-pi

n16:

1,H

alf D

uple

x

Isol

ate

Mod

e-pi

n20:

0,D

isab

le

Spe

ed M

ode-

pin3

1: 1

,100

Mbp

s

Nw

ay A

uto-

Neg

otia

tion-

p30:

1,E

nabl

e

top/

bot

top/

bot

top/

bot

top/

bot

1 2 3 6 4 5 7 8

75 75

7575

1nF

TD+

TD-CT NCRD-CT

TX+

TX-

RX+

RX-

RD+

Left

Gre

en L

ED

Righ

t ye

llow

LED

J12

RJ4

5 C

onne

ctor

1 2 3 6 4 5 7 8

75 75

7575

1nF

TD+

TD-CT NCRD-CT

TX+

TX-

RX+

RX-

RD+

Left

Gre

en L

ED

Righ

t ye

llow

LED

J12

RJ4

5 C

onne

ctor

1 2 7 83 6549

10

11

12

13 14 15 16

C12

610

0nF

C12

610

0nF

C13

810

0nF

C13

810

0nF

R35

8

1KR35

8

1K

C11

62.

2uF

C11

62.

2uF

C14

710

0nF

C14

710

0nF

R361 10KR361 10K

R38

2

1KR38

2

1K

R21

50R

R21

50R

L21

180o

hm a

t 100

MH

zL2

118

0ohm

at 1

00M

Hz

12

R39

30R

R39

30R

C10

610

uFC

106

10uF

C15

3 20pF

C15

3 20pF

R380 10KR380 10K

C15

220

pFC

152

20pF

C16

010

uFC

160

10uF

R35

110

KR

351

10K

C35

100n

FC

3510

0nF

R38

36.

49K

1%

R38

36.

49K

1%

R368 10KR368 10K

R22

647

0RR

226

470R

R350 10KR350 10K

R23

047

0RR

230

470R

R349 10KR349 10K

R381 10KR381 10K

R379 10KR379 10K

R378 10KR378 10K

R37

5D

NP

(1M

)R

375

DN

P(1

M)

R35

210

KR

352

10K

Y4

25M

Hz

CL=

20pF

Y4

25M

Hz

CL=

20pF

1

2 3

4

U14

KS

Z808

1RN

B

U14

KS

Z808

1RN

BRX

C/B

-CA

ST_

OFF

19

CR

S/C

ON

FIG

129

CO

L/C

ON

FIG

028

TXD

125

TXD

024

TXE

N23

RX

D3/

PH

YA

D0

13R

XD

2/P

HY

AD

114

RX

D1/

PH

YA

D2

15R

XD

0/D

UP

LEX

16R

XD

V/C

ON

FIG

218

RX

ER

/ISO

20

MD

C12

MD

IO11

INTR

P/N

AN

D21

VD

DA

_3V

33

VD

DIO

17

RE

SE

T32

TXP

7

TXM

6

RX

P5

RX

M4

VD

D_1

V2

2

GN

D1

PA

DD

LE33

TXC

22TX

D2

26TX

D3

27R

EX

T10

XO

8

XI

9

LED

0/N

WA

YE

N30

LED

1/S

PE

ED

31

C37

100n

FC

3710

0nF

L22

180o

hm a

t 100

MH

zL2

218

0ohm

at 1

00M

Hz

12

R36

439

RR

364

39R


68

Figure 4-61. HSMCI

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

VC

C_3

V3

VD

D_M

CI1

VC

C_3

V3

VC

C_3

V3

MC

I1_P

WR

_PE

4[9

]

MC

I0_D

A0_

PC

6[8

]

MC

I0_C

K_P

C4

[8]

MC

I0_D

A3_

PC

9[8

]

MC

I0_C

DA

_PC

5[8

]

MC

I0_D

A2_

PC

8[8

]M

CI0

_DA

1_P

C7

[8]

MC

I1_D

A0_

PE

20[9

]M

CI1

_DA

1_P

E21

[9]

MC

I1_D

A2_

PE

22[9

]M

CI1

_DA

3_P

E23

[9]

MC

I1_C

DA

_PE

19[9

]

MC

I1_C

K_P

E18

[9]

MC

I1_C

D_P

E3

[9]

MC

I0_C

D_P

E2

[9]

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

13 15A

XX

-XX

-XX

Xin

JQX

XX

HS

MC

I

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

13 15A

XX

-XX

-XX

Xin

JQX

XX

HS

MC

I

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

13 15A

XX

-XX

-XX

Xin

JQX

XX

HS

MC

I

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

(MC

I0_D

A0)

Mic

ro S

D C

AR

D IN

TER

FAC

E - M

CI0

(MC

I1_C

D)

(MC

I1_W

P)

SD/M

MC

Plus

CA

RD

INTE

RFA

CE

- MC

I1

(MC

I1_D

A1)

(MC

I1_D

A0)

(MC

I1_C

K)

(MC

I1_C

DA

)(M

CI1

_DA

3)(M

CI1

_DA

2) (MC

I0_D

A1)

(MC

I0_C

K)

(MC

I0_C

DA

)

(MC

I0_D

A3)

(MC

I0_D

A2)

(MC

I0_C

D)

SD/M

icro

SD

CA

RD

J9

DN

P(M

icro

SD

Car

d C

onne

ctor

)

J9

DN

P(M

icro

SD

Car

d C

onne

ctor

)

DA

T07

DA

T18

DA

T21

DA

T32

VD

D4

VS

S6

CD

9P

GN

D10

PG

ND

_111

PG

ND

_212

PG

ND

_313

NC

_114

NC

_215

CM

D3

CLK

5

Q4

IRLM

L640

2Q

4IR

LML6

402

1

32

R39

60R

R39

60R

R337 68KR337 68K

R344 10KR344 10KR172 68KR172 68K

J24

SD

Car

d C

onne

ctor

J24

SD

Car

d C

onne

ctor

8 57 6 4 3 2 1 9

141516 13 12 11 10

R141 68KR141 68K

R35

7

DN

P(4

.7K

)

R35

7

DN

P(4

.7K

)

R194 10KR194 10K

R340 68KR340 68K

R163 DNP(68K)R163 DNP(68K)

R34

810

0K 1

%R

348

100K

1%

R138 68KR138 68K

R166 68KR166 68K

C14

110

uFC

141

10uF

C29

10uF

C29

10uF

R390 68KR390 68K

C14

410

0nF

C14

410

0nF

R386 10KR386 10K

R392 68KR392 68K

R142 10KR142 10K

C30

100n

FC

3010

0nF


Figure 4-62. EDBG

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

ED

BG

_XIN

ED

BG

_XO

UT

ED

BG

_US

B_F

S_D

ME

DB

G_U

SB

_FS

_DP

ED

BG

_US

B_D

ME

DB

G_U

SB

_VB

US

_5V

TAR

GE

T_JT

AG

_NR

ST

ED

BG

_FO

RC

E_B

OO

T

ED

BG

_CD

C_U

AR

T_R

XE

DB

G_C

DC

_UA

RT_

TX

EDBG_XINEDBG_XOUT

TARGET_JTAG_TCK

TARGET_JTAG_TMSTARGET_JTAG_TDI

TAR

GE

T_JT

AG

_TC

KTA

RG

ET_

JTA

G_T

DO

TAR

GE

T_JT

AG

_TM

STA

RG

ET_

JTA

G_T

DI

TAR

GE

T_JT

AG

_NR

ST

STA

TUS

_LE

D_C

TRL

TAR

GE

T_R

ES

ET_

SE

NS

E

ED

BG

_JTA

G_T

CK

ED

BG

_JTA

G_T

DI

ED

BG

_JTA

G_T

DO

ED

BG

_JTA

G_T

MS

ED

BG

_RE

SE

T_N

ED

BG

_JTA

G_T

CK

ED

BG

_JTA

G_T

DO

ED

BG

_JTA

G_T

MS

ED

BG

_JTA

G_T

DI

ED

BG

_US

B_D

P

ED

BG

_US

B_D

P

ED

BG

_US

B_D

M

ED

BG

_ID

_01

ED

BG

_ID

_04

ED

BG

_ID

_05

ED

BG

_ID

_02

ED

BG

_ID

_06

ED

BG

_ID

_03

TARGET_JTAG_TDO

ED

BG

_RE

SE

T_N

ED

BG

_AD

C0

ED

BG

_RE

SE

T_N

ER

AS

EE

DB

G_I

D_0

7

ED

BG

_DG

I_TW

DE

DB

G_D

GI_

TWC

K

VC

C_E

DB

G

VC

C_E

DB

GV

CC

_ED

BG

VC

C_E

DB

G

VC

C_E

DB

G

EA

RTH

_US

B_E

DB

G

EA

RTH

_US

B_E

DB

G

VC

C_E

DB

G

VC

C_E

DB

G

VC

C_5

V

VC

C_E

DB

G

ED

BG

_DG

I_TW

D[1

5]E

DB

G_D

GI_

TWC

K[1

5]

ED

BG

_ID

_01

[10]

DB

GU

_RX

D3_

PE

16[9

,10]

DB

GU

_TX

D3_

PE

17[9

,10]

TCK

[7,1

0]TD

O[7

,10]

TMS

[7,1

0]TD

I[7

,10]

NR

ST_

3V3

[4,1

0,12

,15]

NR

ST_

3V3

[4,1

0,12

,15]

ED

BG

_SP

I_M

ISO

[15]

ED

BG

_SP

I_M

OS

I[1

5]E

DB

G_S

PI_

SC

K[1

5]E

DB

G_S

PI_

NC

S[1

5]

ED

BG

_ID

_04

[15]

ED

BG

_ID

_05

[15]

ED

BG

_ID

_06

[15]

ED

BG

_DG

I_G

PIO

0[1

5]E

DB

G_D

GI_

GP

IO1

[15]

ED

BG

_DG

I_G

PIO

2[1

5]E

DB

G_D

GI_

GP

IO3

[15]

ED

BG

_US

B_V

BU

S_5

V[4

]

ED

BG

_ID

_02

[15]

ED

BG

_ID

_03

[15]

ED

BG

_ID

_07

[15]

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

14 15A

XX

-XX

-XX

Xin

JQX

XX

ED

BG

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

14 15A

XX

-XX

-XX

Xin

JQX

XX

ED

BG

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

14 15A

XX

-XX

-XX

Xin

JQX

XX

ED

BG

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

ED

BG

_US

B_H

S_D

PE

DB

G_U

SB

_HS

_DM

ED

BG

_DG

I_S

DA

ED

BG

_DG

I_S

CL

PO

WE

R_L

ED

_CTR

L

EDB

G

JTA

G

(3V

3)

ED

BG

_DIS

EDB

G_T

WI

Forc

e s/

n

C18

9

2.2u

F

C18

9

2.2u

F

R79

330R

R79

330R

Q9

Q9

1

3 2

C46

1nF

C46

1nF

C19

6

2.2u

F

C19

6

2.2u

F

R1061K R1061K

C15

20pF

C15

20pF

R41

30R

R41

30R

R5

330R

R5

330R

R10

4

100K

1%

R10

4

100K

1%

Q2

Q2

1

3 2

R20

39R

R20

39R

C19

3

100n

F

C19

3

100n

F

C7

1nF

C7

1nF

L14

180o

hm a

t 100

MH

zL1

418

0ohm

at 1

00M

Hz

12

JP1

Hea

der 1

X2

JP1

Hea

der 1

X2

12

C11

10pF

C11

10pF

C19

5

100n

F

C19

5

100n

F

Y1

12M

Hz

CL=

15pF

Y1

12M

Hz

CL=

15pF

14 3

2

R80

330R

R80

330R

TP6

SM

DTP

6S

MD

R7

330R

R7

330R

R4

200K

R4

200K

R6

330R

R6

330R

TP2

SM

DTP

2S

MD

C13

20pF

C13

20pF

C47

1nF

C47

1nF

JPR

1JU

MP

ER

JPR

1JU

MP

ER

R8

10K

R8

10K

R1021K R1021K

L13

180o

hm a

t 100

MH

zL1

318

0ohm

at 1

00M

Hz

12

C22

2.2u

F

C22

2.2u

F

R1051K R1051K

C9

100n

F

C9

100n

F

R131 470RR131 470R

C18

8

100n

F

C18

8

100n

F

R10

733

0RR

107

330R

R4142.2K 1% R4142.2K 1%

R1031K R1031K

C8

2.2u

F

C8

2.2u

F

R31

DN

P(1

M)

R31

DN

P(1

M)

TP1

SM

DTP

1S

MD

R10

10R

R10

10R

R57

330R

R57

330R

D4

RE

DD

4R

ED

R9

6.8K

1%

R9

6.8K

1%

C19

210

0nF

C19

210

0nF

C17

100n

FC

1710

0nF

R4152.2K 1% R4152.2K 1%

J3

DN

P(H

eade

r 2X

5)

J3

DN

P(H

eade

r 2X

5)

12

34

56

78

910

D6

BLU

ED

6B

LUE

GNDVCC

IO1IO2

U11

PR

TR5V

0U2X

GNDVCC

IO1IO2

U11

PR

TR5V

0U2X

1

23

4

R21

39R

R21

39R

U1

AT3

2UC

3A42

56J-

C1U

RU

1A

T32U

C3A

4256

J-C

1UR

PA

00 /

PA

18G

8P

A01

/ P

A17

G10

PA

02 /

PX

47E

1P

A03

F9P

A04

E9

PA

05G

9P

A06

/ P

A13

E8

PA

07 /

PA

19H

10P

A08

F8

PA

10C

10P

A11

C9

PA

12 /

PA

25G

7P

A14

/ P

X11

K7

PA

15 /

PX

45J7

PA

16E

7P

A20

/ P

X18

H9

PA

21 /

PX

22K

10P

A22

/ P

X20

H6

PA

23 /

PX

46G

6P

A24

/ P

X17

J10

PA

09D

8

PA

26 /

PB

05F7

PA

27A

2P

A28

A1

PA

29B

4P

A30

A4

PA

31C

2

US

B_V

BU

SA

10D

MH

SA

9D

PH

SA

8

DM

FSB

9D

PFS

B8

US

B_V

BIA

SC

7VDDANA J6GNDANA H8

VDDIN_1 D9

VDDCORE E10GNDCORE F10

VDDIN_2 D10GNDPLL B10

VDDIO_1 E5VDDIO_2 B5VDDIO_3 J5VDDIO_4 B6VDDIO_5 F2VDDIO_6 F6

GNDIO_1 F5GNDIO_2 C3GNDIO_3 H3GNDIO_4 E2GNDIO_5 C8GNDIO_6 E6

PC00 / PX14K5PC01K6PC02A5PC03A6PC04B7PC05A7

PB00B1PB01B2PB02B3PB03C4PB04A3PB06D7PB07D6PB08C6PB09C5PB10D5PB11C1

PX

00G

4P

X01

G2

PX

02G

3P

X03

J1P

X04

H1

PX

05G

1P

X06

F3P

X07

F4P

X08

E3

PX

09E

4P

X10

D2

PX

12D

1P

X13

D3

PX

15 /

PX

32K

4P

X16

/ P

X53

D4

PX

19 /

PX

59F1

PX

21H

2P

X23

K1

PX

24J2

PX

25H

4P

X26

J3P

X27

K2

PX

28K

3P

X29

J4P

X30

G5

PX

31H

5

RE

SE

T_N

J9

TMS

H7

TDO

J8TD

IK

8TC

KK

9

R3

100K

1%

R3

100K

1%

VBUS

SHD

DM DP IDGN

D J20

Mic

roU

SB

AB

Con

nect

or

VBUS

SHD

DM DP IDGN

D J20

Mic

roU

SB

AB

Con

nect

or

1 2 3 4 5

8

6

11

7

9 10

L218

0ohm

at 1

00M

Hz

L218

0ohm

at 1

00M

Hz

12

R1101K R1101K

R1091K R1091K

R56 100K 1%R56 100K 1%

R412 470RR412 470R

R1081K R1081K


70

Figure 4-63. Expansion and XPRO Connectors

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

EX

P_5

V

NR

ST_

3V3

VC

C_3

V3

VC

C_3

V3

VC

C_3

V3

VC

C_3

V3

VC

C_5

V

VC

C_3

V3

EX

P_5

V

EX

P_5

V

EX

P_P

D23

[9]

EX

P_P

D31

[9]

EX

P_P

D10

[9]

EX

P_P

C24

[8]

EX

P_P

E28

[9]

EX

P/X

PR

O_P

B18

[7]

EX

P/X

PR

O_P

C2

[8]

ED

BG

_DG

I_TW

CK

[14]

EX

P_P

D9

[9]

NR

ST_

3V3

[4,1

0,12

,14]

EX

P_P

B1

[7]

EX

P_P

E7

[9]

EX

P/X

PR

O_P

E22

[9]

EX

P_P

C20

[8]

EX

P_P

C23

[8]

EX

P_P

E8

[9]

EX

P/X

PR

O_P

B19

[7]

EX

P_P

D24

[9]

EX

P_P

B4

[7]

EX

P_P

B10

[7]

EX

P/X

PR

O_P

B26

[7]

EX

P/X

PR

O_P

E21

[9]

EX

P/X

PR

O_P

B21

[7]

EX

P_P

D25

[9]

EX

P_P

B5

[7]

EX

P/X

PR

O_P

C3

[8]

EX

P_P

D26

[9]

EX

P/X

PR

O_P

C26

[8]

EX

P_P

B4

[7]

EX

P/X

PR

O_P

E18

[9]

EX

P_P

E23

[9]

EX

P_P

C19

[8]

EX

P/X

PR

O_P

C25

[8]

EX

P_P

E31

[9]

EX

P_P

D27

[9]

EX

P_P

B22

[7]

EX

P/X

PR

O_P

E19

[9]

EX

P/X

PR

O_P

B30

[7]

EX

P/X

PR

O_P

C0

[8]

EX

P/X

PR

O_P

B15

[7]

EX

P/X

PR

O_P

B14

[7]

EX

P/X

PR

O_P

C1

[8]

EX

P_P

D30

[9]

EX

P_P

D22

[9]

EX

P_P

E20

[9]

EX

P/X

PR

O_P

C1

[8]

EX

P/X

PR

O_P

C26

[8]

EX

P_P

E15

[9]

EX

P_V

BA

T[4

]

EX

P/X

PR

O_P

E26

[9]

EX

P/X

PR

O_P

E27

[9]

EX

P_P

D16

[9]

EX

P/X

PR

O_P

D17

[9]

EX

P_P

D19

[9]

EX

P_P

E13

[9]

EX

P/X

PR

O_P

D15

[9]

ED

BG

_DG

I_TW

D[1

4]

EX

P_5

V[4

]

EX

P_T

WD

0_P

A30

[7]

EX

P_P

D12

[9]

EX

P/X

PR

O_P

D13

[9]

EX

P/X

PR

O_P

C3

[8]

EX

P_P

D28

[9]

EX

P_P

C22

[8]

EX

P_P

D20

[9]

EX

P_P

E25

[9]

EX

P_P

D29

[9]

EX

P_P

B1

[7]

EX

P_P

B3

[7]

EX

P_P

C4

[8]

EX

P_P

D8

[9]

EX

P/X

PR

O_P

D11

[9]

EX

P_P

E0

[9]

EX

P_P

D21

[9]

EX

P/X

PR

O_P

C25

[8]

EX

P/X

PR

O_P

B29

[7]

AR

EF

[7]

EX

P/X

PR

O_P

B27

[7]

EX

P_P

C21

[8]

EX

P_P

B3

[7]

EX

P_P

D14

[9]

EX

P/X

PR

O_P

B20

[7]

EX

P/X

PR

O_P

C0

[8]

EX

P_P

B11

[7]

EX

P/X

PR

O_P

C28

[8]

EX

P_P

E5

[9]

EX

P_P

E24

[9]

EX

P_P

B28

[7]

EX

P/X

PR

O_P

C29

[8]

EX

P/X

PR

O_P

C27

[8]

EX

P_P

C31

[8]

EX

P/X

PR

O_P

C30

[8]

EX

P_P

B31

[7]

EX

P_P

E6

[9]

EX

P_P

D18

[9]

EX

P_P

E12

[9]

EX

P_T

WC

K0_

PA

31[7

]

ED

BG

_SP

I_M

ISO

[14]

EX

P/X

PR

O_P

B18

[7]

ED

BG

_SP

I_S

CK

[14]

EX

P/X

PR

O_P

B20

[7]

ED

BG

_SP

I_M

OS

I[1

4]E

XP

/XP

RO

_PB

19[7

]

EX

P/X

PR

O_P

E30

[9]

EX

P/X

PR

O_P

E29

[9]

ED

BG

_SP

I_N

CS

[14]

ED

BG

_DG

I_G

PIO

0[1

4]

ED

BG

_DG

I_G

PIO

1[1

4]

ED

BG

_DG

I_G

PIO

2[1

4]

ED

BG

_DG

I_G

PIO

3[1

4]

ED

BG

_ID

_05

[14]

ED

BG

_ID

_07

[14]

ED

BG

_ID

_04

[14]

ED

BG

_ID

_06

[14]

EX

P/X

PR

O_P

B14

[7]

ED

BG

_ID

_03

[14]

EX

P/X

PR

O_P

C1

[8]

EX

P/X

PR

O_P

C0

[8]

EX

P/X

PR

O_P

D17

[9]

EX

P/X

PR

O_P

E30

[9]

EX

P/X

PR

O_P

D11

[9]

EX

P/X

PR

O_P

E19

[9]

EX

P/X

PR

O_P

D13

[9]

EX

P/X

PR

O_P

B15

[7]

EX

P/X

PR

O_P

D15

[9]

EX

P/X

PR

O_P

E26

[9]

EX

P/X

PR

O_P

E27

[9]

EX

P/X

PR

O_P

E18

[9]

EX

P/X

PR

O_P

C29

[8]

EX

P/X

PR

O_P

E29

[9]

EX

P/X

PR

O_P

C30

[8]

EX

P/X

PR

O_P

B26

[7]

ED

BG

_ID

_02

[14]

EX

P/X

PR

O_P

C3

[8]

EX

P/X

PR

O_P

C2

[8]

EX

P/X

PR

O_P

B21

[7]

EX

P/X

PR

O_P

B30

[7]

EX

P/X

PR

O_P

B18

[7]

EX

P/X

PR

O_P

E22

[9]

EX

P/X

PR

O_P

B19

[7]

EX

P/X

PR

O_P

B27

[7]

EX

P/X

PR

O_P

B20

[7]

EX

P/X

PR

O_P

C25

[8]

EX

P/X

PR

O_P

C26

[8]

EX

P/X

PR

O_P

E21

[9]

EX

P/X

PR

O_P

C27

[8]

EX

P/X

PR

O_P

B29

[7]

EX

P/X

PR

O_P

C28

[8]

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

15 15A

XX

-XX

-XX

Xin

JQX

XX

Exp

ansi

on &

XP

RO

Con

nect

ors

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

15 15A

XX

-XX

-XX

Xin

JQX

XX

Exp

ansi

on &

XP

RO

Con

nect

ors

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

RE

VD

ATE

MO

DIF

.D

ES

.D

ATE

VE

R.

SC

ALE

1/1

RE

V.

SH

EE

T

INIT

ED

ITAA

Rev

A

15 15A

XX

-XX

-XX

Xin

JQX

XX

Exp

ansi

on &

XP

RO

Con

nect

ors

29-A

ug-1

4

SA

MA

5D4-

XU

LT

Xin

JQ11

-Oct

-14

XX

XX

X-X

X-X

X

Expa

nsio

nB

oard

sC

onne

ctor

s

SP

I2_N

PC

S2

SP

I2_M

ISO

SP

I2_N

PC

S0

SP

I1_N

PC

S3

SP

I1_M

ISO

SP

I1_N

PC

S0

XPR

O C

onne

ctor

s

XPR

O P

ower

XPR

O E

XT1

XPR

O E

XT2

ID02

AD

0TI

OA

4P

WM

H3

PC

K0

TWD

2U

RX

D1

ID03

AD

2TI

OA

5P

WM

H2

SP

I2_N

PC

S1

TWD

1R

XD

4TW

CK

1TX

D4

SP

I2_M

OS

IS

PI2

_SP

CK

TWC

K2

UTX

D1

SP

I1_M

OS

IS

PI1

_SP

CK

PW

ML3

TIO

B4

TIO

B5

PW

ML2

AD

1

AD

3

SP

I1_M

ISO

IS

OM_1I

PS

KC

PS_1I

PS

R32

80R

R32

80R

R31

60R

R31

60R

R38

7D

NP

(0R

)R

387

DN

P(0

R)

J7

Soc

ket 1

X8

J7

Soc

ket 1

X8

1 2 3 4 5 6 7 8

R33

80R

R33

80R

R36

3D

NP

(0R

)R

363

DN

P(0

R)

J17

Soc

ket 1

X10

J17

Soc

ket 1

X1012345678910

R29

8D

NP

(330

R)

R29

8D

NP

(330

R)

R30

40R

R30

40R

R23

8D

NP

(330

R)

R23

8D

NP

(330

R)

R37

00R

R37

00R

J21

DN

P(H

eade

r 2X

2)

J21

DN

P(H

eade

r 2X

2)

1 32 4

R36

60R

R36

60R

J18

Soc

ket 1

X8

J18

Soc

ket 1

X81 2 3 4 5 6 7 8

R35

40R

R35

40R

R29

6D

NP

(330

R)

R29

6D

NP

(330

R)

R23

20R

R23

20R

R29

3D

NP

(0R

)R

293

DN

P(0

R)

J6

Soc

ket 1

X8

J6

Soc

ket 1

X8

1 2 3 4 5 6 7 8

R30

10R

R30

10R

R34

30R

R34

30R

R29

1D

NP

(330

R)

R29

1D

NP

(330

R)

R30

7D

NP

(0R

)R

307

DN

P(0

R)

R29

70R

R29

70R

R32

30R

R32

30R

R39

1D

NP

(0R

)R

391

DN

P(0

R)

R21

910

0R 1

%R

219

100R

1%

J19

Soc

ket 1

X8

J19

Soc

ket 1

X81 2 3 4 5 6 7 8

R37

70R

R37

70R

R29

0D

NP

(330

R)

R29

0D

NP

(330

R)

R22

90R

R22

90R

J23

DN

P(H

eade

r 2X

10)

J23

DN

P(H

eade

r 2X

10)

12

34

56

78

910

1112

13 15 17 19

14 16 18 20

R32

7D

NP

(0R

)R

327

DN

P(0

R)

R23

3D

NP

(330

R)

R23

3D

NP

(330

R)

R35

30R

R35

30R


R36

20R

R36

20R

R30

50R

R30

50R

R22

5D

NP

(330

R)

R22

5D

NP

(330

R)

R23

60R

R23

60R

R30

90R

R30

90R

R32

10R

R32

10R

R31

70R

R31

70R

R37

6D

NP

(0R

)R

376

DN

P(0

R)

R29

9D

NP

(0R

)R

299

DN

P(0

R)

R34

2D

NP

(0R

)R

342

DN

P(0

R)

R31

3D

NP

(0R

)R

313

DN

P(0

R)

R36

00R

R36

00R

R32

6D

NP

(0R

)R

326

DN

P(0

R)

R29

50R

R29

50R

R32

2D

NP

(330

R)

R32

2D

NP

(330

R)

R38

90R

R38

90R

R30

6D

NP

(0R

)R

306

DN

P(0

R)

R37

1D

NP

(0R

)R

371

DN

P(0

R)

R31

90R

R31

90R

R30

3D

NP

(0R

)R

303

DN

P(0

R)

R29

40R

R29

40R

J22

DN

P(H

eade

r 2X

10)

J22

DN

P(H

eade

r 2X

10)

12

34

56

78

910

1112

13 15 17 19

14 16 18 20

R32

0D

NP

(0R

)R

320

DN

P(0

R)

R36

5D

NP

(0R

)R

365

DN

P(0

R)

R34

5D

NP

(0R

)R

345

DN

P(0

R)

R32

4D

NP

(0R

)R

324

DN

P(0

R)

R38

80R

R38

80R

R30

2D

NP

(0R

)R

302

DN

P(0

R)

R33

9D

NP

(0R

)R

339

DN

P(0

R)

R29

20R

R29

20R

R38

5D

NP

(0R

)R

385

DN

P(0

R)

R21

610

0R 1

%R

216

100R

1%

R30

8D

NP

(330

R)

R30

8D

NP

(330

R)

R31

8D

NP

(0R

)R

318

DN

P(0

R)

R31

5D

NP

(0R

)R

315

DN

P(0

R)

J14

Hea

der 2

X3

J14

Hea

der 2

X3

12

34

56

R35

9D

NP

(0R

)R

359

DN

P(0

R)

R32

50R

R32

50R

R28

90R

R28

90R

R31

20R

R31

20R

R34

6D

NP

(0R

)R

346

DN

P(0

R)

J8

Soc

ket 1

X8

J8

Soc

ket 1

X8

1 2 3 4 5 6 7 8


R30

00R

R30

00R

J15

Soc

ket 2

X18

J15

Soc

ket 2

X18

12

34

56

78

910

1112

13 15 17 19

14 16 18 2021

2223

2425

2627

2829

3031

3233

3435

36

R38

40R

R38

40R

R31

4D

NP

(330

R)

R31

4D

NP

(330

R)



72

5. Revision History

In the tables that follow, the most recent version of the document appears first.

Table 5-1. SAMA5D4 Xplained Ultra User Guide Rev. 44005C Revision History

Doc. Date Changes

11-Aug-15

Updated Section 4.2.1 “Processor”

Modified Section 4.2.2.1 “Power Lines”

Modified Section 4.2.2.2 “Power-up and Power-down Considerations” (title and content)

Table 5-2. SAMA5D4 Xplained Ultra User Guide Rev. 44005B Revision History

Doc. Date Changes

28-Feb-15

Minor formatting and editorial changes throughout

Table 4-3 “DDR_CALN and DDR_CALP”: added column header “Memory Type”

Section 4.2.9.3 “LCD Power”: corrected “two voltage lines are available: 3.3V by default and 5 VCC” to read “two voltage lines are available: 3.3V and 5 VCC (default)”

Table 4-13 “SAMA5D44 Peripheral Functions Available through the Arduino Headers”: changed column header “SAMA5D4 to Arduino” to “SAMA5D44 to Arduino”; added column header “System Function”

Table 4-20 “SD/MMC Socket J24 Signal Descriptions”: defined mnemonic for pins 15 and 16 as “VSS”

Table 4-21 “MicroSD Socket J9 Signal Descriptions”: for pin 9, changed mnemonic from “CARD DETECT” to “CD”; for pin 10, changed mnemonic from “PGND” to “GND”

Table 5-3. SAMA5D4 Xplained Ultra User Guide Rev. 44005 Revision History

Doc. Rev. Changes

44005A First issue.

XX X XX XARM Connected Logo

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