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AN3312 Arbitrary Waveform Generator Using DAC and DMA
Introduction
Author: Alec Miller, Microchip Technology Inc.
This application note describes how an Arbitrary Waveform Generator (AWG) can be implemented using DirectMemory Access (DMA) and an 8-bit buffered Digital-to-Analog Converter (DAC). The waveform that is generated inthis application can be up to 255 samples long, and is created using a look-up table (LUT) in RAM with data fromuser-generated files loaded onto an SD card. Once the waveform has been read from the SD card, the AWGoperates core independently without additional CPU intervention. The waveforms are generated by using a DMA toautomatically load values from the LUT in RAM into the DAC output register at an interval determined by a timer.
© 2019 Microchip Technology Inc. Application Note DS00003312A-page 1
Table of Contents
Introduction.....................................................................................................................................................1
1. Theory of Operation................................................................................................................................ 3
1.1. Waveform Generation.................................................................................................................. 31.2. DAC..............................................................................................................................................31.3. DMA............................................................................................................................................. 3
2. Implementation........................................................................................................................................4
2.1. DAC..............................................................................................................................................42.2. DMA............................................................................................................................................. 42.3. Timer............................................................................................................................................ 52.4. File System...................................................................................................................................52.5. Hardware......................................................................................................................................52.6. User Interface...............................................................................................................................6
3. Results.................................................................................................................................................... 7
4. Appendix................................................................................................................................................. 8
The Microchip Website.................................................................................................................................10
Product Change Notification Service............................................................................................................10
Customer Support........................................................................................................................................ 10
Microchip Devices Code Protection Feature................................................................................................ 10
Legal Notice................................................................................................................................................. 10
Trademarks...................................................................................................................................................11
Quality Management System....................................................................................................................... 11
Worldwide Sales and Service.......................................................................................................................12
AN3312
© 2019 Microchip Technology Inc. Application Note DS00003312A-page 2
1. Theory of Operation
1.1 Waveform GenerationArbitrary waveform generators are systems capable of generating an analog waveform and can take any form. Theyare often used as test equipment to test the response of a circuit to a particular input. The signal is generated bycontinuously adjusting the output of a Digital-to-Analog Converter (DAC) to create an analog signal made of a seriesof discrete steps. The values can either be generated programmatically in real time, or loaded from a look-up table.
The limitations of an Arbitrary Waveform Generator are the input voltage range, the characteristics of the DAC usedto create the signal, and the performance characteristics of the device feeding data to the DAC. The quality of thegenerated waveform is directly related to the sample rate and resolution of the DAC module being used.
1.2 DACThe Digital-to-Analog Converter (DAC) can be used to convert digital input values to an analog output. The DAC usesa reference voltage and outputs a corresponding fraction of that voltage, which is determined by the value loaded intothe DACxDAT register.
The resolution of a DAC is determined by the number of bits in the input code and can be calculated using thefollowing formula:����� = ����2��.������− 1This application uses the 8-bit DAC on the PIC18F47Q43, which at 5V, gives a resolution of 20 mV. The output of aDAC with a given input code is typically defined using the following formula:���� = ����2��.������− 1 ⋅ ����� ����
1.3 DMADirect Memory Access (DMA) is a subsystem that can transfer data between different memory regions, includingregister memory, without CPU intervention. This feature allows data to be transferred between peripherals with amuch lower CPU overhead in comparison to transferring the data without DMA. DMA can be beneficial in applicationsthat require data to be transferred at rates close to the clock frequency of the device, such as in this ArbitraryWaveform Generator application.
The DMA module is comprised of a DMA controller and multiple interface channels that allows data transfer betweenthe device memory regions. The System Arbiter is used to allocate priority levels for different system events, and canbe used to give a DMA higher priority than main code execution or even ISR execution. The DMA subsystemoperates on an independent data and address bus which allows data to be transferred with no impact on CPUoperation (assuming the DMA has been configured to have a lower priority than the CPU using the System Arbiter).
The transfer process can be configured to be triggered by various system events. For instance, a DMA can beconfigured to automatically transfer a message received by a UART to a user-defined storage buffer when the UARTreceive interrupt is triggered.
Each DMA channel has its own configurable priority level, which can be set using the System Arbiter. By default,DMA has lower priority than the CPU lowest priority and will only execute during holes in CPU execution due to two-cycle instructions, such as GOTO. The DMA can be configured to pause CPU execution when triggered, or to evenpause interrupt execution, depending on the priority set using the System Arbiter.
AN3312Theory of Operation
© 2019 Microchip Technology Inc. Application Note DS00003312A-page 3
2. Implementation
2.1 DACIn this application, the DAC is configured to use VDD as the positive reference and ground as the negative reference.To allow for smooth waveforms with desired amplitudes below VDD, the Fixed Voltage Reference (FVR) can supplythe positive reference, or a second DAC could supply VREF to allow for greater flexibility, although this would requirean external DAC in cases where the device has only a single DAC.
2.2 DMAThis application uses two DMA modules, as shown in Figure 2-1. One DMA module feeds data from the look-up table(LUT) into the DAC, and the other DMA feeds the Analog-to-Digital Converter (ADC) reading from a potentiometer tothe period value of the Timer2 module, which determines the frequency of the waveform.Figure 2-1. AWG Block Diagram
DACDMA1LUT
TMR2DMA2T2PR
ADCADRESH
Conv. Complete
POT
OUT
The DAC feeder (DMA1) is configured to be triggered by the Timer2 output. The source address and length are userselectable and the destination is DAC1DAT. The period selector (DMA2) is configured to be triggered by theconversion complete flag of the continuously converting ADC, which is continuously sampling a potentiometer. Thesource is the upper byte of the left-justified output, and the destination is the Timer2 period value.
Example 2-1. Set DMA Source
void dma_setSource(uint8_t dma, void * source, uint16_t length){ DMASELECT = dma; DMAnCON0bits.EN = 0; DMAnSSA = source; DMAnSSZH = (length >> 8) & 0xFF; DMAnSSZL = length & 0xFF; DMAnCON0bits.EN = 1;}
Example 2-2. DMA1 - Look-Up Table to Data Transfer
DMASELECT = 0;DMAnCON1bits.DMODE = 0b00; // Destination pointer unchangedDMAnCON1bits.SMODE = 0b01; // Increment source pointerDMAnDSA = &DAC1DATL;DMAnDSZL = 1; // Destination size 1DMAnSIRQ = 0x1B; // TMR2 triggerDMAnCON0bits.SIRQEN = 1; // Allow hardware to trigger start
AN3312Implementation
© 2019 Microchip Technology Inc. Application Note DS00003312A-page 4
Example 2-3. DMA1 - ADC to TMR2 Data Transfer
DMASELECT = 1;DMAnDSA = &T2PR; // Destination TMR0HDMAnDSZL = 1; // Destination size 1DMAnSSZH = 0;DMAnSSZL = 1; // Source size 1DMAnSSA = &ADRESH; // Source ADCDMAnSIRQ = 0xA; // ADC ConversionDMAnCON0bits.SIRQEN = 1; // Allow hardware to trigger startDMAnCON0bits.EN = 1;
2.3 TimerIn this application, the Timer2 module is configured with a prescaler of 1:8 and a source of FOSC/4, meaning thatwhen the period value is set to zero, a new value will be loaded every 32 clock cycles or eight instruction cycles. Thisaction requires a hole in the form of a branch or GOTO at least once every eight words. Since the timer value will onlybe updated when a hole occurs, there is an increased risk that an update will be missed if no hole occurs beforeanother transfer is triggered. Depending on the importance of uninterrupted execution of the main application versusthe importance of waveform output quality, the System Arbiter can be used to adjust the priorities to give the DMAbeing used as the DAC feeder a higher priority than the main execution. Another option would be to cut the frequencyin half and either limit the maximum frequency of the output or cut the number of sample points in half.
2.4 File SystemThe SD card file system used is based on a standard FAT file system, which can be loaded normally by a PC. Eachwaveform is comprised of its own file, with the file names consisting of sequential numbers starting at ‘0’. Thecontents of the file consist of a 16-character description (e.g., “Sawtooth”) that is buffered with spaces as needed, aone-byte length field indicating the length of the waveform and up to 255 single-byte samples of the waveform to begenerated.
The waveforms on the SD card are generated using a Python script that converts standard single-channel signed 16-bit pulse code modulation (PCM) .WAV files to an 8-bit unsigned PCM with the meta data, as described above.The .WAV files that the Python script converts from can be created using standard audio editing software. The Pythonscript also down-samples the audio waveform to the desired number of samples.
On start-up, the PIC® device reads the contents of the SD card to determine the number of waveforms saved on theSD card. The descriptions of each file are then stored in RAM to prevent the need to repeatedly read from the SDcard while cycling through choices.
When a waveform is loaded, the contents of the data portion of the file are read into the look-up table addressed bythe DMA, and the length field is used to control the length of data read by the DMA.
2.5 HardwareThis application was created using the Curiosity High Pin Count (HPC) Development Board with a PIC18F47Q43microcontroller. The MikroElektronika microSD Click board™ and the LCD mini Click board™ were used for SD cardreading and the display, respectively. The microSD Click board is a standard SD card connector that can beinterfaced using the SPI protocol. The LCD Click board consists of a 2x16 HD44780-compatible LCD display in 4-data-pin mode, connected to a MCP23S17 port expander and MCP4161 digital potentiometer for contrast control(both controlled using SPI). The ADC continuously samples the potentiometer on pin RA0 to control the frequency ofthe waveform being generated. The buttons on pins RB4 and RC5 are used to select the waveform that will begenerated, as described in the User Interface section, and the waveform is on pin RA2.
AN3312Implementation
© 2019 Microchip Technology Inc. Application Note DS00003312A-page 5
2.6 User InterfaceThis application implements a very simple user interface that is used to control the AWG. The button on pin RC5cycles between the different waveforms saved to the SD card, displaying the 16-character descriptor on the bottomline of the LCD screen. If the selected file is already loaded, the top line displays the text “Current file,” otherwise itwill display “Select file”. The button on pin RB4 loads the selected waveform into the DMA look-up table and sets theDMA scan length to the length of the sample.
AN3312Implementation
© 2019 Microchip Technology Inc. Application Note DS00003312A-page 6
3. ResultsThe waveform generator was able to create the triangular and sinusoidal waveforms shown in Figure 3-1 and Figure3-2, respectively, with an adjustable frequency. With a clock speed of 64 MHz, an effective prescaler of 1:32 (1:8prescaler and FOSC/4 source) and that there were 100 samples in the look-up tables, the maximum frequency of thewaveform is 20 kHz. Depending on the needs of the application, this frequency could be increased, either at theexpense of the signal quality by reducing the number of samples, or at the expense of other program execution byprioritizing the DMA over CPU execution to allow for a faster sample rate.
Figure 3-1. Sinusoidal Output
Figure 3-2. Triangular Output
AN3312Results
© 2019 Microchip Technology Inc. Application Note DS00003312A-page 7
4. AppendixFigure 4-1. Main Schematic
1
1
2
2
3
3
4
4
D D
C C
B B
A A
Title
Number RevisionSize
A
Date: 2019-09-12 Sheet ofFile: Main.SchDoc Drawn By:
RA02
RA13
RA24
RA35
RA46
RA57
RA614
RA713
RB033
RB134
RB235
RB336
RB437
RB538
RB6/ICSPCLK39
RB7/ICSPDAT40
RC0 15
RC1 16
RC2 17
RC3 18
RC4 23
RC5 24
RC6 25
RC7 26
RD0 19
RD1 20
RD2 21
RD3 22
RD4 27
RD5 28
RD6 29
RD7 30
RE08
RE19
RE210
VDD
11
VDD
32
VSS
12
VSS
31
RE3/MCLR/VPP10
U1PIC18F47Q43
123456
J1
PICkit
GND GND
VCC VCC
SCLKMISOMOSI
MCLR
ICSPDAT/DACICSPCLK
MCLR
ICSPDAT/DACICSPCLK
1 2S2
10K
R6
VCC
GND
1KR5
1KR2
10K R1
VCC
1 2S1
GND
C20.1µF
C40.1µF
C11μF
C31μF
VCC VCC VCC VCC
GND GND GND GND
GND
VCC
R31K
R4
VCC
GND
POT_CSCS_SD
EXP_nRSTLCD_CS
11
22
J2
GND
11 22
J3VCC
GND
A Miller
Main
1 2
1
AN3312Appendix
© 2019 Microchip Technology Inc. Application Note DS00003312A-page 8
Figure 4-2. SPI Schematic
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D D
C C
B B
A A
Title
Number RevisionSize
A
Date: 2019-09-12 Sheet ofFile: SPI.SchDoc Drawn By:
GPB0 1
GPB1 2
GPB2 3
GPB3 4
GPB4 5
GPB5 6
GPB6 7
GPB7 8VDD9
VSS10
CS11
SCK12
SI13
SO14
A015
A116
A217
RESET18
INTB19INTA20
GPA021
GPA122
GPA223
GPA324
GPA425
GPA5 26
GPA6 27
GPA7 28
U2
MCP23S17
VSS1VCC2VEE3RS4R/W5E6DB07DB18DB29DB310DB411DB512DB613DB7
14 LED(+)15 LED(-)16
J5
16 x 2 HD44780
RS
RS
GND
VCC
EDB4DB5DB6DB7
E
DB4DB5DB6DB7
SDI/SDO3
VSS 4
CS1 P0A 5
SCK2
VDD8
P0W 6
P0B 7
U3
MCP4161
VEE
VEE
GND
VCC
POT_CSSCLK
MOSI
MISOMOSISCLK
EXP_CS
EXP_nRST
GND
SCLKMOSIMISOEXP_CSPOT_CS
EXP_nRST
SCLKMOSIMISO
EXP_CSPOT_CS
EXP_nRST
VCC
VCC
C60.1µF
C70.1µF
GND GND
VCC VCC
10K
R910K
R8
VCC VCC
EXP_CSPOT_CS
NC1
CS2
DI3
vdd4
SCLK5
Vss6
DO7
NC8
sw 19
sw 210
Molex 503182-1853
mic
roSD
J4
MISO
SCLK
MOSISD_CS
10K
R7
VCC
SD_CS
SD_CS SD_CS
GND
VCC
C50.1µF
GND
VCC
A Miller
SPI Devices
2 2
1
AN3312Appendix
© 2019 Microchip Technology Inc. Application Note DS00003312A-page 9
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AN3312
© 2019 Microchip Technology Inc. Application Note DS00003312A-page 10
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All other trademarks mentioned herein are property of their respective companies.© 2019, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
ISBN: 978-1-5224-5423-6
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AN3312
© 2019 Microchip Technology Inc. Application Note DS00003312A-page 11
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Worldwide Sales and Service
© 2019 Microchip Technology Inc. Application Note DS00003312A-page 12
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IntroductionTable of Contents1. Theory of Operation1.1. Waveform Generation1.2. DAC1.3. DMA
2. Implementation2.1. DAC2.2. DMA2.3. Timer2.4. File System2.5. Hardware2.6. User Interface
3. Results4. AppendixThe Microchip WebsiteProduct Change Notification ServiceCustomer SupportMicrochip Devices Code Protection FeatureLegal NoticeTrademarksQuality Management SystemWorldwide Sales and Service