Analyse and Design MultiProcessor System - Term Exercise Finally Slide

Trng i hc Bch Khoa H Ni Vin in T Vin Thng

111

H Ni, 5-2014

1

Kin trc my tnh

Kin trc MultiProcessors

GVHD: Thy gio Nguyn Tin Dng Vin in t Vin thng H BKHN

Nhm sinh vin:

Tng Thin V Nguyn Vn T

Nguyn Kim Sn Lp KSTN TVT k55

2

Ni dung trnh by

1. Tng quan

2. Multi processors

3. Thit k phn cng 4. Thit k phn mm 5. Nhn xt

3

1. Gii thiu chung

Single processor: h thng my tnh ch c duy nht mt n v x l.

Multiprocessor: h thng my tnh c nhiu n v x l.

Cc n v x l chia s b nh v cc thit b ngoi vi

Multi-core processor: l mt trng hp c bit ca multiprocessor.

Tt c cc processors u nm trong cng mt die duy nht trn motherboard.

4 Kin trc multiprocessor 8/12/2014

1. Gii thiu chung

Kin trc tng qut ca

Single-core


1. Gii thiu chung

Kin trc tng qut ca multi-core processor


2. Multi processor

2.1. Multi-core processor.

2.2. L do la chn multi-core processor?

2.3. Cc m hnh b nh trong multiprocessor

2.4. Cc xung t v cch khc phc.


2.1. Multi-core processors


2.2. Ti sao li la chn multi-core ?

Vi Single Core:

Kh khn trong vic tng tn s xung nhp ln cao.

su pipeline cng ln dn n: Nhit ta ra t b x l rt cao

Kh khn v tn km trong vic thit k v ch to

Nhu cu chy song song nhiu ng dng

Trong mi ng dng li c nhiu cng vic cn c x l ng thi



Cc n v x l s dng chung mt b nh.



Mi mt n v x l s hu ring mt vng nh v ni dng trong l c lp


2.4. Xung t v cch khc phc

13 Kin trc multiprocessor

2.4.1. Cc vn xung t

2.4.2. Gii php khc phc

8/12/2014

2.4.1. Cc vn xung t


H thng private caches

Lm th no d liu trong cc caches nht qun vi nhau?

8/12/2014

2.4.1. Cc vn xung t


Core 1 v Core 2 c gi tr x t main memory

8/12/2014

2.4.1. Cc vn xung t


Core 1 ghi gi tr x mi vo main memory.

Lc ny x c gi tr 21660 trong main memory

8/12/2014

2.4.1. Cc vn xung t


Tuy nhin lc ny, gi tr x trong core 2 vn l 15213

=> D liu khng nht qun trong cc case v main memory

8/12/2014



Invalidation:

Khi mt core ghi d liu ln memory, th tt c cc bn sao ca d liu ny trn cc caches khc s b mt hiu lc.

Snooping:

Tt c cc core lin tc theo di, gim st (snoop) ng bus kt ni gia cc core.

8/12/2014



Core 1 ghi gi tr mi ca x l 21660, ng thi gi bn tin invalidation ln ng bus

8/12/2014



Sau qu trnh invalidation, core1 v main memory c gi tr x mi l 21660, gi tr x trong core 2 b xa.

8/12/2014



Phng php thay th invalidation protocol l s dng update protocol

8/12/2014

3. Thit k phn cng

3.1. Gii thiu v FPGA.

3.2. Gii thiu v SOPC.

3.3. Kin trc NIOS II.

3.4. Thit k Multiprocessor.

3.4.1. Processor.

3.4.2. Memory.

3.4.3. Cc Module khc

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3.1 Gii thiu v FPGA

Cng ngh FPGA (Field Programable Gate Array)

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1. Cc khi logic

2. Cc lin kt kh trnh

3. Khi giao tip vo ra.

Cu trc bn trong ca mt chip FPGA

3.1 Gii thiu v FPGA

24

KIT DE1 (Development Education) Altera Corporation

3.2. Gii thiu v SOPC.

Mn hnh lm vic ca SOPC Builder 25

Mn hnh lm vic chnh

Component Library

Custom Sytem

Message Box

3.3. Gii thiu v NIOS II

Kin trc NIOS II 26

4.3. Thit k phn cng

NIOS II Processor. CPU1

CPU2

Memory. On Chip Memory

SDRAM Controller

Mutex.

Jtag-uart.

Performance counter

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Multiprocessor DualProcessor

Shared Resource

4.3. Thit k phn cng

S khi ca h thng 28

Processor 1 Processor 2

Shared Memory

MUTEX Qun l truy nhp

Shared Mem

Performance Counter

Jtag-uart In d liu ra

mn hnh Console

4.3. Thit k phn cng

Cu hnh Nios II Processor

29 MultiProcessr

Chip Nios II/e RISC 32 bit

600-700 logic block

3.3. Thit k phn cng

Onchip Memory

30 MultiProcessr

RAM

4Kbytes Data width

32

3.3. Thit k phn cng

Mutex

Qun l truy nhp Memory Shared

CPU no chim c (LOCK)

Mutex th c ghi vo Memory

Shared

31 MultiProcessr

3.3. Thit k phn cng

Performance Counter Unit

o c thi gian thc hin ca h

thng

Gm nhiu counter ty chnh

ca ngi thit k.

32 MultiProcessr

4. Thit k phn mm

4.1 NIOS 2 IDE

4.2 Cc th vin trong NIOS 2 IDE

4.3 So snh hiu sut 1 nhn vi 2 nhn

4.4 Nhn ma trn

4.5 Bin i DCT

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4. Thit k phn mm

4.1 NIOS 2 IDE

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S khi NIOS 2 IDE

4. Thit k phn mm

4.2 Cc th vin trong NIOS 2 IDE

Th vin chung: Math.h, Stdio.h

Cc th vin ring:

Io.h

System.h

Alt_types.h

altera_avalon_performance_counter.h

altera_avalon_mutex.h

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4. Thit k phn mm

4.2 So snh hiu sut 1 nhn vi 2 nhn

tng c bn l thc hin chng trnh prog_1 trn tng nhn 1 v thc hin song song trn 2 nhn

Chng trnh s o thi gian thc hin trn 1 nhn v thc hin song song trn 2 nhn v a ra kt qu so snh

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4. Thit k phn mm

4.3 So snh hiu sut 1 nhn vi 2 nhn Prog_1: int prog_1 (int x, int y) { int result = 0; int i; for (i = x; i

4. Thit k phn mm

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Start

x = 100y = 200

Reset flag = 0

CPU 0

Start

*Cpu0_start = 1

CPU 1

*Cpu1_start?

Start_mesuring*Cpu0_start = 1

*s1 = (x+y)/2+1, *s2 = yR0 = prog_1(x, (x+y)/2)

*Cpu1_done?

*Cpu0_start?

r1 = prog_1((x+y)/2, y)*R1 = r1

*Cpu1_done = 1

EndR = R0 + *R1Stop_mesuring

End

Start

x = 100y = 200

Start_mesuringResult = prog_1(x,y)

Stop_mesuring

End

CPU 0

1 CPU 2 CPU

4. Thit k phn mm

4.3 So snh hiu sut 1 nhn vi 2 nhn true result !!!

--Performance Counter Report--

Total Time: 0.0020119 seconds (100595 clock-cycles)

+---------------+-----+-----------+---------------+-----------+

| Section | % | Time (sec)| Time (clocks)|Occurrences|

+---------------+-----+-----------+---------------+-----------+

|one cpu | 61.5| 0.00124| 61842| 1|

+---------------+-----+-----------+---------------+-----------+

|two cpus | 38.3| 0.00077| 38481| 1|

+---------------+-----+-----------+---------------+-----------+

kt qu so snh hiu sut 1cpu vi 2cpus

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4. Thit k phn mm

4.4 Nhn ma trn

i vi php nhn ma trn, do cc php tnh gi tr tng s ca ma trn tch l c lp vi nhau

chia i khi lng tnh ton cho 2 cpu thc hin cng 1 lc

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Start

M1[10][10]M2[10][10]

Reset flag = 0

CPU 0

Start

*Cpu0_start = 1

CPU 1

*Cpu1_start?

Start_mesuring*Cpu0_start = 1

*m1 = M1, *m2 = M2

*Cpu1_done?

*Cpu0_start?

For (i = 5 to 9) For(j = 0 to 9) Tnh R1(i,j)

*r1=R1*Cpu1_done = 1

End

For (i = 5 to 9) For(j = 0 to 9) R(i,j) = *r1(i,j)Stop_mesuring

End

For (i = 0 to 4) For(j = 0 to 9) Tnh R(i,j)

Start

M1[10][10]M2[10][10]

Start_mesuring

CPU 0

For (i = 0 to 9) For(j = 0 to 9) Tnh R(i,j)

Stop_mesuring

End

CPU 0 CPU 1CPU 0

1 CPU 2 CPU

4. Thit k phn mm

4.4 Nhn ma trn True Result !!! --Performance Counter Report-- Total Time: 0.203229 seconds (10161455 clock-cycles) +---------------+-----+-----------+---------------+-----------+ | Section | % | Time (sec)| Time (clocks)|Occurrences| +---------------+-----+-----------+---------------+-----------+ |1cpu | 60.1| 0.12210| 6105144| 1| +---------------+-----+-----------+---------------+-----------+ |2cpus | 39.9| 0.08112| 4056023| 1| +---------------+-----+-----------+---------------+-----------+

kt qu so snh tnh ma trn thut ton song song

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4. Thit k phn mm

4.4 Bin i Cosine ri rc

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, =() ()

(, )

( + )

( + )

=

=

4. Thit k phn mm

43

2 CPU lm vic cng gii quyt bi ton DCT

4. Thit k phn mm

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Qu trnh chy Kt qu

So snh hiu nng

5. Nhn xt

3 Bi ton chy thnh cng: Tnh tng ca mt dy s.

Nhn 2 Ma trn.

Bin i Cosine ri rc DCT cho mt khi d liu 8*8

Hiu nng ci thin ca mi bi ton c trnh by chi tit phn trn.

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5. Nhn xt

Kt qu Xy dng thnh cng kin trc

Multiprocessor (Harware - Sofware) gm 2 Nios Processor

chy v so snh mi bi ton gia 2 kin trc Single Processor v DualProcessor.

Gii quyt c cc vn lin quan n xung t gia vic chia s ti nguyn.

46

Kt thc

Cm n thy gio v cc bn lng nghe!

Demo trn KIT DE1 Altera

Q&A

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Documents

Analyse and Design MultiProcessor System - Term Exercise Finally Slide