AN6668: Applications of the CA3080 and CA3080A High-Performance … · 2018-06-22 · Applications of the CA3080 High-Performance Operational Transconductance Amplifiers Introduction

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Applications of the CA3080 High-PerformanceOperational Transconductance Amplifiers

Introduction

The CA3080 and CA3080A are similar in generic form toconventional operational amplifiers, but differ sufficiently tojustify an explanation of their unique characteristics. Thisnew class of operational amplifier not only includes the usualdifferential input terminals, but also contains an additionalcontrol terminal which enhances the device's flexibility foruse in a broad spectrum of applications. The amplifierincorporated in these devices is referred to as anOperational Transconductance Amplifier (OTA), because itsoutput signal is best described in terms of the output-currentthat it can supply:

The amplifier's output-current is proportional to the voltagedifference at its differential input terminals.

This Application Note describes the operation of the OTAand features various circuits using the OTA. For example,communications and industrial applications including modu-lators, multiplexers, sample-and-hold-circuits, gain controlcircuits and micropower comparators are shown and dis-cussed. In addition, circuits have been included to show theoperation of the OTA being used in conjunction with CMOSdevices as post-amplifiers.

Figure 1 shows the equivalent circuit for the OTA. The outputsignal is a current which is proportional to the transconduc-tance (gM) of the OTA established by the amplifier bias cur-rent (IABC) and the differential input voltage (eIN). The OTAcan either source or sink current at the output terminal,depending on the polarity of the input signal.

The availability of the amplifier bias current (IABC) terminalsignificantly increases the flexibility of the OTA and permitsthe circuit designer to exercise his creativity in the utilizationof this device in many unique applications not possible withthe conventional operational amplifier.

Circuit Description

A simplified block diagram of the OTA is shown in Figure 2.Transistors Q1 and Q2 comprise the differential input amplifierfound in most operational amplifiers, while the lettered-circles(with arrows leading either into or out of the circles) denote“current-mirrors”. Figure 3A shows the basic type of current-mirror which is comprised of two transistors, one of which isdiode-connected. In a current-mirror with similar geometriesfor QA and QB, the current I’ establishes a second current Iwhose value is essentially equal to that of I’.

This basic current-mirror configuration is sensitive to thetransistor beta (β). The addition of another active transistor,shown in Figure 3B, greatly diminishes the circuit sensitivityto transistor beta and increases the current-source outputimpedance in direct proportion to the transistor beta.Current-mirror W (Figure 2) uses the configuration shown inFigure 3A, while mirrors X, Y, and Z are basically the versionshown in Figure 3B. Mirrors Y and Z employ PNP transistors,as depicted by the arrows pointing outward from the mirrors.Appendix 1 describes current-mirrors in more detail.

Transconductance gM

∆ iOUT∆eIN

-----------------=

FIGURE 1. BASIC EQUIVALENT CIRCUIT OF THE OTA

gM x eIN

OTA7

V+

V-

4

2RO

2RO

RIN

eIN

2

3

-

+

IABC

5

6IOUT = gM(±eIN)

gM (mS) = 19.2 IABC (mA)

RO (MΩ) ≈ 7.5/IABC (mA)

FIGURE 2. SIMPLIFIED DIAGRAM OF THE OTA

Y

7

V+

V-

4

NON-INVERTING

IABC

5

6Q1 Q2

W

2

X

Z

INPUT

OUTPUT

3

INVERTINGINPUT

AMPLIFIERBIAS CURRENT

V-

QB

I’ I

V-

QBQA

I’ I

QA

FIGURE 3A. DIODE-CONNECTED TRANSISTOR PAIRED WITHTRANSISTOR

Application Note November 1996 AN6668.1

2

Figure 4 is the complete schematic diagram of the OTA. TheOTA employs only active devices (transistors and diodes).Current applied to the amplifier-bias-current terminal, IABC,establishes the emitter current of the input differentialamplifier Q1 and Q2. Hence, effective control of thedifferential transconductance (gM) is achieved.

The gM of a differential amplifier is equal to:

(see Reference 2 for derivation) where q is the charge on anelectron, α is the ratio of collector current to emitter currentof the differential amplifier transistors, (assumed to be 0.99in this case), IC is the collector current of the constant-current source (IABC in this case), K is Boltzman's constant,and T is the ambient temperature in degrees Kelvin. At roomtemperature, gM = 19.2 x IABC, where gM is in mS and IABCis in milliamperes. The temperature coefficient of gM isapproximately -0.33%/oC (at room temperature).

Transistor Q3 and diode D1 (shown in Figure 4) comprise thecurrent mirror “W” of Figure 2. Similarly, transistors Q7, Q8 andQ9 and diode D5 of Figure 4 comprise the generic current mir-ror “Z” of Figure 2. Darlington-connected transistors areemployed in mirrors “Y” and “Z” to reduce the voltage sensitivityof the mirror, by the increase of the mirror output impedance.

Transistors Q10, Q11, and diode D6 of Figure 4 comprise thecurrent-mirror “X” of Figure 2. Diodes D2 and D4 are connectedacross the base-emitter junctions of Q5 and Q8, respectively, toimprove the circuit speed. The amplifier output signal is derivedfrom the collectors of the “Z” and “X” current-mirror of Figure 2,providing a push-pull Class A output stage that produces fulldifferential gM. This circuit description applies to both theCA3080 and CA3080A. The CA3080A offers tighter control ofgM and input offset voltage, less variation of input offset voltagewith variation of IABC and controlled cut-off leakage current. Inthe CA3080A, both the output and the input cut-off leakageresistances are greater than 1,000MΩ.

ApplicationsMultiplexing

The availability of the bias current terminal, IABC, allows thedevice to be gated for multiplexer applications. Figure 5 showsa simple two-channel multiplexer system using two CA3080OTA devices. The maximum level-shift from input to output islow (approximately 2mV for the CA3080A and 5mV for theCA3080). This shift is determined by the amplifier input offsetvoltage of the particular device used, because the open-loopgain of the system is typically 100dB when the loading on theoutput of the CA3080A is low. To further increase the gain andreduce the effects of loading, an additional buffer and/or gain-stage may be added. Methods will be shown to successfullyperform these functions.

FIGURE 3B. IMPROVED VERSION: EMPLOYS AN EXTRATRANSISTOR

FIGURE 3. BASIC TYPES OF CURRENT MIRRORS

I’ II’ I

V-

I

V-

I

FIGURE 4. SCHEMATIC DIAGRAM OF OTA TYPES CA3080AND CA3080A

Q4D2

Q5

Q7Q6

Q3

Q2Q1

D1

Q11

D6

Q10

Q8

D4Q9

D5D3

OUTPUT6

7

4V-

V+

VABC5

3

2

INVERTINGINPUT

INVERTINGINPUT

NON-

AMPLIFIERBIAS-CURRENT

qα IC2KT-------------

FIGURE 5. SCHEMATIC DIAGRAM OF OTAs IN A TWO-CHANNEL LINEAR TIME-SHARED MULTIPLEXERCIRCUIT

OTAAMP 1

CA3080+

-

10kΩ

2

310kΩ

54

6

7

V-IABC

V+

CHANNEL #1INPUT

OTAAMP 2

CA3080+

-

10kΩ

2

310kΩ

54

6

7

V-

V+

CHANNEL #2INPUT

MULTIPLEXEDOUTPUT

V+ = 5VV- = -5V

(NO SUPPLY BYPASSINGSHOWN)

620Ω

150pF

36kΩ

36kΩ

Q

Q

DTL OR T2LFLIP-FLOP

V+

CLOCKINPUT

TO TERM 5AMP 1 IABC

2N4037

Application Note 6668

3

In this example ±5V power-supplies were used, with the IC flip-flop powered by the positive supply. The negative supply-volt-age may be increased to -15V, with the positive-supply at 5V tosatisfy the logic supply voltage requirements. Outputs from theclocked flip-flop are applied through PNP transistors to gate theCA3080 amplifier-bias-current terminals. The grounded-baseconfiguration is used to minimize capacitive feed-through cou-pling via the base-collector junction of the PNP transistor.

Another multiplexer system using the OTAs clocked by a CMOSflip-flop is shown in Figure 6. The high output voltage capabilityof the CMOS flip-flop permits the circuit to be driven directlywithout the need for PNP level-shifting transistors.

A simple RC phase-compensation network is used on theoutput of the OTA in the circuits shown in Figures 5 and 6.The values of the RC-network are chosen so that:

This RC network is connected to the point shown because thelowest-frequency pole for the system is usually found at thispoint. Figure 7 shows an oscilloscope photograph of the multi-plexer circuit functioning with two input signals. Figure 8 showsan oscilloscope photograph of the output of the multiplexer witha 6VP-P, sine wave signal (22kHz) applied to one amplifier andthe input to the other amplifier grounded. This photograph dem-onstrates an isolation of at least 80dB between channels.

Sample-and-Hold Circuits

An extension of the multiplex system application is a sample-and-hold circuit (Figure 9), using the strobing characteristicsof the OTA amplifier bias-current (ABC) terminal as a meansof control. Figure 9 shows the basic system using theCA3080A as an OTA in a simple voltage-follower configurationwith the phase-compensation capacitor serving the additionalfunction of sampled-signal storage. The major considerationfor the use of this method to “hold” charge is that neither thecharging amplifier nor the signal readout device significantlyalter the charge stored on the capacitor. The CA3080A is aparticularly suitable capacitor-charging amplifier because itsoutput resistance is more than 1000MΩ under cut-off condi-tions, and the loading on the storage capacitor during the

FIGURE 6. SCHEMATIC DIAGRAM OF A TWO-CHANNELLINEAR MULTIPLEXER SYSTEM USING A CMOSFLIP-FLOP TO GATE TWO OTAs

OTAAMP 1

+

-10kΩ

2

310kΩ

54

6

7

V-

V+

OTAAMP 2

+

-

10kΩ

2

310kΩ

54

6

7

V-

V+

MULTIPLEXEDOUTPUT

V+ = 10V, V- = -10V(NO SUPPLY BYPASSING

SHOWN)

620Ω

150pF

2

VDD

1/2 CD4013A

V-

CLOCK1

82kΩIABC

82kΩIABC

TO TERM 5AMP 1

TO TERM 5AMP 2

VSSQ

Q

7 6 414

CLINPUT

0V

-10V D5

32kΩ

12πRC---------------- 2MHz.≅

Top Trace: Multiplexed Output; 1V/Div., 100µs/Div.Bottom Trace: Time Expansion of Switching Between

Inputs; 2V/Div., 5µs/Div.

FIGURE 7. VOLTAGE WAVEFORMS FOR CIRCUIT OF FIGURE 6

Top Trace: Output; 1V/Div., 100µs/Div.Bottom Trace: Voltage Expansion of Output; 1mV/Div., 100µs/Div.

FIGURE 8. VOLTAGE WAVEFORMS FOR CIRCUIT OF FIGURE 6


4

hold-mode is minimized. An effective solution to the read-outrequirement involves the use of a 3N138 insulated-gate field-effect transistor (MOSFET) in the feedback loop. This transis-tor has a maximum gate-leakage current of 10pA; its loadingon the charge “holding” capacitor is negligible. The open-loopvoltage-gain of the system (Figure 9) is approximately 100dBif the MOSFET is used in the source-follower mode with theCA3080A as the input amplifier. The open-loop output imped-ance (1/gM) of the 3N138 is approximately 220Ω because itstransconductance is about 4,600µS at an operating current of5mA. When the CA3080A drives the 3N138, the closed loopoperational-amplifier output impedance characteristic is:

Figure 10 shows a “sampled” triangular signal. The lowertrace in the photograph is the sampling signal. When thissignal goes negative, the CA3080A is cutoff and the signal is“held” on the storage capacitor, as shown by the plateaus onthe triangular waveform. The center trace is a timeexpansion of the top-most transition (in the upper trace) witha time scale of 2µs/Div.

Once the signal is acquired, variation in the stored-signal levelduring the hold-period is of concern. This variation is primarily afunction of the cutoff leakage current of the CA3080A (a maxi-mum limit of 5nA), the leakage of the storage element, andother extraneous paths. These leakage currents may be either“positive” or “negative” and, consequently, the stored-signalmay rise or fall during the “hold” interval. The term “tilt” is usedto describe this condition. Figure 11 shows the expected pulse“tilt” in microvolts versus time for various values of the compen-sation/storage capacitor. The horizontal axis shows threescales representing leakage currents of 50nA, 5nA, 500pA.

Figure 12 shows a dual-trace photograph of a triangularsignal being “sampled-and-held” for approximately 14mswith a 300pF storage capacitor. The center trace (expandedto 20mV/Div.) shows the worst-case “tilt” for all the stepsshown in the upper trace. The total equivalent leakagecurrent in this case is only 170pA (I = C dv/dt).

Figure 13 is an oscilloscope photograph of a ramp voltagebeing sampled by the “sample-and-hold” circuit of Figure 9. Theinput signal and sampled-output signal are superimposed. Thelower trace shows the sampling signal. Data shown in Figure13 were recorded with supply voltages of ±10V and the seriesinput resistor at terminal 5 was 22kΩ.

ZOUT

ZO OPEN-LOOP( )A OPEN-LOOP VOLTAGE-GAIN( )-------------------------------------------------------------------------------------------

220Ω100dB----------------- 220Ω

105

--------------- 0.0022Ω

≅

≅ ≅ ≅

FIGURE 9. SCHEMATIC DIAGRAM OF OTA IN A SAMPLE-AND-HOLD CIRCUIT

OTACA3080

+

-

2.0kΩ

2

2.0kΩ

5

46

7

IABC

V+ =15V

30kΩ

STORAGE AND PHASE

300pF

120pF

3INPUT

480µA

SAMPLE

HOLD

220ΩR

0.01µFC

COMPENSATIONNETWORK

V- = -15V

0.01µF

3kΩ

OUTPUT

-15V

0V

3N138

FIGURE 10. WAVEFORMS FOR CIRCUIT OF FIGURE 9

Center Trace: Top Portion of Upper Signal; 1V/Div., 2µs/Div.Bottom Trace: Sampling Signal; 20V/Div., 20µs/Div.

Top Trace: Sampled Signal 1V/Div., 20µs/Div.

1000K

100K

10K

1K

100

10

1

HO

LD

PE

RIO

D (

µs)

C = 10µF

3µF

1µF

0.1µF0.3µF

0.03µF

0.01µF

3000pF

300pF

100pF

30pF

10pF

1000pF

110100

101001K

1001K10K

1K10K

100K

10K100K

1000K

THIS SCALE FOR500pA5nA50nALEAKAGE

PULSE TILT (µV)

FIGURE 11. “TILT” IN “HELD” VOLTAGE vs HOLD TIME


5

In Figure 14, the trace of Figure 13 has been expanded(100mV/Div. and 100ns/Div.) to show the response of thesample-and-hold circuit with respect to the sampling signal.After the sampling interval, the amplifier overshoots thesignal level and settles (within the amplifier offset voltage) inapproximately 1µs. The resistor in series with the 300pFphase-compensation capacitor was adjusted to 68Ω for min-imum recovery time.

Figure 15 shows the basic circuit of Figure 9 implemented witha 2N4037 PNP transistor to minimize capacitive feedthrough.Figure 16 shows oscilloscope photographs taken with the cir-cuit of Figure 15 operating in the sampling mode at supply volt-age of ±15V. The 9.1kΩ resistor in series with the PNPtransistor emitter establishes amplifier-bias-current (IABC) con-ditions similar to those used in the circuit of Figure 9.

Center Trace: Worse Case Tilt; 20mV/Div., 20ms/Div.Top Trace: Sampled Signal; 1V/Div., 20ms/Div.

FIGURE 12. “TRIANGULAR-VOLTAGE” BEING SAMPLED BYCIRCUIT OF FIGURE 9

Top Trace: Input and Output Superimposed; 1V/Div., 2µs/Div.Bottom Trace: Sampling Signal; 20V/Div., 2µs/Div.

FIGURE 13. “RAMP-VOLTAGE” BEING SAMPLED BY CIRCUITOF FIGURE 9

Top Trace: Input and Sampled Output Superimposed;

Bottom Trace: Sampling Signal; 20V/Div., 100ns/Div.100mV/Div., 100ns/Div.

FIGURE 14. “TRIANGULAR-VOLTAGE” BEING SAMPLED BYCIRCUIT OF FIGURE 9

FIGURE 15. SCHEMATIC DIAGRAM OF THE OTA IN A SAMPLE-AND-HOLD CONFIGURATION (DTL/TTL CONTROLLOGIC)

OTACA3080

+

-

2.0kΩ

2

2.0kΩ

5

46

7

IABC

V+ = 15V

9.1kΩ

STORAGE AND PHASE

300pF

120pF

3INPUT

DTL/TTL CONTROL

68Ω

0.01µF

COMPENSATIONNETWORK

V- = -15V

0.01µF

3kΩ

OUTPUT

0V

5V

3N138

LOGIC

2N4037

C


6

Considerations of circuit stability and signal retention requirethe use of the largest possible phase-compensation capacitor,compatible with the required slew rate. In most systems thecapacitor is chosen for the maximum allowable “tilt” in the stor-age mode and the resistor is chosen so that 1/2πRC ≅ 2MHz,corresponding to the first pole in the amplifier at an output cur-rent level of 500µA. It is frequently desirable to optimize the sys-tem response by the placement of a small variable resistor inseries with the capacitor, as is shown in Figures 9 and 15. The120pF capacitor shunting the 2kΩ resistor improves the ampli-fier transient response.

Figure 17 shows a multi-trace oscilloscope photograph ofinput and output signals for the circuit of Figure 9, operatingin the linear mode. The lower portion of the photographshows the input signal, and the upper portion shows theoutput signal. The amplifier slew-rate is determined by theoutput current and the capacitive loading: in this case theslew rate (dv/dt) = 1.8V/µs.

The center trace in Figure 17 shows the difference betweenthe input and output signals as displayed on a Tektronix 7A13differential amplifier at 2mV/Div. The output of the amplifiersystem settles to within 2mV (the offset voltage specificationfor the CA3080A) of the input level in 1µs after slewing.

Figure 18 is a curve of slew-rate versus amplifier-bias-cur-rent (IABC) for various storage/compensation capacitors. Themagnitude of the current being supplied to the storage/com-pensation capacitor is equal to the amplifier-bias-current(IABC) when the OTA is supplying its maximum output current.

Gain Control - Amplitude Modulation

Effective gain control of a signal may be obtained bycontrolled variation of the amplifier-bias-current (IABC) in theOTA because its gM is directly proportional to the amplifier-bias-current (IABC). For a specified value of amplifier-bias-cur-rent, the output current (IO) is equal to the product of gM andthe input signal magnitude. The output voltage swing is theproduct of output current (IO) and the load resistance (RL).

Figure 19 shows the configuration for this form of basic gaincontrol (a modulation system). The output signal current (IO)is equal to -gM x VX; the sign of the output signal is negativebecause the input signal is applied to the inverting inputterminal of the OTA. The transconductance of the OTA is con-trolled by adjustment of the amplifier bias current, IABC. In thiscircuit the level of the unmodulated carrier output is estab-lished by a particular amplifier-bias-current (IABC) throughresistor RM. Amplitude modulation of the carrier frequencyoccurs because variation of the voltage VM forces a change inthe amplifier-bias-current (IABC) supplied via resistor RM.When VM goes positive, the bias current increases whichcauses a corresponding increase in the gM of the OTA. Whenthe VM goes in the negative direction (toward the amplifier-bias-current terminal potential), the amplifier-bias-currentdecreases, and reduces the gM of the OTA.

FIGURE 16. CIRCUIT OF FIGURE 15 OPERATING IN SAMPLINGMODE

Top Trace: Input and Sampled Output Superimposed;

Bottom Trace: Sampling Signal; 5V/Div., 100ns/Div.100mV/Div., 100ns/Div.

FIGURE 17. CIRCUIT OF FIGURE 9 OPERATING IN THELINEAR SAMPLE MODE

Center Trace: Differential Comparsion of Input and

Bottom Trace: Input; 5V/Div., 2µs/Div.

Top Trace: Output; 5V/Div., 2µs/Div.

Output; 2mV/Div., 0V thru Center; 2µs/Div.

FIGURE 18. SLEW RATE vs AMPLIFIER-BIAS-CURRENT (IABC)

0.01µF

0.1µF0.03µF3000pF

300pF100pF30pFC = 10pF

1000pF

100

10

1.0

0.1

0.01

0.0010.1 1 10 100 1000

AMPLIFIER BIAS CURRENT (IABC µA)

SL

EW

RA

TE

(V

/µs)


7

As discussed earlier, gM = 19.2 x IABC, where gM is inmillisiemens when IABC is in milliamperes. In this case, IABCis approximately equal to:

There are two terms in the modulation equation: the firstterm represents the fixed carrier input, independent of VMand the second term represents the modulation, which eitheradds to or subtracts from the first term. When VM is equal tothe V- term, the output is reduced to zero.

In the preceding modulation equations the term,

involving the amplifier-bias-current terminal voltage (VABC)(see Figure 4 for VABC) was neglected. This term wasassumed to be small because VABC is small compared with V-in the equation. If the amplifier-bias-current terminal is driven bya current-source (such as from the collector of a PNP transis-tor), the effect of VABC variation is eliminated and transferred tothe involvement of the PNP transistor base-emitter junctioncharacteristics. Figure 20 shows a method of driving the ampli-fier-bias-current terminal to effectively remove this latter varia-tion.

If an NPN transistor is added to the circuit of Figure 20 as anemitter-follower to drive the PNP transistor, variations due tobase-emitter characteristics are considerably reduced due tothe complementary nature of the NPN base-emitter junc-tions. Moreover, the temperature coefficients of the twobase-emitter junctions tend to cancel one another. Figure 21shows a configuration using one transistor in the CA3018A

NPN transistor-array as an input emitter-follower, with thethree remaining transistors of the transistor-array connectedas a current-source for the emitter followers.

The 100kΩ potentiometer shown in these schematics is usedto null the effects of amplifier input offset voltage. This potenti-ometer is adjusted to set the output voltage symmetricallyabout zero. Figures 22A and 22B show oscilloscope photo-graphs of the output voltages obtained when the circuit of Fig-ure 19 is used as a modulator for both sinusoidal and triangularmodulating signals. This method of modulation permits a rangeexceeding 1000:1 in the gain, and thus provides modulation ofthe carrier input in excess of 99%. The photo in Figure 22Cshows the excellent isolation (>80dB at f = 100kHz) achieved inthis modulator during the “gated-off” condition.

Four-Quadrant Multipliers

A single CA3080A is especially suited for many low-frequency, low-power four-quadrant multiplier applications.The basic multiplier circuit of Figure 23 is particularly usefulfor waveform generation, doubly balanced modulation, andother signal processing applications, in portable equipment,

FIGURE 19. AMPLITUDE MODULATOR CIRCUIT USING THE OTA

OTACA3080A

+

-2

54

6

7

RM100kΩ

3

47kΩ

51Ω

51Ω

+6V

-6V

V+V-

VX

VM

IABC

5.1kΩ

IO

IO = gM VX RLAMPLITUDEMODULATED

OUTPUT

CARRIERFREQUENCY

MODULATINGFREQUENCY

VM V-( )–

RM------------------------- IABC=

IO g– MVX=

IO19.2 VX( ) V-( )

RM------------------------------------

19.2 VX( ) VM( )RM

--------------------------------------–=

gMVX 19.2( ) IABC( ) VX( )

IO19.2– VM V-( )–[ ] VX

RM------------------------------------------------------=

=

19.2( ) VX( )VABC

RM---------------

FIGURE 20. AMPLITUDE MODULATOR USING OTACONTROLLED BY PNP TRANSISTOR

OTACA3080A

+

-2

54

6

7

100kΩ

3

47kΩ

51Ω

51Ω

+6V

-6V

+6V-6V

VX

VM

IABC

5.1kΩ

AMOUTPUT

5.1kΩ

2N4037

24kΩ

+6V

FIGURE 21. AMPLITUDE MODULATOR USING OTACONTROLLED BY PNP AND NPN TRANSISTORS

OTACA3080A

+

-2

54

6

7

3

47kΩ

51Ω

51Ω

+15V

-15V

+15V

VX

VM

IABC

5.1kΩ

AMOUTPUT

10kΩ2N4037

75kΩ

+6V

-15V

100kΩ+15V

1.3MΩ+15V

-15V

CA3018A


8

where low-power consumption is essential and accuracyrequirements are moderate. The multiplier configuration isbasically an extension of the previously discussed gain-controlled configuration (Figure 19).

To obtain a four-quadrant multiplier, the first term of themodulation equation (which represents the fixed carrier)must be reduced to zero. This term is reduced to zero by theplacement of a feedback resistor (R) between the output andthe inverting input terminal of the CA3080A, with the value ofthe feedback resistor (R) equal to 1/gM. The output current isIO = gM (-VX) because the input is applied to the invertingterminal of the OTA. The output current due to the resistor(R) is VX/R. Hence, the two signals cancel when R = 1/gM.The current for this configuration is:

The output signal for these configurations is a current whichis best terminated by a short-circuit. This condition can besatisfied by making the load resistance for the multiplier out-put very small. Alternatively, the output can be applied to acurrent-to-voltage converter as shown in Figure 24.

In Figure 23, the current “cancellation” in the resistor R is adirect function of the OTA differential amplifier linearity. In thefollowing example, the signal excursion is limited to ±10mV topreserve this linearity. Greater signal-excursions on the inputterminal will result in a significant departure from linear opera-tion (which may be entirely satisfactory in many applications).

IO-19.2 VXVM

RM-------------------------------- , and VM VY==

Center Trace: Amplitude Modulated Output; 500mV/Div.Bottom Trace: Expanded Output to Show

Top Trace: Modulation Input (≅ 20VP-P)

FIGURE 22A. RESPONSE FOR SINE WAVE MODULATION

TIME (50µs/DIV.)

Depth of Modulation; 20mV/Div.

Bottom Trace: Amplitude Modulated Output; 500mV/Div.Top Trace: Modulation Input (20V)

FIGURE 22B. RESPONSE FOR TRIANGLE WAVE MODULATION

TIME (50µs/DIV.)

Bottom Trace: Voltage Expansion Of Above SignalTop Trace: Gated Output; 1V/Div.

Showing No Residual; 1mv/Div.

TIME (50µs/DIV.)

FIGURE 22C. RESPONSE FOR SQUARE WAVE MODULATION

FIGURE 22. AMPLITUDE MODULATOR CIRCUIT OF FIGURE 19WITH RM = 40kΩ, VS = ±10V

FIGURE 23. BASIC FOUR QUADRANT ANALOG MULTIPLIERUSING AN OTA

OTACA3080A

+

-2

5

6

RM

3

IABCVY

VX

R = 1/gM

IO ≅ -K VX VY


9

Figure 25 shows a schematic diagram of the basic multiplier withthe adjustments set-up to give the multiplier an accuracy ofapproximately ±7 percent full-scale. There are only three adjust-ments: 1) one is on the output, to compensate for slight variationsin the current-transfer ratio of the current-mirrors (which wouldotherwise result in a symmetrical output about some current levelother than zero); 2) the adjustment of the 20kΩ potentiometerestablishes the gM of the system equal to the value of the fixedresistor shunting the system when the Y-input is zero; 3) com-pensates for error due to input offset voltage.

Procedure for adjustment of the circuit:

1. a) Set the 1MΩ output-current balancing potentiometerto the center of its range

b) Ground the X- and Y- inputsc) Adjust the 100kΩ potentiometer until a 0V reading is

obtained at the output.2. a) Ground the Y-input and apply a signal to the X-

input through a low source-impedance generator (it isessential that a low impedance source be used; thisminimizes any change in the gM balance or zero-pointdue to the 50µA Y-input bias current).

b) Adjust the 20kΩ potentiometer in series with Y-inputuntil a reading of 0V is obtained at the output. Thisadjustment establishes the gM of the CA3080A at theproper level to cancel the output signal. The outputcurrent is diverted through the 510kΩ resistor.

3. a) Ground the X-input and apply a signal to the Y-inputthrough a low source-impedance generator.

b) Adjust the 1MΩ resistor for an output voltage of 0V.

There will be some interaction among the adjustments andthe procedure should be repeated to optimize the circuitperformance.

Figure 26 shows the schematic of an analog multiplier circuitwith a 2N4037 PNP transistor replacing the Y-input “current”resistor. The advantage of this system is the higher inputresistance resulting from the current-gain of the PNPtransistor. The addition of another emitter-follower preceed-ing the PNP transistor (shown in Figure 21) will furtherincrease the current gain while markedly reducing the effectof the Vbe temperature-dependent characteristic and theoffset voltage of the two base-emitter junctions.

Figures 27A and 27B show oscilloscope photographs of theoutput signals delivered by the circuit of Figure 26 which is con-nected as a suppressed-carrier generator. Figures 28A and28B contain photos of the outputs obtained in signal “squaring”circuits, i.e. “squaring” sine-wave and triangular- wave inputs.

If ±15V power supplies are used (shown in Figure 26), bothinputs can accept ±10V input signals. Adjustment of thismultiplier circuit is similar to that already described above.

FIGURE 24. OTA ANALOG MULTIPLIER DRIVING A CURRENT-TO-VOLTAGE CONVERTER

OP AMPCA3741CT

200kΩ

IO

V+

XRF

EOUT = - IO RF

V-

150kΩ

OTAY

ANALOG MULTIPLIERCA3080A

100Ω

VY

FIGURE 25. SCHEMATIC DIAGRAM OF ANALOG MULTIPLIERUSING OTA

OTACA3080A

+

-2

54

6

7

100kΩ

3

24kΩ

10Ω10Ω

+6V

-6V+6V-6V

VX

3.3MΩ

OUTPUT

91kΩ

5.1kΩ510kΩ

1MΩ+6V-6V

20kΩ

IABC

FIGURE 26. SCHEMATIC DIAGRAM OF ANALOG MULTIPLIERUSING OTA CONTROLLED BY A PNP TRANSISTOR

OTACA3080A

+

-2

54

6

7

100kΩ

3

24kΩ

5.1Ω5.1Ω

+15V

-15V

+15V-15V

VX

VY

4.7MΩ

OUTPUT

2.2kΩ

2N4037

62kΩ

+15V

5.1kΩ250kΩ

1MΩ+15V-15V

20kΩ

FIGURE 27A.

500mV/Div., 200µs/Div.,Triangular Input: 700Hz; 5VP-P to VY InputCarrier Input: 30kHz; 13.5VP-P to VX Input


10

The accuracy and stability of these multipliers are a directfunction of the power supply-voltage stability because the Y-input is referred to the negative supply-voltage. Tracking ofthe positive and negative supply is also important becausethe balance adjustments for both the offset voltage and out-put current are also referenced to these supplies.

Linear Multiplexer - Decoder

A simple, but effective system for multiplexing and decodingcan be assembled with the CA3080 shown in Figure 29.Only two channels are shown in this schematic, but thenumber of channels may be extended as desired. Figure 30shows oscilloscope photos taken during operation of themultiplexer and decoder. A CA3080 is used as a 10µs delay-“one-shot” multivibrator in the decoder to insure that thesample-and-hold circuit can sample only after the input sig-nal has settled. Thus, the trailing edge of the “one-shot” out-put-signal is used to sample the input at the sample-and-hold circuit for approximately 1µs. Figure 31 showsoscilloscope photos of various waveforms observed duringoperation of the multiplexer/decoder circuit. Either the Q or Qoutput from the flip-flop may be used to trigger the 10µs“one-shot” to decode a signal.

FIGURE 27B.

FIGURE 27. WAVEFORMS OBSERVED WITH OTA ANALOGMULTIPLIER USED AS A SUPPRESSED CARRIERGENERATOR

500mV/Div., 200µs/Div.,Modulating Frequency: 700Hz; 5VP-P to VY Input

Carrier Input: 21kHz; 13.5VP-P to VX Input

FIGURE 28A.

0V

0V

Bottom Trace: Output; 500mV/Div., 1ms/Div. (400Hz)Top Trace: Input to X And Y; 2V/Div., 1ms/Div. (200Hz)

FIGURE 28B.

FIGURE 28. WAVEFORMS OBSERVED WITH OTA ANALOGMULTIPLIER USED IN SIGNAL-SQUARINGCIRCUITS

0V

0V

Bottom Trace: Output; 500mV/Div., 1ms/Div. (400Hz)Top Trace: Input to X And Y; 2V/Div., 1ms/Div. (200Hz)


11

FIGURE 29. TWO-CHANNEL MULTIPLEXER AND DECODER USING OTAs

OTACA3080A

+

-

3

2

10kΩ

5

4

6

7

-5V

IABC

+5V

CHANNEL #1INPUT

OTACA3080A

+

-

10kΩ

2

310kΩ

5

4

6

7

-5V

+5V

CHANNEL #2INPUT

TRANSMISSIONMEDIA

620Ω

150pF

51/2 CD4013A

1Q

Q

14

CL0V

-5VD

2

32.2kΩ

OTACA3080

-

+

DECODER

3

2kΩ

5

46

7

IABC

+5V

62kΩ

300pF

2270Ω

0.01µF

0.01µF

3kΩ

OUTPUT

3N138

2N4037

MULTIPLEXER

-5V

7 6 4

2kΩ

DECODED

-5V

82kΩ

500kΩ

18pF

FLIP FLOP

82kΩ

82kΩ

IABC

10kΩ

OTACA3080A

-

+3

2

1kΩ

7

4

6

5

-5V

+5V

FROMQ OR Q

+5V

68kΩ1N914

1N91451pF

10ms ONE - SHOT

10µs

Q1

20pF

FIGURE 30. WAVEFORMS SHOWING OPERATION OF LINEAR MULTIPLEXER/SAMPLE-AND-HOLD DECODE CIRCUITRY (FIGURE 29)

Center Trace: Recovered Output; 1V/Div., 20ms/Div.Bottom Trace: Multiplexed Signals; 2V/Div., 20ms/Div.

Top Trace: Input Signal; 1V/Div., 20ms/Div.Center Trace: Recovered Output; 1V/Div., 20ms/Div.Bottom Trace: Multiplexed Signals; 1V/Div., 20ms/Div.

Top Trace: Input Signal; 1V/Div., 20ms/Div.


12

High-Gain, High-Current Output Stages

In the previously discussed examples, the OTA has beenbuffered by a single insulated-gate field-effect-transistor(MOSFET) shown in Figure 9. This configuration yields avoltage gain equal to the (gM) (RO) product of the CA3080,which is typically 142,000 (103dB). The output voltage andcurrent-swing of the operational amplifier formed by thisconfiguration (Figure 9) are limited by the 3N138 MOSFETperformance and its source-terminal load. In the positivedirection, the MOSFET may be driven into saturation; thesource-load resistance and the MOSFET characteristicsbecome the factors limiting the output-voltage swing in thenegative direction. The available negative-going load currentmay be kept constant by the return of the source-terminal toa constant-current transistor. Phase compensation is appliedat the interface of the CA3080 and the 3N138 MOSFETshown in Figure 9.

Another variation of this generic form of amplifier utilizes theCD4007A (CMOS) inverter as an amplifier driven by theCA3080. Each of the three inverter/amplifiers in theCD4007A has a typical voltage gain of 30dB. The gain of asingle CMOS inverter/amplifier coupled with the 100dB gainof the CA3080 yields a total forward-gain of about 130dB.Use of a two-stage CMOS amplifier configuration willincrease the total open-loop gain of the system to about160dB (100,000,000). Figures 32 through 35 show examplesof these configurations. Each CMOS inverter/amplifier cansink or source a current of 6mA (Typ). In Figures 34 and 35,two CMOS inverter/amplifiers have been connected in paral-lel to provide additional output current.

Center Trace: “One-shot” Output; 5V/Div., 20µs/Div.Bottom Trace: Strobe Pulse At The Collector of Q1;

Top Trace: Flip-flop Output; 5V/Div., 20µs/Div.

FIGURE 31A. WAVEFORMS CONTROLLING DECODER ENABLE

0.1V/Div., 20µs/Div.

Center Trace: Multiplexed Output With One

Bottom Trace: Decoded Output; 0.5V/Div., 5ms/Div.

Top Trace: Strobe Pulse at Q1; 0.5V/Div., 5ms/Div.

Input at GND; 0.5V/Div., 5ms/Div.

FIGURE 31B. WAVEFORMS SHOWING DECODER OPERATION

FIGURE 31C. SAME AS FIGURE 31B BUT WITH EXPANDEDTIME SCALE

FIGURE 31. VARIOUS WAVEFORMS SHOWING THEOPERATION OF LINEAR MULTIPLEXER

500µs/Div.


13

The open-loop slew-rate of the circuit in Figure 32 isapproximately 65V/µs. When compensated for the unity-gainvoltage-follower mode, the slew-rate is about 1V/µs (shownin Figure 33). Even when the three inverter/amplifiers in theCD4007A are connected as shown in Figure 34, the open-loop slew-rate remains at 65V/µs. A slew-rate of about 1V/µsis maintained with this circuit connected in the unity-gainvoltage-follower mode, as shown in Figure 35. Figure 36contains oscilloscope photos of input-output waveformsunder small-signal and large-signal conditions for the circuitsof Figures 33 and 35. These photos illustrate the inherentstability of the OTA and CMOS circuits operating in concert.

Precision Multistable Circuits

The micropower capabilities of the CA3080, when combinedwith the characteristics of the CD4007A CMOSinverter/amplifiers, are ideally suited for use in connectionwith precision multistable circuits. In the circuits of Figures32, 33, 34, and 35, for example, power-supply current drawnby the CMOS inverter/amplifier approaches zero as the out-put voltage swings either positive or negative, while theCA3080 current-drain remains constant.

Figure 37 shows a variety of circuits that can be assembledusing the CA3080 to drive one inverter/amplifier in the

CD4007A. For greater output current capability, the remain-ing amplifiers in the CD4007A may be connected in parallelwith the single stage shown. Precise timing and thresholdsare assured by the stable characteristics of the input differ-ential amplifier in the CA3080. Moreover, speed vs powerconsumption trade-offs may be made by adjustment of theIABC current to the CA3080. The quiescent power consump-tion of the circuits shown in Figure 37 is typically 6mW, butcan be made to operate in the micropower region by suitablecircuit modifications.

FIGURE 32. OTA DRIVING CMOS INVERTER/AMPLIFIER INOPEN-LOOP MODE

CA3080

+

-

+6V

2

5

46

7

+6V

3NON-INVERTING

OUTPUT

6

-6V

INPUT

INVERTINGINPUT

8

7

-6V

13

14

1/3 CD4007A

FIGURE 33. OTA DRIVING CMOS INVERTER/AMPLIFIER INUNITY-GAIN CLOSED-LOOP MODE

CA3080-

+

+6V

3

5

4

6

7

+6V

2

OUTPUT

6 8

7

-6V

13

14

1/3 CD4007A

OTA

-6V

0.1µF

40µF-+

2.7Ω

0.25µF50Ω

2kΩVIN

2kΩ

24kΩ

FIGURE 34. OTA DRIVING TWO-STAGE CMOSINVERTER/AMPLIFIER IN OPEN-LOOP MODE

CA3080+

-

V+

2

7

4

6

5

V+

3OUTPUT

6

8

7

V-

13

14

OTA

V-

3

N

P

5

4

1

2

10

N

P

9

11

12

N

PINVERTING

INPUT

INVERTINGINPUT

NON-

FIGURE 35. OTA DRIVING TWO-STAGE CMOSINVERTER/AMPLIFIER IN UNITY GAIN CLOSED-LOOP MODE

CA3080+

-

+6V

2

7

4

6

5

+6V

3

OUTPUT

6

8

7

-6V

13

14

OTA

-6V

0.1µF

50µF

0.33Ω

0.1µF

2kΩ

2kΩ

24kΩ

INPUT

3

N

P

5

4

1

2

10

N

P

9

11

12

N

P

50µF


14

FIGURE 36A. LARGE SIGNAL RESPONSE FOR CIRCUIT INFIGURE 33 FIGURE 36B. SMALL SIGNAL RESPONSE FOR CIRCUIT IN

FIGURE 33

FIGURE 36C. LARGE SIGNAL RESPONSE FOR CIRCUIT INFIGURE 35

FIGURE 36D. SMALL SIGNAL RESPONSE FOR CIRCUIT INFIGURE 35

FIGURE 36. PERFORMANCE OF OTA DRIVING CMOS INVERTER/AMPLIFIER

Bottom Trace: Output; 5V/Div., 100µs/Div.Top Trace: Input; 5V/Div., 100µs/Div.

Bottom Trace: Output; 50mV/Div., 1µs/Div.Top Trace: Input; 50mV/Div., 1µs/Div.

Bottom Trace: Output; 5V/Div., 100µs/Div.Top Trace: Input; 5V/Div., 100µs/Div.

Bottom Trace: Output; 50mV/Div., 1µs/Div.Top Trace: Input; 50mV/Div., 1µs/Div.


15

Micropower Comparator

The schematic diagram of a micropower comparator isshown in Figure 38. Quiescent power consumption of thiscircuit is about 10µW (Typ). When the comparator is strobed“ON”, the CA3080A becomes active and consumes 420µW.Under these conditions, the circuit responds to a differentialinput signal in about 8µs. By suitably biasing the CA3080A,the circuit response time can be decreased to about 150ns,but the power consumption rises to 21mW.

The differential amplifier input common-mode range for thecircuit of Figure 38 is -1V to +10.5V. Voltage gain of themicropower comparator is typically 130dB. For example, a5µV input signal will switch the output.

Appendix ICurrent Mirrors

The basic current-mirror, described in the beginning of thisnote, in its rudimentary form, is a transistor with a second tran-sistor connected as a diode. Figure A shows this basic configu-ration of the current-mirror. Q2 is a diode connected transistor.Because this diode-connected transistor is not in saturation andis “active”, the “diode” formed by this connection may be con-sidered as a transistor with 100% feedback. Therefore, thebase current still controls the collector current as is the case innormal transistor action, i.e., IC = β IB. If a current I1 is forcedinto the diode-connected transistor, the base-to-emitter voltagewill rise until equilibrium is reached and the total current beingsupplied is divided between the collector and base regions.Thus, a base-to-emitter voltage is established in Q2 such thatQ2 “sinks” the applied current I1.

Threshold VS

R1R1 R2+---------------------

±=

RCln=

R1R1 R2+---------------------(V+ - V-) + V+ - VD

V+-------------------------------------------------------------------------

FIGURE 37C. THRESHOLD DETECTOR

FIGURE 37D. MULTISTABLE CIRCUITS USING THE OTA ANDCMOS INVERTER/AMPLIFIERS

CA3080

+

-

V+

3

7

4

6

5

V+

2 6 8

7

V-

13

14

1/3 CD4007A

OTA0.01µF

5kΩ

100kΩ

C

R2

V+V-

10kΩ

10kΩ

R1

f1

2RCln2R1R2

----------- 1+

--------------------------------------------≈

CA3080+

-

V+

27

4

6

5

V+

3

6 8

7

V-

13

14

1/3 CD4007A

OTA

1000pF

100kΩ

1N914

R2

V-

V+

CA3080

+

-

V+

3

5

6

7

V+

2 6 8

7

V-

13

141/3 CD4007A

OTA

100kΩ

R2 10kΩ

10kΩ

R1

10kΩ

10kΩ

R1

V-

10MΩ

100kΩ

VD

R

V+

T

56pF

R = R1||R2

5.1kΩ

R

C

FIGURE 37A. ASTABLE MULTIVIBRATOR

FIGURE 37B. MONOSTABLE MULTIVIBRATOR

V-

FIGURE 38. SCHEMATIC DIAGRAM OF MICROPOWER COM-PARATOR USING THE CA3080A AND CMOSCD4007A

CA3080+

-

V+

2

5

6

7

STROBE

38

10

V-

14

CD4007A

OTA

V+

9V-

11

V-

4

7

13

V+P

N

6V+ = 12VV- = -2V

IABC10µA

1.3MΩ

12

OUTPUT

FIGURE 39A. DIODE - TRANSISTOR CURRENT SOURCE

Q1Q2

I1 I2


16

If the base of a second transistor (Q1) is connected to the base-to-collector junction of Q2, shown in Figure 39A, Q1 will also beable to “sink” a current approximately equal to that flowing in thecollector lead of the diode-connected transistor Q2. Thisassumes that both transistors have identical characteristics, aprerequisite established by the IC fabrication technique. Thedifference in current between the input current (I1) and the col-lector current (I2) of transistor Q1, is due to the fact that thebase-current for both transistors is supplied from I1. Figure 39Bshows this current division, using a “unit” of base current (1) toeach transistor base. This base current causes a collector cur-rent to flow in direct proportion to the β of each transistor. Theratio of the “sinking” current I2 to the input current I1 is there-fore:

Thus, as β increases, the output current (I2) approaches theinput current (I1). The curves in Figure 39C show this ratio as afunction of the transistor β. When the transistor β is equal to100, for example, the difference between the two currents isonly two percent.

Figure 39D shows a curve-tracer photograph of characteristicsfor the circuit of Figure 39B. No consideration in this discussion isgiven to the variation of the transistor (Q1) collector current as afunction of its collector-to-emitter voltage. The output resistancecharacteristic of Q1 retains its similarity to that of a single transis-tor operating under similar conditions. An improvement in its out-put resistance characteristic can be made by the insertion of adiode-connected transistor in series with the emitter of Q1.

This diode-connected transistor (Q3 in Figure 39E) may beconsidered as a current-sampling diode that senses the emit-ter-current of Q1 and adjusts the base current Q1 (via Q2) tomaintain a constant-current in I2. Because all controlling tran-sistors are operated at relatively fixed voltages, the previouslydiscussed effects due to voltage coefficients do not exist. Thecurve-tracer photograph of Figure 39F shows the improvedoutput resistance characteristics of the circuit of Figure 39E.(Compare Figure 39D and 39F).

I2I1---- β/ β 2+( )˙ .=

FIGURE 39B. DIODE - TRANSISTOR CURRENT SOURCE.ANALYSIS OF CURRENT FLOW

Q1Q2

I1 I2

ββ + 2

β 2

11

I2I1-----

ββ 2+-------------=

FIGURE 39C. CURRENT TRANSFER RATIO I2/I1 vsTRANSISTOR BETA

1.51.41.31.21.11.00.9

0.80.70.60.50.4

0.30.20.1

0

CU

RR

EN

T T

RA

NS

FE

R R

AT

IO I 2

/I 1

1 10 100 1000

I2I1---- β

β 2+-------------=

I2I1---- β2

2β+

β22β 2+ +

-----------------------------=

TRANSISTOR BETA

FIGURE 39D. PHOTO SHOWING RESULTS OF FIGURE 39B

Scale: Horizontal = 2V/Div.Vertical = 1mA/Div.Steps = 1mA/STEP

FIGURE 39E. DIODE - 2 TRANSISTOR CURRENT SOURCE

Q3Q2

I1 I2

Q1


17

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate andreliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may resultfrom its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see web site http://www.intersil.com

Figure 39G shows the current-division within the mirrorassuming a “unit” (1) of current in transistors (Q2 and Q3).

The resulting current transfer ratio

Figure 39C shows this equation plotted as a function of beta.It is significant that the current transfer ratio (I2/I1) isimproved by the β2 term, and reduces the significance of the2β + 2 term in the denominator.

Conclusions

The Operational Transconductance Amplifier (OTA) is aunique device with characteristics particularly suited toapplications in multiplexing, amplitude modulation, analogmultiplication, gain control, switching circuitry, multivibrators,comparators, and a broad spectrum of micropower circuitry.The CA3080 is ideal for use in conjunction with CMOS ICsbeing operated in the linear mode.

Acknowledgments

The author is indebted to C. F. Wheatly for many helpfuldiscussions. Valued contributions in circuit evaluation weremade by A. J. Visioli Jr. and J. H. Klinger.

FIGURE 39F. PHOTO SHOWING RESULTS OF FIGURE 39E

Scale: Horizontal = 2V/Div.Vertical = 1mA/Div.Steps = 1mA/STEP

I2/I1β2

2β+

β22β 2+ +

----------------------------- .=

FIGURE 39G. CURRENT FLOW ANALYSIS OF FIGURE 39E

Q3Q2

I1 I2

β + 2β

2

11

I2I1----

β β 2+β 1+-------------

β β 2+β 1+-------------

+

---------------------------- β22β+

β22β 2+ +

-----------------------------==

Q1

β

β β 2+β 1+-------------+

β 2+β 1+------------- β β 2+

β 1+-------------


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AN6668: Applications of the CA3080 and CA3080A High-Performance … · 2018-06-22 · Applications of the CA3080 High-Performance Operational Transconductance Amplifiers Introduction