Ambiguous: byte, word, double-word?

3.6 Data transfer Instructions

The MOV instructionMnemonic Meaning Format Operation Flags affectedMOV Move MOV D,S (D) <-(S) none

Destination SourceMemory AccumulatorAccumulator MemoryRegister RegisterRegister MemoryMemory RegisterRegister ImmediateMemory ImmediateSeg-reg Reg.16Seg-reg Mem.16Reg.16 Seg-regMem. 16 Seg-reg

Examples:MOV AL,30HMOV AX,30H

Byte 30H is loaded into AL

Word 0030H is loaded into AX

BX 0028H

MOV [SI],0

MOV WORD PTR [SI],0

Word 0000H is loaded into memory at address [SI]

Mnemonic Meaning Format Operation Flags affectedMOVSX Move MOVSX D,S (D) <-(S), extending sign noneMOVZX Move MOVZX D,S (D) <-(S), extending zero none

Destination SourceRegister 16 Reg./Mem.8Register 32 Reg./Mem.8Register 32 Reg./Mem.16

Only 386+

MOVSX BX,AL

MOVSX BX,AL BX FF91H

MOVZX BX,AL BX 0091H

Supposing:AL=28H

AL=91H

AL=91H

3.6 Data transfer InstructionsThe PUSH and POP instructions

Mnemonic Meaning Format Operation Flags affectedPUSH PUSHW

Push word onto stack

PUSH S PUSHW S

((SP))<-(S) (SP)<-(SP)-2 none

PUSHD (only 386+)

Push double word onto stack PUSHD S

((SP))<-(S) (SP)<-(SP)-4 none

POP POPW

Pop word off stack

POP D POPW D

(D)<-((SP)) (SP)<-(SP)+2 none

POPD (only 386+)

Pop double word off stack POPD D

(D)<-((SP)) (SP)<-(SP)+4 none

Operand (S or D)Register (except IP)Seg-reg (except CS)MemoryImmediate (only 286+) (only PUSH)

Examples:supposing:DS=4000HSS=0500HSP=0300HBP=0200HAX=1234Hmem(40204H)=3FHmem(40205H)=2FHEBX=55AA66BBH

PUSHW SPPUSHW [BP+4]PUSHD EBX...

SP Ph.Add. Cont.… ??52F6 ??52F7 ??52F8 ??52F9 ??52FA ??52FB ??52FC ??52FD ??52FE ??52FF ??

300 5300 ??

...PUSH AX

Initial stack-top

…POPD EBXPOPW [BP+4]POPW SPPOP BX...

(EBX)55AA66BBHmem(40204H) 3FHmem(40205H) 2FHSP 2FEHBX 1234H

Ph.Add.=DS*10H+BP+4

SP Ph.Add. Cont.… ??52F6 ??52F7 ??52F8 ??52F9 ??52FA ??52FB ??52FC ??52FD ??

2FE 52FE 342FF 52FF 12300 5300 ??

SP Ph.Add. Cont.… ??52F6 ??52F7 ??52F8 ??52F9 ??52FA ??52FB ??

2FC 52FC FE2FD 52FD 022FE 52FE 342FF 52FF 12300 5300 ??

SP Ph.Add. Cont.… ??52F6 ??52F7 ??52F8 ??52F9 ??

2FA 52FA 3F2FB 52FB 2F2FC 52FC FE2FD 52FD 022FE 52FE 342FF 52FF 12300 5300 ??

SP Ph.Add. Cont.… ??

2F6 52F6 BB2F7 52F7 662F8 52F8 AA2F9 52F9 552FA 52FA 3F2FB 52FB 2F2FC 52FC FE2FD 52FD 022FE 52FE 342FF 52FF 12300 5300 ??

STACK= LIFO list in memory, increasing toward 0.

3.6 Data transfer InstructionsThe PUSHA and POPA instructions

Mnemonic Meaning Format Operation Flags affected

PUSHA Push all registers onto stack PUSHA

((SP))<-(all regs) (SP)<-(SP)-16 none

PUSHAD (only 386+)

Push all double registers onto stack PUSHAD

((SP))<-(all d.regs.) (SP)<-(SP)-32 none

POPA Pop all registers off stack POPA

(all regs)<-((SP)) (SP)<-(SP)+16 none

POPAD (only 386+)

Pop all double registers off stack POPAD

(all d.regs)<-((SP)) (SP)<-(SP)+32 none

OperandsAX,CX,DX,BX,SP,BP,SI,DIEAX,ECX,EDX,EBX,ESP,EBP,ESI,EDISP and ESP are not loaded by POP (discarded)

Examples:supposing:SS=0320HSP=0800HAX=00FFHCX=EEDDHDX=CCBBHBX=AA99HSP=0800HBP=6655HSI=4433HDI=2211H

...PUSHA...

POPA order

SP Ph.Add. Cont.??????????????????????????????????

800 3A00 ??…

PUSHA order

POPA...

SP Ph.Add. Cont.… ??

7F0 39F0 117F1 39F1 227F2 39F2 337F3 39F3 447F4 39F4 557F5 39F5 667F6 39F6 007F7 39F7 087F8 39F8 997F9 39F9 AA7FA 39FA BB7FB 39FB CC7FC 39FC DD7FD 39FD EE7FE 39FE FF7FF 39FF 00800 3A00 ??

…

3.6 Data transfer InstructionsThe PUSHF, PUSHFD, POPF and POPFD instructions

Mnemonic Meaning Format Operation Flags affected

PUSHF Push Flags Register onto stack PUSHF

((SP))<-(FLAGS) (SP)<-(SP)-2 none

PUSHFD (only 386+)

Push Extended Flag Register onto stack PUSHFD

((SP))<-(EFLAGS) (SP)<-(SP)-4 none

POPF Pop Flag Register off stack POPF

(FLAGS)<-((SP)) (SP)<-(SP)+2 all

POPFD (only 386+)

Pop Extended Flag Register off stack POPFD

(EFLAGS)<-((SP)) (SP)<-(SP)+4 all

OperandsFLAGSEFLAGS

It is not mandatory that a value pushed onto stack from a register (memory location) to be popped in the same register (memory location). But it is a usual way to do so, using a sequence of PUSH instructions at a point in program, and a corresponding reversed sequence of POP instructions later.The correct handling of the stack is the programmer responsibility. CALL, INT and RET affect stack also.

3.6 Data transfer Instructions

The IN instructionMnemonic Meaning Format OperationIN Input IN D,S (D) <-(S)

Destination SourceAL, AX, EAX(only 386+) Input port

Examples (DX=01FF):IN AL,30HIN AX,DX

A byte is read in AL from input port at address 0030H

A word is read in AX from input port at address 01FFH

Input port address can be expressed direct (8 bits) or register indirect using DX (16 bits).

The OUT instructionMnemonic Meaning Format OperationOUT Output OUT D,S (D) <-(S)

Destination SourceOutput port AL, AX, EAX(only 386+)

Examples (DX=01FF):OUT DX, ALOUT 30H, AX

Output port address can be expressed direct (8 bits) or register indirect using DX (16 bits).The source is always the accumulator. A byte can be output using AL, a word using AX or a double word using EAX.

The destination is always the accumulator. A byte can be input using AL, a word using AX or a double word using EAX.

A byte is written from AL at output port at address 01FFH

A word is written from AX at output port at address 0030H

3.6 Data transfer InstructionsThe INS instruction

Mnemonic Meaning Format Operation Flags affected

INS Input String

INSB, INS BYTE PTR ES:[DI],DX INSW, INS WORD PTR ES:[DI],DX INSD, INS DWORD PTR ES:[DI],DX

(D) <-(S), D<-D-1 or D<-D+1 (D) <-(S), D<-D-2 or D<-D+2 (D) <-(S), D<-D-4 or D<-D+4 none

Destination SourceMemory (ES:DI) Input port (DX)

Input port address is always expressed register indirect using DX (16 bits).

The OUTS instruction

Destination SourceOutput port AL, AX, EAX(only 386+)

Output port address is always expressed register indirect using DX (16 bits).The source is the memory location addressed by SI. A byte, a word or a double word can be output. After output, DX is automatically incremented (or decremented - depending on processor direction flag) by 1, 2 or 4.

The destination is the memory location addressed by ES:DI. A byte, a word or a double word can be input. After input, DX is automatically incremented (or decremented - depending on processor direction flag) by 1, 2 or 4.

Mnemonic Meaning Format Operation Flags affected

OUTSOutput String

OUTSB, OUTS DX,BYTE PTR [SI], OUTSW, OUTS DX,WORD PTR [SI],DX OUTSD, OUTS DX,DWORD PTR [SI],DX

(D) <-(S), D<-D-1 or D<-D+1 (D) <-(S), D<-D-2 or D<-D+2 (D) <-(S), D<-D-4 or D<-D+4 none