Agile Condor: Scalable High Performance Embedded Computing ...on- ?· Agile Condor: Scalable High Performance…

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    07-Jun-2018

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<ul><li><p> Agile Condor: Scalable High Performance Embedded Computing Architecture </p><p>Objectives Enable scalable real-time processing for </p><p>intelligence surveillance and reconnaissance (ISR) missions </p><p> Fast technical refresh rate </p><p> Design to support Group 3-5 DoD unmanned aerial systems (UAS) </p><p> Weigh less than 60 pounds </p><p> Consume less than 500 Watts of power </p><p> Deliver over 15 GFLOPS/Watt (enabled by GPUs) </p><p> Develop a rugged pod-based external payload </p><p>Operations Concept Overview </p><p>Vision Increase warfighter effectiveness by enhancing remotely piloted systems capabilities and expanding their capacity to create effects in the battlespace. </p><p> Base on open industry standards </p><p>Pod and Chassis Details </p><p> ISR missions face elevated demands in order to effectively operate in contested and challenged environments </p><p> Agile Condor will support a rapid response to unexpected challenges </p><p>Future: Secure Bio-Inspired Computing Flight Tests Agile Condor predecessor (6U VPX HPEC) </p><p>flight tested in July 2015 </p><p>Greater system resilience, adaptability, autonomy and intelligence </p><p> Oct. 2016 planned flight test for Agile Condor </p><p> 12.8 GFLOPS/Watt (90% from GPUs) </p><p> Embedded real-time experiments performed </p><p>Mark Barnell, Courtney Raymond Air Force Research Laboratory, Rome, NY </p><p>mark.barnell.1@us.af.mil, courtney.raymond.1@us.af.mil </p><p>DJ Isereau, Chris Capraro SRC, Inc., North Syracuse, NY </p><p>isereau@srcinc.com, ccapraro@srcinc.com </p><p>14 slot 3U VPX conduction cooled chassis </p><p> Existing pod baseline flight certified MIL-STD-8591 design for aircraft interface and </p><p>aerodynamics Ambient air cooling thermal management </p><p>Agile Condor brings distributed high-performance computing closer to the sensor </p><p>DISTRIBUTION A. Approved for public release; distribution unlimited (88ABW-2016-0194) </p><p> Patent applied for </p><p>Latest generation Intel Core i7 SBC 2 - NVIDIA Maxwell GM107 GPUs CUDA Compute Capability v5.0 1096 GFLOPS each Delivers 88% of total processing </p><p>COTS upgradable </p><p>Presented at IEEE HPEC 2015 </p><p>contact name </p><p>Mark Barnell: mark.barnell.1@us.af.milPoster </p><p>P6292</p><p>category: aerosPace &amp; Defense - aD01</p></li></ul>

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