ADSP-BF535 EZ-KIT Lite Evaluation System Manual...ADSP-BF535 EZ-KIT Lite® Evaluation System Manual Revision 2.2, October 2003 Part Number 85-000603-01 Analog Devices, Inc. One Technology

ADSP-BF535 EZ-KIT Lite®

Evaluation System Manual

Revision 2.2, October 2003

Part Number85-000603-01

Analog Devices, Inc.One Technology WayNorwood, Mass. 02062-9106

a

Copyright Information© 2003 Analog Devices, Inc., ALL RIGHTS RESERVED. This docu-ment may not be reproduced in any form without prior, express written consent from Analog Devices, Inc.

Printed in the USA.

Limited WarrantyThe EZ-KIT Lite evaluation system is warranted against defects in materi-als and workmanship for a period of one year from the date of purchase from Analog Devices or from an authorized dealer.

DisclaimerAnalog Devices, Inc. reserves the right to change this product without prior notice. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by impli-cation or otherwise under the patent rights of Analog Devices, Inc.

Trademark and Service Mark NoticeThe Analog Devices logo, Blackfin, and EZ-KIT Lite are registered trade-marks of Analog Devices, Inc.

VisualDSP++ is a trademark of Analog Devices, Inc.

All other brand and product names are trademarks or service marks of their respective owners.

Regulatory Compliance The ADSP-BF535 EZ-KIT Lite evaluation system has been certified to comply with the essential requirements of the European EMC directive 89/336/EEC (inclusive 93/68/EEC) and, therefore, carries the “CE” mark.

The ADSP-BF535 EZ-KIT Lite evaluation system had been appended to the Technical Construction File referenced “DSPTOOLS1” dated December 21, 1997 and was awarded CE Certification by an appointed European Competent Body as listed below.

Technical Certificate No: Z600ANA1.007

Issued by: Technology International (Europe) Limited

41 Shrivenham Hundred Business Park

Shrivenham, Swindon, SN6 8TZ, UK

The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge) sensitive devices. Electro-static charges readily accumulate on the human body and equipment and can discharge without detection. Permanent damage may occur on devices subjected to high-energy discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Store unused EZ-KIT Lite boards in the protective shipping package.

CONTENTS

PREFACE

Purpose of This Manual ................................................................. xiv

Intended Audience ......................................................................... xiv

Manual Contents ........................................................................... xiv

What’s New in This Manual ............................................................ xv

Technical or Customer Support ...................................................... xvi

Supported Processors ...................................................................... xvi

Product Information ...................................................................... xvi

MyAnalog.com ........................................................................ xvii

DSP Product Information ........................................................ xvii

Related Documents ................................................................ xviii

Online Documentation ............................................................ xix

Printed Manuals ....................................................................... xix

VisualDSP++ Documentation Set ......................................... xix

Hardware Manuals ................................................................ xx

Data Sheets ........................................................................... xx

Contacting DSP Publications ..................................................... xx

Notation Conventions .................................................................... xxi

ADSP-BF535 EZ-KIT Lite Evaluation System Manual v

CONTENTS

GETTING STARTED

Contents of EZ-KIT Lite Package ................................................. 1-1

PC Configuration ......................................................................... 1-3

Installation Tasks .......................................................................... 1-3

Installing VisualDSP++ and EZ-KIT Lite Software .................. 1-4

Installing VisualDSP++ License ............................................... 1-5

Setting Up EZ-KIT Lite Hardware .......................................... 1-5

Installing EZ-KIT Lite USB Driver ......................................... 1-7

Windows 98 USB Driver .................................................... 1-8

Windows 2000 USB Driver .............................................. 1-12

Windows XP USB Driver ................................................. 1-13

Verifying Driver Installation .................................................. 1-15

Starting VisualDSP++ ........................................................... 1-16

USING EZ-KIT LITE

EZ-KIT Lite License Restrictions .................................................. 2-2

Memory Map ............................................................................... 2-3

Using SDRAM Interface ............................................................... 2-4

Using Flash Memory ..................................................................... 2-5

Using Programmable Flag Pins ...................................................... 2-6

Power Management ................................................................. 2-7

Example Programs ........................................................................ 2-8

Using Flash Programmer Utility .................................................... 2-9

Using Background Telemetry Channel .......................................... 2-9

vi ADSP-BF535 EZ-KIT Lite Evaluation System Manual

CONTENTS

Using EZ-KIT Lite VisualDSP++ Interface .................................. 2-10

Trace Window ....................................................................... 2-10

Enabling Trace Buffer ........................................................ 2-11

Reading Trace Buffer Data ................................................ 2-11

Performance Monitor ............................................................ 2-11

Boot Load ............................................................................. 2-13

Context Switching ................................................................. 2-13

Using M3 Register ............................................................ 2-13

Using Stack Pointer ........................................................... 2-14

Hardware Breakpoints ........................................................... 2-14

Global Breakpoint Options ............................................... 2-15

Common Breakpoint Attributes ........................................ 2-15

Data Breakpoints .............................................................. 2-15

Data Breakpoint Specific Attributes ............................... 2-15

Instruction Breakpoints ..................................................... 2-16

Instruction Breakpoint Specific Attributes ...................... 2-16

Hardware Breakpoints Tips and Tricks ............................... 2-18

Latency ......................................................................... 2-18

Restrictions ................................................................... 2-18

Target Options ...................................................................... 2-19

Reset Options ................................................................... 2-19

On Emulator Exit ............................................................. 2-20

Other Options .................................................................. 2-20

Restricted Software Breakpoints ............................................. 2-21

ADSP-BF535 EZ-KIT Lite Evaluation System Manual vii

CONTENTS

EZ-KIT LITE HARDWARE REFERENCE

System Architecture ...................................................................... 3-2

External Bus Interface ............................................................. 3-3

SPORT0 Audio Interface ........................................................ 3-3

Expansion Interface ................................................................. 3-4

JTAG Emulation Port ............................................................. 3-5

Jumper and DIP Switch Settings ................................................... 3-5

Audio Input Select Jumper (JP1) ............................................. 3-5

Audio Codec Disable Jumper (JP2) ......................................... 3-6

Boot Mode Select Switch (SW1) .............................................. 3-7

DSP PLL Setup Switch (SW2) ................................................. 3-7

LEDs and Push Buttons ................................................................ 3-9

Programmable Flag LEDs (LED1, LED2, LED3, LED4) ......... 3-9

USB Monitor LED (LED5) ................................................... 3-10

Power LED (LED6) .............................................................. 3-10

Reset LEDs (LED7, LED8) ................................................... 3-10

Non-Maskable Interrupt Push Button (SW3) ......................... 3-11

Programmable Flag Push Buttons (SW4, SW5, SW6, SW7) ... 3-11

Reset Push Button (SW8) ...................................................... 3-11

Connectors ................................................................................. 3-12

Expansion Interface (P1, P2, P3) ........................................... 3-12

FlashLINK (P4) .................................................................... 3-13

Audio (P5, P6) ...................................................................... 3-13

USB (P7) .............................................................................. 3-14

viii ADSP-BF535 EZ-KIT Lite Evaluation System Manual

CONTENTS

JTAG (P8) ............................................................................ 3-14

SPORT0 (P9) ........................................................................ 3-15

Power Connector (P10) ......................................................... 3-15

Specifications .............................................................................. 3-15

Power Supply ........................................................................ 3-16

Board Current Measurements ................................................ 3-16

Mechanical Dimensions ......................................................... 3-17

BILL OF MATERIALS

INDEX

ADSP-BF535 EZ-KIT Lite Evaluation System Manual ix

CONTENTS

x ADSP-BF535 EZ-KIT Lite Evaluation System Manual

PREFACE

Thank you for purchasing the ADSP-BF535 EZ-KIT Lite®, Analog
Devices (ADI) evaluation system for Blackfin® embedded media processors.
The Blackfin processors are embedded processors that support a Media Instruction Set Computing (MISC) architecture. This architecture is the natural merging of RISC, media functions, and digital signal processing (DSP) characteristics towards delivering signal processing performance in a microprocessor-like environment.

The evaluation board is designed to be used in conjunction with the Visu-alDSP++™ development environment to test the capabilities of the ADSP-BF535 (formerly ADSP-21535) Blackfin processors. The Visu-alDSP++ development environment gives you the ability to perform advanced application code development and debug, such as:

• Create, compile, assemble, and link application programs written in C++, C and ADSP-BF535 assembly

• Load, run, step, halt, and set breakpoints in application program

• Read and write data and program memory

• Read and write core and peripheral registers

• Plot memory

Access to the ADSP-BF535 processor from a personal computer (PC) is achieved through a USB port or an optional JTAG emulator. The USB interface gives unrestricted access to the ADSP-BF535 processor and the

ADSP-BF535 EZ-KIT Lite Evaluation System Manual xi

evaluation board peripherals. Analog Devices JTAG emulators offer faster communication between the host PC and target hardware. Analog Devices carries a wide range of in-circuit emulation products. To learn more about Analog Devices emulators and DSP development tools, go to http://www.analog.com/dsp/tools/.

ADSP-BF535 EZ-KIT Lite provides example programs to demonstrate the capabilities of the evaluation board.

! The VisualDSP++ license provided with this EZ-KIT Lite evalua-tion system limits the size of a user program to 176 KB of internal memory.

The board’s features include:

• Analog Devices ADSP-BF535 processor

" 300 MHz Core Clock Speed (default)" Switch-Configurable Core Clock Speed" Switch-Configurable Boot Mode

• USB Debugging Interface

! This is not the DSP’s USB interface.

• Analog Devices AD1885 48 kHz AC’97 SoundMAX® Codec

" Jumper-Selectable Line-In or Mic-In 3.5 mm Stereo Jack" Line-Out 3.5 mm Stereo Jack

• SDRAM

" 4 M x 32-bit

• Flash Memory

" 272 K x 16

xii ADSP-BF535 EZ-KIT Lite Evaluation System Manual

Preface

• Interface Connectors

" 14-Pin Emulator Connector for JTAG Interface " SPORT0 Connector" FlashLINK™ Connector (for Flash memory programming)" Expansion Interface Connectors (not populated)

• General-Purpose IO

" 4 Push Buttons connected to DSP Programmable Flags" 1 Push Button connected to DSP Non-maskable Interrupt" 4 LEDs connected to DSP Programmable Flags

• Real Time Clock

• Analog Devices ADP3331, ADP3338, ADP3339, and ADP3088 Voltage Regulators

The EZ-KIT Lite board has a Flash memory device that can be used to store user specific boot code. By configuring the boot mode switch (SW1) and by programming the Flash memory, the board can run as a stand-alone unit. For information about using the Flash memory, see “Using Flash Memory” on page 2-5.

SPORT0 is interfaced with an audio codec, allowing you to create audio sig-nal processing applications. SPORT0 is also attached to an off-board connector to allow communication with other serial devices. For informa-tion about SPORT0, see “SPORT0 Audio Interface” on page 3-3.

Additionally, the EZ-KIT Lite board provides access to most of the pro-cessor’s peripheral ports. Access is provided in the form of uninstalled expansion interface connectors. The processor’s USB pins are brought to the P3 connector but require additional circuitry to function as a USB port. The PCI bus of the DSP is not available at any connector of the EZ-Kit Lite. For information about the expansion interface, see “Expan-sion Interface” on page 3-4.

ADSP-BF535 EZ-KIT Lite Evaluation System Manual xiii

Purpose of This Manual

Purpose of This Manual The ADSP-BF535 EZ-KIT Lite Evaluation System Manual provides instructions for using the hardware and installing the software on your PC. This manual provides guidelines for running your own code on the ADSP-BF535 EZ-KIT Lite. The manual also describes the operation and configuration of the evaluation board’s components. Finally, a schematic and a bill of materials are provided as a reference for future ADSP-BF535 board designs.

Intended AudienceThis manual is a user’s guide and reference to the ADSP-BF535 EZ-KIT Lite evaluation system. Programmers who are familiar with the Analog Devices Blackfin processor architecture, operation, and programming are the primary audience for this manual.

Programmers who are unfamiliar with Analog Devices Blackfin processors can use this manual in conjunction with the ADSP-BF535 DSP Hardware Reference and the Blackfin Processor Instruction Set Reference, which describe the processor architecture and instruction set. Programmers who are unfamiliar with VisualDSP++ should refer to the VisualDSP++ online Help and the VisualDSP++ user’s or getting started guides. For the loca-tions of these documents, refer to “Related Documents”.

xiv ADSP-BF535 EZ-KIT Lite Evaluation System Manual

Preface

Manual ContentsThe manual consists of:

• Chapter 2, “Getting Started” on page 1-1

Provides software and hardware installation procedures, PC system requirements, and basic board information.

• Chapter 2, “Using EZ-KIT Lite” on page 2-1

Provides information on the EZ-KIT Lite from a programmer’s perspective and provides an easy-to-access memory map.

• Chapter 3, “EZ-KIT Lite Hardware Reference” on page 3-1

Provides information on the hardware aspects of the evaluation system.

• Appendix A, “Bill Of Materials” on page A-1

Provides a list of components used to manufacture the EZ-KIT Lite board.

• Appendix B, “Schematics” on page B-1

Provides the resources to allow EZ-KIT Lite board-level debug-ging or to use as a reference design.

This appendix is not part of the online Help. The online Help viewers should go the PDF version of the ADSP-BF535 EZ-KIT Lite Evaluation System Manual located in the Docs\EZ-KIT Lite Manuals folder on the installation CD to see the schematics.

ADSP-BF535 EZ-KIT Lite Evaluation System Manual xv

What’s New in This Manual

What’s New in This Manual This is the third revision of the ADSP-BF535 EZ-KIT Lite Evaluation Sys-tem Manual. The manual provides an updated listing of related documents.

Technical or Customer SupportYou can reach DSP Tools Support in the following ways.

• Visit the DSP Development Tools website at

www.analog.com/technology/dsp/developmentTools/index.html

• Email questions to

[email protected]

• Phone questions to 1-800-ANALOGD

• Contact your ADI local sales office or authorized distributor

• Send questions by mail to

Analog Devices, Inc.

DSP Division

One Technology Way

P.O. Box 9106

Norwood, MA 02062-9106

USA

Supported ProcessorsThe ADSP-BF535 EZ-KIT Lite evaluation system supports ADSP-BF535 (formerly ADSP-21535) Blackfin Analog Devices embedded processors.

xvi ADSP-BF535 EZ-KIT Lite Evaluation System Manual

Preface

Product InformationYou can obtain product information from the Analog Devices website, from the product CD-ROM, or from the printed publications (manuals).

Analog Devices is online at www.analog.com. Our website provides infor-mation about a broad range of products—analog integrated circuits, amplifiers, converters, and digital signal processors.

MyAnalog.comMyAnalog.com is a free feature of the Analog Devices website that allows customization of a webpage to display only the latest information on products you are interested in. You can also choose to receive weekly email notification containing updates to the webpages that meet your interests. MyAnalog.com provides access to books, application notes, data sheets, code examples, and more.

Registration:

Visit www.myanalog.com to sign up. Click Register to use MyAnalog.com. Registration takes about five minutes and serves as means for you to select the information you want to receive.

If you are already a registered user, just log on. Your user name is your email address.

DSP Product InformationFor information on digital signal processors, visit our website at www.analog.com/dsp, which provides access to technical publications, data sheets, application notes, product overviews, and product announcements.

ADSP-BF535 EZ-KIT Lite Evaluation System Manual xvii

Product Information

You may also obtain additional information about Analog Devices and its products in any of the following ways.

• Email questions or requests for information to [email protected]

• Fax questions or requests for information to 1-781-461-3010 (North America) or +49 (0) 89 76903-157 (Europe)

Related Documents For information on product related development software, see the follow-ing publications.

Table 1. Related DSP Publications

Title Description

ADSP-BF535 Embedded Processor Datasheet General functional description, pin-out, and timing.

ADSP-BF535 Blackfin Processor Hardware Ref-erence

Description of internal processor architecture and all register functions.

Blackfin Processor Instruction Set Reference Description of all allowed processor assembly instructions.

Table 2. Related VisualDSP++ Publications

Title Description

VisualDSP++ 3.5 User’s Guide for 16-Bit Proces-sors

Detailed description of VisualDSP++ 3.5 fea-tures and usage.

VisualDSP++ 3.5 Assembler and Preprocessor Manual for Blackfin Processors

Description of the assembler function and commands for Blackfin processors.

VisualDSP++ 3.5 C/C++ Complier and Library Manual for Blackfin Processors

Description of the complier function and com-mands for Blackfin processors

xviii ADSP-BF535 EZ-KIT Lite Evaluation System Manual

Preface

The listed documents can be found through online Help or in the Docs folder of your VisualDSP++ installation. Most documents are available in printed form.

! If you plan to use the EZ-KIT Lite board in conjunction with a JTAG emulator, refer to the documentation that accompanies the emulator.

Online Documentation Your software installation kit includes online Help as part of the Win-dows® interface. These help files provide information about VisualDSP++ and the ADSP-BF535 EZ-KIT Lite evaluation system.

To view VisualDSP++ Help, click on the Help menu item or go to the Windows task bar and select Start -->Programs -->VisualDSP -->Visu-alDSP++ Documentation.

To view ADSP-BF535 EZ-KIT Lite Help, which now is a part of the VisualDSP++ Help system, go the Contents tab of the Help window and select Manuals --> ADSP-BF535 EZ-KIT Lite.

For more documentation, please go to http://www.analog.com/technology/dsp/library.html.

VisualDSP++ 3.5 Linker & Utilities Manual for 16-Bit Processors

Description of the linker function and com-mands for 16-bit processors.

VisualDSP++ 3.5 Loader Manual for 16-Bit Processors

Description of the loader/splitter function and commands for 16-bit processors.

Table 2. Related VisualDSP++ Publications (Cont’d)

Title Description

ADSP-BF535 EZ-KIT Lite Evaluation System Manual xix

Product Information

Printed ManualsFor general questions regarding literature ordering, call the Literature Center at 1-800-ANALOGD (1-800-262-5643) and follow the prompts.

VisualDSP++ Documentation Set

Printed copies of VisualDSP++ manuals may be purchased through Ana-log Devices Customer Service at 1-781-329-4700; ask for a Customer Service representative. The manuals can be purchased only as a kit. For additional information, call 1-603-883-2430.

If you do not have an account with Analog Devices, you will be referred to Analog Devices distributors. To get information on our distributors, log onto www.analog.com/salesdir/continent.asp.

Hardware Manuals

Printed copies of hardware reference and instruction set reference manuals can be ordered through the Literature Center or downloaded from the Analog Devices website. The phone number is 1-800-ANALOGD (1-800-262-5643). The manuals can be ordered by a title or by product number located on the back cover of each manual.

Data Sheets

All data sheets can be downloaded from the Analog Devices website. As a general rule, printed copies of data sheets with a letter suffix (L, M, N, S) can be obtained from the Literature Center at 1-800-ANALOGD (1-800-262-5643) or downloaded from the website. Data sheets without the suffix can be downloaded from the website only—no hard copies are available. You can ask for the data sheet by part name or by product number.

xx ADSP-BF535 EZ-KIT Lite Evaluation System Manual

Preface

If you want to have a data sheet faxed to you, the phone number for that service is 1-800-446-6212. Follow the prompts and a list of data sheet code numbers will be faxed to you. Call the Literature Center first to find out if requested data sheets are available.

Contacting DSP PublicationsPlease send your comments and recommendations on how to improve our manuals and online Help. You can contact us at [email protected].

Notation ConventionsThe following table identifies and describes text conventions used in this manual.

! Additional conventions, which apply only to specific chapters, may appear throughout this document.

Example Description

Close command (File menu) or OK

Text in bold style indicates the location of an item within the VisualDSP++ environment’s and boards’ menu system and user inter-face items.

{this | that} Alternative required items in syntax descriptions appear within curly brackets separated by vertical bars; read the example as this or that.

[this | that] Optional items in syntax descriptions appear within brackets and sepa-rated by vertical bars; read the example as an optional this or that.

[this,…] Optional item lists in syntax descriptions appear within brackets delim-ited by commas and terminated with an ellipsis; read the example as an optional comma-separated list of this.

PF9-0 Registers, connectors, pins, commands, directives, keywords, code examples, and feature names are in text with letter gothic font.

filename Non-keyword placeholders appear in text with italic style format.

ADSP-BF535 EZ-KIT Lite Evaluation System Manual xxi

Notation Conventions

Note: A note providing information of special interest or identifying a related topic. In the online version of this book, the word Note appears instead of this symbol.

Caution: A caution providing information about critical design or programming issues that influence operation of a product. In the online version of this book, the word Caution appears instead of this symbol.

Example Description

#

xxii ADSP-BF535 EZ-KIT Lite Evaluation System Manual

1 GETTING STARTED

This chapter provides the information you need to begin using
ADSP-BF535 EZ-KIT Lite evaluation system. For correct operation, install the software and hardware in the order presented in “Installation Tasks” on page 1-3.
The chapter includes the following sections.

• “Contents of EZ-KIT Lite Package” on page 1-1

Provides a list of the components shipped with this EZ-KIT Lite evaluation system.

• “PC Configuration” on page 1-3

Describes the minimum requirements for the PC to work with the EZ-KIT Lite evaluation system.

• “Installation Tasks” on page 1-3

Describes the step-by-step procedures for setting up the hardware and software.

Contents of EZ-KIT Lite PackageYour ADSP-BF535 EZ-KIT Lite evaluation system package contains the following items.

• ADSP-BF535 EZ-KIT Lite board

• EZ-KIT Lite Quick Start Guide

ADSP-BF535 EZ-KIT Lite Evaluation System Manual 1-1

Contents of EZ-KIT Lite Package

• CD containing:

" VisualDSP++ for Blackfin processors with a limited license

" ADSP-BF535 EZ-KIT Lite debug software

" USB driver files

" Example programs

" ADSP-BF535 EZ-KIT Lite Evaluation System Manual (this document)

• Installation Quick Reference Card for VisualDSP++

• Universal 7.5V DC power supply

• USB 2.0 type cable

• Registration card (please fill out and return)

If any item is missing, contact the vendor where you purchased your EZ-KIT Lite or contact Analog Devices, Inc.

The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge) sensitive devices. Electro-static charges readily accumulate on the human body and equipment and can discharge without detection. Permanent damage may occur on devices subjected to high-energy discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Store unused EZ-KIT Lite boards in the protective shipping package.

1-2 ADSP-BF535 EZ-KIT Lite Evaluation System Manual

Getting Started

PC ConfigurationFor correct operation of the VisualDSP++ software and the EZ-KIT Lite, your computer must have the minimum configuration:

# EZ-KIT Lite does not run under Windows 95 or Windows NT.

Installation TasksThe following task list is provided for the safe and effective use of the ADSP-BF535 EZ-KIT Lite. Follow the instructions in the presented order to ensure correct operation of your software and hardware.

1. VisualDSP++ and EZ-KIT Lite software installation

2. VisualDSP++ license installation

3. EZ-KIT Lite hardware setup

4. EZ-KIT Lite USB driver installation

5. USB driver installation verification

6. VisualDSP++ startup

Windows 98, Windows 2000, Windows XP

Intel (or comparable) 166 MHz processor

VGA Monitor and color video card

2-button mouse

50 MB free on hard drive

32 MB RAM

Full-speed USB port

CD-ROM Drive


Installation Tasks

Installing VisualDSP++ and EZ-KIT Lite SoftwareThis EZ-KIT Lite comes with the latest version of VisualDSP++ 3.5 for 16-bit processors. VisualDSP++ installation includes EZ-KIT Lite installations.

To install VisualDSP++ and EZ-KIT Lite software:

1. Insert the VisualDSP++ installation CD into the CD-ROM drive.

2. If Autoplay is enabled on your PC, you see the Install Shield Wiz-ard Welcome screen. Otherwise, choose Run from the Start menu, and enter D:\ADI_Setup.exe in the Open field, where D is the name of your local CD-ROM drive.

3. Follow the on-screen instructions to continue installing the software.

4. At the Custom Setup screen, select your EZ-KIT Lite from the list of available systems and choose the installation directory. Click an icon in the Feature Description field to see the selected system’s description. When you have finished, click Next.

5. At the Ready to Install screen, click Back to change your install options, click Install to install the software, or click Cancel to exit the install.

6. When the EZ-KIT Lite installs, the Wizard Completed screen appears. Click Finish.


Getting Started

Installing VisualDSP++ LicenseTo install the VisualDSP++ license:

1. Locate the serial number provided on the sticker affixed to the CD sleeve and the registration form.

2. From the Start menu, choose Programs, Analog Devices, Visu-alDSP++ 3.5 for 16-bit Processors, VisualDSP++ Environment.

3. The information screen asks if you would like to install a license. Click Yes. The About VisualDSP++ screen appears.

4. Select the Licenses tab and click New.

5. In the Install a New License dialog that opens, select Single User.

6. Fill in the tools serial number in the field provided exactly as it appears on your CD sleeve or registration form and click Next. An information window notifies of successful license installation.

Setting Up EZ-KIT Lite Hardware

The ADSP-BF535 EZ-KIT Lite board is designed to run outside your per-sonal computer as a stand-alone unit. You do not have to open your computer case.

The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human body and equipment and can discharge without detection. Per-manent damage may occur on devices subjected to high-energy discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Store unused EZ-KIT Lite boards in the protective shipping package.


Installation Tasks

To connect the EZ-KIT Lite board:

1. Remove the EZ-KIT Lite board from the package. Be careful when handling the board to avoid the discharge of static electricity, which may damage some components.

2. Figure 1-1 shows the default jumper settings, DIP switch, connec-tor locations, and LEDs used in installation. Confirm that your board is set up in the default configuration before continuing.

Figure 1-1. EZ-KIT Lite Hardware Setup


Getting Started

3. Plug the provided power supply into P10 on the EZ-KIT Lite board. Visually verify that the green power LED (LED6) is on. Also verify that the two red reset LEDs (LED7 and LED8) go on for a moment and then go off.

4. Connect one end of the USB cable to an available full speed USB port on your PC and the other end to P7 on the ADSP-BF535 EZ-KIT Lite board.

Installing EZ-KIT Lite USB DriverThe EZ-KIT Lite evaluation system installed on Windows 98, Windows 2000, and Windows XP requires one full-speed USB port.

• “Windows 98 USB Driver” on page 1-8 describes the installation on Windows 98.

• “Windows 2000 USB Driver” on page 1-12 describes the installa-tion on Windows 2000.

• “Windows XP USB Driver” on page 1-13 describes the installation on Windows XP.

The USB driver used by the debug agent is not Microsoft certified because it is intended for a development or laboratory environment, not a com-mercial environment.


Installation Tasks

Windows 98 USB Driver

Before using the ADSP-BF535 EZ-KIT Lite for the first time, the Win-dows 98 USB driver must first be installed.

To install the USB driver:

1. Insert the CD into the CD-ROM drive.The connection of the device to the USB port activates the Win-dows 98 Add New Hardware Wizard, as shown in Figure 1-2.

2. Click Next.

Figure 1-2. Windows 98 – Add New Hardware Wizard


Getting Started

3. Select Search for the best driver for your device, as shown in Figure 1-3.

4. Click Next.

5. Select CD-ROM drive, as shown in Figure 1-4.

Figure 1-3. Windows 98 – Searching for Driver

Figure 1-4. Windows 98 – Searching for CD-ROM


Installation Tasks

6. Click Next. Windows 98 locates the WmUSBEz.inf file on the installation CD, as shown in Figure 1-5.

7. Click Next.The Coping Files dialog box appears (Figure 1-6).

Figure 1-5. Windows 98 – Locating Driver

Figure 1-6. Windows 98 – Searching for .SYS File


Getting Started

8. Click Browse. The Open dialog box, shown in Figure 1-7, appears on the screen.

9. In Drives, select your CD-ROM drive.

10. Click OK. The Copying Files dialog box (Figure 1-8) appears.

Figure 1-7. Windows 98 – Opening .SYS File

Figure 1-8. Windows 98 – Copying .SYS File


Installation Tasks

11. Click OK.The driver installation is now complete, as shown in Figure 1-9.

12. Click Finish to exit the wizard.

13.Verify the installation by following the instructions in “Verifying Driver Installation” on page 1-15.

Windows 2000 USB Driver

VisualDSP++ 3.5 installation software pre-installs the necessary drivers for the selected EZ-KIT Lite. The install also upgrades an older driver if such is detected in the system.

# Prior to running the VisualDSP++ 3.5 installer, ensure there are no other Hardware Wizard windows running in the background. If there are any wizard windows running, close them before starting the installer.

Figure 1-9. Windows 98 – Completing Software Installation


Getting Started


1. If VisualDSP++ 3.5 is already installed on your system, go to step 2.Otherwise, run VisualDSP++ 3.5 installation. Refer to the Installa-tion Quick Reference Card for VisualDSP++ for a detailed installation description.When installing VisualDSP++ 3.5 on Windows 2000, make sure the appropriate EZ-KIT Lite component is selected for the installation.

2. Connect the EZ-KIT Lite device to your PC’s USB port. Windows 2000 automatically detects an EZ-KIT device and auto-matically installs the appropriate driver for the selected device (see step 1).

3. Verify the installation by following the instructions in “Verifying Driver Installation” on page 1-15.

Windows XP USB Driver

VisualDSP++ 3.5 installation software pre-installs the necessary drivers for the selected EZ-KIT Lite. The install also upgrades an older driver if such is detected in the system.

# Prior to running the VisualDSP++ 3.5 installer, ensure there are no other Hardware Wizard windows running in the background. If there are any wizard windows running, close them before starting the installer.


1. If VisualDSP++ 3.5 is already installed on your system, go to step 2. Otherwise, run VisualDSP++ 3.5 installation. Refer to the Installa-tion Quick Reference Card for VisualDSP++ for a detailed


Installation Tasks

installation description.When installing VisualDSP++ 3.5 on Windows XP, make sure the appropriate EZ-KIT Lite component is selected for the installation.

2. Connect the EZ-KIT Lite device to your PC’s USB port. By connecting the device to the USB port you activate the Win-dows XP Found New Hardware Wizard, shown in Figure 1-10.

3. Select Install the software automatically (Recommended) and click Next.

Figure 1-10. Windows XP – Found New Hardware Wizard


Getting Started

When Windows XP completes the driver installation for the selected device (see step 1), a window shown in Figure 1-11 appears on the screen.

4. Verify the installation by following the instructions in “Verifying Driver Installation”.

Verifying Driver InstallationBefore you use the EZ-KIT Lite evaluation system, verify that the USB driver software is installed properly:

1. Ensure that the USB cable is connected to the evaluation board and the PC.

2. Verify that the yellow USB monitor LED (LED4) is lit. This signi-fies that the board is communicating properly with the host PC and is ready to run VisualDSP++.

Figure 1-11. Windows XP – Completing Driver Installation


Installation Tasks

3. Verify that the USB driver software is installed properly.Open Windows Device Manager and verify that ADSP-BF535 EZ-KIT Lite shows under ADI Development Tools with no excla-mation point, as in Figure 1-12.

# If using an EZ-KIT Lite on Windows 98, disconnect the USB cable from the board before booting the PC. When Windows 98 is booted and you are logged on, re-connect the USB cable to the board. The operation should continue normally from this point.

Starting VisualDSP++To set up a session in VisualDSP++.

1. Verify that the yellow USB monitor LED (LED5, located near the USB connector) is lit. This signifies that the board is communicat-ing properly with the host PC and is ready to run VisualDSP++.

2. Hold down the Control (CTRL) key.

Figure 1-12. Device Manager Window


Getting Started

3. Select the Start button on the Windows taskbar, then choose Pro-grams-->VisualDSP-->VisualDSP++.If you are running VisualDSP++ for the first time, go to step 4. If you already have existing sessions, the Session List dialog box appears on the screen.

4. Click New Session.

5. The New Session dialog box, shown in Figure 1-13, appears on the screen.

6. In Debug Target, choose EZ-KIT Lite (ADSP-BFxxx).

7. In Processor, choose the appropriate processor, ADSP-BF535.

8. Type a new target name in Session Name or accept the default name.

9. Click OK to return to the Session List. Highlight the new session and click Activate.

Figure 1-13. New Session Dialog Box


Installation Tasks


2 USING EZ-KIT LITE

This chapter provides specific information to assist you with developing
programs for the ADSP-BF535 EZ-KIT Lite evaluation board. This infor-mation appears in the following sections.
• “EZ-KIT Lite License Restrictions” on page 2-2

Describes the restrictions of the VisualDSP++ license shipped with the EZ-KIT Lite.

• “Memory Map” on page 2-3

Defines the ADSP-BF535 EZ-KIT Lite’s memory map.

• “Using SDRAM Interface” on page 2-4·

Defines the register values to configure the on-board SDRAM.

• “Using Flash Memory” on page 2-5

Describes how to program and use the on-board Flash memory.

• “Using Programmable Flag Pins” on page 2-6

Describes the function and use of the programmable flag pins on the EZ-KIT Lite evaluation system.

• “Example Programs” on page 2-8

Provides information about the example programs included in the ADSP-BF535 EZ-KIT Lite evaluation system.

• “Using Flash Programmer Utility” on page 2-9


EZ-KIT Lite License Restrictions

Provides information on the Flash Programmer utility included with the EZ-KIT Lite software.

• “Using Background Telemetry Channel” on page 2-9

Highlights the advantages of the Background Telemetry Channel features of VisualDSP++.

• “Using EZ-KIT Lite VisualDSP++ Interface” on page 2-10

Describes the trace, performance monitoring, boot loading, con-text switching, hardware breakpoints, and target options of the EZ-KIT Lite system.

For more detailed information about programming the ADSP-BF535 Blackfin processor, see the documents referred to as “Related Documents”.

EZ-KIT Lite License RestrictionsThe license shipped with the EZ-KIT Lite imposes the following restrictions.

• The user program is limited to 176 KB of the ADSP-BF535 pro-cessor’s internal memory space.

• No connections to Simulator or Emulator sessions are allowed.

• Only one EZ-KIT Lite board can be connected to the host PC and debugged at a time.

• The EZ-KIT Lite hardware must be connected and powered up in order to use VisualDSP++ with a kit license.


Using EZ-KIT Lite

Memory MapThe ADSP-BF535 processor has internal SRAM that can be used for instruction or data storage. The configuration of internal SRAM is detailed in the ADSP-BF535 Processor Hardware Reference.

The ADSP-BF535 EZ-KIT Lite board contains 272K x 16 bits of external Flash memory. This memory is connected to the processor’s ~AMS0 mem-ory select pin. The external memory interface is also connected to 4M x 32-bit SDRAM memory. This memory is connected to the ~SMS0 pin.

Table 2-1. EZ-KIT Lite Evaluation Board Memory Map

Start Address End Address Content

External Memory

0x0000 0000 0x00FF FFFF SDRAM Bank 0 (SDRAM)See “Using SDRAM Interface” on page 2-4.

0x2000 0000 0x2009 FFFF ASYNC Memory Bank 0 (FLASH)See “Using Flash Memory” on page 2-5.

All other locations Not used

Internal Memory

0xF000 0000 0xF003 FFFF L2 SRAM 256 KB

0xFF80 0000 0xFF80 3FFF Data Bank A 16 KB

0xFF90 0000 0xFF90 3FFF Data Bank B 16 KB

0xFFA0 0000 0xFFA0 3FFF Instruction SRAM 16 KB

0xFFB0 0000 0xFFB0 0FFF Scratch Pad SRAM 4 KB

0xFFC0 0000 0xFFDF FFFF System MMRs 2 MB

0xFFE0 0000 0xFFFF FFFF Core MMRs 2 MB

All other locations Reserved


Using SDRAM Interface

Using SDRAM InterfaceIn order to use the 4M x 32 bits (16 MB) of SDRAM memory, the three SDRAM control registers must be initialized. Table 2-2 shows the stan-dard configuration for these registers when using the EZ-KIT Lite in the default configuration. These numbers were derived using the M48LC4M16ATG-75 with a system clock frequency of 120 MHz.

If you are in an EZ-KIT Lite session (that is, not using an emulator), the SDRAM registers are configured automatically through the debugger. The debugger uses the values in Table 2-2 whenever Bank 0 is accessed through the debugger (such as viewing memory windows or loading a pro-gram). Clearing the appropriate checkbox on the Target Options dialog box, which is accessible through the Settings pull-down menu, disables this feature and allows manual configuration.

An example program is included in the EZ-KIT installation directory to demonstrate how to set up the SDRAM interface.

Table 2-2. SDRAM Default Settings

Register Value Function

EBIU_SDRRC 0x0000074A RDIV = 1866 clock cycles

EBIU_SDBCTL 0x00000001 Bank 0 enabledBank 0 size = 16 MBBank 0 column address width = 8 bits

EBIU_SDGCTL 0x0091998F 32-bit data pathExternal buffering timing disabledtWR = 2 SCLK cycles

tRCD = 3 SCLK cycles

tRP = 3 SCLK cycles

tRAS = 6 SCLK cycles

pre-fetch disabledCAS latency = 3 SCLK cyclesSCLK1 disabled


Using EZ-KIT Lite

Using Flash MemoryThe DSM2150 Flash/PLD chip provides a total of 272K x 16 bits of external Flash memory, arranged into two independent flash arrays (boot and main). The chip also has a series of configuration registers to control IO and PLD. This chip is initially configured with the memory sectors mapped to the DSP, as shown in Figure 2-1.

Use PSDsoft Express™ to modify the default settings for the Flash mem-ory. The DSM project must be modified and the Flash memory must be reprogrammed using FlashLINK. The default project files can be found in \…\VisualDSP\Blackfin\EZ-KITs\ADSP-BF535\PSDConfigFiles. Analog Devices does not provide any support for setting up the DSM2150 with PSDsoft Express or programming it using FlashLINK. E-mail STMicro-electronics at [email protected] for technical assistance.

To program the Flash memory with your boot code, you must first create a loader file from your DSP code. Set up the loader in VisualDSP++, depending on how you plan to boot the Flash memory. The two possibili-

Figure 2-1. Flash Memory Map

Boot FlashArray

Config

Main FlashArray

Empty

Empty

0x2002 0000

0x2001 0000

0x2000 0000

0x2001 00FF

0x2000 8000

0x200A 0000


Using Programmable Flag Pins

ties are to boot the DSP in 16-bit external execution mode or in 8-bit boot mode. See “Boot Mode Select Switch (SW1)” on page 3-7 for the boot mode settings.

Next, the loader file must be programmed into the Flash memory. This can be done through the DSP using the VisualDSP++ Flash Programmer utility (see “Using Flash Programmer Utility” on page 2-9) or by using the FlashLink programmer.

The DSM2150 can be re-programmed using the FlashLINK JTAG pro-gramming cable available from STMicroelectronics (www.st.com/psd) for approximately $59. FlashLINK plugs into any PC parallel port. The soft-ware development tool, PSDsoft Express, is required to modify the DSM2150 configuration and to operate the FlashLINK cable. PSDsoft Express can be downloaded at no charge from at www.st.com/psd.

Using Programmable Flag PinsThe ADSP-BF535 processor has 16 asynchronous Programmable Flag (PF) IO pins. During reset, PF9-0 function as inputs to the internal PLL of the DSP. They are not valid until 120 uS after reset. Table 2-3 describes how the PFs can be used after reset.

Table 2-3. Programmable Flag Pin Summary

Flag Connected To Description

PF0 LED4 PF3-0 are connected to the LEDs. These can be used to light an LED when a routine completes.

PF1 LED1

PF2 LED2

PF3 LED3


Using EZ-KIT Lite

After a DSP reset, all of the PF pins are initialized as inputs. The direction of the PF is configured by the FIO_DIR Memory Mapped Register (MMR). The PFs are set HIGH (1) using the FIO_FLAG_S and cleared (0) using the FIO_FLAG_C MMRs. For more information on configuring the PF pins, see the ADSP-BF535 Processor Hardware Reference Manual.

All of the PFs can are brought out to the expansion connector P2. The location of the PF nets can be found in “Schematics” on page B-1.

Power ManagementThe PF14–12 pins allow you to program the core voltage of the processor. The default core voltage is 1.5V. Table 2-4 gives the value of the core volt-age corresponding to the state of the PFs.

PF4 SW4 PF7-4 are connected to the push buttons on the EZ-KIT Lite board and are for user input. Your routine can monitor and exe-cute specific code when a push button is pressed.PF5 SW5

PF6 SW6

PF7 SW7

PF8 Not used

PF9 Not used

PF10 Not used

PF11 Not used

PF12 PMGMT0 These are used to change the internal voltage of the DSP. Refer to “Power Management” on page 2-7 for more information.

PF13 PMGMT1

PF14 PMGMT2

PF15 U7.11 Connected to the reset of the AD1885 codec (U7). This signal must be output as a high (1) to enable the AD1885 codec.

Table 2-3. Programmable Flag Pin Summary (Cont’d)

Flag Connected To Description


Example Programs

When lowering the core voltage of the processor, the frequency of the DSP should also be taken into consideration. As you lower the core volt-age, the frequency the core is running at must be decreased.

Example ProgramsExample programs are provided with the ADSP-BF535 EZ-KIT Lite to demonstrate various capabilities of the evaluation board. These programs are installed with the EZ-KIT Lite software and can be found in \…\Visu-alDSP\Blackfin\EZ-KITs\ADSP-BF535\Examples. Please refer to the readme file provided with each example for more information.

Table 2-4. Power Management PF Settings

PF14 PF13 PF12 VDD_INT

0 0 0 0.9V

0 0 1 1.0V

0 1 0 1.1V

0 1 1 1.2V

1 0 0 1.3V

1 0 1 1.4V

11 11 01 1.5V1

1 1 1 1.6V

1 Default settings


Using EZ-KIT Lite

Using Flash Programmer UtilityThe ADSP-BF535 EZ-KIT Lite evaluation system includes a Flash Pro-grammer utility. The utility allows you to program the Flash memory on the EZ-KIT Lite. The Flash Programmer is installed with VisualDSP++. Once the utility is installed, it is accessible from the Tools pull-down menu.

For more information on the Flash Programmer utility, select Start and choose Programs-->VisualDSP-->VisualDSP++ Documentation.

Using Background Telemetry ChannelThe ADSP-BF535 USB debug agent supports the Background Telemetry Channel (BTC), which facilitates data exchange between VisualDSP++ and the processor without interrupting DSP execution.

The BTC allows the user to view a variable as it is updated or changed, all while the processor continues to execute. For increased performance of the BTC, including faster reading and writing, please check out our latest line of DSP emulators at www.analog.com/Analog_Root/productPage/productHome/0,2121,EMULA-

TORS,00.html.

For more information about the Background Telemetry Channel, see the VisualDSP++ 3.5 User’s Guide for 16-Bit Processors or online Help.


Using EZ-KIT Lite VisualDSP++ Interface

Using EZ-KIT Lite VisualDSP++ InterfaceThis section provides information on the following parts of the Visu-alDSP++ graphical user interface:

• “Trace Window” on page 2-10

• “Performance Monitor” on page 2-11

• “Boot Load” on page 2-13

• “Context Switching” on page 2-13

• “Hardware Breakpoints” on page 2-14

• “Target Options” on page 2-19

• “Restricted Software Breakpoints” on page 2-21

Trace WindowChoosing the Trace command from the View-->Debug Windows menu opens the Trace window (Figure 2-2).

The trace buffer stores a history of the last 16 changes in program flow taken by the program sequencer. View the history to recreate the program sequencer’s most recent path.

Figure 2-2. Trace Window


Using EZ-KIT Lite

The trace buffer does not track changes in flow caused by zero-overhead loops or while in the reset service routine.

! To use the trace buffer, ensure your program leaves the reset service routine.

Enabling Trace Buffer

To view trace history in the Trace window, first, enable the trace buffer (choose Enable Trace from the Tools->Trace menu). On each halt, the Trace window is updated with the changes that occurred since the last halt. Reading the trace buffer destroys the trace buffer’s contents and dis-cards the information previously stored before the last run.

Reading Trace Buffer Data

The first column between the square brackets (in blue) indicates the line number in the Trace window.

The second column between square brackets, which comes in vertical pairs, shows the trace number. For each discontinuity, the first (top posi-tion) is the source trace, and the second (bottom position) is the destination trace. The third column in between square brackets shows the addresses of the instructions. Each address is followed by the assembly instruction.

The trace grows upward. In Figure 2-2 on page 2-10, trace 0 occurred before trace 1, which occurred before trace 2, and so on.

Performance MonitorChoosing Performance Monitor from the Settings menu opens the Per-formance Monitor Control dialog box shown in Figure 2-3 on page 2-12. A description of the dialog box appears in Table 2-5 on page 2-12.



The performance monitor is a 32-bit counter that allows you to track occurrences of events within the core and use these to analyze system behavior. When the counter reaches zero, it causes an exception or emula-tion event, as specified by the Type option.

Figure 2-3. Performance Monitor Dialog Box

Table 2-5. Performance Monitor Options

Option Description

Enable Enables performance monitoring.

Mode Determines the mode of operation for tracking events:Disabled disables the monitor.User tracks while in user mode.Supervisor tracks while in supervisor mode.Both tracks while in both user mode and supervisor mode.

Type Determines the type of event occurring on a match:Exception causes an exception to occur. You can install a handler to detect and handle this exception.Emulation halts the DSP.


Using EZ-KIT Lite

Boot LoadChoosing Boot Load from the Settings menu runs the processor and per-forms a hard reset on the board. This command saves you from having to shut down VisualDSP++, reset the EZ-KIT Lite board, and bring up Visu-alDSP++ again when you want to perform a hard reset.

Use this feature when loading debug boot code from an external part or when you want to put the device into a known state.

Context SwitchingThe ADSP-BF535 EZ-KIT Lite evaluation system uses two methods to obtain and restore the processor’s context: by using the M3 register or by using the stack.

Using M3 Register

Set Use M3 register for context switching option in the Target Options dialog box, as described on page 2-19.

When this option is selected, VisualDSP++ uses the M3 register for context switches. This renders M3 unavailable for user code since the register will be corrupted. When cleared, VisualDSP++ uses the address pointed to by the Stack Pointer register (SP).

Event Specifies the tracked event. Refer to your processor’s Hardware Reference for details. Events include stalls, cache hits or misses, loop iterations, branches, interrupts, loads, stores, DMA accesses, and so on.

Count Specifies the count. When the 32-bit counter reaches zero, an exception or emulation event occurs. For example, to halt on the third occurrence of an event, load the count with 0xFFFFFFFE and set Type to Emulation. The counter counts up and wraps around, causing the processor to halt as desired.

Table 2-5. Performance Monitor Options (Cont’d)

Option Description



This method is very straightforward. M3 is chosen as the register for tem-porary storage and is, therefore, corrupted and cannot be employed in user code. Only use this method when there may be a problem using the stack method.

Using Stack Pointer

If the processor is in the reset service routine at startup, it is assumed the Stack Pointer (SP) is not pointing to a valid address. In this case, the SP is initialized to point to a valid address (0xFFB00FFC), and this location is used for temporary storage.

If the processor is not in the reset service routine, it is assumed the user code has already initialized the SP to a valid address, and this location is used for temporary storage. After the initial startup, the SP is assumed valid. User code can change the SP at any time after leaving the reset ser-vice routine, and the new value of the SP is used for context switches. In all cases, the stack is pushed and popped and is non-intrusive to the user code.

This method is less intrusive than the M3 method but is also more prone to problems. First, this method requires at least one available location on the stack. It also assumes user code will not point the SP to an invalid memory location during debugging and that, if not in the reset service routine, the SP has been programmed correctly. Additionally, it may be possible that a user program has not yet left the reset service routine, but the SP is already initialized. In this case, at startup, the processor is detected in the reset ser-vice routine still and the user’s SP value would be overwritten.

Hardware BreakpointsChoosing Hardware Breakpoints from the Settings menu opens the Hardware Breakpoints dialog box. The Hardware Breakpoints dialog box contains four tabbed pages: Data 0-1, Instruction 0-1, Instruction 2-3, and Instruction 4-5.


Using EZ-KIT Lite

Hardware breakpoints allow you to set breaks on instructions or data transfers within a user-defined memory range. The two types of break-points are described in “Data Breakpoints” on page 2-15 and “Instruction Breakpoints” on page 2-16.

Global Breakpoint Options

Global breakpoint options apply to all hardware breakpoints regardless of type. These options are listed in Table 2-6.

Common Breakpoint Attributes

Each tabbed page in the Hardware Breakpoints dialog box has the follow-ing common attributes, as described in Table 2-7.

Data Breakpoints

Figure 2-4 on page 2-17 shows the Data 0-1 page of the Hardware Break-points dialog box. Two individual data breakpoints can be set. A data breakpoint is triggered by a memory access to a specified address or range. Selecting Enable Range enables the two data breakpoints.

Data Breakpoint Specific Attributes

Data breakpoints have the attributes listed in Table 2-8.

Table 2-6. Global Breakpoint Options

Option Description

Enable watchpoint unit Enables the watchpoint unit.

Enable data AND instruction Specifies that the processor AND the data and instruction breakpoints to form the composite interrupt. Normally each of the group interrupts are ORed to create a composite interrupt.



Instruction Breakpoints

Figure 2-5 shows the Instruction 0-1 page of the Hardware Breakpoint dialog box.

Six individual instruction breakpoints can be set. An instruction break-point occurs when an instruction is executed or an instruction in a specified range is executed. Three ranges, each with its own page, can be specified. You must select Enable Range to set up an instruction range.

Instruction Breakpoint Specific Attributes

Each instruction breakpoint have a specific attribute, as described in Table 2-9.

Table 2-7. Common Breakpoint Attributes

Option Description

Enable Enables the individual breakpoint. Ensure that Global watchpoint unit is also selected.

Enable Range Each tab (Data 0-1, Instruction 0-1, Instruction 2-3, and Instruction 4-5) is considered a range. Selecting this option on a particular tabbed page specifies a search range instead of a single address. Select the inclusive or exclusive range radio button as desired, for example:WPIA0 < IA <= WPIA1 causes the DSP to break for an address greater than the instruction breakpoint 0 address AND less than or equal to the instruction break-point 1 address.IA <= WPIA0 || IA > WPIA1 causes the DSP to break for an address less than or equal to the instruction breakpoint 0 address OR greater than the instruction breakpoint 1 address.

Address Each breakpoint has an associated address. For a single address, this is the address searched when Enable Range is selected. This may be the upper or lower bound address.

Skip count Each individual breakpoint has an associated skip count. When this count is reached, the breakpoint triggers on the next match of this breakpoint. For exam-ple, to break on every third match, enter a skip count of 2.


Using EZ-KIT Lite

Figure 2-4. Data Breakpoints Dialog Box

Table 2-8. Data Breakpoint Specific Attributes

Attribute Description

Access Specifies the type of access:Reserved (reserved).Write triggers the breakpoint on any write to the specified address.Read triggers the breakpoint on any read from the specified address.Both triggers the breakpoint on any write to or read from the specified address.

Source Specifies the source of access:Reserved (reserved).DAG0 triggers the breakpoint on any access using DAG0 with the specified address.DAG1 triggers the breakpoint on any access using DAG1 with the specified address.Both triggers the breakpoint on any access using DAG0 or DAG1 with the specified address.



Hardware Breakpoints Tips and Tricks

Be aware of the following tips and tricks when using hardware breakpoints on Blackfin processors.

Latency

There are no latency cycles for hardware breakpoint matches on the ADSP-BF535 EZ-KIT Lite evaluation system.

Restrictions

When using hardware breakpoints, do not place breaks at any address where a JUMP, CALL, or IDLE instruction is not valid.

Figure 2-5. Instruction Breakpoints Dialog Box

Table 2-9. Instruction Breakpoint Specific Attribute

Attribute Description

Type Determines the type of event that occurs on a match:Exception causes an exception to occur. You can install a handler to detect and handle this exception.Emulation halts the processor.


Using EZ-KIT Lite

Do not attempt to place breaks in the last few instructions of a DO LOOP or in the delay slots of a delayed branch. For more information on these ille-gal locations, see the processor’s Hardware Reference.

Target OptionsChoosing Target Options from the Settings menu opens the Target Options dialog box (Figure 2-6). Use target options to control certain aspects of the processor on the ADSP-BF535 EZ-KIT Lite evaluation system.

Reset Options

Reset options control how the processor behaves when a reset occurs. The reset options are described in Table 2-10.

Figure 2-6. Target Options Dialog Box

Table 2-10. Reset Options

Option Description

Core reset Resets the core when the debugger executes a reset.

System reset Resets the peripherals when the debugger executes a reset.



On Emulator Exit

This target option controls processor behavior when VisualDSP++ relin-quishes DSP control (for example, when exiting VisualDSP++). The option is described in Table 2-11.

Other Options

Table 2-12 describes other available target options.

Table 2-11. On Emulator Exit Target Options

Option Description

On Emulator Exit Determines the state the DSP is left in when the emulator relinquishes control of the DSP. Reset DSP and Run causes the DSP to reset and begin execution from its reset vector location.Run from current PC causes the DSP to begin running from its current location. Stall the DSP resets the DSP and then writes a JUMP 0 to the first loca-tion in internal memory so the DSP is stuck in a tight loop after exiting.

Table 2-12. Miscellaneous Target Options

Option Description

Reset before loading exe-cutable

Resets registers before loading a DSP executable. Clear this option when DSP registers must not change to their reset values when a file load occurs.

Verify all writes to target memory

Validates all memory writes to the DSP. After each write, a read is performed and the values are checked for a matching condition.Enable this option during initial program development to locate and fix initial build problems (such as attempting to load data into non-existent memory). Clear this option to increase performance while loading executable files, since VisualDSP++ does not perform the extra reads that are required to verify each write.


Using EZ-KIT Lite

Restricted Software Breakpoints

The EZ-KIT Lite development system restricts breakpoint placement when certain conditions are met. That is, under some conditions, breakpoints can-not be placed effectively. Such conditions depend on bus architecture, pipeline depth, and ordering of the EZ-KIT Lite and its target processor.

Reset cycle counters on run

Resets the cycle count registers to zero before a Run command is issued. Select this option to count the number of cycles executed between breakpoints in a program.

Auto configure SDRAM bank 0

VisualDSP++ will auto-configure the necessary registers to commu-nicate with the SDRAM bank 0 memory included on the EZ-KIT Lite evaluation board.Select this option to cause VisualDSP++ to configure bank 0 when it is accessed through VisualDSP++ (for example, when viewing memory windows or loading a program). Clear this option if you want to manually configure memory.

Use M3 register for con-text switching

Allows VisualDSP++ to use the M3 register for context switches. This leaves M3 unavailable for user code because it will be cor-rupted.Clear this option to specify that the M3 register and VisualDSP++ use the address pointed to by the Stack Pointer register.

Table 2-12. Miscellaneous Target Options (Cont’d)

Option Description




3 EZ-KIT LITE HARDWARE REFERENCE

This chapter describes the hardware design of the ADSP-BF535 EZ-KIT
Lite board. The following topics are covered.
• “System Architecture” on page 3-2

Describes the configuration of the ADSP-BF535 (formerly ADSP-21535) processor and explains how the board components interface with the processor.

• “Jumper and DIP Switch Settings” on page 3-5

Shows the location and describes the function of the configuration jumpers and DIP switches.

• “LEDs and Push Buttons” on page 3-9

Shows the location and describes the function of the LEDs and push buttons.

• “Connectors” on page 3-12

Shows the location and gives the part number for all of the con-nectors on the board. Also, the manufacturer and part number information is given for the mating parts.

• “Specifications” on page 3-15

Gives the requirements for powering the board.


System Architecture

System ArchitectureThis section describes the processor’s configuration on the EZ-KIT Lite board.

The EZ-KIT Lite has been designed to demonstrate the capabilities of the ADSP-BF535 Blackfin processor. The processor has a default core voltage of 1.5V. Refer to “Power Management” on page 2-7 for more information about changing the core voltage without halting the processor. The volt-age of the processor’s peripheral interface is 3.3V.

A 20 MHz oscillator supplies the input clock to the processor. The speed at which the core and peripherals operate is determined by the configura-tion of the multiplier select switch (SW2) at reset. (See “DSP PLL Setup

Figure 3-1. System Architecture

ADSP-BF535processor

(U1)

SPORT0Connector

AD1885Codec(U7)

Stereo LINEIN/MIC and

LINEOUTConnectors

SRAM

US

B C

onne

ctor

EZ U

SB F

X

JTAG Header

ExpansionConnectors(P1, P2, P3)

PowerRegulation

LEDs, PBsand Clock

Logic

External Bus InterfaceUnit

PF15:0SPORT0

SPORT1

JTAG

Por

t

VDD_INT

VDD_EXT

5V

+7.5

VC

onne

ctor

A5V 3.3V

3.3V

20MHzOscillator CLK_IN

UART1:0Timer2:0

SPI 1:0

USB

4M X 32bitSDRAM(U5, U6)

PowerManagement

32.768KHzCrystal RTC

544KB Flash(U4)


EZ-KIT Lite Hardware Reference

Switch (SW2)” on page 3-7.) By default, the processor core runs at 300 MHz and the peripheral interface runs at 120 MHz. A 32.768 kHz crystal supplies the Real Time Clock (RTC) inputs of the processor.

The EZ-KIT Lite board can be configured to boot in all of the possible ADSP-BF535 boot modes. For information about configuring the boot mode, see “Boot Mode Select Switch (SW1)” on page 3-7.

External Bus InterfaceThe External Bus Interface Unit (EBIU) is connected to 4M x 32 bits of SDRAM (16 MB). This memory is connected to the synchronous memory select 0 (~SMS0) pin. Refer to “Using SDRAM Interface” on page 2-4 for information about configuring the SDRAM.

The EBIU is also connected to 272K x 16 bits of Flash memory. This memory is connected to the asynchronous memory select (~AMS0) pin. The processor can use this memory for both booting and storing information during normal operation. Refer to “Using Flash Memory” on page 2-5 for information about using the Flash memory.

All of the address, data, and control signals are available externally via the extender connectors (P3-1). The pin-out of these connectors can be found in “Schematics” on page B-1.

SPORT0 Audio InterfaceSPORT0 is connected to the AD1885 SoundMAX codec (U7). Two 3.5mm stereo jacks (P5, P6) allow audio to be input and output. You can supply an audio input to the Codec Microphone Input Channel (MIC1) or to the stereo LINE_IN input channel. The jumper settings of JP1 determine the codec channel driven by the input jack (P5). For information about con-figuring JP1, see “Audio Input Select Jumper (JP1)” on page 3-5.


System Architecture

SPORT0 is also routed to an off-board connector (P9). When using the off-board connector, the codec must be held in reset, so that it does not drive any of the SPORT0 signals. The codec can be held in reset by driving PF15 low or by setting up JP2 to always hold the codec in reset (see “Audio Codec Disable Jumper (JP2)” on page 3-6). PF15 must be pulled HI (1) for the codec to function.

# TCLK0 and RCLK0 pins are shorted together using R114 and R118.

Expansion InterfaceThe expansion interface consists of the footprints for three connectors. Table 3-1 shows the interfaces each connector provides. For the exact pin-out of these connectors, refer to “Schematics” in Appendix B, Sche-matics. Analog Devices does not populate these connectors or provide any additional support for this interface. The mechanical locations of these connectors can be found in “Mechanical Dimensions” on page 3-17.

Limits to the current and to the interface speed must be taken into consid-eration if you use this interface. The maximum current limit is dependent on the capabilities of the regulator used. Additional circuitry can also add extra loading to signals, decreasing their maximum effective speed.

# Analog Devices does not support and is not responsible for the effects of additional circuitry.

Table 3-1. Connector Interfaces

Connector Interfaces

P1 5V, GND, Address, Data

P2 3.3V, GND, EBUI control signals, PF15-0, SPI1-0, SPORT1, UART1-0, TMR2-0, NMI

P3 1.5V, GND, Reset, USB, CLKOUT, SLEEP



JTAG Emulation PortThe JTAG emulation port allows an emulator to access the processor’s internal and external memory through a 6-pin interface. The JTAG emu-lation port of the DSP is also connected to the USB debugging interface (Note that this is not the processor’s USB interface). When an emulator is connected to the board at P8, the USB debugging interface is disabled. See “JTAG (P8)” on page 3-14 for more information about the JTAG connector.

To learn more about available emulators, contact Analog Devices (see “Product Information”).

Jumper and DIP Switch SettingsThis section describes the function of all the jumpers and DIP switches. The following figure (Figure 3-2 on page 3-6) shows the location of all the jumpers and DIP switches.

Audio Input Select Jumper (JP1)The audio input jack (P5) can be connected to the MIC1 or the LINEIN input channels of the AD1885 codec (U7). When the JP1 jumpers con-nect pins 1 and 3 and pins 2 and 4, P3 connects to the mono MIC1 channel. When the jumpers connect pins 3 and 5 and pins 4 and 6, P5 connects to the stereo LINE_IN channel of the AD1885 codec. These jumper settings are illustrated in Figure 3-2 on page 3-6. (The words MIC and LINE are on the board as a reference)


Jumper and DIP Switch Settings

Audio Codec Disable Jumper (JP2)Placing a jumper between pins 1 and 2 of JP2 holds the AD1885 in reset, preventing it from driving signals to the serial port. When a jumper is between pins 2 and 3 of JP2, the AD1885 is held in reset until PF15 is set to an output and is asserted. These positions are labeled on the board as DIS and ENA 1885.

Figure 3-2. Jumper Locations

Table 3-2. Audio Input Jumper Settings (JP1)

Stereo LINE_IN (DEFAULT) Mono MIC1

MIC

JP1 LIN

E

21

6 5

MIC

JP1 LIN

E

21

6 5



Boot Mode Select Switch (SW1)The boot mode select switch determines how the processor boots. Table 3-3 shows the switch settings for the boot modes.

! SPI ROM is not available on the EZ-KIT Lite.

DSP PLL Setup Switch (SW2)The processor’s Phase Lock Loop (PLL) multiplies the 20 MHz input clock by a multiplication factor to set the core clock speed of the DSP. Internal to the processor the Programmable Flag pins, PF9-0, are multi-plexed with the PLL setup signals, SSEL6-0, DF, and MSEL1-0.

During reset, the function of the pins is to setup the PLL. At this time, the signals are attached to the SW2 switch and determine the core and external clock speeds of the processor. The SW2 switch drives the processor pins during reset and, for approximately 120mS, after reset. Once this time has elapsed, the PFs are no longer connected to the SW2 but are connected to the general-purpose IO (LEDs, push buttons) on the board. This is done with an external 2-to-1 multiplexer and is provided for flexibility when using the EZ-KIT Lite.

Table 3-3. Boot Mode Select Switch

BMODE0Pin 1

BMODE1Pin 2

BMODE2Pin 3

Description

On On On Execute from 16 bit external memory (no boot).

Off1

1 Default settings

On1 On1 Boot from 8-bit EPROM1

On Off On Boot from SPI0 ROM (8-bit addresses)

Off Off On Boot from SPI0 ROM (16-bit addresses)

– – Off All others reserved


Jumper and DIP Switch Settings

The following table shows the switch position that corresponds to a pro-cessor pin.

Figure 3-3 shows the default setting for SW2. This will produce a 300 MHz core clock speed and a 120 MHz peripheral interface speed. For more information about setting up the multiplication factors, refer to the Man-aging DSP Clocks section of the ADSP-BF535 Processor Hardware Reference.

! A switch setting of ON supplies a logic low (0) on the corresponding processor pin.

Table 3-4. PLL Setup Switch (SW2) Functions

DSP Pin Switch Position DSP Pin Switch Position

MSEL0 1 MSEL6 7

MSEL1 2 DF 8

MSEL2 3 SSEL0 9

MSEL3 4 SSEL1 10

MSEL4 5 None 11

MSEL5 6 Bypass 12

Figure 3-3. Default PLL Setup Switch Settings (SW2)

1 2 3 4 5 6 7 8 9 10 11 12

ON



LEDs and Push ButtonsThis section describes the functionality of the LEDs and push buttons. Figure 3-4 shows the locations of the LEDs and push buttons.

Programmable Flag LEDs (LED1, LED2, LED3, LED4)Four LEDs are connected to four of the processor’s Programmable Flag (PF) pins, PF3-0. These LEDs are active HIGH and are lit by an output of “1” from the processor. Refer to “Using Programmable Flag Pins” on page 2-6 for more information about using of the PFs when programming the processor.

Figure 3-4. LED and Push Button Locations


LEDs and Push Buttons

USB Monitor LED (LED5)The USB Monitor LED (LED5) indicates that USB communication has been initialized successfully and you may connect to the processor using a VisualDSP++ EZ-KIT Lite session. This should take approximately 15 seconds. If the LED does not light, try cycling power on the board and/or reinstalling the USB driver (see “Installing EZ-KIT Lite USB Driver” on page 1-7).

Power LED (LED6)When LED6 is lit (green), it indicates that power is being properly supplied to the board.

Reset LEDs (LED7, LED8)When LED8 is lit, it indicates that master reset for all the major ICs is active. When LED7 is lit, the USB interface chip (U11) is being reset. The USB chips only reset on power-up, or if USB communication has not been initialized.

Table 3-5. Programmable Flag LEDs

LED Reference Designator DSP Programmable Flag Pin

LED4 PF0

LED1 PF1

LED2 PF2

LED3 PF3



Non-Maskable Interrupt Push Button (SW3)The SW3 button is connected to the Non-maskable Interrupt (NMI) pin of the processor. When pressed, the processor vectors to the NMI interrupt vector.

Programmable Flag Push Buttons (SW4, SW5, SW6, SW7)

Four push buttons are provided for general-purpose user input. SW7-4 connect to the processor’s Programmable Flag (PF) pins, PF7-4. The push buttons are active HIGH and, when pressed, send a High (1) to the proces-sor. Refer to “Using Programmable Flag Pins” on page 2-6 for more information about the use of the PFs when programming the DSP. Table 3-6 shows the PF signal and the switch it is connected to.

Reset Push Button (SW8)The RESET push button resets all of the ICs on the board. This reset does not affect the USB interface chip (U11) unless communication has not been initialized with a PC. After USB communication has been initialized, the only way to reset the USB is by powering down the board.

Table 3-6. Programmable Flag Switches

Push Button Reference Designator DSP Programmable Flag Pin

SW4 PF4

SW5 PF5

SW6 PF6

SW7 PF7


Connectors

ConnectorsThis section describes the connector functionality and provides informa-tion about mating connectors. The locations of the connectors are shown in Figure 3-5 on page 3-10.

Expansion Interface (P1, P2, P3)Three board-to-board connector footprints provide signals for most of the DSP peripheral interfaces. Analog Devices does not populate these con-nectors or provide any additional support for this interface. For more information on the expansion interface, see “Expansion Interface” on page 3-4. Contact Samtec for the availability and pricing of the connectors.

Figure 3-5. Connector Locations



FlashLINK (P4)The FlashLINK connector allows you to configure and program the STMicroelectronics DSM2150 flash/PLD chip. See “Using Flash Mem-ory” on page 2-5 for more information about using the FlashLINK connector.

Audio (P5, P6)There are two 3.5 mm stereo audio jacks: one input and one output.

Part Description Manufacturer Part Number

90 Position 0.05" Spacing (P1, P2, P3)

Samtec SFM-145-01-S-D

Mating Connector

90 Position 0.05" Spacing (Through Hole)

Samtec TFM-145-x1 Series

90 Position 0.05" Spacing (Sur-face Mount)

Samtec TFM-145-x2 Series

90 Position 0.05" Spacing (Low Cost)

Samtec TFC-145 Series


Right-angle 7X2 Shrouded 0.1 Spacing

TYCO 2-767004-2

Mating Assembly

FlashLINK JTAG Programmer ST Micro L-101B


3.5 mm stereo jack (P5, P6) Shogyo SJ-0359AM-5


Connectors

USB (P7)The USB connector is a standard Type B USB receptacle. This connector is used to debug the processor and is not connected to the processor’s USB interface.

JTAG (P8)The JTAG header is the connecting point for a JTAG in-circuit emulator pod. When an emulator is connected to the JTAG header, the USB debug interface is disabled.

! Pin 3 is missing to provide keying. Pin 3 in the mating connector should have a plug.

! When using an emulator with the EZ-KIT Lite board, follow the connection instructions provided with the emulator.

Mating Cable

3.5 mm stereo plug to 3.5 mm stereo cable

Radio Shack 42-2387A


Type B USB receptacle (P7) Mill-Max 897-30-004-90-000

Digi-Key ED90003-ND

Mating Connector

USB cable (provided with kit) Assmann AK672-5

Digi-Key AK672-5ND




SPORT0 (P9)SPORT0 is connected to a 20-pin connector. The pin-out for this connector can be found in “Schematics” on page B-1. Contact AMP for pricing and availability on these connectors.

Power Connector (P10)The power connector provides all of the power necessary to operate the EZ-KIT Lite board.

SpecificationsThis section provides the requirements for powering the board and the mechanical dimensions of the board.


20 position AMPMODU system 50 receptacle (P9)

AMP 104069-1

Mating Connectors

20 position AMPMODU ribbon cable connector

AMP 111196-4


2.5 mm Power Jack (P10) Switchcraft RAPC712

Digi-key SC1152-ND

Mating Power Supply (shipped with EZ-KIT Lite)

7.5V Power Supply GlobTek TR9CC2000LCP-Y


Specifications

Power Supply The power connector supplies DC power to the EZ-KIT Lite board. Table 3-7 shows the power connector pin-out.

Board Current MeasurementsThe ADSP-BF535 EZ-KIT Lite board provides eight zero-ohm resistors that may be removed to measure current draw. Table 3-8 shows the resis-tor number, the voltage plane, and a description of each component on the plane.

Table 3-7. Power Connectors

Terminal Connection

Center pin +7.5 VDC@2amps

Outer Ring GND

Table 3-8. Current Measurement Resistors

Resistor Voltage Plane Description

R2 VDD_RTC DSP Real Time Clock Supply

R3 VDD_EXT DSP External Interface Supply

R6 VDD_INT DSP Internal Interface Supply

R7 VDD_PCIEXT DSP PCI Interface Supply

R8 VDD_PLL DSP Phase Lock Loop Supply

R110 5V 5V Supply

R111 3V 3V supply to all non DSP-related components

R113 3V_DSP 3V to DSP-related components



Mechanical DimensionsFigure 3-6 shows the location of the mounting holes as well as the PIN1 of each of the expansion connectors.

Figure 3-6. Mechanical Drawing

P1

P3

P2

0.000

0.00

0

0.250

0.25

0

1.125

3.875

4.7505.000

0.62

5

1.300

3.750

2.500

3.25

0

3.60

0

6.37

5

6.75

0

1.400

6.20

0

7.00

0


Specifications


A BILL OF MATERIALS

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2 3 74LVC14A SOIC14HEX-INVER-SCHMITT-TRIGGER

U9-10, U19 TI 74LVC14AD

3 1 IDT74FCT3244APY SSOP20 3.3V-OCTAL-BUFFER

U24 IDT IDT74FCT3244APY

4 1 24.576MHZ SMT OSC005 CRYSTAL

Y2 EPSON MA505 24.576M-C2

5 1 CY7C64603-128 PQFP128USB-TX/RX MICROCONTROL-LER

U11 CYPRESS CY7C64603-128NC

6 1 MMBT4401 SOT-23NPN TRANSISTOR 200MA

Q1 FAIRCHILD MMBT4401

7 1 74LVC00AD SOIC14 U13 PHILIPS 74LVC00AD

8 1 24LC00-SN SOIC8128 BIT SERIAL EEPROM

U25 MICROCHIP 24LC00-SN

9 1 ADP3331ART SOT23-6 ADJ 200MA REGULATOR

VR3 ANALOG DEVICES

ADP3331ART

10 3 BSS123 SOT23DNMOS FET

M1-3 FAIRCHILD BSS123

11 1 CY7C1019BV33-15VC SOJ32128K X 8 SRAM

U12 CYPRESS CY7C1019BV33-12VC

12 1 SN74AHC1G02 SOT23-5SINGLE-2 INPUT-NOR

U16 TI SN74AHC1G02DBVR

ADSP-BF535 EZ-KIT Lite Evaluation System Manual A-1

13 1 SN74LV164A SOIC148-BIT-PARALLEL-SERIAL

U17 TI SN74LV164AD

14 1 CY7C4201V-15AC TQFP3264-BYTE-FIFO

U18 CYPRESS CY7C4201V-15AC

15 1 12.0MHZ THR OSC006 CRYSTAL

Y3 DIG01 300-6027-ND

16 2 MT48LC4M16 TSOP544MX16-SDRAM-133MHZ

U5-6 MICRON MT48LC4M16A2TG-75

17 1 32.768kHz TH OSC007CRYSTAL

Y1 ECPLITEK EC38T

18 1 SN74AHC1G00 SOT23-5SINGLE-2-INPUT-NAND

U26 TI SN74AHC1G00DBVR

19 1 21535 BRD DSM2150F5V U4""BLKFIN160.OBJ SUM 876F5F1

U4 ST MICRO DSM2150F5V

20 2 1000pF 50V 5% 1206 CERM

C25-26 AVX 12065A102JAT2A

21 2 0.1uF 50V 10% 1206 CERM

C8-9 PHILIPS 12062R104K9BB2

22 1 ADM708SAR SOIC8VOLTAGE-SUPERVISOR

U23 ANALOG DEVICES

ADM708SAR

23 1 AD1885JST LQFP48 AC97 STEREO CODEC

U7 ANALOG DEVICES

AD1885JST

24 2 ADP3338AKC-33 SOT-2233.3V-1.0AMP REGULATOR

VR1-2 ANALOG DEVICES

ADP3338AKC-3.3

25 1 ADP3339AKC-5 SOT-223 5V-1.5A REGULATOR

VR4 ANALOG DEVICES

ADP3339AKC-5-REEL

26 1 ADP3088 MSOP8500MA-BUCK-REGULATOR

VR5 ANALOG DEVICES

ADP3088ARM-REEL

27 1 ADSP-21535PKB-300 PBGA260308KBYTES-BLACKFIN

U1 ANALOG DEVICES

ADSP-21535PKB-300

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A-2 ADSP-BF535 EZ-KIT Lite Evaluation System Manual

Bill Of Materials

28 5 RUBBER FEET BLACK MH1-5 MOUSER 517-SJ-5018BK

29 1 PWR 2.5MM_JACK CON005RA

P10 SWITCH-CRAFT

SC1152-ND12

30 1 USB 4PIN CON009USB

P7 MILL-MAX 897-30-004-90-000000

31 1 .05 10X2 CON014RA

P9 AMP 104069-1

32 6 SPST-MOMENTARY SWT0136MM

SW3-8 PANASONIC EVQ-PAD04M

33 1 DIP12 SWT014 SW2 DIGI-KEY CKN3063-ND

34 1 DIP3 SWT015 SW1 DIGI-KEY CKN3055-ND

35 1 IDC 7X2 IDC7X2SRDRARIGHT ANGLE SHROUDED

P4 MOLEX 70247-1401

36 23 0.00 1/8W 5% 1206 R2-3,R6-12, R21,R63-64,R77,R97,R111-118, R127

YAGEO 0.0ECT-ND

37 2 220uF 10V 20% EELEC

CT7-8 SPRAGUE 293D227X9010E2T

38 5 AMBER-SMT LED001 GULL-WING

LED1-5 PANASONIC LN1461C-TR

39 2 22pF 50V 5% 805CERM

C5-C6 AVX 08055A220JAT

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40 79 0.01uF 100V 10% 805CERM

C19,C30-92,C94,C96-97,C99-109,C116

AVX 08051C103KAT2A

41 1 0.22uF 25V 10% 805 CERM

C114 AVX 08053C224FAT

42 5 0.1uF 50V 10% 805CERM

C3, C24, C27-29

AVX 08055C104KAT

43 4 10uF 16V 10% C TANT

CT15-18 SPRAGUE 293D106X9025C2T

44 44 10K 100MW 5% 805 R1,R13-19,R31-32,R37,R44-45,R47-54,R57,R59-61,R66, R68,R78-81

AVX CR21-103J-T

45 44 10K 100MW 5% 805 R83-84,R87-88,R90-93,R105,R120-122,R125

DALE CRCW0805-103JRT1

46 4 33 100MW 5% 805 R4-5, R46, R119

AVX CR21-330JTR

47 5 4.7K 100MW 5% 805 R55-56, R58, R62, R107

AVX CR21-4701F-T

48 1 1M 100MW 5% 805 R41 AVX CR21-1004F-T

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Bill Of Materials

49 1 1.5K 100MW 5% 805

R43 AVX CR21-1501F-T

50 1 22uF 16V 10% D TANT

CT1 DIG01 PCT3226CT-ND

51 3 2.21K 1/8W 1% 1206 R30, R35, R40

AVX CR32-2211F-T

52 4 10uF 16V 10% B TANT

CT4, CT19-21

AVX TAJB106K016R

53 1 1A HSM160J DO-214AASCHOTTKY

D4 MICRO-SEMI HSM160J

54 5 100 100MW 5% 805 R67, R82, R85-86, R89

AVX CR21-101J-T

55 1 1000 100MHZ 1.5A FER0020.06 CHOKE

FER9 MURATA PLM250S40T1

56 3 2A S2A_RECT DO-214AA SILICON RECTIFIER

D1-3 GENER-ALSEMI

S2A

57 8 600 100MHZ 500MA 12060.70 BEAD

FER1-8 DIGIKEY 240-1019-1-ND

58 1 0.047UF 16V 10% 1206 C10 AVX 12065C473JATME

59 2 270PF 50V 10% 805 C11, C13 KEMET C1206C271J5GAC210

60 6 1UF 16V 10% 805X7R

C4, C22, C110-113

MURATA GRM40X7R105K016AL

61 6 470PF 100V 10% 1206CERM

C12, C14-16, C20-21

AVX 12061A471JAT2A

62 2 30PF 100V 5% 1206 C17-18 AVX 12061A300JAT2A

63 3 10UF 25V +80-20% 1210Y5V

C93, C95, C98

MURATA GRM235Y.5V106Z025

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64 1 0.47UF 20V 10% A TANT

CT14 KEMET T491A474K025AS

65 1 16K 1/8W5% 1206 R65 DALE CRCW1206-163JRT1

66 1 53.6K 1/10W 1% 805 R95 PHILIPS 9C08052A5362FKRT/R

67 1 165K 1/10W 1% 805 R102 PHILIPS 9C08052A1653FKRT/R




71 1 10UH 47+/-20 IND001 L1 TDK SLF7045T-100M1R1-2

72 1 243.0K 1/10W 1% 805 R106 PHILIPS 9C08052A2433FKRT/R

73 1 1.00M 1/4W 1% 1210 R108 PANASONICECG

ERJ-14NF1004U

74 3 10K 31MW 5% RNET8 RN6-8 CTS 746X101103J

75 2 39PF 50V 5% 805NPO

C1-C2 PANASONIC ECJ-2VC1H390J

76 5 10K 100MW 2% RNET16BUSSED

RN1-5 CTS 767-161-103G

77 1 1K 1/8W 5% 1206 R38 AVX CR32-102J-T

78 6 10K 1/8W 5% 1206 R23-27, R33

DALE CRCW1206-1002FRT1

79 1 100K 1/8W 5% 1206 R109 DALE CR1206-1003FTR1

80 1 20.0K 1/8W 1% 1206 R104 DALE CRCW1206-2002FRT1

81 3 22 1/8W 5% 1206 R36, R39, R126

DALE CR1206-22R0JTR

82 7 270 1/8W 5% 1206 R69-73, R75-76

AVX CR32-271J-T

83 4 4.7K 1/8W 5% 1206 R20, R22, R28-29

AVX CR32-472J-T

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Bill Of Materials

84 1 680 1/8W 5% 1206 R74 AVX CR32-681J-T

85 1 20MHZ 1/2 OSC001 U2 ECLIPTEK EC1100HS-20.000MHZ

86 2 RED-SMT LED001 GULL-WING

LED7-8 PANASONIC LN1261C

87 1 GREEN-SMT LED001 GULL-WING

LED6 PANASONIC LN1361C

88 5 1uF 25V 20% ATANT -55+125

CT9-13 PANASONIC ECS-T1EY105R

89 5 QS3257Q QSOP16 QUICKSWITCH-257

U14-15, U20-22

ANALOG DEVICES

ADG774ABRQ

90 1 IDC 3X1 IDC3X1 JP2 BERG 54101-T08-03

91 1 IDC 3X2 IDC3X2 JP1 BERG 54102-T08-03

92 1 IDC 7X2 IDC7X2 P8 BERG 54102-T08-07

93 3 IDC 2PIN_JUMPER0.1

SJ1-3 MOLEX 15-38-1024

94 1 2.5A RESETABLE FUS001 F1 RAYCHEM CORP.

SMD250-2

95 2 3.5MM STEREO_JACK CON001 P5-6 A/D ELEC-TONICS

ST-323-5

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A0162-2000 1.6

4

3

2

1

A B C D

20 Cotton Road

Nashua, NH 03063

A B C D

4

3

2

1

PH: 1-800-ANALOGD

C

Approvals Date Title

Size Board No.

Date Sheet of

Rev

Engineering

Checked

Drawn

DEVICESANALOG

ADSP-BF535 EZ-KIT LITE

ADSP-BF535 EZ-KIT LITE - TITLE

1 123-12-2003_15:48

3.3V

COM

R10

R11

R12

R13

R14

R15R2

R3

R4

R5

R6

R7

R8 R9

R1

XXMHZ

COM

R10

R11

R12

R13

R14

R15R2

R3

R4

R5

R6

R7

R8 R9

R1

OE OUT

A0162-2000 1.6

4

3

2

1

A B C D

20 Cotton Road

Nashua, NH 03063

A B C D

4

3

2

1

PH: 1-800-ANALOGD

C


Size Board No.

Date Sheet of

Rev

Engineering

Checked

Drawn

DEVICESANALOG

R1

R2

R3

R4

R5

R6

R7

R8

COM1

COM2

R1

R2

R3

R4

R5

R6

R7

R8

COM1

COM2

R1

R2

R3

R4

R5

R6

R7

R8

COM1

COM2SWE

SCAS

SRAS

SMS2

SCK1

MISO1

MOSI1

SCK0

MISO0

PF15

PF14

PF13

PF12

PF11

PF10

SSEL1/PF9

SSEL0/PF8

DF/PF7

MSEL6/PF6

MSEL5/PF5

MSEL4/PF4

MSEL3/PF3

MSEL2/PF2

MSEL1/PF1

AWE

ARE

AOE

ARDY

AMS0

AMS2

~ABE2/SDQM2

TMR2

TMR1

TMR0

TX1

RX1

TX0

RX0

DT1

TFS1

TSCLK1

DR1

RFS1

RSCLK1

DT0

TFS0

TSCLK0

DR0

RFS0

RSCLK0

MSEL0/PF0

SA10

SCKE

SCLK0

~ABE0/SDQM0

~ABE3/SDQM3

~ABE1/SDQM1

AMS3

AMS1

SMS0

SMS3

SMS1

CLKOUT/SCLK1

MOSI0

D31

D30

D29

D28

D27

D26

D25

D24

D23

D22

D21

D20

D19

D18

D16

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

NMI

BMODE2

BMODE1

BMODE0

VSS_PLL

VDD_PLL

VDD_RTC

XTALO

XTALI

A25

A24

A23

A22

A21

A20

A19

A18

A9

A8

A7

A6

A5

A4

A3

A2

CLKIN1

BYPASS

A17

A12

A16

A11

RESET

A13

A14

VSS_RTC

A10

D17

EMU

TRST

TMS

TDO

TCK

TDI

SLEEP

A15

DMNS

DPLS

PCI_AD0

PCI_AD1

PCI_AD10

PCI_AD11

PCI_AD12

PCI_AD13

PCI_AD14

PCI_AD15

PCI_AD16

PCI_AD17

PCI_AD18

PCI_AD19

PCI_AD2

PCI_AD20

PCI_AD21

PCI_AD22

PCI_AD23

PCI_AD24

PCI_AD25

PCI_AD26

PCI_AD27

PCI_AD28

PCI_AD29

PCI_AD3

PCI_AD30

PCI_AD31

PCI_AD4

PCI_AD5

PCI_AD6

PCI_AD7

PCI_AD8

PCI_AD9

PCI_CLK

PCI_PAR

SUSPEND

TXDMNS

TXDPLS

USB_CLK

XVER_DATA

PCI_CBE0

PCI_CBE1

PCI_CBE2

PCI_CBE3

PCI_FRAME

PCI_GNT

PCI_IDSEL

PCI_INTA

PCI_INTB

PCI_INTC

PCI_INTD

PCI_IRDY

PCI_LOCK

PCI_PERR

PCI_REQ

PCI_RST

PCI_SERR

PCI_STOP

PCI_TRDY

TXEN

PCI_DEVSEL

0 OHM RESISTORS TO MEASURE DSP CURRENT

FOR RTC

2 123-25-2003_9:50

D08

C09

E17

E18

K18

H16

L18

J17

M18

K17

J16

K16

N18

P18

G16

L17

L16

R18

T18

M17

M16

N17

P17

P15

N16

F17

R17

P16

F18

G18

G17

H18

J18

H17

D14

C15

A11

G10

B10

G07

A09

F16

F15

E16

D17

C17

C18

B18

C14

B15

A15

D13

E15

A16

D15

D16

D18

B16

A17

B17

C10

C16

U1

PBGA260ADSP-BF535PKB-300

V09

T07

R07

U07

V08

V07

T06

U06

R06

V06

U05

T05

R05

V05

U04

T04

T03

U03

R04

V03

V02

T02

U02

U01

P03

R02

N03

P02

T01

M03

N02

B11

B13

A14

B14

A10

G09

U10

T10

R10

D02

F03

C01

E03

C02

B02

D03

C03

C05

A04

B05

A05

C06

D06

B06

A06

D09

C12

A02

A01

B03

B04

B09

C04

D04

V11

D05

V04

A13

B12

A12

D11

D10

C11

D12

A03

U1


J03

L03

L02

N01

R16

U18

T17

U17

T16

T13

V13

U12

R12

T12

V12

U11

T11

R11

T09

R09

U09

V10

T08

R08

G01

F01

E01

R01

F02

H03

G03

D07

C07

B07

C08

B08

A08

A07

V17

R15

T15

U15

V16

U14

R14

T14

V15

V14

U13

R13

U08

M01

L01

K01

E02

H07

B01

G02

D01

M02

K03

P01

H01

U16

U1


A2

A20

A15

A25

A24

A23

A22

A21

A19

A18

A17

A16

A14

A13

A12

A11

A10

A9

A8

A7

A6

A5

A4

A3

A[25:2]

PCI_TRDY

1

2

3

4

6

7

8

9

5

10

RN6

RNET810K

1

2

3

4

6

7

8

9

5

10

RN7

RNET810K

1

2

3

4

6

7

8

9

5

10

RN8

RNET810K

C2

80539PF

C1

80539PF

0.001206

R77

ADSP-BF535 EZ-KIT LITE - DSP

1 5

20MHZOSC001

U280533R4

3V_DSP3V_DSP

PCI_AD31

PCI_AD28

PCI_AD25

PCI_AD26

PCI_AD11

PCI_AD30

PCI_AD29

PCI_AD15

PCI_AD14

PCI_AD20

PCI_AD24

PCI_AD23

PCI_AD22

PCI_AD21

PCI_AD19

PCI_AD18

PCI_AD17

PCI_AD16

PCI_AD12

PCI_AD10

PCI_AD8

PCI_AD2

PCI_AD6

PCI_AD7

PCI_AD8

PCI_AD9

PCI_AD10

PCI_AD11

PCI_AD12

PCI_AD13

PCI_AD14

PCI_AD15

PCI_AD31

PCI_AD30

PCI_AD29

PCI_AD27

PCI_AD28

PCI_AD26

PCI_AD25

PCI_AD24

16

10

11

12

13

14

152

3

4

5

6

7

8 9

1

RN1

RNET1610K

PCI_AD0

USB_DMNS

R12

12060.00

PCI_GNT

PCI_DEVSEL

1206DNPR34

12060.00R7

D19

D0

D1

D2

D3

D4

D5

D6

D7

D8

D9

D10

D11

D12

D13

D14

D15

D16

D17

D18

D20

D21

D22

D23

D24

D25

D26

D27

D28

D29

D30

D31

D[31:0]

CLKIN TCK

USB_CLK

USB_CLK

XTALO

XTALI

CLKOUT

SCLK0

1.5V VDD_PLL

R80.001206

PWR_MGT_OUT VDD_INT

VDD_PLL

VDD_RTC

R533805

80533R119

Y1

OSC00732.768KHZ

R60.001206

12060.00R3

12060.00R2

R11

12060.00

R10

12060.00

USB_XVER_DATA

R9

12060.00XTALI XTALO

PCI_STOP

1

98

7

6

5

4

3

2 15

14

13

12

11

10

16

10KRNET16

RN2

PCI_LOCK

PCI_PERR

PCI_SERR

PCI_TRDY

PCI_IRDY

PCI_PAR

PCI_FRAME

PCI_INTD

PCI_INTC

PCI_INTB

PCI_INTAPCI_DEVSEL

PCI_GNT

PCI_CBE3

PCI_CBE2

PCI_CBE1

PCI_CBE0

PCI_RST

ARDY

3V_DSP

CLKIN

80510KR1

VDD_EXT

VDD_RTC

USB_DPLS

TRST

TMS

TDI

TDO

NMI

BMODE2

BMODE1

BMODE0

BYPASS

EMU

SLEEP

RESET

VDD_PCIEXT

USB_SUSPEND

USB_TXEN

USB_TXDMNS

USB_TXDLPLS

USB_DMNS

USB_DPLS

USB_XVER_DATA

PCI_FRAME

PCI_IRDY

PCI_STOP

PCI_PERR

PCI_PAR

PCI_SERR

PCI_RST

PCI_LOCK

PCI_INTA

PCI_INTB

PCI_INTC

PCI_INTD

PCI_CBE0

PCI_CBE1

PCI_CBE2

PCI_CBE3

PCI_CLK

PCI_IDSEL

R127

12060.00

PCI_CLK

PCI_IDSEL

PCI_AD1

PCI_AD2

PCI_AD3

PCI_AD4

PCI_AD5

PCI_AD16

PCI_AD17

PCI_AD18

PCI_AD19

PCI_AD20

PCI_AD21

PCI_AD22

PCI_AD23

RCLK0

RFS0

DR0

TCLK0

TFS0

DT0

RCLK1

RFS1

DR1

TCLK1

TFS1

DT1

SCKE

SA10

SMS3

SMS2

SMS1

SMS0

SWE

SCAS

SRAS

~ABE3/SDQM3

~ABE2/SDQM2

~ABE1/SDQM1

~ABE0/SDQM0

AMS3

AMS2

AMS1

AMS0

AWE

ARE

AOE

ARDY

TMR2

TMR1

TMR0

TX1

RX1

TX0

RX0

MOSI0

MISO0

SCK0

MOSI1

MISO1

SCK1

MS_PF[6:0]

MS_PF5

MS_PF1

MS_PF2

MS_PF3

MS_PF4

MS_PF6

MS_PF0

DF_PF7

SSEL0_PF8

SSEL1_PF9

PF10

PF11

PF12

PF13

PF14

PF15

PCI_AD27

PCI_AD13

PCI_AD6

PCI_AD5

PCI_AD7

PCI_AD9

PCI_AD4

PCI_AD3

PCI_AD1

PCI_AD0

3V_DSP

http://www.analog.com/Analog_Root/productPage/productHome/0%2C2121%2CADSP%252DBF535P%2C00.html



A0162-2000 1.6

4

3

2

1

A B C D

20 Cotton Road

Nashua, NH 03063

A B C D

4

3

2

1

PH: 1-800-ANALOGD

C


Size Board No.

Date Sheet of

Rev

Engineering

Checked

Drawn

DEVICESANALOG

3.3V

3.3V

A11

BA0

A2

A3

A4

A5

A6

A7

A8

A9

CKE

CLK

DQ0

DQ1

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9

DQMH

DQML

CAS CS

RAS

WE

BA1

A10

A0

A1

3.3V 3.3V

COM

R10

R11

R12

R13

R14

R15R2

R3

R4

R5

R6

R7

R8 R9

R1COM

R10

R11

R12

R13

R14

R15R2

R3

R4

R5

R6

R7

R8 R9

R1

A11

BA0

A2

A3

A4

A5

A6

A7

A8

A9

CKE

CLK

DQ0

DQ1

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9

DQMH

DQML

CAS CS

RAS

WE

BA1

A10

A0

A1

PE7

PE3/TDO

PE2/TDI

PE1/TCK

PE0/TMS

PB7

PB6

PB5

PB4

PB3

PB2

PB1

PB0CNTL1/~RD

CNTL0/~WR

PA7

PA6

PA5

PA4

PA3

PA2

PA1

PA0

PC7

PC6

PC5

PC4

PC3

PC0

CNTL2

PF7

PF6

PF4

PF5

PF3

PF2

PF1

PG7

PG6

PG5

PG4

PG3

PG2

PG1

PG0

AD15

AD14

AD13

AD12

AD11

AD10

AD9

AD8

AD7

AD6

AD5

AD4

AD3

AD2

AD1

AD0

PD3

PF0

PD1

PC2

PC1

RESET

PD2

PD0PE6

PE5/~TERR

PE4/TSTAT

4M X 16 4M X 16SDRAMSDRAM

512 KB MAIN FLASH32KB SECONDARY FLASH

PSD JTAG HEADER

1233-12-2003_15:48

78

74

73

72

71

68

67

66

65

64

63

62

6160

59

58

57

56

55

54

53

52

51

48

47

46

45

44

41

40

38

37

35

36

34

33

32

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

7

6

5

4

3

2

31

80

43

42

39

1

7977

76

75

U4

TQFP80DSM2150F5V-12T6

35

20

25

26

29

30

31

32

33

34

37

38

2

4

45

47

48

50

51

53

5

7

8

10

11

13

42

44

39

15

17 19

18

16

21

22

23

24

U5

TSOP54MT48LC4M16

AOE

3 4

74LVC14ASOIC14

U9

16

10

11

12

13

14

152

3

4

5

6

7

8 9

1

RN3

RNET1610K

16

10

11

12

13

14

152

3

4

5

6

7

8 9

1

RN4

RNET1610K

1

3

5

7

9

11

13

2

4

6

8

10

12

14

P4

IDC7X2SRDRA7X2

R19

80510K

AMS0

PC7

AWE

~ABE1/SDQM1

PD3

PD1

~ABE0/SDQM0

~ABE3/SDQM3

A20

A21

A19

A16

A17

A14

A13

A12

A11

A10

A9

A8

A7

A6

A5

A4

A3

A2

A15

A18

A[21:2]

A19

A18

A13

A11

A13

A19

A18

A10

A9

A8

A7

A6

A5

A4

A3

A2

A[19:2]

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

~ABE2/SDQM2

~ABE1/SDQM1

PD0

PB7

PB6

PB5

PB4

PB3

PB2

PB1

PB0

PA7

PA6

PA5

PA2

PA3

PA4

PB0

10K805

R18R17

80510K

1UF805

C4C3

8050.1UF

35

20

25

26

29

30

31

32

33

34

37

38

2

4

45

47

48

50

51

53

5

7

8

10

11

13

42

44

39

15

17 19

18

16

21

22

23

24

MT48LC4M16

U6

TSOP54

PD1

PE7

PE6

PE7

10K805

R13PA1

PA0

SCKE

SMS0

SCLK0

D[31:0]

D19

D20

D21

D22

D23

D24

D25

D26

D27

D28

D29

D30

D31D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0 D16

D17

D18

~ABE3/SDQM3

~ABE0/SDQM0

SRAS

SCAS

SWE

SA10

R14

80510K 10K

805

R15 R16

80510K

PE6

PA0

PA1

PA2

PA3

PA7

PA6

PA5

PA4PB4

PB5

PB6

PB7

PB3

PB2

PD0PB1

PC7

PD3

ADSP-BF535 EZ-KIT LITE - DSP MEMORY

D8

D9

D10

D11

D12

D13

D14

D7

D[15:0]D0

D1

D2

D3

D4

D5

D6

D15

SLEEP11

13

12 U13

74LVC00ADSOIC14

RESET

http://www.st.com/stonline/prodpres/memory/psd/html/psd4000.htm

COPPER

SHGND

SHGND

AGND

AGND

AGND

AGND

AGND

AGND

AGND

AGND

AGND AGND

AGND AGND

JUMPERSHORTING

JUMPERSHORTING

JUMPERSHORTING

XXMHZ

AGND

A0162-2000 1.6

4

3

2

1

A B C D

20 Cotton Road

Nashua, NH 03063

A B C D

4

3

2

1

PH: 1-800-ANALOGD

C


Size Board No.

Date Sheet of

Rev

Engineering

Checked

Drawn

DEVICESANALOG

AFILT1

AFILT2

AUX_L

AUX_R

AVDD1

AVDD2

AVDD3

AVSS1

AVSS2

AVSS3

BIT_CLK

CD_GND_REF

CD_L

CD_R

CX3D

FILT_L

FILT_R

HP_OUT_L

HP_OUT_R

JS0

JS1

LINE_IN_L

LINE_IN_R

LINE_OUT_L

LINE_OUT_R

MIC1

MIC2

MONO_OUT

PC_BEEP

PHONE_IN

RX3D

SDATA_IN

SDATA_OUT

SYNC

VDD1

VDD2

VIDEO_L

VIDEO_R

VREF

VREFOUT

VSS1

VSS2

XTAL_IN

XTL_OUT

ID0

ID1

RESET

Digital SignalsAnalog Signals

3.3VA5V

* DENOTES DEFAULT SETTING

2 & 4

JP1 SETTINGS

INPUT SOURCE

LINE INMIC IN

4 & 61 & 33 & 5

SJ2SJ1

LINE IN/MIC

HEAD PHONE OUT

POPULATE TO COMPLY WITH PC99

1 & 22 & 3

DISABLE AD1885NORMAL OPERATION

** Denotes Default Setting

JP2: 1885 DISABLE

AUDIO CODECAD1885

*

1243-21-2003_12:05

TCLK0

RCLK0

R1180.001206

12060.00R114

29

30

14

15

25

38

43

26

40

44

6

19

18

20

34

32

31

39

41

47

48

23

24

35

36

21

22

37

12

13

33

8

5

10

9

16

17

27

28

4

7

2

3

45

46

11

1

U7

LQFP48AD1885JST

C16

1206470PF

FER4

1206600

FER1

1206600

C14

1206470PF

FER3

1206600

C15

1206470PF

FER26001206

2

5

6

31

4

JP1

40AVC0805

805

D6D5

805

VC080540A

1

4

3

2

5

P5

CON001

12060.00

DNP

R112

ADSP-BF535 EZ-KIT LITE - AUDIO CODEC

2.21K1206

R30

24.576MHZOSC005

Y2

C6

80522PF

10K805

R32

PF15

R31

80510K

TP2

C1131UF805

C1140.22UF805

8051UFC112

C1101UF805

SJ2

DEFAULT=4 & 6

SJ1

DEFAULT=3 & 5

10K1206

R24R23

120610K

R26

120610K

DT0

RFS0

10K1206

R25

C13270PF805

DEFAULT=1 & 2

SJ31

3

2

IDC3X1

JP2

DR0

TP1

220UFE

CT8

CT7

E220UF

R21

12060.00

ALT_VAL=1K

R33

120610K

C12

1206470PF

C11270PF805

C10

12060.047UF

C9

12060.1UF

C8

12060.1UF

CT4

B10UF

DNP

0.01UF1206

C7

1

4

3

2

5

P6

CON001

4.7KR29

1206

R28

12064.7K

10K1206

R27

4.7K1206

R22

R20

12064.7K

TP3

8051UFC111

22PF805

C5

D7

805

VC080540A 40A

VC0805

805

D8

W1

http://products.analog.com/products/info.asp?product=AD1885

12

ON

3

A0162-2000 1.6

4

3

2

1

A B C D

20 Cotton Road

Nashua, NH 03063

A B C D

4

3

2

1

PH: 1-800-ANALOGD

C


Size Board No.

Date Sheet of

Rev

Engineering

Checked

Drawn

DEVICESANALOG

COM

R10

R11

R12

R13

R14

R15R2

R3

R4

R5

R6

R7

R8 R9

R1

3.3V

12

45

67

ON

38

910

1112

I0A

I0B

I0C

I0D

I1A

I1B

I1C

I1D

S

YA

YB

YC

YD

E

I0A

I0B

I0C

I0D

I1A

I1B

I1C

I1D

S

YA

YB

YC

YD

E

I0A

I0B

I0C

I0D

I1A

I1B

I1C

I1D

S

YA

YB

YC

YD

E

OFFOFF ONONON

OFFON

ONONON

ONONONON

OFFOFF

1 32 4ON5

ON6

ON7

SW1 SETTINGS: BOOT MODE SELECTION

EXECUTE 16-BIT EXTERNAL8-BITS ROM

SPI0 ROM (16-BIT ADDRESS)SPI0 ROM (8-BIT ADDRESS)

OFF-- ALL OTHERS RESERVED

BMODE0BMODE1BMODE2 BOOT MODE

8 9 10 11 12

SW2: CLOCK MULTIPLIER SELECT SWITCH

OFF

OFFOFF

*

OFF

DEFAULT SETTINGS:

DETAILED SETTING INFOMATIONREFER TO DSP HARDWARE REFERENCE FOR

Internal Clock - 15:1 - 300MHZ

ON

External Clock - 2.5:1 - 120MHZ

* = DEFAULT

1253-12-2003_15:48

12

13

14

10

11

6

5

3

24

7

9

15

1

U22

QSOP16QS3257Q

1

15

9

7

4 2

3

5

6

11

10

14

13

12

QS3257QQSOP16

U21

1

15

9

7

4 2

3

5

6

11

10

14

13

12

ADG774AQSOP16

U20

PF0

R122

80510K

R121

80510K

R120

80510K

16K1206

R65

SSEL1

DF

MS6

1

14

15

2

3

4

5

6

7

8

9

12

11

10

13

24

23

22

21

20

19

18

17

16

SW2

SWT014DIP12

56

74LVC14ASOIC14

U9

98

74LVC14ASOIC14

U9

MUL_SEL

MUL_SEL

C19

8050.01UF

BYPASS

SSEL1

SSEL0

DF

MS5

MS4

MS0

MS3

MS2

BMODE2

BMODE0

BMODE1

SSEL0_PF8

SSEL1_PF9

PF9

PF8

PF0

PF1

PF2

PF3

PF7

PF4

PF5

PF6

DF_PF7

MS_PF[0:6]

MS_PF5

MS_PF6

MS_PF4

MS_PF0

MS_PF1

MS_PF2

MS_PF3

SSEL1

SSEL0

DF

MS6

MS5

MS4

MS3

MS2

MS1

MS0

16

10

11

12

13

14

152

3

4

5

6

7

8 9

1

RN5

RNET1610K

MS1

MS6

DSP_RESET_1MUL_SEL

MUL_SEL

BYPASS

SSEL0

MS5

MS4

MS3

MS2

MS1

MS0

BMODE1

BMODE0

BMODE2

ADSP-BF535 EZ-KIT LITE - CONFIG

1

2

3

5

4

6

DIP3SWT015

SW1

PF1

PF3

PF2

10K805

R66

http://products.analog.com/products/info.asp?product=ADG774A



A0162-2000 1.6

4

3

2

1

A B C D

20 Cotton Road

Nashua, NH 03063

A B C D

4

3

2

1

PH: 1-800-ANALOGD

C


Size Board No.

Date Sheet of

Rev

Engineering

Checked

Drawn

DEVICESANALOG

3.3V

3.3V

3.3V3.3V

3.3V

3.3V

3.3V

3.3V

5V

PFI

RESETMR

PFO

RESET

1A1

1A2

1A3

1A4

2A2

2A3

2A4

1Y1

1Y2

1Y3

1Y4

2Y1

2Y2

2A1

2Y4

2Y3

OE1

OE2

3.3V

3.3V

POWER

NMI

PF3 PF2 PF1 PF0

PF4

PF5

PF6

PF7

RESETUSB RESET

1263-13-2003_19:50

21

74LVC14ASOIC14

U9

2

4

6

8

13

15

17

18

16

14

12

9

7

11

3

5

1

19

U24

SSOP20IDT74FCT3244APY

4

81

5

7

U23

SOIC8ADM708SAR

1213

U9

SOIC1474LVC14A

RED-SMTLED001

LED7

SOFT_RESET

SW8SWT013SPST-MOMENTARY

9

108

SOIC1474LVC00AD

U13

5 6

74LVC14ASOIC14

U10

LED8

LED001RED-SMT

1011

U10

SOIC1474LVC14A

R80

80510K

R79

80510K

11 10

74LVC14ASOIC14

U9

1206

R1160.00

1206

R640.00

0.00R63

1206

10K805

R81

R88

80510K

R68

80510K

100805

R85

AMBER-SMTLED001

LED4AMBER-SMTLED001

LED2LED3

LED001AMBER-SMT

PF0

PF1

PF[0:3]

PF3

PF2

13 12

U10

SOIC1474LVC14A


89

74LVC14ASOIC14

U10

SPST-MOMENTARYSWT013SW3

LED1

LED001AMBER-SMT

2701206

R76 R75

1206270

GREEN-SMTLED001

LED6

R74

1206680270

1206

R72R71

1206270270

1206

R70R69

1206270

100805

R67

10K805

R91

1UFA

CT13

R9010K805




R89

805100

10K805

R87

100805

R86

CT12

A1UF

1UFA

CT11

10K805

R84

R83

80510K

R82

805100

1UFA

CT10

CT9

A1UF

USB_RESET

10K805

R78

21

74LVC14ASOIC14

U10

3 4

U10

SOIC1474LVC14A

PF4

0.00R115

1206

0.00R117

1206

PF7

PF6

PF5

NMI

DSP_RESET_1

ADSP-BF535 EZ-KIT LITE - RESET/PB/LED

USB_CONFIGURED

4

56

SOIC1474LVC00AD

U13

RESET

32

1 U13

74LVC00ADSOIC14

http://products.analog.com/products/info.asp?product=ADM708

A0162-2000 1.6

4

3

2

1

A B C D

20 Cotton Road

Nashua, NH 03063

A B C D

4

3

2

1

PH: 1-800-ANALOGD

C


Size Board No.

Date Sheet of

Rev

Engineering

Checked

Drawn

DEVICESANALOG

5V

3.3V3.3V

SPORT0

DSP JTAG HEADER

1273-13-2003_19:50

87

85

83

81

77

75

73

69

67

65

63

61

59

57

1

10

1112

1314

1516

1718

19

2

20

2122

2324

2526

2728

29

3

30

3132

3334

3536

3738

39

4

40

4142

4344

4546

4748

5

50

6

78

9

49

55

51

53

52

54

56

58

60

62

66

70

68

72

74

76

78

80

82

84

86

88

90 89

64

71

79

P1

CON01745X2

1.5V

87

85

83

81

77

75

73

69

67

65

63

61

59

57

1

10

1112

1314

1516

1718

19

2

20

2122

2324

2526

2728

29

3

30

3132

3334

3536

3738

39

4

40

4142

4344

4546

4748

5

50

6

78

9

49

55

51

53

52

54

56

58

60

62

66

70

68

72

74

76

78

80

82

84

86

88

90 89

64

71

79

P3

CON01745X2

87

85

83

81

77

75

73

69

67

65

63

61

59

57

1

10

1112

1314

1516

1718

19

2

20

2122

2324

2526

2728

29

3

30

3132

3334

3536

3738

39

4

40

4142

4344

4546

4748

5

50

6

78

9

49

55

51

53

52

54

56

58

60

62

66

70

68

72

74

76

78

80

82

84

86

88

90 89

64

71

79

45X2CON017

P2

~ABE0/SDQM0~ABE3/SDQM3

~ABE0/SDQM0

~ABE1/SDQM1

D[0:31]

D1

D3

D5

D7

D9

D11

D13

D15

D17

D19

D21

D23

D25

D27

D29

D31 D30

D28

D26

D24

D22

D20

D18

D16

D14

D12

D10

D8

D6

D4

D2

D0

~ABE3/SDQM3

SLEEP

ARDY

CLKOUT

5

2

4

8

10

6

1

3

9

11

13

15

17

19

12

14

16

20

18

7

10X2CON014

P9

TCLK0

A[2:25]

A3

A5

A7

A9

A11

A13

A15

A17

A19

A21

A23

A25 A24

A20

A18

A16

A14

A12

A10

A8

A6

A4

A2

A22~ABE2/SDQM2

TX1

RX1

TX0

RX0

SCK1

MISO1

MOSI1

SCK0

MISO0

MOSI0

DT1

TFS1

TCLK1

DR1

RFS1

RCLK1

TMR2

TMR1 TMR0

PF7

PF15 PF14

PF13 PF12

PF11 PF10

PF9 PF8

PF6

PF5 PF4

PF3 PF2

PF1

RCLK0

DR0

RFS0

DT0

TFS0

SMS3

SMS0

SWE

SRAS

SCAS

SMS1

SMS2

SA10

SCKE

SCLK0

AMS3

AMS2

AMS1

AMS0

AWE

ARE

AOE

~ABE3/SDQM3

NMI

RESET

~ABE0/SDQM0

~ABE1/SDQM1

~ABE2/SDQM2

PF0

PA4

USB_DMNS

USB_SUSPEND

USB_TXEN

USB_TXDMNS

USB_TXDLPLS

USB_DPLS

USB_XVER_DATA

USB_CLK

PA6

PA5

PA3

PA2

PA1

PA0

PA7

RESET

ADSP-BF535 EZ-KIT LITE - CONNECTORS

1

3

5

7

9

11

13

2

4

6

8

10

12

14

P8

IDC7X2

10KR57

805

HEADER_SELECT

HEADER_TMS

HEADER_TCK

HEADER_TRST

HEADER_TDI

HEADER_EMU

HEADER_TDO

A0162-2000 1.6

4

3

2

1

A B C D

20 Cotton Road

Nashua, NH 03063

A B C D

4

3

2

1

PH: 1-800-ANALOGD

C


Size Board No.

Date Sheet of

Rev

Engineering

Checked

Drawn

DEVICESANALOG

1206

COMP

DRV

FB

GND1 GND2

IN1

IN2

SW

1206

WAIT 100uS FOR VOLTAGE TO SETTLE

0010

10

1 1 11 1 01 0 11 0 00 1 1

00

0

1.6V

1.4V1.3V1.2V1.1V1.0V0.9V

VDD_INTPF14 PF13 PF12

AFTER CHANGING PF11-9

1.5V *

* = DEFAULT

1283-12-2003_15:48

2

3

1M3

SOT23DBSS123

2

3

1BSS123SOT23D

M2

R103316K805

805DNPR124R123

DNP805

10KR125

805

R94

805DNP

R99DNP

10K805

R93R92

80510K

L1

IND00110UH

DNPR96

1206

0.00R97

1206

1

2

3

4

7

8

6

5

VR5

MSOP8ADP3088

R101332K805

D41ADO-214AA

PWR_MGT_OUT

C20470PF1206

C23

805DNP

DNPR98

R10420.0K1206

C22

8051UF

R9553.6K805

R100665K805

R102165K805

PF13

PF14

3V_DSP

470PFC21

1206

UNREG_IN

PF12

ADSP-BF535 EZ-KIT LITE - POWER 1

2

3

1M1

SOT23DBSS123

http://www.semiconductors.philips.com/pip/BSS123.html

http://products.analog.com/products/info.asp?product=ADP3088



5V

A0162-2000 1.6

4

3

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1

A B C D

20 Cotton Road

Nashua, NH 03063

A B C D

4

3

2

1

PH: 1-800-ANALOGD

C


Size Board No.

Date Sheet of

Rev

Engineering

Checked

Drawn

DEVICESANALOG

5V

5V

5V

CHOKE_COIL

GNDINPUT OUTPUT

3.3V

5V

A5V

SHGND

SHGND

GNDINPUT OUTPUT

SHGND

GNDINPUT OUTPUT

FBGND

INPUT

OUTPUT

ERR

SD

R12834.8K805

3-25-2003_9:02 9 12

12060.00R126

R106

805243.0K

5

4

2

6 1

3

VR3

SOT23-6ADP3331ART

3

1

2

SOT-223

VR1

ADP3338AKC-33

CT1510UFC

R1130.001206

2

1

3

ADP3338AKC-33

VR2

SOT-223

MH5MH4MH1 MH3MH2

1206600FER8

FER76001206

VDD_INT

C28

8050.1UF

C27

8050.1UF

2ADO-214AA

D1

D3

DO-214AA2A

UNREG_IN

3V_DSP

12060.00R111

CT1710UFC

3

1

2

ADP3339AKC-5

VR4

SOT-223

RC050.00R110

R109

1206100K

C10UFCT16

D2

DO-214AA2A

4

1

3

2

FER9

FER002

1

3

2

P10

CON0057.5V_POWER

F1

FUS0012.5A

C26

12061000PF

C25

12061000PF

C24

8050.1UF0.1UF

805

C29

C10UFCT18

FER66001206

ADSP-BF535 EZ-KIT LITE - POWER 2

A0.47UFCT14

R108

12101.00M

80510KR105

CT122UFD

1.5V





A0162-2000 1.6

4

3

2

1

A B C D

20 Cotton Road

Nashua, NH 03063

A B C D

4

3

2

1

PH: 1-800-ANALOGD

C


Size Board No.

Date Sheet of

Rev

Engineering

Checked

Drawn

DEVICESANALOG

3.3V3.3V

AGND

3.3V

3.3V 3.3V

3.3V3.3V3.3V 3.3V3.3V 3.3V3.3V

3.3V

3.3V3.3V 3.3V

A5V3.3V

ADSP-21535 INTERNAL (U1)ADSP-21535 EXTERNAL (U1)

ADM708SAR (U23)

CYC64603-128 (U11)

24LC00-SN (U25) 74LVC00AD (U13)

MT48LC4M16 (U5) MT48LC4M16 (U6)PSD4135 (U4)

CY7C1019V33-15VC (U12) ADP3088 (VR5)CY7C4201V-15AC (U18)

QS3257 (U14, U15, U20, U21, U22) ADSP-21535 PCI (U1) IDT74FCT3244APY (U24)

AD1885JST DIGITAL (U7) AD1885JST ANALOG (U7)

ADSP-21535 PLL (U1) ADSP-21535 RTC (U1)

SN74LV164A (U17)

74LVC14A (U9, U10, U19)

SN74AHC1G00 (U26)SN74AHC1G02 (U16)

12103-12-2003_15:48

805

C1090.01UF

0.01UFC35

8050.01UFC34

805

C9310UF1210

C9510UF1210

C9810UF1210

CT19

B10UF

VDD_RTCVDD_PLL

805

C640.01UF

805

C330.01UF

10UFB

CT21

805

C820.01UF

VDD_PCIEXT

VDD_EXTVDD_INT

805

C690.01UF0.01UF

C71

805

805

C670.01UF0.01UF

C65

805805

C1010.01UF

0.01UFC61

805 805

C580.01UF

0.01UFC45

805

805

C370.01UF

805

C360.01UF

0.01UFC102

805

0.01UFC94

805805

C960.01UF

805

C990.01UF0.01UF

C100

8050.01UFC31

8050.01UFC30

8050.01UFC41

8050.01UFC40

805

805

C430.01UF

805

C420.01UF0.01UF

C46

805805

C440.01UF0.01UF

C48

8050.01UFC47

805 805

C500.01UF

805

C490.01UF 0.01UF

C57

8050.01UFC56

805805

C550.01UF

805

C540.01UF 0.01UF

C53

805 805

C520.01UF

805

C510.01UF

0.01UFC60

8050.01UFC59

805 805

C620.01UF

0.01UFC63

805

0.01UFC66

805

805

C700.01UF 0.01UF

C68

805 805

C720.01UF 0.01UF

C73

805 805

C740.01UF

805

C750.01UF0.01UF

C76

805805

C770.01UF0.01UF

C80

8050.01UFC79

805805

C780.01UF0.01UF

C81

8050.01UFC87

805805

C860.01UF0.01UF

C85

805805

C840.01UF0.01UF

C83

805

0.01UFC92

805805

C910.01UF

805

C900.01UF0.01UF

C89

805805

C880.01UF

10UFB

CT20

805

C1070.01UF 0.01UF

C106

8050.01UFC105

805805

C1040.01UF0.01UF

C103

805805

C970.01UF0.01UF

C39

805805

C380.01UF 0.01UF

C32

805

805

C1160.01UF

ADSP-BF535 EZ-KIT LITE - BYPASS CAPS

805

C1080.01UF

A0162-2000 1.6

4

3

2

1

A B C D

20 Cotton Road

Nashua, NH 03063

A B C D

4

3

2

1

PH: 1-800-ANALOGD

C


Size Board No.

Date Sheet of

Rev

Engineering

Checked

Drawn

DEVICESANALOG

All USB interface circuitry is considered proprietaryand has been omitted from this schematic

When designing your JTAG interface please refer tothe Engineer to Engineer Note EE-68 which can be found athttp://www.analog.com

12113-25-2003_11:11

ADSP-BF535 EZ-KIT LITE - USB INTERFACE

I INDEX

Symbols codec disable jumper (JP2), 3-6
~AMS0, memory select pin, 2-3, 3-3~SMS0, memory select pin, 2-3, 3-3
AAdd New Hardware Wizard, Windows

98, 1-8ADSP-BF535 processor

core voltage, 3-2DF pin, 3-8internal memory restrictions, 2-2internal SRAM, 2-3memory mapMSEL0 pin, 3-8MSEL1 pin, 3-8MSEL2 pin, 3-8MSEL3 pin, 3-8MSEL4 pin, 3-8MSEL5 pin, 3-8MSEL6 pin, 3-8peripheral interface voltage, 3-2peripheral ports, -xiiireal time clock (RTC), 3-3SSEL0 pin, 3-8SSEL1 pin, 3-8

audioapplications, -xiii

input select jumper (JP1), 3-5interface (SPORT0), 3-3jacks (P5, P6), 3-13

Bbackground telemetry channel (BTC),

2-9bill of materials, A-1boot load, 2-13boot mode

8-bit, 2-6external execution mode, 2-6switch (SW1), -xiii

boot mode switch (SW1)see also switch settings

breakpoints, restrictions, 2-21breakpoints, see hardware breakpoints

Ccodecs, -xii, 2-7, 3-3, 3-5, 3-6, A-2connecting, EZ-KIT Lite board, 1-6connectors, 1-6, 3-12

expansion interface, 3-3, 3-12, 3-17P1 (expansion), 3-4P10 (power), 3-15P2 (expansion), 2-7

ADSP-BF535 EZ-KIT Lite Evaluation System Manual I-1

INDEX

P3 (expansion), 3-5P4 (FlashLINK), 3-13P5 (audio), 3-5, 3-13P6 (audio), 3-3, 3-13P7 (USB), 1-7, 3-14P8 (JTAG), 3-5, 3-14P9 (SPORT0), 3-4, 3-15

contents, EZ-KIT Lite package, 1-1context switching, 2-13

using M3 register, 2-13using SP, 2-14

conventions, manual, -xxicore voltage, 2-8, 3-2customer support, -xvi

Ddata breakpoints, 2-15

specific attributes, 2-15Device Manager window, 1-16DIP switch, 1-6, 3-5

Eelectrostatic discharge, 1-2emulation events, 2-12example programs, 2-8exceptions, 2-12expansion interface (P1, P2, P3), see

connectorsexternal

bus interface unit (EBIU), 3-3flash memory, see flash memory

EZ-KIT Lite boardarchitecture, 3-2

Ffeatures, product, -xiiflash arrays

boot, main, 2-5flash memory, -xiii, 2-3, 2-5, 3-3

FlashLINK (P4), 2-5, 3-13PSDsoft Express, 2-5

flash programmer, 2-9Found New Hardware Wizard

Windows 2000, 1-14

Ggraphical user interface (GUI), 2-10

Hhard reset, 2-13hardware breakpoints, 2-14

common attributes, 2-15data type, 2-15global options, 2-15instruction type, 2-16restrictions, 2-18tips and tricks, 2-18

Help, online, -xix, 2-9

Iinstallation, summary, 1-3installing

EZ-KIT Lite USB driver, 1-7VisualDSP++ and EZ-KIT Lite

software, 1-4VisualDSP++ license, 1-5

instruction breakpoints

I-2 ADSP-BF535 EZ-KIT Lite Evaluation System Manual

INDEX

specific attributes, 2-16interface, see graphical user interface

(GUI)internal

memory restrictions, 2-2memory, ADSP-BF535 processors,

2-3

JJTAG

connector (P8), 3-14emulation port, 3-5

jumper settings, 1-6, 3-3, 3-5codec disable (JP2), 3-4, 3-6input select (JP1), 3-5

Llatency cycles, 2-18LEDs, 1-6, 3-9

LED1, 2-6, 3-10LED2, 2-6, 3-10LED3, 2-6, 3-10LED4, 1-15, 2-6, 3-10LED5, 1-16, 3-10LED6, 1-7, 3-10LED7, 1-7, 3-10LED8, 1-7, 3-10

license restrictions, 2-2

MM3 register, 2-13measurements, 3-16mechanical dimensions, 3-17

memory map, see ADSP-BF535 processor

memory mapped registers (MMR), 2-7FIO_DIR, 2-7FIO_FLAG_C, 2-7

Nnon-maskable interrupt (NMI)

pin, 3-11push button (SW3), 3-11

Ppackage contents, 1-1PC configuration, 1-3Performance Monitor Control dialog

box, 2-11peripheral

interface voltage, 3-2ports, -xiii

phase lock loop (PLL) setup switch (SW2), 3-7

PMGMT0, 2-7PMGMT1, 2-7PMGMT2, 2-7power

connector (P10), 3-15LED (LED6), 3-10management, 2-7supply, 3-16

processor memory map, see ADSP-BF535 processor

programmable flags (PFs), 3-7, 3-9PF0, 2-6, 3-10PF1, 2-6, 3-10


INDEX

PF10, 2-7PF11, 2-7PF12, 2-7, 2-8PF13, 2-7, 2-8PF14, 2-7, 2-8PF15, 2-7, 3-4, 3-6PF2, 2-6, 3-10PF3, 2-6, 3-10PF4, 2-7PF5, 2-7PF6, 2-7PF7, 2-7PF8, 2-7PF9, 2-7pins, 2-6see also push buttons

push buttons, 3-7, 3-9SW3, 3-11SW4, 2-7, 3-11SW5, 2-7, 3-11SW6, 2-7, 3-11SW7, 2-7, 3-11SW8, 3-11

Rregistering, this product, 1-2regulatory compliance, -iiireset

board, 2-13, 3-11options, 2-19processor, 2-6, 3-10service routines, 2-11

resistors, 3-16

SSDRAM, 2-3, 2-4, 3-3setting

hardware breakpoints, 2-14target options, 2-19

setting up EZ-KIT Lite hardware, 1-5software breakpoints, 2-21SP

stack pointer, 2-14stack pointer register, 2-13, 2-14

specifications, 3-15SPORT0 (P9), -xiii, 3-15starting VisualDSP++, 1-16SW2, see phase lock loopswitch settings

boot mode select (SW1), 3-7also see boot mode switch

phase lock loop setup (SW2), 3-7system architecture, EZ-KIT Lite board,

3-2system requirements, PC, 1-3

Ttarget options

miscellaneous, 2-20on emulator exit, 2-20reset, 2-19

Target Options dialog box, 2-13, 2-19trace

buffer, 2-10, 2-11destination, 2-11instruction addresses, 2-11number, 2-11source, 2-11

I-4 ADSP-BF535 EZ-KIT Lite Evaluation System Manual

INDEX

Trace window, 2-10, 2-11

UUSB

cable, 1-2connector (P7), 3-14driver installation, Windows

2000, 1-12driver installation, Windows 98,

1-8driver installation, Windows XP,

1-13interface, 3-5interface chip (U11), 3-11monitor LED (LED4), 1-15

monitor LED (LED5), 3-10port, -xiii

VVDD_INT, core voltage, 2-8verifying USB driver installation,

1-15VisualDSP++

documentation, -xixinstallation, 1-4license, 1-5online Help, -xixrequirements, 1-3starting, 1-16

voltage plane, 3-16
