-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1Cover Page
B
1 39Friday, June 25, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1Cover Page
B
1 39Friday, June 25, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1Cover Page
B
1 39Friday, June 25, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
Intel Pineview Processor with Tigerpoint + DDRIII
PAV70 DDR3 Schematics Document
REV: 1.0
Compal Confidential
2010-06-25
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1Block Diagrams
B
2 39Friday, June 25, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1Block Diagrams
B
2 39Friday, June 25, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1Block Diagrams
B
2 39Friday, June 25, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
Compal ConfidentialModel Name : PAV50
X2 mode
File Name : LA-6421P
Touch Pad
CRT Conn
LPC BUS
page 22
22x22mm
page 10
Int.KBD
page 17
ALC272
DMI
Transfermer
Power ON/OFF
page 17
page 9
DDRIII-SO-DIMM PineviewFCBGA 559
SPI ROM
page 5
1.5V DDRIII 667
page 19
Aralia Codec
Memory BUS(DDRIII)
17x17mm
page 4,5,6
Tigerpoint
Thermal Sensor
page 7
page 11,12,13,14
page19
ENE KBC KB926
AMP & INTSpeaker
10/100 EthernetAR8152
page 25
Card Reader ENE6252
MINI Card x1 3G
PCI-Express
EMC1402
LCD Conn.
page 25
page 15
LVDS
SPI
INT MIC HeadPhone &MIC Jack
RGB
page 20
USB Port x2(L)
RJ45
SD/MMC/MS CONN
DC/DC Interface
3VALW/5VALW
1.5VP/VCCP
0.89VP/1.8VP0.75VS
CPU_CORE
Clock GeneratorCK505 page 8
page 18
page 29
page 36
page 33
page 34
page 35
USB
BlueTooth
CMOS CAM
page 15
page 9
HDA
page 30
page 31
page 32CHARGER
DC IN
BATT IN
SATA
page 16
HDD
GEN1
PCBGA360
USB Port x1(R)page 20
WLANpage 26
page 15
3G
TPMpage 27
LPC BUS
Light Sensorpage27
ZZZ
PCB
DA60000I610
ZZZ
PCB
DA60000I610
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1Notes List
B
3 39Monday, May 03, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1Notes List
B
3 39Monday, May 03, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1Notes List
B
3 39Monday, May 03, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
ON
SLP_S3#
S5 (Soft OFF)
S4 (Suspend to Disk)
S3 (Suspend to RAM)
LOW
ONON
ON
ON
ON
ON
ON
ON
HIGH
OFF
OFF
OFF
OFF
OFF
SLP_S4#
OFF
ON
ON
LOWLOW
LOW
OFF
OFF
SLP_S5#
HIGH
HIGH HIGH HIGH
HIGHHIGHHIGH
LOW
LOW LOW
+VALW
HIGH
+V +VS Clock
S1(Power On Suspend)
Full ON
STATESIGNAL
Address100_11000001 011X b
1010 000XbDDR DIMMA
IDSEL #
1101 001Xb
ICH7M SM Bus address
DEVICE REQ/GNT #
Address
Address
Clock Generator(SLG8SP556VTR)
Device
PIRQ
EMC1402
External PCI Devices
Device
EC SM Bus1 address
Smart BatteryDevice
EC SM Bus2 address
No PCI Device
BOARD ID Table(Page 17)
+0.89V Graphic core power rail
+VCCP
OFFOFF
ONON OFF
OFFOFFON
ON
+CPU_CORE
1.5V switched power railOFF
Voltage Rails
+1.5VS
0.75V switched power rail for DDR terminator+0.75VS
OFFOFFON
Adapter power supply (19V)
1.5V power rail for DDR
B+
ONOFF
OFF
+5VS
VINS5
3.3V always on power rail
5V always on power rail3.3V switched power rail
+RTCVCC RTC power
+3VALW
+1.5V
+3VS+5VALW
ON ON*
5V switched power rail+VSB VSB always on power rail ON
S3S1
ON*ONON
ONON
OFFON
ONON ON*
OFF
VCCP switched power rail
Core voltage for CPU
ON
AC or battery power rail for power circuit.
OFFONOFFON
DescriptionPower Plane
N/A N/A N/AN/AN/AN/A
OFF
Note : ON* means that this power plane is ON only with AC power
available, otherwise it is OFF.
1.264V1.453V 1.759V1.935V 2.341V
56K
2.500V
100K
3.3V200KNC
0.819V
Vab-Max
1.185V1.650V
ID08.2K18K
R01 (EVT)
33KR03 (PVT)
0V0.250V0.503V
3.3V
R02 (DVT)
R10A (MP)
Rb Vab-TypBRD ID0123
Ra 100KVCC
2.200V
3.3V
R01 (EVT)4R02 (DVT)
0V
5R03 (PVT)
0V
6R10A (MP)
0.216V
7
PAV50 0.289V0.436V
Vab-Min
0.538V0.875V0.712V
1.036V
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCC_FAN1
DDR_A_MA0
DDR_A_MA2
DDR_A_MA4
DDR_A_MA7DDR_A_MA8DDR_A_MA9DDR_A_MA10DDR_A_MA11DDR_A_MA12DDR_A_MA13DDR_A_MA14
DDR_A_BS0DDR_A_BS1DDR_A_BS2
DDR_A_WE#DDR_A_CAS#DDR_A_RAS#
DDR_CS#0DDR_CS#1
DDR_CKE0DDR_CKE1
M_ODT0M_ODT1
DDR_A_DQS0DDR_A_DQS#0DDR_A_DM0
DDR_A_D0DDR_A_D1DDR_A_D2DDR_A_D3DDR_A_D4DDR_A_D5DDR_A_D6DDR_A_D7
DDR_A_DQS1DDR_A_DQS#1DDR_A_DM1
DDR_A_DQS2DDR_A_DQS#2DDR_A_DM2
DDR_A_DQS3DDR_A_DQS#3DDR_A_DM3
DDR_A_DQS4DDR_A_DQS#4DDR_A_DM4
DDR_A_DQS5DDR_A_DQS#5DDR_A_DM5
DDR_A_DQS6DDR_A_DQS#6DDR_A_DM6
DDR_A_DQS7DDR_A_DQS#7DDR_A_DM7
DDR_A_D8DDR_A_D9DDR_A_D10DDR_A_D11DDR_A_D12DDR_A_D13DDR_A_D14DDR_A_D15
DDR_A_D16DDR_A_D17DDR_A_D18DDR_A_D19DDR_A_D20DDR_A_D21DDR_A_D22DDR_A_D23
DDR_A_D24DDR_A_D25DDR_A_D26DDR_A_D27DDR_A_D28DDR_A_D29DDR_A_D30DDR_A_D31
DDR_A_D32DDR_A_D33DDR_A_D34DDR_A_D35DDR_A_D36DDR_A_D37DDR_A_D38DDR_A_D39
DDR_A_D40DDR_A_D41DDR_A_D42DDR_A_D43DDR_A_D44DDR_A_D45DDR_A_D46DDR_A_D47
DDR_A_D48DDR_A_D49DDR_A_D50DDR_A_D51DDR_A_D52DDR_A_D53DDR_A_D54DDR_A_D55
DDR_A_D56DDR_A_D57DDR_A_D58DDR_A_D59DDR_A_D60DDR_A_D61DDR_A_D62DDR_A_D63
M_CLK_DDR0M_CLK_DDR#0M_CLK_DDR1M_CLK_DDR#1
DDR_A_MA1
DDR_A_MA3
DDR_A_MA5DDR_A_MA6
DMI_RX0_RDMI_RX#0_RDMI_RX1_RDMI_RX#1_R
DMI_RX0_R
DMI_RX#0_R
DMI_RX1_R
DMI_RX#1_R
XDP_TDI
XDP_BPM#2
XDP_BPM#0XDP_BPM#1
XDP_TMS
XDP_PREQ#
XDP_TRST#
XDP_BPM#3
XDP_PRDY#
PLTRST#
XDP_TCK
XDP_TDO
XDP_PREQ#
XDP_TDI
XDP_TMS
XDP_TCK
XDP_TDO
XDP_TRST#
+VCC_FAN1
XDP_PREQ#
XDP_TDI
XDP_TDO
XDP_TCKXDP_TMS
XDP_TRST#
DRAMRST#_R DRAMRST#
DRAM_PWROK
DRAM_PWROKDRAMRST#_R
FAN_SPEED1(17)
EN_FAN1(17)
DDR_A_MA[0..14](7)
DDR_A_BS0(7)DDR_A_BS1(7)DDR_A_BS2(7)
DDR_A_WE#(7)DDR_A_CAS#(7)DDR_A_RAS#(7)
DDR_CS#0(7)DDR_CS#1(7)
DDR_CKE0(7)DDR_CKE1(7)
M_ODT0(7)M_ODT1(7)
DDR_A_DQS#[0..7](7)DDR_A_D[0..63](7)
DDR_A_DQS[0..7](7)DDR_A_DM[0..7](7)
M_CLK_DDR0(7)M_CLK_DDR#0(7)M_CLK_DDR1(7)M_CLK_DDR#1(7)
DMI_TX0 (13)DMI_TX#0 (13)DMI_TX1 (13)DMI_TX#1 (13)
CLK_CPU_EXP#(8)CLK_CPU_EXP(8)
DMI_RX#0(13)
DMI_RX1(13)
DMI_RX#1(13)
DMI_RX0(13)
SLPIOVR#(13)
XDP_TRST#(5)XDP_TDI(5)
XDP_TCK(5)
H_PWRGD(5,13)XDP_BPM#0(5)XDP_BPM#1(5)XDP_BPM#2(5)XDP_BPM#3(5)
XDP_TMS(5)
XDP_TDO(5)
XDP_PREQ#(5)XDP_PRDY#(5)
PLTRST#(5,13,15,17,25,26,27)
CPU_ITP(8)CPU_ITP#(8)
DRAMRST# (7)
DRAM_PWROK(7)
+5VS
+3VS
+VCCP
+VCCP
+5VS
+1.5V
+1.5V +1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1Pineview(1/3)
Custom
4 39Monday, June 28, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1Pineview(1/3)
Custom
4 39Monday, June 28, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1Pineview(1/3)
Custom
4 39Monday, June 28, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
40mil
FAN1 Conn
Close to CPU
XDP Reserve
Must be placed within 500 mils from Pineview-M pins
Modify follow KAV60 schematic 06/12
Add 2009-6-17
Modify D38 D39 D40 Pin define 08/13
2010-1-18 modify
2010/01/18 DDR3 add
U12
APL5607KI-TRG_SO8
U12
APL5607KI-TRG_SO8
EN1VIN2VOUT3VSET4
GND 8GND 7GND 6GND 5
D40
P
J
D
L
C
0
5
C
_
S
O
T
2
3
-
3
D40
P
J
D
L
C
0
5
C
_
S
O
T
2
3
-
3
23
1
R3700_0402_5%@
R3700_0402_5%@
1
2
R345 51 +-1% 0402R345 51 +-1% 04021 2
R346 51 +-1% 0402R346 51 +-1% 04021 2
R1413
0_0402_5%
R1413
0_0402_5%
1 2
C4370.1U_0402_10V7K
C4370.1U_0402_10V7K
1 2
R342 51 +-1% 0402R342 51 +-1% 04021 2
PINEVIEW_M
DDR_A
REV = 1.1
2 OF 6
U71B
PINEVIEW-M_FCBGA8559
N475@PINEVIEW_M
DDR_A
REV = 1.1
2 OF 6
U71B
PINEVIEW-M_FCBGA8559
N475@
DDR_A_DQS_0 AD3DDR_A_DQS#_0 AD2
DDR_A_DM_0 AD4
DDR_A_DQ_0 AC4DDR_A_DQ_1 AC1DDR_A_DQ_2 AF4DDR_A_DQ_3
AG2DDR_A_DQ_4 AB2DDR_A_DQ_5 AB3DDR_A_DQ_6 AE2DDR_A_DQ_7 AE3
DDR_A_DQS_1 AB8DDR_A_DQS#_1 AD7
DDR_A_DM_1 AA9
DDR_A_DQ_8 AB6DDR_A_DQ_9 AB7
DDR_A_DQ_10 AE5DDR_A_DQ_11 AG5DDR_A_DQ_12 AA5DDR_A_DQ_13
AB5DDR_A_DQ_14 AB9DDR_A_DQ_15 AD6
DDR_A_DQS_2 AD8DDR_A_DQS#_2 AD10
DDR_A_DM_2 AE8
DDR_A_DQ_16 AG8DDR_A_DQ_17 AG7DDR_A_DQ_18 AF10DDR_A_DQ_19
AG11DDR_A_DQ_20 AF7DDR_A_DQ_21 AF8DDR_A_DQ_22 AD11DDR_A_DQ_23
AE10
DDR_A_DQS_3 AK5DDR_A_DQS#_3 AK3
DDR_A_DM_3 AJ3
DDR_A_DQ_24 AH1DDR_A_DQ_25 AJ2DDR_A_DQ_26 AK6DDR_A_DQ_27
AJ7DDR_A_DQ_28 AF3DDR_A_DQ_29 AH2DDR_A_DQ_30 AL5DDR_A_DQ_31 AJ6
DDR_A_DQS_4 AG22DDR_A_DQS#_4 AG21
DDR_A_DM_4 AD19
DDR_A_DQ_32 AE19DDR_A_DQ_33 AG19DDR_A_DQ_34 AF22DDR_A_DQ_35
AD22DDR_A_DQ_36 AG17DDR_A_DQ_37 AF19DDR_A_DQ_38 AE21DDR_A_DQ_39
AD21
DDR_A_DQS_5 AE26DDR_A_DQS#_5 AG27
DDR_A_DM_5 AJ27
DDR_A_DQ_40 AE24DDR_A_DQ_41 AG25DDR_A_DQ_42 AD25DDR_A_DQ_43
AD24DDR_A_DQ_44 AC22DDR_A_DQ_45 AG24DDR_A_DQ_46 AD27DDR_A_DQ_47
AE27
DDR_A_DQS_6 AE30DDR_A_DQS#_6 AF29
DDR_A_DM_6 AF30
DDR_A_DQ_48 AG31DDR_A_DQ_49 AG30DDR_A_DQ_50 AD30DDR_A_DQ_51
AD29DDR_A_DQ_52 AJ30DDR_A_DQ_53 AJ29DDR_A_DQ_54 AE29DDR_A_DQ_55
AD28
DDR_A_DQS_7 AB27DDR_A_DQS#_7 AA27
DDR_A_DM_7 AB26
DDR_A_DQ_56 AA24DDR_A_DQ_57 AB25DDR_A_DQ_58 W24DDR_A_DQ_59
W22DDR_A_DQ_60 AB24DDR_A_DQ_61 AB23DDR_A_DQ_62 AA23DDR_A_DQ_63
W27
DDR_A_MA_0AH19DDR_A_MA_1AJ18DDR_A_MA_2AK18DDR_A_MA_3AK16DDR_A_MA_4AJ14DDR_A_MA_5AH14DDR_A_MA_6AK14DDR_A_MA_7AJ12DDR_A_MA_8AH13DDR_A_MA_9AK12DDR_A_MA_10AK20DDR_A_MA_11AH12DDR_A_MA_12AJ11DDR_A_MA_13AJ24DDR_A_MA_14AJ10
DDR_A_WE#AK22DDR_A_CAS#AJ22DDR_A_RAS#AK21
DDR_A_BS_0AJ20DDR_A_BS_1AH20DDR_A_BS_2AK11
DDR_A_CS#_0AH22DDR_A_CS#_1AK25DDR_A_CS#_2AJ21DDR_A_CS#_3AJ25
DDR_A_CKE_0AH10DDR_A_CKE_1AH9DDR_A_CKE_2AK10DDR_A_CKE_3AJ8
DDR_A_ODT_0AK24DDR_A_ODT_1AH26DDR_A_ODT_2AH24DDR_A_ODT_3AK27
DDR_A_CK_0AG15DDR_A_CK_0#AF15DDR_A_CK_1AD13DDR_A_CK_1#AC13
RSVDAD17RSVDAC17
DDR_A_CK_3AC15DDR_A_CK_3#AD15DDR_A_CK_4AF13DDR_A_CK_4#AG13
RSVDAB15RSVDAB17
RSVDAB4RSVDAK8
RSVD_TPAB11RSVD_TPAB13
DDR_VREFAL28DDR_RPDAK28DDR_RPUAJ26
RSVDAK29
R141210K_0402_5%@R141210K_0402_5%@
1
2
R203750_0402_1%
R203750_0402_1%
C313
4.7U_0603_6.3V6K
C313
4.7U_0603_6.3V6K
1 2
C312 2.2U_0603_10V6KC312 2.2U_0603_10V6K1 2
U71
N550@
U71
N550@
T38T38
C314
4.7U_0603_6.3V6K
C314
4.7U_0603_6.3V6K
1 2
R344 51 +-1% 0402R344 51 +-1% 04021 2
C4400.01U_0402_16V7KC4400.01U_0402_16V7K1
2
R348 1K_0402_1%@R348 1K_0402_1%@1 2
C4350.1U_0402_10V7K
C4350.1U_0402_10V7K
1 2
C11510.01U_0402_16V7KC11510.01U_0402_16V7K
1
2
D38
P
J
D
L
C
0
5
C
_
S
O
T
2
3
-
3
D38
P
J
D
L
C
0
5
C
_
S
O
T
2
3
-
3
23
1
C436
0.1U_0402_10V7K
C436
0.1U_0402_10V7K1 2
D39
P
J
D
L
C
0
5
C
_
S
O
T
2
3
-
3
D39
P
J
D
L
C
0
5
C
_
S
O
T
2
3
-
3
23
1
C311100P_0402_50V8J
3G@C311100P_0402_50V8J
3G@
1
2
R24380.6_0402_1%
R24380.6_0402_1%
D19DAN217_SC59
@D19DAN217_SC59
@
23
1
R354 1K_0402_5%@R354 1K_0402_5%@1 2
R47 330_0402_5%R47 330_0402_5%1 2
T40T40
R25610K_0402_5%R25610K_0402_5%
1
2
R343 51 +-1% 0402R343 51 +-1% 04021 2
T41T41
C439
0
.
1
U
_
0
4
0
2
_
1
0
V
7
K
C439
0
.
1
U
_
0
4
0
2
_
1
0
V
7
K
1
2R142
1K_0402_1%
R142
1K_0402_1%
1
2
D
M
I
PINEVIEW_M
REV = 1.1
1 OF 6
U71A
PINEVIEW-M_FCBGA8559
N475@
D
M
I
PINEVIEW_M
REV = 1.1
1 OF 6
U71A
PINEVIEW-M_FCBGA8559
N475@
RSVD M2RSVD N2
EXP_ICOMPI L9EXP_RBIAS L8
RSVDN9RSVDN10EXP_TCLKINPR9EXP_TCLKINNR10
RSVDM4RSVDJ1RSVDK2
DMI_RXN_1G3DMI_RXP_1H4DMI_RXN_0F2DMI_RXP_0F3
RSVD_TP P11RSVD_TP N11
EXP_RCOMPO L10
RSVD L2RSVD K3
DMI_TXN_1 J2DMI_TXP_1 H3DMI_TXN_0 G1DMI_TXP_0 G2
EXP_CLKINPN6EXP_CLKINNN7
RSVDL3
U71
N455@
U71
N455@
C11501000P_0402_50V7K
C11501000P_0402_50V7K
1 2
JP16
ACES_87151-24051
CONN@JP16
ACES_87151-24051
CONN@112233445566778899101011111212131314141515161617171818191920202121222223232424G125G226
R16249.9_0402_1%
R16249.9_0402_1%
R50
1K_0402_1%
R50
1K_0402_1%
1
2
C4380.1U_0402_10V7K
C4380.1U_0402_10V7K
1 2
R341 51 +-1% 0402R341 51 +-1% 04021 2
JP12
ACES_85204-03001CONN@
JP12
ACES_85204-03001CONN@
112233
G1 4G2 5
R24280.6_0402_1%
R24280.6_0402_1%
R347 1K_0402_5%@R347 1K_0402_5%@1 2
T39T39
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_A20M#H_SMI#
H_FERR#
H_IGNNE#H_STPCLK#
H_PWRGD
H_DPRSTP#H_DPSLP#
H_EXTBGREF
H_GTLREF
H_INIT#
H_INTRH_NMI
H_PROCHOT#
H_PROCHOT#
H_THERMTRIP#
H_THERMDA
H_THERMDC
EC_SMB_DA2
GMCH_CRT_HSYNC_RGMCH_CRT_VSYNC_R
GMCH_CRT_RGMCH_CRT_GGMCH_CRT_B
PM_EXTTS#0
PM_EXTTS#0
PM_EXTTS#1
H_PWROK
CPU_VID0CPU_VID1CPU_VID2CPU_VID3CPU_VID4CPU_VID5CPU_VID6
CPU_BSEL1CPU_BSEL0
CPU_BSEL2
CPU_SSCDREFCLKCPU_SSCDREFCLK#
CLK_CPU_HPLCLK#CLK_CPU_HPLCLK
CLK_CPU_BCLK#CLK_CPU_BCLK
GMCH_ENBKL
GMCH_CRT_B
GMCH_CRT_G
GMCH_CRT_R
H_PWROK
CPU_DREFCLKCPU_DREFCLK#
PLTRST#
EC_SMB_CK2
H_THERMDAH_THERMDC
GMCH_ENBKL
XDP_TDI
XDP_TCKXDP_TMSXDP_TRST#
XDP_TDO
XDP_PRDY#XDP_PREQ#
H_GTLREFH_EXTBGREF
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
H_PWRGD
H_A20M# (12)H_SMI# (12)H_FERR# (12)
H_IGNNE# (12)H_STPCLK# (12)
H_PWRGD (4,13)
H_DPSLP# (13)H_INIT# (12)
H_INTR (12)H_NMI (12)
H_THERMTRIP# (12)
EC_SMB_CK2 (17,27)
EC_SMB_DA2 (17,27)
GMCH_CRT_DATA (10)GMCH_CRT_CLK (10)
GMCH_CRT_R (10)GMCH_CRT_G (10)GMCH_CRT_B (10)
PM_EXTTS#0 (7)PM_DPRSLPVR (13)
PLTRST# (4,13,15,17,25,26,27)
CPU_VID0 (36)CPU_VID1 (36)CPU_VID2 (36)CPU_VID3 (36)CPU_VID4
(36)CPU_VID5 (36)CPU_VID6 (36)
CPU_BSEL1 (8)CPU_BSEL2 (8)CPU_BSEL0 (8)
CPU_DREFCLK (8)CPU_DREFCLK# (8)CPU_SSCDREFCLK (8)CPU_SSCDREFCLK#
(8)
CLK_CPU_HPLCLK# (8)CLK_CPU_HPLCLK (8)
VGATE (8,13,17,36)
PCH_POK (13,17)
H_DPRSTP# (13)
LVDS_SDA(9)GMCH_ENVDD(9)
GMCH_ENBKL(17)
LVDS_ACLK#(9)LVDS_ACLK(9)
LVDS_SCL(9)
LVDS_A0#(9)LVDS_A0(9)LVDS_A1#(9)LVDS_A1(9)LVDS_A2#(9)LVDS_A2(9)
XDP_TDI(4)XDP_TCK(4)XDP_TRST#(4)
XDP_BPM#0(4)XDP_BPM#1(4)XDP_BPM#2(4)XDP_BPM#3(4)
XDP_TMS(4)XDP_TDO(4)
XDP_PRDY# (4)XDP_PREQ# (4)
CLK_CPU_BCLK (8)CLK_CPU_BCLK# (8)
INVT_PWM(9,17)
GMCH_CRT_HSYNC (10)GMCH_CRT_VSYNC (10)
+VCCP+VCCP
+VCCP
+3VS
+3VS+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1Pineview(2/3)
B
5 39Thursday, June 03, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1Pineview(2/3)
B
5 39Thursday, June 03, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1Pineview(2/3)
B
5 39Thursday, June 03, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
placed within 0.5" of processor pin.placed within 0.5"
of processor pin.
Close to Processor pin
CPU THERMAL SENSOR
H_THERMDA, H_THERMDC routing together.Trace width / Spacing = 10
/ 10 mil
Address:100_1100
Close to Processor pin
Place closed to chipset
Del R323 05/11
Add INVT_PWM 05/11
Add 470PF on H_SMI# for known issue 07/08
Modify 08/04
T10T10
C79
2200P_0402_50V7K
C79
2200P_0402_50V7K1 2
C1171
470P_0402_50V7K
@ C1171
470P_0402_50V7K
@1 2
T12T12
T60T60
T19T19
R307150_0402_1%R307150_0402_1%
1 2
T15T15
R5810K_0402_5%
R5810K_0402_5%
12
T9T9
R244976_0402_1%R244976_0402_1%
T59T59
T21T21
PINEVIEW_M
I
C
H
L
V
D
S
C
P
U
REV = 1.1
4 OF 6
U71D
PINEVIEW-M_FCBGA8559
N475@PINEVIEW_M
I
C
H
L
V
D
S
C
P
U
REV = 1.1
4 OF 6
U71D
PINEVIEW-M_FCBGA8559
N475@
LA_DATAP_0R24LA_DATAN_1N26
LA_DATAN_2R26
LIBGR22
LVREFHN22LVREFLN23
LBKLT_CTLL26LCTLA_CLKL23LBKLT_ENL27
LVBGJ28
LCTLB_DATAK25LDDC_CLKK23LDDC_DATAK24LVDD_ENH26
DPSLP# G10DPRSTP# G6
VSS H27
THRMDA_2/RSVDC30
THRMDC_1E30
TRST#C16TMSC14TCKB14TDOD13TDID14RSVDG5
BPM_2_3#/RSVDB21BPM_2_2#/RSVDC20
BPM_1_3#F13BPM_1_2#G13BPM_1_1#E15BPM_1_0#G11
LA_CLKNU25
RSVD D18RSVD H13RSVD L7VID_6 E29VID_5 F29VID_3 G30VID_2 H28VID_1
H29
BSEL_2 K6BSEL_1 H5BSEL_0 K5
RSVD E17RSVD L6
GTLREF A13
CPUPWRGOOD W1PROCHOT# C18
THERMTRIP# E13
IGNNE# E5LINT1 F11LINT0 F10
FERR# H6
STPCLK# F8
INIT# G8
A20M# H7
LA_DATAP_1N27
LA_DATAN_0R23LA_CLKPU26
BPM_2_1#/RSVDB20BPM_2_0#/RSVDB18
BCLKP J10BCLKN H10
PREQ# F15PRDY# E11
SMI# E7
VID_4 G29
RSVD D20
RSVD_TP D19EXTBGREF K7
THRMDC_2/RSVDD31
THRMDA_1D30RSVD_TP K9
VID_0 H30
LA_DATAP_2R27
R1512.37K_0402_1%
R1512.37K_0402_1%T11T11
R20268_0402_5%R20268_0402_5%
T37T37
T63T63
T49T49
R2130_0402_5%
@R2130_0402_5%
@
R2000_0402_5%
R2000_0402_5%
T3T3
T20T20
T25T25
R249 15_0402_5%R249 15_0402_5%1 2
C
9
4
0
1
U
_
0
6
0
3
_
1
0
V
6
K
@
C
9
4
0
1
U
_
0
6
0
3
_
1
0
V
6
K
@
1
2
R308150_0402_1%R308150_0402_1%
1 2
T6T6
R306
0_0402_5%
R306
0_0402_5%1 2
T55T55
R247 15_0402_5%R247 15_0402_5%1 2
T17T17
T26T26
T4T4
R201 665_0402_1%R201 665_0402_1%
T14T14
T48T48
R1552K_0402_1%R1552K_0402_1%
R1441K_0402_1%R1441K_0402_1%
R1378
1K_0402_5%
R1378
1K_0402_5%
1 2
T22T22
T8T8
T51T51
T27T27
T13T13
T18T18
T58T58
T23T23
T2T2
R305
0_0402_5%
@R305
0_0402_5%
@1 2
R1563.3K_0402_1%R1563.3K_0402_1%
T16T16
R34100K_0402_5%R34
100K_0402_5%
R14310K_0402_5%R14310K_0402_5%
1
2
C80
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z
C80
0
.
1
U
_
0
4
0
2
_
1
6
V
4
Z 1
2
T50T50
T28T28
T7T7
T5T5
C
9
3
9
1
U
_
0
6
0
3
_
1
0
V
6
K
@
C
9
3
9
1
U
_
0
6
0
3
_
1
0
V
6
K
@
1
2
T62T62
T24T24
R309150_0402_1%R309150_0402_1%
1 2T61T61
U2
EMC1402-1-ACZL-TR MSOP 8P SENSOR
U2
EMC1402-1-ACZL-TR MSOP 8P SENSOR
DN3DP2VDD1
ALERT# 6
SMCLK 8
THERM#4 GND 5
SMDATA 7
M
I
S
C
V
G
A
PINEVIEW_M
3 OF 6
REV = 1.1
U71C
PINEVIEW-M_FCBGA8559
N475@
M
I
S
C
V
G
A
PINEVIEW_M
3 OF 6
REV = 1.1
U71C
PINEVIEW-M_FCBGA8559
N475@
RSVD_TPR6
REFCLKINN Y29REFCLKINP Y30
CRT_DDC_CLK L30
RSVD_TPAA7RSVD_TPAA6RSVD_TPR5
RSVDL11
XDP_RSVD_17C11XDP_RSVD_16B12XDP_RSVD_15B10XDP_RSVD_14B11XDP_RSVD_13D10XDP_RSVD_12C10XDP_RSVD_11B8XDP_RSVD_10C8XDP_RSVD_09D9XDP_RSVD_08A9XDP_RSVD_07B7XDP_RSVD_06D8XDP_RSVD_05C6XDP_RSVD_04C7XDP_RSVD_03C5XDP_RSVD_02D6XDP_RSVD_01A7XDP_RSVD_00D12
HPL_CLKINP W9HPL_CLKINN W8
RSTIN# AA3PWROK L5
PM_EXTTS#_0 J30PM_EXTTS#_1/DPRSLPVR K29
REFSSCLKINP AA30
DAC_IREF P28
CRT_DDC_DATA L31
CRT_IRTN N30CRT_BLUE P29
CRT_GREEN P30CRT_RED N31
CRT_VSYNC M29CRT_HSYNC M30
REFSSCLKINN AA31
RSVD_TPT21RSVD_TPW21RSVD_TPAA21
RSVD_TPV21
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCC_CRT_DAC+VCC_CRT_DAC
+VCC_DMI
+VCC_ALVD+VCC_DLVD
+RING_WEST
+RING_EAST+RING_WEST
+DMI_HMPLL+DMI_HMPLL
VCCSENSEVSSSENSE
VCCSENSE
VSSSENSE
+VCC_DMI
+VCC_DLVD
+RING_EAST
+VCC_ALVD
VCCSENSE (36)VSSSENSE (36)
+CPU_CORE+CPU_CORE
+0.89V
+0.89V
+1.5V
+1.8VS
+1.8VS
+3VS
+VCCP
+CPU_CORE
+1.5VS
+VCCP
+VCCP
+VCCP
+VCCP
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1Pineview(3/3)
Custom
6 39Tuesday, June 22, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1Pineview(3/3)
Custom
6 39Tuesday, June 22, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1Pineview(3/3)
Custom
6 39Tuesday, June 22, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
PLACE IN CAVITY
2 x 330uF(9mohm/2)
Close Chipset pin
GFX supply current: 2.64A
DDR analog supply current: 1.32A
DAC & GIO & LGI supply current: 0.19A
LGI &DPLL supply current: 0.06A
Modify to 2.2U 05/11
Processor Core analog supply current: 0.08A
DMI analog & PLL supply current: 0.54A
CRT DAC & LVDS supply current: 0.15A
Display PLL & DMIHMPLL supply current: 0.18A
Close U71.D4
Follow Intel check list change to 22uF 06/06
DDR supply current 2.27A
Legacy I/O supply current: 0.42A
Add C1217 2010/03/25
del C1218 2010/04/14
C1217
0
.
1
U
_
0
4
0
2
_
1
0
V
6
K
C1217
0
.
1
U
_
0
4
0
2
_
1
0
V
6
K
1
2
+ C278
330U 2.5V Y
+ C278
330U 2.5V Y
1
2
C400
1
0
U
_
0
6
0
3
_
6
.
3
V
6
M
C400
1
0
U
_
0
6
0
3
_
6
.
3
V
6
M
1
2
R31100_0402_1%
R31100_0402_1%
1 2
C70
1
U
_
0
4
0
2
_
6
.
3
V
6
K
C70
1
U
_
0
4
0
2
_
6
.
3
V
6
K
1
2
R27
0_0603_5%
R27
0_0603_5%1 2
C55
2
2
U
F
6
.
3
V
M
X
5
R
0
8
0
5
C55
2
2
U
F
6
.
3
V
M
X
5
R
0
8
0
5
1
2
R26
100NH +-5% LL1608-FSLR10J
R26
100NH +-5% LL1608-FSLR10J 1 2
C84
1
U
_
0
4
0
2
_
6
.
3
V
6
K
C84
1
U
_
0
4
0
2
_
6
.
3
V
6
K
1
2
R21
0_0603_5%
R21
0_0603_5%1 2
C1153
22UF 6.3V M X5R 0805
C1153
22UF 6.3V M X5R 0805
1
2
C81
1
U
_
0
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C1152
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C1152
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1
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C429
1U_0402_6.3V6K
C429
1U_0402_6.3V6K
1
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C236
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C2371U_0603_10V6K
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C681U_0603_10V6K
C681U_0603_10V6K
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22UF 6.3V M X5R 0805
C1154
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1
2
R180_0603_5%
R180_0603_5%
1 2
C1160
0.1U_0402_10V6K
C1160
0.1U_0402_10V6K
1
2
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100_0402_1%
R32
100_0402_1%1 2
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C430
1U_0402_6.3V6K
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1
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MBK1608601YZF_2P
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+
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C641U_0603_10V6K
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C56
22UF 6.3V M X5R 0805 H1.25
C56
22UF 6.3V M X5R 0805 H1.25
1
2
D
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D
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D
S
G
F
X
/
M
C
H
PINEVIEW_M
REV = 1.1
5 OF 6
U71E
PINEVIEW-M_FCBGA8559
N475@
D
M
I
E
X
P
\
C
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\
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PINEVIEW_M
REV = 1.1
5 OF 6
U71E
PINEVIEW-M_FCBGA8559
N475@
VCCSFR_AB_DPLAC31
VCC A23VCC A25VCC A27VCC B23VCC B24VCC B25VCC B26VCC B27VCC
C24VCC C26VCC D23VCC D24VCC D26VCC D28VCC E22VCC E24VCC E27VCC
F21VCC F22VCC F25VCC G19VCC G21VCC G24VCC H17VCC H19VCC H22VCC
H24VCC J17VCC J19VCC J21VCC J22VCC K15VCC K17VCC K21VCC L14VCC
L16VCC L19VCC L21VCC N14VCC N16VCC N19VCC N21
VCCSENSE C29VSSSENSE B29
VCCA Y2
VCCP D4
VCCP B4VCCP B3
VCCALVDS V30VCCDLVDS W31
VCCA_DMI T1VCCA_DMI T2VCCA_DMI T3
RSVD P2VCCSFR_DMIHMPLL AA1
VCCP E2
VCCGFXT13VCCGFXT14VCCGFXT16VCCGFXT18VCCGFXT19VCCGFXV13VCCGFXV19VCCGFXW14VCCGFXW16VCCGFXW18VCCGFXW19
VCCSMAK13
VCCSMAL16VCCSMAL21VCCSMAL25
VCCCK_DDRAK7VCCCK_DDRAL7
VCCA_DDRU10VCCA_DDRU5VCCA_DDRU6VCCA_DDRU7VCCA_DDRU8VCCA_DDRU9VCCA_DDRV2VCCA_DDRV3VCCA_DDRV4VCCA_DDRW10VCCA_DDRW11
VCCACK_DDRAA10VCCACK_DDRAA11
VCCD_AB_DPLAA19
VCCACRTDACT30
VCC_GIOT31VCCRING_EASTJ31
VCCRING_WESTB2VCCRING_WESTC2VCC_LGIA21
VCCRING_WESTC3
VCCSMAK19VCCSMAK9VCCSMAL11
VCCD_HMPLLV11
R280_0805_5%
R280_0805_5%
1 2
C77
1
U
_
0
4
0
2
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6
.
3
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6
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C77
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4
0
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1
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1
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4
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3
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C82
1
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4
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.
3
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6
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1U_0402_6.3V6K
C428
1U_0402_6.3V6K
1
2
C71
1
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4
0
2
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6
.
3
V
6
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C71
1
U
_
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4
0
2
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6
.
3
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6
K
1
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C1162
0.1U_0402_10V6K
C1162
0.1U_0402_10V6K
1
2
C75
1
U
_
0
4
0
2
_
6
.
3
V
6
K
C75
1
U
_
0
4
0
2
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6
.
3
V
6
K
1
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C3910.01U_0402_16V7KC3910.01U_0402_16V7K
1
2
C1161
0.1U_0402_10V6K
C1161
0.1U_0402_10V6K
1
2
G
N
D
PINEVIEW_M
6 OF 6
REV = 1.1
U71F
PINEVIEW-M_FCBGA8559
N475@
G
N
D
PINEVIEW_M
6 OF 6
REV = 1.1
U71F
PINEVIEW-M_FCBGA8559
N475@
VSSF19VSSF17VSSE8VSSE25VSSE21VSSE19VSSE10RSVD_NCTFE1VSSD22RSVD_NCTFC31VSSC25VSSC22VSSC21VSSC12RSVD_NCTFC1VSSB9VSSB5RSVD_NCTFB31RSVD_NCTFB30VSSB22VSSB19VSSB16VSSB13VSSAL9RSVD_NCTFAL30RSVD_NCTFAL3RSVD_NCTFAL29VSSAL23RSVD_NCTFAL2VSSAL19VSSAL13RSVD_NCTFAK31RSVD_NCTFAK30VSSAK23RSVD_NCTFAK2RSVD_NCTFAK1RSVD_NCTFAJ31VSSAJ16RSVD_NCTFAJ1VSSAH8VSSAH6VSSAH4VSSAH28VSSAH23VSSAH18VSSAG3VSSAG10VSSAF28VSSAF24VSSAF21VSSAF17VSSAF11VSSAE31VSSAE22VSSAE17VSSAE15VSSAE13VSSAE11VSSAE1VSSAD5VSSAD26VSSAC30VSSAC28VSSAC21VSSAC2VSSAC19VSSAC11VSSAC10VSSAB30VSSAB29VSSAB28VSSAB21VSSAB19VSSAA8VSSAA29VSSAA26VSSAA25VSSAA22VSSAA2VSSAA18VSSAA16VSSAA14VSSAA13RSVD_NCTFA4RSVD_NCTFA30RSVD_NCTFA3RSVD_NCTFA29VSSA19VSSA16VSSA11
VSS T29
VSS Y4VSS Y3VSS Y28VSS W7VSS W6VSS W5VSS W4VSS W30VSS W28VSS
W26VSS W25VSS W23VSS W2VSS W13VSS V29VSS V28VSS V18VSS V16VSS
V14VSS U27VSS U24VSS U23VSS U22VSS T11VSS R8VSS R7VSS R25VSS P4VSS
P3VSS P21VSS P19VSS P18VSS P16VSS P14VSS P13VSS N8VSS N5VSS N4VSS
N28VSS N25VSS N24VSS N18VSS N13VSS N1VSS M3VSS M28VSS L29VSS L25VSS
L24VSS L22VSS L18VSS L13VSS L1VSS K8VSS K4VSS K30VSS K28VSS K27VSS
K26VSS K19VSS K13VSS K11VSS J4VSS J15VSS J13VSS J11VSS H8VSS H25VSS
H21VSS H2VSS H15VSS H11VSS G31VSS G27VSS G22VSS G17VSS G15VSS F4VSS
F28VSS F24
C83
1
U
_
0
4
0
2
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6
.
3
V
6
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C83
1
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_
0
4
0
2
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6
.
3
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6
K
1
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C2411U_0603_10V6KC2411U_0603_10V6K
1
2
C189
1
U
_
0
6
0
3
_
1
0
V
6
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C189
1
U
_
0
6
0
3
_
1
0
V
6
K
1
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R321
0_0603_5%
R321
0_0603_5%12
C74
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.
2
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6
0
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6
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C74
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0
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6
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1
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-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_DQS#5
DRAMRST#
+DDR_VREF_CA
PM_EXTTS#0
CLK_SMBCLKCLK_SMBDATA
DDR_A_D26
DDR_A_DQS6
DDR_A_D25
DDR_A_D2
DDR_A_MA12
DDR_A_D35
DDR_A_D42
DDR_A_DQS4
DDR_CKE0
DDR_A_D59
DDR_A_MA3
DDR_CS#1
DDR_A_WE#
DDR_A_D57
DDR_A_D0
DDR_A_DM0
DDR_A_D51
DDR_A_D19
DDR_A_DQS2
DDR_A_DM5
DDR_A_D58
DDR_A_D33
DDR_A_MA8
DDR_A_D10
DDR_A_MA10
DDR_A_D3
DDR_A_D27
DDR_A_DQS#6
DDR_A_D1
DDR_A_D16
DDR_A_MA9
DDR_A_D40
DDR_A_DM3
DDR_A_DQS#4
DDR_A_D49
DDR_A_D9
DDR_A_BS2
DDR_A_MA1
DDR_A_DM7
DDR_A_BS0
DDR_A_CAS#
DDR_A_DQS#1
DDR_A_MA5
DDR_A_D24
DDR_A_D56
DDR_A_D18
DDR_A_D43
DDR_A_D34
DDR_A_D48
DDR_A_D11
DDR_A_DQS#2
M_CLK_DDR#0M_CLK_DDR0
DDR_A_D32
DDR_A_D50
DDR_A_MA13
DDR_A_DQS1
DDR_A_D8
DDR_A_D17
DDR_A_D41
DDR_A_D36
DDR_A_D63
DDR_A_D5
DDR_A_D22
DDR_A_D14
DDR_A_DQS#0
DDR_A_DM6
DDR_CKE1
DDR_A_D12
DDR_A_D31
DDR_A_D39
DDR_A_BS1
DDR_A_D6
DDR_A_DQS0
DDR_A_MA7
DDR_A_DM2
DDR_A_MA0
DDR_A_DQS7
DDR_A_D46
DDR_A_D28
DDR_A_DM1
DDR_A_D4
DDR_A_DM4
DDR_A_D44
DDR_A_RAS#
DDR_A_D30
DDR_A_DQS3
DDR_CS#0
DDR_A_MA6
DDR_A_D29
DDR_A_DQS#7
DDR_A_D54
DDR_A_D52
DDR_A_D45
DDR_A_DQS5
DDR_A_D7
DDR_A_D13
DDR_A_D20
DDR_A_D60
DDR_A_D37
M_ODT0
DDR_A_D55
DDR_A_D21
DDR_A_MA14
DDR_A_MA4
DDR_A_D62
DDR_A_D15
DDR_A_D23
M_ODT1
DDR_A_D53
DDR_A_D47
M_CLK_DDR#1M_CLK_DDR1
DDR_A_MA11
DDR_A_DQS#3
DDR_A_D38
DDR_A_D61
DDR_A_MA2
+1.5V_PG
DRAM_PWROK
+DDR_VREF_DQ
+DDR_VREF_CA
+DDR_VREF_DQ
M_CLK_DDR1 (4)
DRAMRST# (4)
DDR_A_BS0(4)DDR_A_WE#(4) DDR_CS#0 (4)DDR_A_CAS#(4)
DDR_CKE0(4)
M_CLK_DDR#1 (4)
CLK_SMBDATA (8,15,27)
M_CLK_DDR0(4)M_CLK_DDR#0(4)
DDR_A_BS1 (4)
M_ODT0 (4)
DDR_A_BS2(4)
CLK_SMBCLK (8,15,27)
M_ODT1 (4)
DDR_A_RAS# (4)
DDR_A_DQS#[0..7](4)
DDR_A_DQS[0..7](4)
DDR_A_D[0..63](4)DDR_A_DM[0..7](4)
DDR_A_MA[0..14](4)
DDR_CKE1 (4)
PM_EXTTS#0 (5)
DDR_CS#1(4)
DRAM_PWROK (4)
PM_SLP_S4#(13,17)+1.5V_PG (34)
SYSON(17,29,34)
+1.5V
+0.75VS
+3VS
+1.5V +1.5V
+0.75VS
+5VALW +1.5V
+1.5V
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1DDR3-SODIMMA
B
7 39Tuesday, June 22, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1DDR3-SODIMMA
B
7 39Tuesday, June 22, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1DDR3-SODIMMA
B
7 39Tuesday, June 22, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
Layout Note:Place near JDIMM1.203 & JDIMM1.204
Layout Note:Place near JDIMM1
4HDIMM_A(REV)
2010/01/18 DDR3 modify
Layout Note:Place near JDIMM1.1
Layout Note:Place near JDIMM1.126
Change C116,C141 toSE076104K80 2010/04/06
R
6
6
1
0
K
_
0
4
0
2
_
5
%
R
6
6
1
0
K
_
0
4
0
2
_
5
%
1
2
R65 10K_0402_5%R65 10K_0402_5%1 2
EB
CQ39
MMBT3904_SOT23
EB
CQ39
MMBT3904_SOT23
2
3
1
C1201
0.1U
_0402_16V4Z
C1201
0.1U
_0402_16V4Z
1
2
C1203
0.1U
_0402_16V4Z
C1203
0.1U
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1
2
C112
2
.
2
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_
0
4
0
2
_
6
.
3
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C112
2
.
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_
0
4
0
2
_
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.
3
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1
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R141510K_0402_5%R141510K_0402_5%
1
2
C1192
0.1U_0402_10V7K
C1192
0.1U_0402_10V7K 1
2
R1427
1K_0402
_1%
R1427
1K_0402
_1%
1
2
R14180_0402_5%
@ R14180_0402_5%
@
1
2
R1424
1K_0402_1%
R1424
1K_0402_1%
1 2
C128
2.2U
_0603_6
.3V6K~D
C128
2.2U
_0603_6
.3V6K~D
1
2
C109
2.2U
_0603_6
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C109
2.2U
_0603_6
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1
2
C130
2.2U
_0603_6
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C130
2.2U
_0603_6
.3V6K~D
1
2
C1191
1U_0402
_6.3V4Z
C1191
1U_0402
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1
2
C1197
0.1U
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C1197
0.1U
_0402_16V4Z
1
2
C110
2.2U
_0603_6
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C110
2.2U
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1
2
C105
0.1U
_0402_16V4Z
C105
0.1U
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1
2
R1421
1K_0402_1%
@R1421
1K_0402_1%
@1 2
C
1
4
1
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1
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_
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4
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2
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7
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C
1
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1
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_
0
4
0
2
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6
V
7
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1
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C129
2.2U
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C129
2.2U
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1
2
C1198
2.2U
_0402_6
.3VM
C1198
2.2U
_0402_6
.3VM
1
2
R1416
1K_0402_1% R1416
1K_0402_1%
1
2
C1195
2.2U
_0603_6
.3V6K~D
C1195
2.2U
_0603_6
.3V6K~D
1
2
C117
0.1U
_0402_16V4Z
C117
0.1U
_0402_16V4Z
1
2
EB
CQ38
MMBT3904_SOT23
EB
CQ38
MMBT3904_SOT23
2
3
1
C106
0.1U
_0402_16V4Z
C106
0.1U
_0402_16V4Z
1
2
C115
0.1U
_0402_16V4Z
C115
0.1U
_0402_16V4Z
1
2
JDIM1
FOX_AS0A626-U4RN-7F
JDIM1
FOX_AS0A626-U4RN-7F
VREF_DQ1 VSS1 2VSS23 DQ4 4DQ05 DQ5 6DQ17 VSS3 8VSS49 DQS#0
10DM011 DQS0 12VSS513 VSS6 14DQ215 DQ6 16DQ317 DQ7 18VSS719 VSS8
20DQ821 DQ12 22DQ923 DQ13 24VSS925 VSS10 26DQS#127 DM1 28DQS129
RESET# 30VSS1131 VSS12 32DQ1033 DQ14 34DQ1135 DQ15 36VSS1337 VSS14
38DQ1639 DQ20 40DQ1741 DQ21 42VSS1543 VSS16 44DQS#245 DM2 46DQS247
VSS17 48VSS1849 DQ22 50DQ1851 DQ23 52DQ1953 VSS19 54VSS2055 DQ28
56DQ2457 DQ29 58DQ2559 VSS21 60VSS2261 DQS#3 62DM363 DQS3 64VSS2365
VSS24 66DQ2667 DQ30 68DQ2769 DQ31 70VSS2571 VSS26 72
A12/BC#83 A11 84A985 A7 86VDD587 VDD6 88A889 A6 90
CKE073 CKE1 74VDD175 VDD2 76NC177 A15 78BA279 A14 80VDD381 VDD4
82
A591 A4 92VDD793 VDD8 94A395 A2 96A197 A0 98VDD999 VDD10
100CK0101 CK1 102CK0#103 CK1# 104VDD11105 VDD12 106A10/AP107 BA1
108BA0109 RAS# 110VDD13111 VDD14 112WE#113 S0# 114CAS#115 ODT0
116VDD15117 VDD16 118A13119 ODT1 120S1#121 NC2 122VDD17123 VDD18
124NCTEST125 VREF_CA 126VSS27127 VSS28 128DQ32129 DQ36 130DQ33131
DQ37 132VSS29133 VSS30 134DQS#4135 DM4 136DQS4137 VSS31 138VSS32139
DQ38 140DQ34141 DQ39 142DQ35143 VSS33 144VSS34145 DQ44 146DQ40147
DQ45 148DQ41149 VSS35 150VSS36151 DQS#5 152DM5153 DQS5 154VSS37155
VSS38 156DQ42157 DQ46 158DQ43159 DQ47 160VSS39161 VSS40 162DQ48163
DQ52 164DQ49165 DQ53 166VSS41167 VSS42 168DQS#6169 DM6 170DQS6171
VSS43 172VSS44173 DQ54 174DQ50175 DQ55 176DQ51177 VSS45 178VSS46179
DQ60 180DQ56181 DQ61 182DQ57183 VSS47 184VSS48185 DQS#7 186DM7187
DQS7 188VSS49189 VSS50 190DQ58191 DQ62 192DQ59193 DQ63 194VSS51195
VSS52 196SA0197 EVENT# 198VDDSPD199 SDA 200SA1201 SCL 202VTT1203
VTT2 204
G1205 G2 206
R1417
0_0402_5%
R1417
0_0402_5%
1
2
C111
0.1U
_0402_16V4Z
C111
0.1U
_0402_16V4Z
1
2
C1196
0.1U
_0402_16V4Z
C1196
0.1U
_0402_16V4Z
1
2
C1202
0.1U
_0402_16V4Z
C1202
0.1U
_0402_16V4Z
1
2
R1425
1K_0402
_1%
R1425
1K_0402
_1%
1
2
R1422
1K_0402_1%
R1422
1K_0402_1%
1 2
C1199
0.1U
_0402_16V4Z
C1199
0.1U
_0402_16V4Z
1
2
C
1
1
6
.
1
U
_
0
4
0
2
_
1
6
V
7
K
C
1
1
6
.
1
U
_
0
4
0
2
_
1
6
V
7
K
1
2
C107
0.1U
_0402_16V4Z
C107
0.1U
_0402_16V4Z
1
2
C1204
0.1U
_0402_16V4Z
C1204
0.1U
_0402_16V4Z
1
2
R1426
1K_0402_1%
R1426
1K_0402_1%
1 2
C108
0.1U
_0402_16V4Z
C108
0.1U
_0402_16V4Z
1
2
+ C1194
330U 2
.5V Y
+ C1194
330U 2
.5V Y
1
2
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FSB
FSC
CLK_XTAL_IN
CLK_XTAL_OUT
ITP_EN
+1.05VM_CK505
CLK_SMBDATA
CLK_SMBCLK
CLK_SMBDATA
CLK_SMBCLK
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_CPU_HPLCLK
CLK_CPU_HPLCLK#
CLK_CPU_DREFCLK
CLK_CPU_DREFCLK#
CPU_SSCDREFCLK
CPU_SSCDREFCLK#
FSA
FSC
CLK_XTAL_OUT
CLK_XTAL_IN
PCI2_TME
ITP_EN PCI4_SEL PCI2_TME
WLAN_CLKREQ#
PCI4_SELWWAN_CLKREQ#
FSB
CLK_PCIE_PCH
CLK_PCIE_PCH#
CLK_PCIE_SATA
CLK_PCIE_SATA#
+1.5VM_CK505
CLK_EN
CLK_PCIE_LAN
CLK_PCIE_LAN#
CLK_EN
CLK_CPU_EXP#
CLK_CPU_EXP
CLK_PCIE_WLAN
CLK_PCIE_WLAN#
CLK_PCIE_WWAN
CLK_PCIE_WWAN#
WWAN_CLKREQ#
WLAN_CLKREQ#
LAN_CLKREQ#
LAN_CLKREQ#
FSACLK_PCH_48M(13)
CLK_PCH_14M(13)
VGATE(5,13,17,36)
H_STP_PCI#(13)H_STP_CPU#(13)
CLK_PCI_PCH(11)
ICH_SMBDATA(13)
ICH_SMBCLK(13)
CLK_SMBDATA (7,15,27)CLK_SMBCLK (7,15,27)
CLK_CPU_BCLK# (5)CLK_CPU_BCLK (5)
CLK_CPU_HPLCLK (5)CLK_CPU_HPLCLK# (5)
CPU_DREFCLK (5)CPU_DREFCLK# (5)
CPU_SSCDREFCLK (5)CPU_SSCDREFCLK# (5)
CPU_BSEL0(5)
CPU_BSEL1(5)
CPU_BSEL2(5)
CLK_PCI_LPC(17)
CLK_ENABLE#(36)
CLK_PCIE_PCH# (13)CLK_PCIE_PCH (13)
CLK_PCIE_SATA (12)CLK_PCIE_SATA# (12)
CLK_PCIE_LAN# (25)CLK_PCIE_LAN (25)
CPU_ITP (4)CPU_ITP# (4)
CLK_CPU_EXP (4)CLK_CPU_EXP# (4)
CLK_PCIE_WLAN (26)CLK_PCIE_WLAN# (26)
CLK_PCIE_WWAN (15)CLK_PCIE_WWAN# (15)
WWAN_CLKREQ# (15)
WLAN_CLKREQ# (26)
LAN_CLKREQ# (25)
CLK_PCI_TPM(27)
+3VM_CK505
+3VS
+3VS+3VM_CK505
+3VS
+1.05VM_CK505
+VCCP
+VCCP
+VCCP
+VCCP
+3VS+3VS +3VS
+3VS
+3VS
+1.5VS
+3VS
+1.5VS
+VCCP
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
Clock Generator CK505
8 39Thursday, June 03, 2010
2007/10/15 2008/10/15Compal Electronics, Inc.
LA-6421P
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
Clock Generator CK505
8 39Thursday, June 03, 2010
2007/10/15 2008/10/15Compal Electronics, Inc.
LA-6421P
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
Clock Generator CK505
8 39Thursday, June 03, 2010
2007/10/15 2008/10/15Compal Electronics, Inc.
LA-6421P
SRC PORT LIST
REQ_3#DEVICEPORT
REQ PORT LIST
REQ_4#REQ_6#REQ_7#REQ_9#REQ_10#REQ_11#REQ_A#
For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#For PCI4_SEL, 0 =
Pin24/25 : DOT96 / DOT96# Pin28/29 : LCDCLK / LCDCLK#
1 = Pin24/25 : SRC_0 / SRC_0# Pin28/29 : 27M/27M_SS
PCIE_WLAN
Routing the trace at least 10mil
1000
CLKSEL1
0
PCIMHz
266
SRCMHz
CPUMHzCLKSEL2
33.30
FSACLKSEL0
FSC FSB REFMHz
DOT_96MHz
USBMHz
14.318 96.0 48.0
0 1000 133 33.31 14.318 96.0 48.0
0 1001 200 33.30 14.318 96.0 48.0
0 1001 166 33.31 14.318 96.0 48.0
1 1000 333 33.30 14.318 96.0 48.0
1 1000 100 33.31 14.318 96.0 48.0
1 1001 400 33.30 14.318 96.0 48.0
1 1 1 ReservedIDT: SA00003H610
Realtek: SA00003H730
SRC10SRC11
PCIE_PCHSRC6SRC4
SRC1
DEVICE
SRC3
CPU_SSCDREFCLKSRC2
SRC7
SRC9SRC8
PCIE_LAN
PCIE_WLAN
For PCI2_TME:0=Overclocking of CPU and SRC allowed(ICS only)
1=Overclocking of CPU and SRC NOT allowed
PORT
PCIE_SATA
PCIE_WWAN
Add R107 05/04
PCIE_WWAN
Add 1K follow Intel check list 05/11
Modify CLK SRC Port list 05/12
Add WWAN_CLKREQ# 05/04
Change C174 C175 to 10U_0603 05/14
Follow Intel check list change to 27P 06/05
Rename 06/06
Add C1145 C1146 C1147 for EMI 06/12
CLK_CPU_EXP
Change C1350 C1351 to 0402 type 06/24
Change co-lay net name to +1.5VM_CK505 07/03
Follow Vendor check change to 22P 10/16
CPU_ITP
Add R1443 for TPM 2010/03/25
Change Q10 to SB00000DH00 2010/04/06
del C1219 R1442 04/14
Follow Vendor check change to 33P 05/24
R10433_0402_5%
R10433_0402_5%1 2
C148
0.1U_0402_16V4Z
C148
0.1U_0402_16V4Z
1
2
R73
1K_0402_5%@
R73
1K_0402_5%@
1
2
Q10B2N7002DW-T/R7_SOT363-6
Q10B2N7002DW-T/R7_SOT363-6
3
5
4
C172
0.1U_0402_16V4Z
C172
0.1U_0402_16V4Z
1
2
R52 1K_0402_1%R52 1K_0402_1%1 2
U4
SLG8SP556VTR_QFN72_10X10
U4
SLG8SP556VTR_QFN72_10X10
CKPWRGD/PD#1
FS_B/TEST_MODE2
VSS_REF3
XTAL_OUT4XTAL_IN5
VDD_REF6
REF_0/FS_C/TEST_7
REF_18
SDA 9
SCL 10
NC11
VDD_PCI12
PCI_113
PCI_214
PCI_315
PCI_4/SEL_LCDCL16
PCIF_5/ITP_EN17
VSS_PCI18
VDD_4819
USB_0/FS_A20
USB_1/CLKREQ_A# 21
VSS_4822
VDD_IO23
SRC_0/DOT_96 24
SRC_0#/DOT_96# 25
VSS_IO26
VDD_PLL327
LCDCLK/27M 28
LCDCLK#/27M_SS 29
VSS_PLL330
VDD_PLL3_IO31
SRC_2 32
SRC_2# 33
VSS_SRC34
SRC_3 35
SRC_3# 36
VDD_CPU72CPU_0 71
CPU_0# 70
VSS_CPU69
CPU_1 68
CPU_1# 67
VDD_CPU_IO66
CLKREQ_7# 65
SRC_8/CPU_ITP 64
SRC_8#/CPU_ITP# 63
VDD_SRC_IO62
SRC_7 61
SRC_7# 60
VSS_SRC59
CLKREQ_6# 58
SRC_6 57
SRC_6# 56
VDD_SRC55
PCI_STOP#54CPU_STOP#53
VDD_SRC_IO52
SRC_10# 51SRC_10 50
SLKREQ_10# 49
SRC_11 48
SRC_11# 47
CLKREQ_11# 46
SRC_9# 45SRC_9 44
CLKREQ_9# 43
VSS_SRC42
CLKREQ_4# 41
SRC_4# 40SRC_4 39
VDD_SRC_IO38
CLKREQ_3# 37
VSS73
R72
2.2K_0402_5%
R72
2.2K_0402_5%
Q31
DTC115EUA_SC70-3
Q31
DTC115EUA_SC70-3
2
1
3
R92
470_0402_5%
@R92
470_0402_5%
@
1
2
R89
10K_0402_5%
R89
10K_0402_5%
1
2
R77
10K_0402_5%
@R77
10K_0402_5%
@
1
2
R85
10K_0402_5%@
R85
10K_0402_5%@
1
2
C146
0.1U_0402_16V4Z
C146
0.1U_0402_16V4Z
1
2
C174
10U_0603_6.3V6M
C174
10U_0603_6.3V6M
1
2
R1349 0_0603_5%R1349 0_0603_5%1 2
C165
0.1U_0402_16V4Z
C165
0.1U_0402_16V4Z
1
2
C388
1
0
P
_
0
4
0
2
_
5
0
V
8
J
C388
1
0
P
_
0
4
0
2
_
5
0
V
8
J
1
2
C389
1
5
P
5
0
V
J
N
P
O
0
4
0
2
C389
1
5
P
5
0
V
J
N
P
O
0
4
0
2
1
2
C1145
47P_0402_50V8J
C1145
47P_0402_50V8J
1
2
C114747P_0402_50V8J
C114747P_0402_50V8J
1
2
C167
0.1U_0402_16V4Z
C167
0.1U_0402_16V4Z
1
2
C1146
47P_0402_50V8J
C1146
47P_0402_50V8J
1
2
Y1
14.31818MHZ L5020-14.31818-20
Y1
14.31818MHZ L5020-14.31818-20
1
2
R9810K_0402_5%R9810K_0402_5%
12
C169
0.1U_0402_16V4Z
C169
0.1U_0402_16V4Z
1
2
R87
0_0402_5%@
R87
0_0402_5%@
1
2
C173
0.1U_0402_16V4Z
C173
0.1U_0402_16V4Z
1
2
R110
0_0402_5%@R110
0_0402_5%@
1
2
R86
TPM@
R86
TPM@
C175
10U_0603_6.3V6M
C175
10U_0603_6.3V6M
1
2
C1119
10U_0603_6.3V6M
C1119
10U_0603_6.3V6M
1
2
R86 33_0402_5%R86 33_0402_5%1 2
C390 10P_0402_50V8JC390 10P_0402_50V8J1 2
C139
0.1U_0402_16V4Z
C139
0.1U_0402_16V4Z
1
2
R762.2K_0402_5%R762.2K_0402_5%
12
R1430 4.7K_0402_5%R1430 4.7K_0402_5%12
R1350 0_0402_5%@
R1350 0_0402_5%@1 2
R75 33_0402_5%R75 33_0402_5%1 2
R95
10K_0402_5%@
R95
10K_0402_5%@
1
2
R137
0_0603_5%
R137
0_0603_5%1 2
R1190_0402_5%R1190_0402_5%
1 2
R3710_0402_5%
@
R3710_0402_5%
@
1 2
R435
10K_0402_5%
R435
10K_0402_5%
1
2
C160
0.1U_0402_16V4Z
C160
0.1U_0402_16V4Z1
2
C137
0.1U_0402_16V4Z
C137
0.1U_0402_16V4Z
1
2
C161 33P 50V J NPO 0402C161 33P 50V J NPO 0402
C1221 10P_0402_50V8JC1221 10P_0402_50V8J1 2
R1351 0_0402_5%R1351 0_0402_5%1 2
R840_0402_5%R840_0402_5%
1 2
R144322_0402_5%
TPM@ R144322_0402_5%
TPM@1 2
R690_0402_5%R690_0402_5%
1 2
R71
10K_0402_5%
R71
10K_0402_5%
1
2
C138
0.1U_0402_16V4Z
C138
0.1U_0402_16V4Z
1
2
R138
0_0603_5%
R138
0_0603_5%1 2
C164 33P 50V J NPO 0402C164 33P 50V J NPO 0402
R113
470_0402_5%
@R113
470_0402_5%
@12
C140
0.1U_0402_16V4Z
C140
0.1U_0402_16V4Z
1
2
R80 33_0402_5%R80 33_0402_5%1 2
R107 10K_0402_5%R107 10K_0402_5%12
R68
470_0402_5%
@R68
470_0402_5%
@
1
2
R121 10K_0402_5%R121 10K_0402_5%12
Q10A2N7002DW-T/R7_SOT363-6
Q10A2N7002DW-T/R7_SOT363-6
6 1
2
R1348 0_0603_5%@
R1348 0_0603_5%@1 2
R91
2.2K_0402_5%
R91
2.2K_0402_5%
R90
10K_0402_5%
R90
10K_0402_5%
1
2
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LVDS_SDA
LVDS_SCL
INVT_PWM
+CAM_VCC
+
L
C
D
V
D
D
_
R
USB20_P3
USB20_N3
USB20_N3_1
USB20_P3_1
USB20_P3
LVDS_A1#LVDS_A1
+LCDVDD_L
+LEDVDD
INVT_PWMINVT_PWMBKOFF#
LVDS_SCLLVDS_SDA
LVDS_A0LVDS_A0#
LVDS_A2LVDS_A2#
LVDS_ACLK#LVDS_ACLK
USB20_P3_1USB20_N3_1
BKOFF#
USB20_P3_1
USB20_N3_1
LVDS_SCL (5)LVDS_SDA (5)
GMCH_ENVDD(5)
USB20_N3 (13)
USB20_P3 (13)
LVDS_A1 (5)LVDS_A1# (5)
INVT_PWM (5,17)BKOFF# (17)
LVDS_A0 (5)LVDS_A0# (5)
LVDS_A2# (5)LVDS_A2 (5)
LVDS_ACLK (5)LVDS_ACLK# (5)
DMIC_DATA (22)DMIC_CLK (22)
+3VS
+3VS+LCDVDD +3VS
+3VS
+LCDVDD
+CAM_VCC
+3VS+LCDVDD
B+
+CAM_VCC
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1LVDS /INVERTER
B
9 39Friday, June 25, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1LVDS /INVERTER
B
9 39Friday, June 25, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1LVDS /INVERTER
B
9 39Friday, June 25, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
CMOS & LCD/PANEL BD. Conn.
LCD POWER CIRCUIT
W=20mils W=20mils
Modify 05/11
Change C1106 to 4.7U_0603 05/14
Add D6 05/14
Change R577 to 0402 SIZE 06/16
camera
(20 MIL)
Add for RF 07/02
Modify JLVDS1 08/04
For RF
Add R1444 R1445 2010/03/25
G
D
S
Q4
2N7002W-T/R7_SOT323-3 G
D
S
Q4
2N7002W-T/R7_SOT323-32
1
3
C1111330P_0402_50V7K3G@
C1111330P_0402_50V7K3G@
1
2
C1167
1
0
P
_
0
4
0
2
_
5
0
V
8
J
@
C1167
1
0
P
_
0
4
0
2
_
5
0
V
8
J
@
1
2
C11130.1U_0402_16V4Z
C11130.1U_0402_16V4Z
1
2
C1112100P_0402_50V8J3G@
C1112100P_0402_50V8J3G@
1
2
Q5DTC115EUA_SC70-3Q5DTC115EUA_SC70-3
2
1
3
C11074.7U_0603_6.3V6K
@
C11074.7U_0603_6.3V6K
@
1
2
C1156220P_0402_50V7K
3G@
C1156220P_0402_50V7K
3G@
1
2
R14440_0402_5% MIC@ R14440_0402_5% MIC@12
G
D S
Q3
NTR
4101PT1G 1P
SOT
-23-3
G
D S
Q3
NTR
4101PT1G 1P
SOT
-23-3
2
1 3
R578100K_0402_5%
R578100K_0402_5%
1
2
D6
PJUSB208_SOT23-6
@
D6
PJUSB208_SOT23-6
@
CH36
Vp5
CH44
CH2 3
Vn 2
CH1 1
C1108
0.047U_0402_16V4Z
C1108
0.047U_0402_16V4Z
1
2
C1106
4
.
7
U
_
0
6
0
3
_
6
.
3
V
6
K
C1106
4
.
7
U
_
0
6
0
3
_
6
.
3
V
6
K
1
2
R577
470_0402_5%
R577
470_0402_5%
1
2
L3
WCM2012F2S-900T04_0805
@ L3
WCM2012F2S-900T04_0805
@1 122
33 4 4
R579 4.7K_0402_5%
R579 4.7K_0402_5%
12
JLVDS1
ACES_88341-3000B001
CONN@
JLVDS1
ACES_88341-3000B001
CONN@
123456789
101112131415161718192021222324252627282930
3336
32
R
1
1
8
1
2
.
2
K
_
0
4
0
2
_
5
%
R
1
1
8
1
2
.
2
K
_
0
4
0
2
_
5
%
1
2
C11050.1U_0402_16V4Z
C11050.1U_0402_16V4Z
1
2
R11820_0402_5% R11820_0402_5%12
R174100K_0402_5%
R174100K_0402_5%
1
2
L2FBMA-L11-201209-221LMA30T_0805
L2FBMA-L11-201209-221LMA30T_0805
1 2
C11091000P 50V K X7R 04023G@
C11091000P 50V K X7R 04023G@
1
2
R11830_0402_5% R11830_0402_5%12
R14450_0402_5% CMIC@ R14450_0402_5% CMIC@ 12
C1168
1
0
P
_
0
4
0
2
_
5
0
V
8
J
@
C1168
1
0
P
_
0
4
0
2
_
5
0
V
8
J
@
1
2
L1
FBMA-L11-201209-221LMA30T_0805
L1
FBMA-L11-201209-221LMA30T_0805
12
J1
JUMP_43X39@
J1
JUMP_43X39@
11 2 2
R
1
1
8
0
2
.
2
K
_
0
4
0
2
_
5
%
R
1
1
8
0
2
.
2
K
_
0
4
0
2
_
5
%
1
2
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
GREEN
BLUE
VGA_DDC_DAT
RED
CRT_VSYNC_1
CRT_HSYNC_1
VGA_DDC_CLK
CRT_DET#
CRT_DET
CRT_DET#
JVGA_VS
RED
BLUE
VGA_DDC_DATGREEN
VGA_DDC_CLK
JVGA_HS
JVGA_VS
JVGA_HS
GMCH_CRT_VSYNC(5)
GMCH_CRT_DATA(5)
GMCH_CRT_CLK(5)
GMCH_CRT_B(5)
GMCH_CRT_G(5)
GMCH_CRT_R(5)
GMCH_CRT_HSYNC(5)
CRT_DET(13)
+5VS
+5VS
+CRT_VCC
+3VS
+3VS
+3VS
+CRT_VCC
+5VS
+CRT_VCC
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1CRT PORT
B
10 39Tuesday, June 22, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1CRT PORT
B
10 39Tuesday, June 22, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1CRT PORT
B
10 39Tuesday, June 22, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
CRT PORT
Close to CRT CONN for ESD.
High: CRT Plugged
Modify C31- C308 C303 C307 C306 C304 BOM Structure 0615
W=40milsChange JCRT1 P/N to SP010906182 06/22
12/29
Change L12. L14, L15 to SM01000C600 2010/04/06
Change Q24 to SB00000DH00 2010/04/06
D17
P
J
D
L
C
0
5
C
_
S
O
T
2
3
-
3
@D17
P
J
D
L
C
0
5
C
_
S
O
T
2
3
-
3
@
23
1
Q24B2N7002DW-T/R7_SOT363-6
Q24B2N7002DW-T/R7_SOT363-6
3
5
4
R1103100K_0402_5%
R1103100K_0402_5%
1
2
R246
2.2K_0402_5%
R246
2.2K_0402_5%
1
2
C310
1
0
P
_
0
4
0
2
_
5
0
V
8
J
C310
1
0
P
_
0
4
0
2
_
5
0
V
8
J
1
2
R255
1
5
0
_
0
4
0
2
_
1
%
R255
1
5
0
_
0
4
0
2
_
1
%
1
2
L14 CHENG-HANN MBK1005470YZF 0402L14 CHENG-HANN MBK1005470YZF
04021 2
L12 CHENG-HANN MBK1005470YZF 0402L12 CHENG-HANN MBK1005470YZF
04021 2
D18
P
J
D
L
C
0
5
C
_
S
O
T
2
3
-
3
@
D18
P
J
D
L
C
0
5
C
_
S
O
T
2
3
-
3
@
23
1
G
D
S
Q112N7002W-T/R7_SOT323-3@
G
D
S
Q112N7002W-T/R7_SOT323-3@
2
1
3
U11
SN74AHCT1G125DCKR_SC70-5
U11
SN74AHCT1G125DCKR_SC70-5
A2 Y 4OE
#
1
G
3
P
5
JCRT1
SUYIN_070546FR015M21RZR
CONN@JCRT1
SUYIN_070546FR015M21RZR
CONN@6
1117
1228
1339
144
1015
5
1617
C303
1
0
P
_
0
4
0
2
_
5
0
V
8
J
C303
1
0
P
_
0
4
0
2
_
5
0
V
8
J
1
2
R250
1
5
0
_
0
4
0
2
_
1
%
R250
1
5
0
_
0
4
0
2
_
1
%
1
2
U10
SN74AHCT1G125DCKR_SC70-5
U10
SN74AHCT1G125DCKR_SC70-5
A2 Y 4OE
#
1
G
3
P
5
C1420.1U_0402_16V4ZC1420.1U_0402_16V4Z
1 2
L15 CHENG-HANN MBK1005470YZF 0402L15 CHENG-HANN MBK1005470YZF
04021 2
R245
2.2K_0402_5%
R245
2.2K_0402_5%
1
2
Q24A2N7002DW-T/R7_SOT363-6Q24A2N7002DW-T/R7_SOT363-6
61
2
D3
RB491D_SC59-3
D3
RB491D_SC59-3
2 1
C30410P_0402_50V8JC30410P_0402_50V8J
1
2
C301 0.1U_0402_16V4ZC301 0.1U_0402_16V4Z1 2
R251
2.2K_0402_5%
R251
2.2K_0402_5%
1
2
R14910K_0402_5%@
R14910K_0402_5%@
1
2
C30710P_0402_50V8J
C30710P_0402_50V8J
1
2
R248
2.2K_0402_5%
R248
2.2K_0402_5%
1
2
C30610P_0402_50V8JC30610P_0402_50V8J
1
2
C298 0.1U_0402_16V4ZC298 0.1U_0402_16V4Z1 2
F1
1.1A_6VDC_FUSE
F1
1.1A_6VDC_FUSE
21
R253
1
5
0
_
0
4
0
2
_
1
%
R253
1
5
0
_
0
4
0
2
_
1
%
1
2
C308
1
0
P
_
0
4
0
2
_
5
0
V
8
J
C308
1
0
P
_
0
4
0
2
_
5
0
V
8
J
1
2
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCI_DEVSEL#
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_STOP#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_PIRQA#PCI_PIRQB#PCI_PIRQC#PCI_PIRQD#PCI_PIRQE#PCI_PIRQF#PCI_PIRQG#PCI_PIRQH#
CLK_PCI_PCH
CLK_PCI_PCH
PCI_PIRQE#
CLK_PCI_PCH(8)
G_SENSOR_INT(27)
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1Tigerpoint(1/4)
11 39Thursday, June 03, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1Tigerpoint(1/4)
11 39Thursday, June 03, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF
COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET
INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF
THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY
COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT
PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-6421P 0.1Tigerpoint(1/4)
11 39Thursday, June 03, 2010
2006/08/18 2007/8/18Compal Electronics, Inc.
For EMI, close to TigerPoint
STRAP1#GPIO48
STRAP2#GPIO17
Boot BIOS
SPI
PCI
LPC
1
0
1
0
1
1
Add for G-sensor interrupt 2010/03/11
R29110K_0402_5% R29110K_0402_5%
R2338.2K_0402_5% R2338.2K_0402_5%
R2308.2K_0402_5% R2308.2K_0402_5%
R36310K_0402_5%@
R36310K_0402_5%@
R2388.2K_0402_5% R2388.2K_0402_5%
R2048.2K_0402_5% R2048.2K_0402_5%
PCI
TGP
1
U72A
TIGERPOINT_ES1_BGA360
PCI
TGP
1
U72A
TIGERPOINT_ES1_BGA360
PIRQH#/GPIO5F8PIRQG#/GPIO4H8PIRQF#/GPIO3D6PIRQE#/GPIO2E8PIRQD#H10PIRQC#B3PIRQB#D7PIRQA#B2
GPIO1C9GPIO22C15
RSVD02M13
REQ2#A20REQ1#G16
RSVD01K9
GPIO17/STRAP2#A2GPIO48/STRAP1#G14
STRAP0#D11
GNT2#E16GNT1#A18
FRAME#A16PERR#D10TRDY#A10PLOCK#A8STOP#F14SERR#B11PME#C22IRDY#B7PCIRST#A23PCICLKJ12DEVSEL#B15PARA5
C/BE3# L16C/BE2# C13C/BE1# M15C/BE0# H16
AD31 B1AD30 C1AD29 C7AD28 D9AD27 C8AD26 H12AD25 G12AD24 A6AD23
B5AD22 A3AD21 B8AD20 L12AD19 B13AD18 B9AD17 E12AD16 C11AD15 E10AD14
J14AD13 L14AD12 H14AD11 E14AD10 A13AD9 D15AD8 D16AD7 B19AD6 B18AD5
C19AD4 B17AD3 C18AD2 C17AD1 D18AD0 B22
R2088.2K_0402_5% R2088.2K_0402_5%
R2058.2K_0402_5% R2058.2K_0402_5%
R2318.2K_0402_5% R2318.2K_0402_5%
R2128.2K_0402_5% R2128.2K_0402_5%
R2108.2K_0402_5% R2108.2K_0402_5%
R3658.2K_0402_5% R3658.2K_0402_5%
R2358.2K_0402_5% R2358.2K_0402_5%
R2298.2K_0402_5% R2298.2K_0402_5%
R2068.2K_0402_5% R2068.2K_0402_5%
C43222P_0402_50V8J@C43222P_0402_50V8J@
1
2
R36610K_0402_5%
@
R36610K_0402_5%
@
R2118.2K_0402_5% R2118.2K_0402_5%
R33633_0402_5%@R33633_0402_5%@
1
2
R2078.2K_0402_5% R2078.2K_0402_5%
R29210K_0402_5
