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Slide 12009 Power Amplifier Symposium, San Diego, CA.
A Testbench for Analysis of Bias Network Effects in an RF Power Amplifier with DPD
Marius Ubostad and Morten OlavsbråtenDept. of Electronics and Telecommunications
Norwegian University of Science and Technology
Slide 22009 Power Amplifier Symposium, San Diego, CA.
Outline
IntroductionMotivationBias Network designDPD
Measurement SetupExperimental ResultsConclusions
Slide 32009 Power Amplifier Symposium, San Diego, CA.
Introduction
The power amplifier is a critical component in a wireless systemImportant power amplifier parameters:
Frequency bandPowerBandwidthLinearityEfficiencySize, cost ...
Linearity vs. efficiency tradeoffLinearization, efficiency enhancement Spectral maskSize,cost
Slide 42009 Power Amplifier Symposium, San Diego, CA.
Introduction
The scope of this work is to build a testbench where we can do most measurements necessary for a PA design In addition we want to measure the effect of different bias network in the PA A power amplifier based on a pHEMT transistor is deigned for the experimentsA standard bias network is first used for the experimentsTwo extreme variants where large inductors are used are tested to demonstrate the effect on the linearityThe measurements are done with and without DPD
Slide 52009 Power Amplifier Symposium, San Diego, CA.
Introduction
Bias network designIsolate RF from DCImportant for stability at low frequenciesDefines the impedance at basebandOften based on empirical design methodsMore critical as the bandwith of the signal increasesTraditionally simplified to a large inductor in text books, but recently this topic is being covered (Cripps)
Slide 62009 Power Amplifier Symposium, San Diego, CA.
Introduction
Different bias configurationsResistor improve stability, but not desirable at drainLarge impedance at baseband can result in drain modulation/memory effectsInternal parasitics in SMD components
Vdc
Vdc
Vdc
gate
drain
drain/gate
Slide 72009 Power Amplifier Symposium, San Diego, CA.
Introduction
Simple memoryless DPDComplex baseband samples at the input and output are recorded A blockbased least square algorithm is applied to identify the DPD coefficientsThe DPD algoritm and communication with the instruments is implemented in MatlabThe algoritm sensitive to memory that that has its origin in the bias network
The baseband DPD model based on indirect learningarchitecture
Slide 82009 Power Amplifier Symposium, San Diego, CA.
Measurement Setup
Anritsu A -10.05 dBmB 5.01 dBm
DUT
dBm
dBm
Volts Amps
10.05 0.0505
Volts Amps
10.05 0.0505
2.4 GHz 2 dBm
ROHDE & SCHWARZ
2.385 2.39 2.395 2.4 2.405 2.41 2.415
x 109
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
ROHDE & SCHWARZ
A -10.05 dBmB 5.01 dBm55.854 mA
FLUKE
PSU drain
PSU gate
Power meterSignal Analyzer
Power sensor B
Power sensor A
Driver Amplifier
Coupler Coupler
Signal Generator
Multimeter
GPIB bus
Source tuner Load tuner
Circulator Attenuator
PC
Slide 92009 Power Amplifier Symposium, San Diego, CA.
Measurement Setup
Combinations of quarter-wavelength transmission lines isolates bias circuitry from RF at f0 and 3f0, 2f0 shortedA 1 watt pHEMT transistor used in the experimentsThe transistor is biased in deep class AB2.4 Ghz
DUT
Slide 102009 Power Amplifier Symposium, San Diego, CA.
Experimental Results
1-tone measurementsSource- and load impedance optimized for best efficiency1-tone measurements are independent on the bias circuit
1 dB Compression
Pout 29.2 dBm
PAE 67 %
Slide 112009 Power Amplifier Symposium, San Diego, CA.
Experimental Results
2-tone measurements with reference bias
Close to short circuit at baseband at drainSmall differences between upper and lower IMD product, except one point
Bias circuit impedance
Slide 122009 Power Amplifier Symposium, San Diego, CA.
Experimental Results
2 tone measurements with large inductor at drain
Increasing differens in lower and upper IMD product
Bias circuit impedance drain
Slide 132009 Power Amplifier Symposium, San Diego, CA.
Experimental Results
2 tone measurements with large inductor at gate
Bias circuit impedance gate
Slide 142009 Power Amplifier Symposium, San Diego, CA.
Experimental Results
ACPR measurements with reference bias network
16 QAM, symbolrate 3.84 MHzAbout 10 dB improvement with DPD
Slide 152009 Power Amplifier Symposium, San Diego, CA.
Experimental Results
Linearity measurements with large inductor at drain
ACPR degradedDPD not able to compensate due to memory/drain modulation
Slide 162009 Power Amplifier Symposium, San Diego, CA.
Experimental Results
Linearity measurements with large inductor at gate
ACPR unchanged at low power levelsAt high output power ACPR is drastically degraded
Slide 172009 Power Amplifier Symposium, San Diego, CA.
Experimental Results
A large inductance at drain degrades the linearity, DPD cannot compensate for thisA large inductance at gate doesn’t affect the linearity at low power but has a significant impact at high power, gate modulation?
Slide 182009 Power Amplifier Symposium, San Diego, CA.
Conclusions
A testbench for PA design is presented that includes automized measurements In addition to load-pull the effect of the bias network can be easily measuredTo demonstrate the importance of the bias circuits two extreme variants are tested and their effect of the linearity are measuredMeasurements show that large inductance at drain degrades the linearity as expected and that a simple memoryless DPD cannot compensate for thisA large inductance at gate only affects the linearity at high power levels, gate modulation
Slide 192009 Power Amplifier Symposium, San Diego, CA.
Acknowledgement
We would like to thank:The Research Council of Norway, the research program WIWIC II
Thank you for your attention!