Microelectronic Engineering 61–62 (2002) 895–900www.elsevier.com/ locate /mee

A new masking method for protecting silicon surfaces duringanisotropic silicon wet etching

a , b,c a d a*P. Normand , K. Beltsios , A. Tserepi , K. Aidinis , D. Tsoukalas ,eC. Cardinaud

aInstitute of Microelectronics, NCSR Demokritos, 15310 Aghia Paraskevi, GreecebInstitute of Physical Chemistry, NCSR Demokritos, 15310 Aghia Paraskevi, Greece

cDepartment of Materials Science and Technology, University of Ioannina, Ioannina, GreecedPhysics Department, University of Athens, Panepistimiopolis, Athens 15784, Greece

e ´ `Institut des Materiaux Jean Rouxel, Laboratoire des Plasmas et des Couches Minces, 2 Rue de la Houssiniere,BP 32229, 44322 Nantes, France

Abstract

A room-temperature silicon masking approach based on the exposure of silicon to CHF -based plasma is3

explored. This plasma treatment leads to ultra-thin (2–5 nm) films that consist of a fluorocarbon top layer and asub-oxide lower layer and are appropriate for anisotropic wet etching masks. The mask resistance to anisotropicwet-etchants is studied as a function of film preparation parameters. Defect evolution is examined for two keyfilm preparation conditions. Masks explored compare favourably with common masking materials such as SiO2

or Si N in terms of achievable patterns and processing options compatible with standard silicon integrated3 4

circuit technology. In addition, the new masking method can be applied when sidewall-only wet etching of mesapatterns is desired. 2002 Elsevier Science B.V. All rights reserved.

Keywords: Silicon etching; Fluorocarbon film; Masking; Fluorocarbon plasma; Silicon micromachining; Mesa patterning

1. Introduction

Anisotropic wet etching of silicon wafers is widely used in bulk and surface micromachiningtechnology for the fabrication of static and dynamic mechanical silicon structures [1]. A wide varietyof chemical reagents are used as anisotropic etching solutions, the most common being potassiumhydroxide (KOH), ethylenediamine–pyrocatechol–water (EPW), and tetramethylammonium hydrox-ide (TMAH). Silicon can be protected against these anisotropic etchants by a wide variety of materials

*Corresponding author. Tel.: 1 30-1-6503-115; fax: 1 30-1-6511-723.E-mail address: p.normand@imel.demokritos.gr (P. Normand).

0167-9317/02/$ – see front matter 2002 Elsevier Science B.V. All rights reserved.PI I : S0167-9317( 02 )00510-5

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Fig. 1. A mesa-type of structure prepared by a 120 s CHF plasma exposure time. The trench-end detail in the inset allows3

for the visualization of a support-free version of the CMPL film.

such as thermally grown or deposited silicon dioxide (SiO ), and deposited silicon nitride (Si N ).2 3 4

Metal films such as gold and chromium are also suitable masks for EPW solutions.We recently reported a new simple and rapid room-temperature silicon masking approach based on

the exposure of silicon to CHF plasmas [2]. This plasma treatment allows for the generation, onto a3

silicon surface, of a composite material [2], hereafter referred as CMPL (composite material byplasma), that includes a fluorocarbon top film (that can remain continuous down to a 2 nm thickness)and an underlying thin silicon sub-oxide film [3]. A CMPL film, when formed under appropriateplasma conditions, offers a unique protection of silicon against EPW solutions (Fig. 1) and remainsresistant to such solutions at elevated temperatures typically applied for residue-free etching of bulksilicon.

In this work, the new masking process is compared to that achievable by SiO , Si N , or metal2 3 4

masking material. The resistance of the CMPL mask to EPW and KOH etching solutions is examinedas a function of plasma duration, silicon surface preparation and aging. Finally, the process of filmdestruction as a function of plasma duration and etching time is discussed and characteristic examplesof structures obtained are presented.

2. Experimental

CHF plasma exposure of Si surfaces was performed in a Nextral RIE parallel plate plasma reactor3

with a radio frequency (rf) of 13.56 MHz and a CHF gas flow rate of 50 sccm (standard cubic32centimeters per minute). The rf power density and the total pressure were fixed at 0.5 W/cm and 10

mTorr, respectively (1 Torr 5 133.322 Pa). The CHF plasma exposure time of Si surfaces was3

P. Normand et al. / Microelectronic Engineering 61 –62 (2002) 895 –900 897

selected from the 10 to 120 s range. Under such conditions, the thickness of the CMPL films is in therange of 3 nm as revealed by XPS measurements. All experiments were performed on 3-in.,[100]-oriented, 2–5 V cm, p- and n-type silicon wafers (1 in. 5 2.54 cm). Photoresist-patterned Siwafers were used for the evaluation of both the resistance of the CMPL films to anisotropic etchingsolutions and the corresponding Si etching depth. Following CHF plasma exposure of the patterned3

wafers, the latter were dipped in ultrasonically agitated hot acetone for 15 min, for the purpose ofresist removal; CMPL films remain unaffected by the latter acetone treatment. Prior to immersion intothe etching solutions the native oxide that forms on the Si surface was etched in a 1% HF solution for45 s and then rinsed in deionized water. A 20% (w/w) KOH solution was used. The composition ofEPW was 43.8% [E], 4.2% [P] and 52% [W] on a mole basis [1,4]. The wafers were etched in anoil-heated double-walled glass vessel and the bath temperature was held at 6060.5 8C (KOH) or11060.5 8C (EPW). The etch rate was 30 mm/h for KOH and 42 mm/h for EPW with areproducibility of 62 mm/h. Etch resistance of the CMPL films was evaluated by in situ observationand subsequent profilometry.

3. Results and discussion

The conventional fabrication of silicon structures in a silicon wafer through anisotropic wet etchinginvolves the two preliminary steps of formation and patterning of a masking material such as SiO ,2

Si N , or metal films. Patterning can be achieved by standard photolithographic procedures followed3 4

by suitable dry or wet etching processes. Etching processes suffer from the following twodisadvantages: (1) in the case of dry etching processing, the removal of the masking material withoutaffecting the silicon surface is difficult to obtain [5], (2) in the case of wet etching processing, somedegree of etching of the masking material underlying the photo-resist pattern cannot be avoided, thusaffecting the desired dimension of the masking-material pattern [2]. Such an over-etching can behighly undesirable, especially during the formation of silicon structures at the nanometer scale. Analternative solution, that avoids the dry or wet etching step in the patterning of the masking material,makes use of the lift-off process: a photo-resist pattern is first defined onto the silicon wafer, then themasking material is deposited and, finally, the photo-resist is removed. Nevertheless, there are certaindisadvantages of the lift-off process: (1) the deposited masking material is generally a metal, i.e., asubstance severely limiting allowable subsequent fabrication steps in standard silicon integratedcircuit technology, and/or also vulnerable to acid cleaning frequently applied for the removal ofstubborn photo-resist residues, (2) severe limitations exist regarding the details of the photo-resistprofile, as the features of the defined pattern should have negatively sloped side-walls, for lift-off to besuccessful. While a ‘lift-off’-type of process is used for the CMPL-based patterning, practically nolimitations exist regarding either the details of the photo-resist pattern profile or the thickness of thephoto-resist; this is because the acetone-resistant CMPL films are generated directly on silicon andexhibit a very low thickness (ca. 3 nm). Moreover, although acid cleaning affects substantially theresistance of the CMPL films [2], Si etch depths larger than 20 mm are attainable after 9 H SO :12 4

HNO treatments at a temperature of 80 8C or piranha (2 H SO :1 H O ) cleaning (Fig. 2) for 153 2 4 2 2

min.Fig. 2 shows the etch depth as a function of CHF -plasma duration and additional processing3

parameters. It can be seen that protection is primarily confined to the case of EPW etchant. In

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Fig. 2. Effect of processing conditions on the etch resistance of the mask. Si etch depths cited are those attainablebefore-in-situ observation of CMPL degradation. S1 and S4 refer to films aged for 1 day before EPW (S1) or KOH (S4)etching was performed, while S2 refers to films with aging times ranging from 6 to 20 days prior to EPW etching. S3 refersto films with aging from 1 to 20 days that were acid-cleaned prior to EPW etching. Details of etchant and cleaning-agentcompositions are given in the text.

addition, an increase in aging time (time elapsed between film formation and etching experiment)leads to a decrease in film resistance. Finally, acid cleaning leads to a decreased but aging-independent film resistance.

The aforementioned standard procedures of forming and patterning masking material onto thesurface of a silicon wafer present a major disadvantage if they are intended for lateral micromachiningof silicon structures with vertical sidewalls (i.e., normal to the surface of the silicon wafer), hereafterreferred to as mesas (for an array of mesas see Fig. 3). In particular, for processes aiming at a wetetching of the mesa sidewalls [6] and employing standard masking materials, just the top surface ofthe mesas can be protected against anisotropic etchant solutions, thus resulting in an undesirableetching of silicon surrounding the mesas (Fig. 3). In contrast, exposition of the mesas to fluorocarbonplasma under conditions discussed here, leads to the formation of an etchant-resistant CMPL film onlyonto the silicon surfaces exposed to the plasma energetic-ion flux. Such a selective formation of theCMPL film allows micromachining by anisotropic wet etching of the vertical sidewalls of the mesaswithout affecting any other silicon surface (Fig. 3) and, also, without employing a photolithographystep.

Fig. 4 shows data pertaining to the destruction of the film formed after 20 or 120 s of plasmatreatment. As long as the defects are isolated, their size grows linearly with time, though differentfamilies of defects may be initiated (nucleated) at different times.

In the case of the 120 s film the micrograph images provided show that the number density ofdefects remains roughly constant at least for etch depths up to 60–70 mm, while new families ofdefects become gradually visible for larger etch depths (not shown). Extrapolation of the size ofdefects shown in Fig. 4 (case of 120 s film) to zero mean size shows that the defects are initiated atapproximately t 5 0 s. In the case of the 20 s film different families of defects can be seen in theimages. The mean size plotted pertains to the largest but isolated defects seen in each case. In the

P. Normand et al. / Microelectronic Engineering 61 –62 (2002) 895 –900 899

Fig. 3. Anisotropic wet etching of CMPL-protected arrangement of square cross-section mesas with [110]-oriented verticalsidewalls. Original pattern is shown in left inset. Etching is limited to the vertical sidewalls of the mesas leading tosymmetric recessed profiles. In contrast, lateral etching of the mesas and etching of the Si surfaces between the mesas occurfor a conventional SiO masking (right inset).2

Fig. 4. Defect evolution for 20 and 120 s CHF plasma treatments. The mean size of the largest isolated defects is monitored3

as a function of etch depth, for an etching rate of 42 mm/min and micrographs are provided for four characteristic structures.One family of defects is seen in the case of the 120 s film, while several families of defects are present in the case of 20 sfilm. In the latter case, extensive defect merging (impingement) is seen in the micrograph for an etching depth of ca. 60 mm.

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second of the images for the 120 s film the largest of the defects are the result of defect merging and itis the intermediate-sized family of defects seen that provides the size estimate. The extrapolation ofthe mean size of the largest but isolated defects to zero size gives an etch depth of 10 mm (or,equivalently, a defect initiation time of ca. 15 min). Incidentally, the defect formation system inconsideration can serve as a model suitable for the study of Avrami-type of kinetics [7].

Of direct interest here is the process of defect generation and the fabrication consequences of thepatterns observed. As the occurrence of minute particulates (possibly of the near-flat ‘nanospherulite’-type) have been documented for the deposition ensuing halocarbon-based plasma treatment [8], it ispossible that mask defects are initiated around such particulates. Apparently, the particulates are fewerbut larger in the case of the 120 s film and, as a result, initiation is almost instantaneous; still, the filmis massively destructed only at very long times as additional nucleation (new initiation at very smallparticulates) is rare and late, while the film is nowhere near defect impingement for an etching depthof ca. 60 mm (Fig. 4). In the case of the 20 s film the largest defect-initiating particulates are smallerthan the corresponding ones for the 120 s case. The smaller size of particulates causes initiation at afinite time (ca. 15 min) but their high density (and also subsequent initiation at additional, smallerparticulates) leads fast to the destruction of the film. It follows that short plasma treatments areappropriate for the fabrication of fine patterns of depth up to ca. 10 mm while deeper (by an order ofmagnitude) but coarser patterns can be fabricated with masks prepared by long plasma treatments.

4. Conclusions

CHF plasma treatments of silicon lead to ultrathin masks for versatile micro- and nano-machining3

using EPW etching solutions. The etch resistance and destruction mode of the films varies within widelimits. Short (e.g., 20 s) plasma treatments are appropriate for fine patterning with depths up to ca. 10mm, while long (e.g., 120 s) plasma treatments are suitable for deeper (by an order of magnitude) butcoarser patterning. The new masks compare favourably with common masking materials such as SiO2

or Si N in terms of achievable patterns and processing options.3 4

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