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A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

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Atom-scale computation: What are the difficulties in trying to build a classical computing machine on such a small scale? One of the biggest problems with the program of miniaturizing conventional computers is the difficulty of dissipated heat. by heat dissipation.As early as 1961 Landauer studied the physical limitations placed on computation by heat dissipation.

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Page 1: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M
Page 2: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

A General Decomposition A General Decomposition for Reversible Logicfor Reversible Logic

M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. Coppola@, A. Buller*, X. Song,

M. Md. Mozammel Huq Azad Khan&, S. Yanushkevich^, V.Shmerko^, M. Chrzanowska-Jeske

Portland State University, Portland, Oregon 97207-0751#Technical University o f Eindhoven, Eindhoven, The Netherlands, + Technical

University of Warsaw, Warsaw, Poland, @ Cypress Semiconductor Northwest and Oregon Graduate Institute, Oregon, USA , * Information Sciences Division, Advanced

Telecommunications Research Institute International (ATR), Kyoto, Japan, & Department of Computer Science and Engineering, East West University, Bangladesh, ,

^ Technical University of Szczecin, Szczecin, Poland

Year 2001

Page 3: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Atom-scale computation:Atom-scale computation:• What are the difficulties in trying to build a classical

computing machine on such a small scale?• One of the biggest problems with the program of

miniaturizing conventional computers is the difficulty of dissipated heat.

• As early as 1961 Landauer studied the physical limitations placed on computation by heat by heat dissipation. dissipation.

Page 4: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

• Plot showing the number of dopant impurities involved in logic with bipolar transistors with year. – (Copyright 1988 by International Business Machines

Corporation, reprinted with permission.)

R. W. Keyes, IBM J. Res. Develop. 32, 24 (1988).

Computing at the atomic scale:Computing at the atomic scale:

a survey made by Keyes in 1988

Page 5: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Information loss = energy loss• The loss of information is associated with laws of

physics requiring that one bit of information lost dissipates k T ln 2 of energy, where k is Boltzmann’ constant and T is the temperature of the system.

• Interest in reversible computation arises from the desire to reduce heat dissipation, thereby allowing:– higher densities– speed

R. Landauer,R. Landauer, “Fundamental Physical Limitations of the Computational Process”, Ann. N.Y. Acad.Sci, 426, 162(1985).

Page 6: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

When will When will ITIT happen? happen?

201020202001

k T ln 2

Power for switching one bitLogarithmic scale

Related to information loss

Assuming Moore Law

works In our lifetime

Page 7: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Reversible LogicReversible Logic• Bennett showed that for power

not be dissipated in the circuit it is necessary that arbitrary circuit can be build from reversible gates.

Page 8: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Information is Physical• Is a minimum amount of energy required

per computation step?

• Rolf Landauer, 1970. Whenever we use a logically irreversible gate we dissipate energy into the environment.

A

BA B

A

B

A

A Breversible

Page 9: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Information is PhysicalInformation is Physical• Charles Bennett, 1973: There are no

unavoidable energy consumption requirements per step in a computer.

• Power dissipation of reversible circuit, under ideal physical circumstances, is zero.

• Tomasso Toffoli, 1980: There exists a reversible gate which could play a role of a universal gate for reversible circuits.

A

B

C

AReversible and universal

BC AB

Page 10: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Reversible computation:Reversible computation:• Landauer/Bennett: almost all operations required in

computation could be performed in a reversible manner, thus dissipating no heat!

• The first condition for any deterministic device to be reversible is that its input and output be uniquely retrievable from each other. – This is called logical reversibility.

• The second condition: a device can actually run backwards then it is called physically reversible– and the second law of thermodynamics guarantees that it

dissipates no heat. Billiard Ball Model

Page 11: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Reversible logicReversible logicReversible are circuits

(gates) that have one-to-one mapping between vectors of inputs and outputs; thus the vector of input states can be always reconstructed from the vector of output states.

000 000

001 001

010 010

011 011

100 100

101 101

110 110

111 111

INPUTS OUTPUTS

2 4

3 6

4 2

5 3

6 5

(2,4)(365)

Page 12: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Reversible logicReversible logicReversible are circuits

(gates) that have the same number of inputs andand outputs and have one-to-one mapping between vectors of inputs and outputs; thus the vector of input states can be always reconstructed from the vector of output states.

000 000

001 001

010 010

011 011

100 100

101 101

110 110

111 111

INPUTS OUTPUTS

Feedback not allowed

Fan-out not allowed

2 4

3 6

4 2

5 3

6 5

(2,4)(365)

Page 13: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Reversible logic constraintsReversible logic constraintsFeedback not allowed in combinational part

Fan-out not allowed

In some papers allowed under certain conditions

In some papers allowed in a limited way in a “near reversible” circuit

Page 14: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

• To understand reversible logic, it is useful to have

intuitive feeling of various models of its realization.

Page 15: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Conservative Conservative Reversible Reversible

GatesGates

Page 16: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

DefinitionsDefinitions• A gate with k inputs and k outputs is called

a k*k gate.• A conservative circuit preserves the

number of logic values in all combinations. • In balanced binary logic the circuit has half

of minterms with value 1.

Page 17: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Billiard Ball Model Billiard Ball Model DEFLECTION

SHIFT

DELAY

• This is described in E. Fredkin and T. Toffoli, “Conservative Logic”, Int. J.Theor. Phys. 21,219 (1982).

Page 18: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Billiard Ball Model Billiard Ball Model (BBM)(BBM)

Input output

A B 1 2 3 4

0 0 0 0 0 00 1 0 1 0 01 0 0 0 1 01 1 1 0 0 1

A and BA

B A and B

B and NOT A

A and NOT B

This is called interaction gate

This illustrates principle of conservation (of the number of balls, or energy) in conservative conservative logic.

Page 19: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Interaction gateInput output

A B z1 z2 z3 z4

0 0 0 0 0 00 1 0 1 0 01 0 0 0 1 01 1 1 0 0 1

Z1= A and BA

BZ4 = A and B

Z2 = B and NOT A

Z3 = A and NOT B

A

B

Z1= A and B

Z2 = B and NOT A

Z3 = A and NOT B

Z4 = A and B

Page 20: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Inverse Interaction gateInverse Interaction gateoutputinput

A Bz1 z2 z3 z4

0 0 0 0 0 00 1 0 0 0 10 0 1 0 1 01 0 0 1 1 1

Z1= A and BA

BZ4 = A and B

Z2 = B and NOT A

Z3 = A and NOT B

Other input combinations not allowed

z1z3

z2z4

A

B

Designing with this types of gates is difficult

Page 21: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Billiard Ball Model (BBM)

Input output

A B z1 z2 z3

0 0 0 0 0 0 1 1 0 0 1 0 0 0 1 1 1 0 1 1

1A

B

2

3

Z1 = NOT A * B

Z2 = A * B

Z3 = A

switchswitch

Page 22: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Priese Switch Gate

Input output

A B z1 z2 z3

0 0 0 0 0 0 1 1 0 0 1 0 0 0 1 1 1 0 1 1

1A

B

2

3

Z1 = NOT A * B

Z2 = A * B

Z3 = A A

B

Page 23: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Inverse Priese Switch GateInverse Priese Switch Gate

outputinput

A B z1 z2 z3

0 0 0 0 0 1 0 0 0 1 0 0 1 1 0 0 1 1 1 1

z1A

B

z2

z3

Z3 Z1

A

BZ2

Page 24: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Inverter and Copier Gates from Priese Gate

Z1 = NOT A * 1

garbage

garbage A

1garbage

V2 = B * 1

V3 = B B

1 Garbage outputs shown in green

Inverter realized with two garbages

Copier realized with one garbage

Input constants

Page 25: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

• The 2*2 Feynman gate, called also controled-not or quantum XOR realizes functions P = A, Q = A B, where operator denotes EXOR..

• When A = 0 then Q = B, when A = 1 then Q = B.

• Every linear reversible function can be built by composing only 2*2 Feynman gates and inverters

• With B=0 Feynman gate is used as a fan-out gate.fan-out gate. (Copying gateCopying gate)

Feynman GateFeynman Gate

+

A B

P Q

Page 26: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Feynman Gate from PrieseZ1 = NOT A * B

Z2 = A * B

Z3 = A A

BV1 = NOT B * A

V2 = B * A

V3 = B B

A

B

AB

Fan-out > 1

Garbage Garbage outputs Z2 and V2 shown in green

Page 27: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Fredkin GateFredkin Gate– Fredkin Gate is a fundamental concept in

reversible and quantum computingreversible and quantum computing. – Every Boolean function can be build

from 3 * 3 Fredkin gates: P = A, Q = if A then C else B, R = if A then B else C.

Page 28: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Notation for Fredkin GatesNotation for Fredkin Gates

A

0 1 0 1

C B

PQ R

A

0 1

P

B C

Q R

A circuit from two multiplexers

Its schemataThis is a reversible gate, one of many

C AC’+B

BC’+AC

CA

B

Page 29: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Operation of the Fredkin gate

A 0 B

A B 1

A 0 1

C A B

C AC’+B

BC’+AC

A AB

A A+B

A A A’

0 A B

1 A B

C A B

1 B A

Page 30: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

A 4-input Fredkin gateX

A

B

C

0 A

B

CA

B 0 1

1 A

B

C

X

AX’+CX BX’+AX CX’+BX

0 A

B

C1 C

A

B

A A+B ABA’

Page 31: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Optical Conservative Optical Conservative Reversible and Reversible and

Nearly Reversible Nearly Reversible GatesGates

Page 32: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Integrated optics

• Integrated optics offers a particularly interesting candidate for implementing parallel, reversible computing structures

• These structures operate in closer correspondence with the underlying microphysical laws which presume non-dissipative interactions and global interconnections.

Page 33: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Reversible, Conservative, Optical Computers

• Zero energy can be dissipated internally• Dissipation in such circuits would arise only in

reading the output, which amounts for clearing the computer for further use.

• Total decoupling of computational and thermal modes.

• Decoupling is achieved by:– reversing the computation after the results have been

computed,– restoring the circuit to its initial configuration

Page 34: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Requirements for gates

• No distinction can be made between the inputs. • Each must be of the same type (in this case optical)

and at the same level• The unrestricted type of gate permits a significant

reduction in circuit’s complexity.• The circuit must be both optically reversible and

information-theory (logic) reversible.

Page 35: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

The device

• An optical four-state nonlinear interface switching configuration is derived from the symmetry of an information-losless three-port structure

• The device is:– bit-conservative– optically reversible– logically reversible– with dissipation related to the Kramers-Kronig inverse of

the index of refraction

Page 36: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

The deviceThe device• The device inherently possesses three-terminal

characteristics:– insensitivity to line-noise fluctuations (maintains high

contrast between transmitted and reflected beams)– cascadability through bit conservation,– fan-out by pumped transparentization,– free-space optical fan-in,– pumped (total internal) reflected inversion.

• Planar lattice-regularized layouts for binary adders

Page 37: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

The Dual Beam Nonlinear interface with polarized signal beams of intensity I0 incident at glancing angle

0 or I0

0 or I0

2I0 or 0

n 2 = n 10 - n L + n 2NL(I)

I0 or 0

n 1 = n 10

• n 1 = n 10

• n 2 = n 10 - n L + n 2NL(I0)

• 90o inc sin-1 (n10 - n L + n 2NL(I0) )/ n10

Page 38: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Fig. 3. Signal replication circuits consisting of an RNI and a half-wave plate.

• Note that:– P or Q is the degraded signal– P and Q is the restored signal

RNI = Reversible Non-linear Interface

Pv.Qh

PQv.PQh

PQ’v.P’Qh

Page 39: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Fig. 3. Signal replication circuits consisting of an RNI and a half-wave plate.

• Note that:– P or Q is the degraded signal– P and Q is the restored signal

PQv.PQh

Pv.Qh PQ’v.P’Qh/2

1 h

P v

Ph

Pv

Pv

Ph

1 v

Q h

Qh

Qv

Qv

Qh

RNI

Half-wave plate

Page 40: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Interaction gate implemented with a Fabry-Perot cavity

n = n0 + n 2NL(I)

Q

P

PQ

PQPQ’

P’Q

Page 41: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Interaction GateInteraction Gate

A

B

AB

A’BAB’AB

A

B

AB

A’BAB’AB

In this gate the input signals are routed to one of two output ports depending on the values of A and B

Interaction GateInteraction Gate Inverse interaction Inverse interaction GateGate

Page 42: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Minimal Full Adder using Interaction Gates

C

AB

A’B

AB’

AB

A

B

AB

A’B

AB’

AB

Carry

00

Sum

A B

Garbage signals shown in greenGarbage signals shown in green 3 garbage bits

Page 43: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Reversible logic:Reversible logic:GarbageGarbage

• A k*k circuit without constants on inputs which includes only reversible gates realizes on all outputs only balanced functions, therefore it can realize non-balanced functions only with garbage outputs.

Page 44: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Priese Switch GatePriese Switch Gate

In this gate the input signal P is routed to one of two output ports depending on the value of control signal C

Priese SwitchPriese Switch Inverse Priese SwitchInverse Priese Switch

P

C

CP

C’P

C P

C

CP

C’P

C

Page 45: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Minimal Full Adder Using Priese Switch GatesMinimal Full Adder Using Priese Switch Gates

A

B

AB

A’B

B

carry

Csum

Garbage signals shown in greenGarbage signals shown in green 7 garbage bits

Page 46: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Minimal Full Adder Using Fredkin GatesMinimal Full Adder Using Fredkin Gates

In this gate the input signals P and Q are routed to the same or exchanged output ports depending on the value of control signal C

C

AB

carry

10 sum

3 garbage bits

Page 47: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

RNI Half-Adder

v

hhorizontal polarization mirror

Vertical polarization mirror

vh

vv,h

hv

hv,h

Page 48: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Ah

Bv

ABv + ABh

A’Bv + AB’h

Ah

Bv

ABv

A’BvAB’hABh

One Beam with Two polarizationsOne Beam with Two polarizations

Logical versus physical Logical versus physical realization of signal in realization of signal in

opticsoptics

Page 49: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

v

RNI Half-Adder

h

h

v

vAh

Bv

Sum = (A’B+A’B)h

Bv(A’B+A’B)h

Removes v

1h

AB’h

Carry = ABh

ABv

ABv

AB’h

A’Bv

A’Bh

A’Bv

ABv + ABh

A’Bv + AB’h

A’Bv 1h

We created similar lattice structures for optical realizations of symmetric, threshold, unate and other circuits

Page 50: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Fredkin GateFredkin Gate

In this gate the input signals P and Q are routed to the same or exchanged output ports depending on the value of control signal C

Fredkin GateFredkin Gate Inverse Fredkin GateInverse Fredkin Gate

PC

CP+C’Q

C’P+CQ

C

Q

PC

CP+C’Q

C’P+CQC

Q

Page 51: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Fredkin Gate from Priese Switch GatesFredkin Gate from Priese Switch Gates

Q

C

P

C

CP+CQ

CP+ CQ

CP

CP

CQ

CQ

Page 52: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Operation of a circuit from Priese SwitchesOperation of a circuit from Priese Switches

Q=0

C

P=1

C=1

CP+CQ

CP+ CQCP

CP

CQ

CQ

Red signals are value 1 Two red on inputs and outputs

One red on inputs and outputsConservative property

Page 53: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Fredkin Gate from Interaction GatesFredkin Gate from Interaction Gates

P

Q

C

C

CP+ CQ

CP+ CQ

Page 54: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Concluding on the Billiard Ball Model• The interaction and Priebe gates are reversible and

conservative, but have various numbers of inputs and outputs

• Their inverse gates required to be given only some input combinations

• From now on, we will assume the same number of inputs and outputs in gates.

• INVERTER, FREDKIN and FEYNMAN gates can be created from Billiard Ball Model.

• There is a close link of Billiard Ball ModelBilliard Ball Model and Optical gates and other physical models on micro level

• Many ways to realize universal optical gates, completely or partially reversible but conservative

Page 55: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

Quantum versus reversible computing• Quantum ComputingQuantum Computing is a coming revolution – after recent

demonstrations of quantum computers, there is no doubt about this fact. They are reversible.

• Top world universities, companies and government institutions are in a race.

• Reversible computingReversible computing is the step-by-step way of scaling current computer technologies and is the path to future computing technologies, which all happen to use reversible logic. – DNA– biomolecular – quantum dot– NMR– nano-switches

• In addition, Reversible Computing will become mandatory because of the necessity to decrease power consumptionpower consumption

Page 56: A General Decomposition for Reversible Logic M. Perkowski, L. Jozwiak#, P. Kerntopf+, A. Mishchenko, A. Al-Rabadi, A. A. Buller*, X. Song, M

What to remember?What to remember?1. Importance of reversible logic2. Importance of conservative logic3. Billiard Ball model of computing.4. Gates of Billiard Ball model.5. Are they all reversible in traditional sense? –

different type of reversibility?6. Priese or Switch gate.7. Interaction gate8. Realization of reversible gates in Billiard Ball

model.9. Optical realization of reversible gates.