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A complete DC/DC converter ASIC for LHC upgrades S. Michelis, F. Faccio, G. Blanchot, I. Troyano CERN PH-ESE S.Saggini University of Udine, Italy Twepp 2012, Oxford 17-21 September 2012 1

A complete DC/DC converter ASIC for LHC upgrades S. Michelis, F. Faccio, G. Blanchot, I. Troyano CERN PH-ESE S.Saggini University of Udine, Italy Twepp

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S. Michelis, Twepp 2012, Oxford aMis 5 3

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Page 1: A complete DC/DC converter ASIC for LHC upgrades S. Michelis, F. Faccio, G. Blanchot, I. Troyano CERN PH-ESE S.Saggini University of Udine, Italy Twepp

A complete DC/DC converter ASIC

for LHC upgradesS. Michelis, F. Faccio, G. Blanchot, I. Troyano

CERN PH-ESE

S.SagginiUniversity of Udine, Italy

Twepp 2012, Oxford 17-21 September 2012

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Page 2: A complete DC/DC converter ASIC for LHC upgrades S. Michelis, F. Faccio, G. Blanchot, I. Troyano CERN PH-ESE S.Saggini University of Udine, Italy Twepp

S. Michelis, Twepp 2012, Oxford

Power distribution with DC-DC convertersBuck Converter

Specifications:Vin<=10VVout=1.2-3.3VIout<=3Afrequency=1-3 MHz

Constrains:magnetic (2T-4T) fieldsradiation (TID>100Mrd, fluence > 2 1015 p/cm² ions with

LET<40MeV·cm²/mg)

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DC/DC ASIC

Page 3: A complete DC/DC converter ASIC for LHC upgrades S. Michelis, F. Faccio, G. Blanchot, I. Troyano CERN PH-ESE S.Saggini University of Udine, Italy Twepp

S. Michelis, Twepp 2012, Oxford

aMis 53

Page 4: A complete DC/DC converter ASIC for LHC upgrades S. Michelis, F. Faccio, G. Blanchot, I. Troyano CERN PH-ESE S.Saggini University of Udine, Italy Twepp

S. Michelis, Twepp 2012, Oxford2.88mm

2.7

mm

AMIS5 is designed in a High Voltage 0.35um technology for automotive application.

This technology has been successfully tested for TID, protons and heavy ions.

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Page 5: A complete DC/DC converter ASIC for LHC upgrades S. Michelis, F. Faccio, G. Blanchot, I. Troyano CERN PH-ESE S.Saggini University of Udine, Italy Twepp

S. Michelis, Twepp 2012, Oxford

High Side transistors

Low Side transistors

Analog Linear regulators

Digital Lin. Regulator capacitors

Control Circuit

Buffer / Drivers

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Page 6: A complete DC/DC converter ASIC for LHC upgrades S. Michelis, F. Faccio, G. Blanchot, I. Troyano CERN PH-ESE S.Saggini University of Udine, Italy Twepp

S. Michelis, Twepp 2012, Oxford

Two AMIS5 versions have been submitted (same dimension, same pinout)

BOLL

(Buffer Overcurrent=Large Low)faster turn on&off of power transistorsOver-Current detection on Low Side Transistor

BOSH (Buffer Overcurrent=Small High)slower turn on&off of power transistorsOver-Current detection on High Side Transistor

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Buffers

Page 7: A complete DC/DC converter ASIC for LHC upgrades S. Michelis, F. Faccio, G. Blanchot, I. Troyano CERN PH-ESE S.Saggini University of Udine, Italy Twepp

S. Michelis, Twepp 2012, Oxford

the ASIC is OFF by default•the Enable pin need to be

externally controlled. •AMIS5 turn on if Venable>0.7V

(compatible with 1.2V logic up to 3.3V)

AMIS5 Enable

0.7V

Internal Enable

External Pull-upVoltage (<3.3V)

RExt

Power Good

ENABLE POWER GOOD

• Power Good: is an open drain pin.

• Power Good goes high if:✓ AMIS5 is enabled,

Vin>5V and it is working properly

• Power Good goes low (zero) when AMIS5 is supplied (Vin>5V) and if it is in one of these conditions:

‣ Start-up‣ Over-Current limitation‣ Over-Temperature limitation‣ AMIS5 disabled8

Page 8: A complete DC/DC converter ASIC for LHC upgrades S. Michelis, F. Faccio, G. Blanchot, I. Troyano CERN PH-ESE S.Saggini University of Udine, Italy Twepp

S. Michelis, Twepp 2012, Oxford

Only 2/5th of the power transistors are operative. Higher efficiency for small load (<1A)

ENABLE Half Swith

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Page 9: A complete DC/DC converter ASIC for LHC upgrades S. Michelis, F. Faccio, G. Blanchot, I. Troyano CERN PH-ESE S.Saggini University of Udine, Italy Twepp

S. Michelis, Twepp 2012, Oxford

Input Under – Voltage Protection

time (s)

5V

4V

converteroff

converteroff

converteron

Vin

Vin

Threshold

Vin Enabler for

the converter

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Page 10: A complete DC/DC converter ASIC for LHC upgrades S. Michelis, F. Faccio, G. Blanchot, I. Troyano CERN PH-ESE S.Saggini University of Udine, Italy Twepp

S. Michelis, Twepp 2012, Oxford

Over-Temperature Protection

time (s)

converteron

Temperature

100°C

converteron

60°C

converteroff

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Page 11: A complete DC/DC converter ASIC for LHC upgrades S. Michelis, F. Faccio, G. Blanchot, I. Troyano CERN PH-ESE S.Saggini University of Udine, Italy Twepp

S. Michelis, Twepp 2012, Oxford

Over-current protection

Page 12: A complete DC/DC converter ASIC for LHC upgrades S. Michelis, F. Faccio, G. Blanchot, I. Troyano CERN PH-ESE S.Saggini University of Udine, Italy Twepp

S. Michelis, Twepp 2012, Oxford

AMIS5 Efficiency

with Vin=10V, L=460nH, Vout=2.5V, f=1.7MHz13

Page 13: A complete DC/DC converter ASIC for LHC upgrades S. Michelis, F. Faccio, G. Blanchot, I. Troyano CERN PH-ESE S.Saggini University of Udine, Italy Twepp

S. Michelis, Twepp 2012, Oxford

Efficiency for different Vout

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Page 14: A complete DC/DC converter ASIC for LHC upgrades S. Michelis, F. Faccio, G. Blanchot, I. Troyano CERN PH-ESE S.Saggini University of Udine, Italy Twepp

S. Michelis, Twepp 2012, Oxford

Iout=0A

Iout=0.5AIout=1A

Iout=1.5A

Iout=2AIout=2.5A

Iout=3A

@ f=1.7MHz, L=460nH

Line and Load regulation

Line regulation: 4mV variation with Vin=6V-12V

Load regulation: 7mV variation with Iout=0A-3A15

Page 15: A complete DC/DC converter ASIC for LHC upgrades S. Michelis, F. Faccio, G. Blanchot, I. Troyano CERN PH-ESE S.Saggini University of Udine, Italy Twepp

S. Michelis, Twepp 2012, Oxford

Load Transient

Load transient setup thanks to Cristian Fuentes

Page 16: A complete DC/DC converter ASIC for LHC upgrades S. Michelis, F. Faccio, G. Blanchot, I. Troyano CERN PH-ESE S.Saggini University of Udine, Italy Twepp

S. Michelis, Twepp 2012, Oxford

TID tests

with Vin=10V, L=460nH, Vout=2.5V, f=1.7MHz17

pre-rad

Page 17: A complete DC/DC converter ASIC for LHC upgrades S. Michelis, F. Faccio, G. Blanchot, I. Troyano CERN PH-ESE S.Saggini University of Udine, Italy Twepp

S. Michelis, Twepp 2012, Oxford

TID Tests at different temperature

with Vin=10V, L=460nH, Vout=2.5V, f=1.7MHz

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pre-rad

Page 18: A complete DC/DC converter ASIC for LHC upgrades S. Michelis, F. Faccio, G. Blanchot, I. Troyano CERN PH-ESE S.Saggini University of Udine, Italy Twepp

S. Michelis, Twepp 2012, Oxford

pre-rad

Line and Load regulations vs TID

with Vin=10V, L=460nH, Vout=2.5V, f=1.7MHz

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Page 19: A complete DC/DC converter ASIC for LHC upgrades S. Michelis, F. Faccio, G. Blanchot, I. Troyano CERN PH-ESE S.Saggini University of Udine, Italy Twepp

S. Michelis, Twepp 2012, Oxford

Future plans

2.88mm

3.3

mm

AMIS5_BB

• Test foreseen for AMIS5

Single Event and Displacement damage tests (fall 2012)

BOSH version tests

Tests on AMIS5 packaged in QFN32

• AMIS5_BB Bump Bonded version

tests and characterization (expected back in November 2012)

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Page 20: A complete DC/DC converter ASIC for LHC upgrades S. Michelis, F. Faccio, G. Blanchot, I. Troyano CERN PH-ESE S.Saggini University of Udine, Italy Twepp

S. Michelis, Twepp 2012, Oxford

NegativeConverter

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Page 21: A complete DC/DC converter ASIC for LHC upgrades S. Michelis, F. Faccio, G. Blanchot, I. Troyano CERN PH-ESE S.Saggini University of Udine, Italy Twepp

S. Michelis, Twepp 2012, Oxford

Positive ConverterNegative Converter

Vin

DC/DC

VoutPhase

-Vout For the time being the DC/DC converter is a commercial chip (LTC3605, the same for SM01C).It will be replaced with AMIS5

28.5 mm

13.5 mm

Differential Mode noiseNegative Converter

Differential Mode noisePositive Converter

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Board designed by Isaac Troyano

Page 22: A complete DC/DC converter ASIC for LHC upgrades S. Michelis, F. Faccio, G. Blanchot, I. Troyano CERN PH-ESE S.Saggini University of Udine, Italy Twepp

S. Michelis, Twepp 2012, Oxford

Conclusions• A new DC/DC converter ASIC called AMIS5 has been presented.

It is a fully integrated synchronous buck converter which contains internal linear regulators, bandgaps and a control circuitry to handle signals form the protection circuitryEfficiency is high (above 80%, peak 83%-85%)Radiation effects are limited (2-4% loss of efficiency over 325Mrad and Iout=2-3A)line regulation is good (4 mV for Vin variation from 6 to 12V)load regulation is good (7 mV for Iout variation from 0 to 3A)

• A negative converter has been presentedIt allows to convert a positive input voltage to a negative voltage (e.x. Vin=7V and Vout=-2.5V). It uses a chip that has been already used for a positive convert. Only the PCB layout is changed. AMIS5 will replace the commercial component for radiation tolerance

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