A Communication Architecture Tailored for

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I E E E T RANSACT I ONS ON NE URAL NE T W ORKS . V OL 5. NO . 3. MAY 1994 459

A Com munication Architecture Tailored forAnalog VLSI Artificial Neural Networks:Intrinsic Performance and LimitationsAlessandro Mortara, Student Member, IEEE and Eric A. Vittoz, Fellow, IEEE

Abstract-An architecture for interchip comm unication amonganalog VLSI neural networks is proposed. Activity is encoded ina neurons pulse emission frequency. Information is transmittedthrough the non-arbitered, asynchronous access of pulses to acommon bus. The impact of collisions when the bus is accessedby more than one user is investigated. The inform ation-carryingcapability is assessed and the trade-off between accuracy of thetransmitted information and attainable dynamic range is broughtout in terms of simple global parameters that characterize theapplication. It is found that the proposed architecture is wellsuited for the kind of com munication requiremen ts associated toneural computation systems. A coding scheme aimed at pushingthe system towards its theoretical performance is also presentedand evaluated.

I. INTRODUCTIONHE OBJECTIVE of this paper is to propose an architec-T ture for interchip communication among artificial neural

networks realized in analog VLSI. Typical neural processingrequires a front end performing some sort of useful preprocess-ing of the raw sensory data; e.g., sound or images. Typically,this kind of preprocessing is very efficiently implemented bya fully analog chip, and several examples can be found in [ 11.Surface constraints, however, hinder higher-level computationon the same chip that performs preprocessing. Single-chipsystems are thus limited in both computational ability andsensory resolution and an efficient communication scheme be-tween a fully analog interface and subsequent, possibly digital,higher-level computation parts would be most welcome. If,on the one hand, the fully parallel communication techniqueimplemented in nervous systems is unapplicable in the VLSIcontext because of the prohibitive number of output pinsthe connections would need, a purely systematic sequentialcommunication scheme (scanning) requires a very high clockrate for large numbers of cells in order to follow activityvariations at sufficient speed. This is incompatible with theneed to limit the power dissipated on the chip and takes noadvantage of the way activity is most often distributed over a

Manuscript received September 2 , 1992: revised No vember 30, 1992. Thiswork was supported by the FSRM (Fondation Suisw pour la Recherche enMicrotechnique).A. Mortara and E. A. Vittor are with the Electronics Laboratory, Departmentof Electrical Engineering, Swiss Federal Institute of Technology, CH-I015

Lausanne, Switzerland.E. A. Vittoz is with the Electronics Laboratory. Department of ElectricalEngineering, Swiss Federal Institute of Technology. CH-I015 Lausanne,Switzerland and also with the Centre Suisse dElectronique et de Microtech-nique, Ch-2007 Neuchltel, Switzerland.IEEE Log Number 9207 152.

neural network: concentrated in a small number of cells. Thesolution proposed and evaluated in this paper takes advantageof this circumstance and of other characteristics of neuralcomputation networks. In an interchip communication system,of possible guidelines could be the following:

Since the available bandwidth of a VLSI communicationchannel is typically several orders of magnitude largerthan that of its biological counterpart (lo7 versus lo3Hz) [ 2 ] ,the high parallelism present in biological com-munication structures (for example axon bundles) couldconceivably be replaced by faster shared structures inan analog neural system, provided collisions (two ormore cells trying to access the channel at the sametime) have negligible occurrence probability or can beproperly handled.The communication overhead should not complicateor severely influence the structure of the computingelements.The communication scheme should be tailored on, or atleast take some advantage of the particular way data areprocessed by a neural system. For example it is wellknown that retinal response is faster to the variation ofhigh-activity signals or that the response of a Kohonennetwork localizes in a few units while the others areinactive [3]. A simple sequential scanning of the cellswould not capture these particularities.Communication should take place by means of pulsescarrying information in their interpulse time [4], thefrequency of pulse emission increasing with increasingactivity.For the sake of speed, any coding intended to eitheridentify a cell or to reduce collision errors should bewired.

These guidelines point to a system that is as natural aspossible, namely pulsed, unclocked, and as wired as possible.Since it is not possible to equip each neuron needing tocommunicate information to another chip with an individualwire, that uniquely identifies it, some sort of binary codingof the neurons identity over the shared channel is used. Thusthe general structure evoked could look like that of Fig. 1.All cells needing to output their activity have access to aparallel bus on which their identity is wired in encoded form.When activity manifests itself by a pulse emission, the busconfiguration carries the identity of the emitting cell f o r theduration of a pulse [ 5 ] . Pulses are decoded and accumulated

1045-9227/94$04.00 0 1994 IEEE


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neuron cell to Ufrepuencv -. .converterFig. 1, General structure of the communication system. Neurons analogoutputs are transformed in a frequency modulated train of pulses by anactivity-to-frequency converter. For the duration of a pulse, the encodedidentity of the emitting cell appears on the bus. A t the receiver side, a decoderactivates the receiver corresponding to the active cell. The selected receiveraccumulates the incoming pulses during an observation time short enough tofollow activity variations and produces, by averaging, its estimate of the sendercells activity on the receiving network in the form of an analog quantity suchas current or voltage.

by the target cells over a time window T limited by the speedrequired by the application (say 50 ms for a retinal network).In this paper the issue of mapping the activity distributionof the sender chip onto the receiver chip is addressed with noreference to the possibility of a direct use of the pulses, withoutaccumulation, for specific applications such as a cochlearauditory processor. The coding scheme, depicted in Fig. 1as the encoder-decoder pair, is not optional since it mustcompensate for the most notable difference between suchscheme and the biological implementation: the possibility ofcollisions when two or more cells attempt to access the channelat the same time. This coding scheme is an alternative tothe use of arbiter circuits [ 5 ] . An arbiter decides which oneof a number of colliding pulses has the right to access thetransmission channel and allows a second chance to the losersof this competition. This very desirable property is offsetby increased circuit complexity (an arbitration betweenalternatives needs O ( N logN ) elementary arbitration circuits[5] arranged in a binary tree) and signalling complexity inthe form of request and acknowledge signals propagatingthrough the arbiter and the body of the circuit [6]. Thepossibility also exists that the variable time the arbiter needsto grant access to the channel introduces excessive alterationsin the time structure of the spike train to be communicated.The alternative we propose and evaluate in this paper stemsfrom an error detection philosophy in which collision eventsare detected through coding and ignored (pulse loss). Theencoding hardware consists of just connected wires so thatspeed and design simplicity are favored. In particular speedoffsets the lack of a record of the colliding parties in that itallows a prompt repetition of the information lost in a collision.The paper discusses quantitatively this basic trade-off.

In Section I1 we concentrate on the intrinsic limitations ofthe architecture assuming that the effect of collisions is just theloss of a pulse and not its reception by an unintended target.This, as mentioned, requires that an efficient collision detection

scheme be available. One such scheme, easily wired at theexpense of tolerable redundancy, is presented and analyzedin Section 111. Section IV presents a discussion of the systemperformance.

11. INTRINSIC PROPERTIES A N D LIMITATIONSA . Statistical Model

The model we present here is based on the two assumptionsof complete asynchronicity of the pulses generated by any twocells in the network and of activity variations occurring at atime scale much larger than the pulse duration. As opposed to aclocked system, where transitions occur at predictable instants,here we assume that the cells emit pulses in such a way thatcoherent phenomena between pulses do not take place. Thisis a way of taking advantage of the intrinsic limitations of ananalog VLSI system: if mismatches between components existand if the pulse duration is of the order of the RM S valueof the unavoidable phase jitter of the activity-to-frequencyconverter, the possibility of two cells emitting synchronouslyand colliding systematically is ruled out. Thus only the averagenumber of pulses per unit time is fixed by the average activityof the network. More precisely, consider a generic networkconsisting of N cells that emit pulses of duration S at a rateH , f o where H i is the activity of cell i and 0 < Hi < 1, f o is thefrequency corresponding to maximum activity. If the averageactivity N is defined as

- 3N=-ZH,1N / = 1

we model the point process of the beginning of a pulseemission anywhere in the network by a Poisson process [7]with rate X = N a f ~ .We can then calculate the probabilitythat a cell trying to put a pulse through the channel succeedswithout undergoing collision. If the cell starts firing at time t ,there will be a collision if any other cell fires any time betweent - h and t + h. The probability of this event is:

Thus the probability of safe emission is

The receiver observes the pulses coming from cell .L andretrieves the information contained in the number k , of pulsescoming from cell i in the observation time T (short enoughto follow the time scale of variation of 0;): it estimates theobserved activity by k ,/Tfo. Collisions are responsible of theloss of part of the emitted pulses, thus I ; , is a random variable.We now derive its probability distribution.Dropping the index i , in a time window T , the numberof times the cell fires is also a random variable V with 2possible values: 71 = IHTfo, the bar denoting the largestinteger smaller than HTfo, and rl , + 1.These values occur withrespective probability (1-.c) and .I where .I = HT,fo-n. Thesedefinitions are illustrated in Fig. 2. Using the total probability


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MORTARA AN D VIITOZ: COMMUNICATION ARCHITECTURE FOR ANALOG VLSl ARTIFICIAL NEURAL NETWORKS 46 I

~ T I : x = O n = 4U mT2 : x = I ; n = 4

Fig. 2. Illustrating the derivation of (3). If the receiver observation time isTI and the frequency observed is 0 f o , there is a very small probability .I ofobserving five pulses [corresponding to if + 1 in (3)] . If the observation timeis TL,this probability is close to 1. The pulse duration is 6.

theorem: pr(lc) = pr(klV = 7 ~ )pr(V = n )+ pr(k/V =71 + 1) pr(V = n + l ) ,the probability of k can be written asa combination of binomial distributions:

I I I10 100 10000.0003 1Normalized activity:Wa(TnN6)

Fig. 3. Error-activity relationship. Curve a: exact value curve b: expression(8). Fo r a given maximum-activity frequency , the curve provides the receivererror as a function of transmitted local activity. Larger activities are estimatedwith a smaller error.

Using mean value and second moment of the binomial distri-bution with parameters U (number of trials) and T (probabilityof favorable event), given respectively by UT and u27r2+u ~ ( l- T ) , the mean m, second moment r n 2 and varianceu2 = 771712 - m2 of the distribution ( 3 ) are calculated:

m = 4 7 1 + 1 ) p + (1- x ) np= p(n+ : E ) ( 4 4(4b)(4c)

m2 = z [ ( n+ 1)y2 + ( 7 1 + ~ ) p q ]+ (1 - : r ; ) (n2p2+ n p q )fT2 = pfJ(7L+ :J; ) + p 2 .C ( l - :J; )

The relative error c 2 = a2 /m2is thus:q / p 2(1 - .)& 2 = - + - ( 5 )n, + :r ( n+ : E ) ~

B . Performance and LimitationsAccording to (4a), a measurement of activity for E l / 2 . The system we areexamining, conversely, shows what Mead [11 calls a gracefuldegradation of performance as the scale factor diminishes:there will not be aliasing but just a noisier reproduction of thetransmitted data as K decreases.E is the average frequency cyfa normalized to the inverseof the characteristic time. The first term in the right-handside of (7 ) can be termed a floor noise and rewritten( 1 / K ) f ( E )where f([) = [exp(E) - 1]/E converges to 1for < + 0. Hence performance is ultimately limited by 1/K,which sets the absolute minimum relative error. The secondterm contributes a lobed, or spiky structure whose envelopedecreases as l / (


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3.105

U82 3.105

I I I J0.001 0.01 0.1 1Normalized frequency . 5

Fig. 4. Dynamic range-maximum activity frequency relationship. Each curveshows how to choose the best < to attain the largest dynamic range (i.e..the smallest minimum activity detectable with a given tolerable error).The optimum (minimum of the curves) occurs at slightly different value\of normalized frequency but \atisfactory. although suboptimal. behavior isobtained in all cases for < % 0 . 1 .shows that a best exists that optimizes the dynamic rangefor a given tolerable error level, the minimum is achieved atslightly different values of the optimal for different valuesof E * . However, since none of the minima corresponding todifferent E s is sharp, setting to about 0.1, thus the ,f0 valueto about 0.1(1 / 2 N t r b ) , guarantees operation to be very closeto the optimum for every practical error range. The order ofmagnitude of the minimum activity measured at a given errorlevel is N rub / T E 2 .In order to be around the optimal operatingfrequency, the value of f o should be controlled by the averageactivity according, in a non-critical manner, to the relationship

t Y f % O.l/2iVh (10)For the results just derived to be applicable. an efficientcollision detection scheme must be available because the effectof receiver errors due to the appearance after a collision of awrong address on the bus has been ignored. One such schemeis discussed in the next section.

111. CODINGSTRATEGYA . MotivationsDuring time intervals where the communication channel is

accessed by more than one cell, the information i t carries aboutthe senders may be incorrect. We assume that the bus performsthe bitwise wired OR operation because the simultaneouspresence of two or more pulses on a wire of the bus shouldnaturally correspond to a pulse on the wire. Two cases can thenoccur: either the result of OR-ing the two (or more) identitiesleaves one of them unaltered (Self-Arbitered Collision: SAC)or the result differs from all colliding senders identities (Non-Self-Arbitered Collision: NSAC: these are the only acronymsused here.) In the latter case it should be ensured that thewrong identity carried by the bus does not correspond to apossible sender on the network so that the NSAC is detected.The coding strategy that suggests itself is thus to systematicallyeliminate, by not wiring them on the bus, those sender identitycodes that most frequently occur as NSAC results. In thefollowing we first examine how the probability of SA C varieswith the number N of bits used to encode identities. Thisis an important quantity to know because SACS introduce an

Fig. 5 . Collision matrix for .I-= 3 bits

unwanted bias. some cells having a better probability of gettingthrough after a collision. They also constitute a problem in atwo dimensional array where independent encoding of linesand columns is implemented in that they can produce imageevents: if cell (11. c1) collides with cell ( b 2 . c 2 ) the result can bea pair of valid codes ( l l . c 2 ) or ( 1 2 . c l ) . Although potentiallynasty, this problem can be made quantitatively irrelevantas shown in Section 111-B. We then derive the distribution ofNSAC results to quantify the efficiency of eliminating a sendercode and finally discuss the trade-off between redundancy andcollision detection efficiency.B . Prohahilit?. of Self-Arbirered Co1lision.s

To obtain a formula giving the number of SA C using N bitswe consider a collision matrix TI as shown in Fig. 5 forN = 3. In this matrix lines and column indexes are given intheir binary expression and the matrix entries give the resultof bitwise OR-ing the line and column indexes and underlinedfont indicates a NSAC. We call upper (lower) triangle of thematrix the set of entries with column index larger (smaller)than line index. It is shown in Appendix A that if an N-bitscoding is used, the number K ( N )of possible NSAC is:

K ( N )= 2 , 41\--1 - 3.1-+ 2.-1 (1 1)Since total number of possible collisions is 2K-1(2y - 1)(number of entries in the upper triangle of T7 ) the conditionalprobability of SAC given a collision occurs is:

and is plotted in Fig. 6.We are now in a position to evaluatethe problem of the appearance of image events evoked inSection 111-A. Suppose we are encoding independently theline and column values in a two-dimensional array using 8bits for the lines and 8 bits for the columns. What is theprobability that an image event appears during a collision? Ifa collision occurs, the probability that a SAC results in both theline and column buses is, according to Fig. 6and since linesand columns are encoded independently, about (0. Thepossible outcomes of a collision where cell ( 1 1 . (:I) collideswith cell ( L z . c . 2 ) and a SAC occurs in the line and columnaddress are ( 1 1 . q ) .( 1 2 . ~ 2 ) .( / I . Q) and ( l 2 . c l ) : the last twocorrespond to an image event. The resulting probability of animage event is thus 0.5.(0.18)2= 0.016. It decreases rapidly(as the square of the probability of SAC) with increasing


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MORTARA A ND VITTO/ COMMUNlCArlON ARCHI T E CT L RE FO R A\ALOC; VLSl ARTIFICIAL NEURAL NE T W ORKS 463

0 0 , I , , , , , , , ,1 2 3 4 5 6 7 8 9 1 0 1 1Number of bits used to encode

Fig. 6. Probability of a SAC vcrws nunibcr of hi t \ u v d to encode

number of bits used to encode the line and column valuesas shown in Fig. 6.C . Distribution o j N S A C Kesirlts

Since the result of NSAC at the bit level is 1, addressescontaining many 1s in their expression appear more frequentlyas NSAC results. Moreover addresses with the same numberof 1 s appear the same number of times as NSAC results sincethe significance of bits at different positions is only a matterof convention. More precisely, it is shown in Appendix B thatthe number of times addresses containing X. I s in their N-bitsexpression appear as NSAC result is:

It can be readily verified, as it is necessary. that

The coding strategy is best illustrated by noting that by simplynot wiring the address 11 . . . 1 a number (3-/2 - 2. + 1 / 2 )of NSAC becomes detectable. Of course efficiency decreasescontinuing along this line: more addresses must be eliminated,and redundancy increased, to detect the same number ofcollisions. The exact relationship between the redundancyintroduced by encoding less than 2. identities over bitsand the NSAC detection capability is examined in the nextsection.D . Redundancy versus Detwtuhili ty

In this section we are concerned with the following problem:by renouncing to wire all the addresses with 1V.N-1. . . . .AV-I ; 1s in their expression:1) What is the probability J ( S .k ) that a collision among

2 ) What redundancy is introduced?the remaining addresses remains undetected?

To answer 1) it is shown in Appendix C that if all the addresseshaving N - k to N ones are removed, then the number S ( X .k )

3 4 5 6 1 8 9 10 11Number of bits med to encode: N

Fig. 7. Probability of undetected collision versus number of bits used toencode. By renouncing to wire all the addresses with .V. .V - 1. . . . ..\-- kones in their expression, the probability of undetected collision is given bythe ordinate of the point specified on the curve by .\-an d A..

of collisions that disappear is recursively given by:S(.I-.k ) = S(s- 1.k )+2S (-1-- 1.1.- 1) + (-1-- 2 ) ( 2 \ -i -

k - 1(15)

and the answer to 1) is:

Using ( 15 ) the values of S ( N . k ) can be computed and insertedin (16) together with K ( N ) and C ( N .k) given respectivelyby ( 1 1) and (13). The results are reported in Fig, 7 that plotsf ( N . k ) as a function of N, with k as a parameter.

The answer to 2 ) can be read from Table I, which gives thefraction of addresses with at least N - k ones in their binaryexpression. As an example of how to use these results, considera network of 350 cells: a minimum of 9 bits is requiredto encode their identities. Suppose we want more than 95%collision detection rate. Fig. 7 shows that this is achievablewith a 10bits coding by not wiring addresses with five or moreones in their expression. Table I tells us that those addresses are62.3% of the total; we are thus left with 21(1- 0.623) = 38 6addresses: enough to encode 350 identities.

IV . CONCLUSIONHow does the communication system presented match the

guidelines proposed in Section I? The communication over-head consists of an activity-to-frequency converter per cell,a wired encoder, a bus, a decoder of standard design, and apulse-accumulation block per cell (implemented for exampleby a low-pass filter, [SI). Note that only the activity-to-frequency converter and the pulse-accumulation block needto be physically located near the computing elements.

Consider now the dependency of the relative error on aver-age activity, for a cell whose activity is fixed. If the conditionfor maximum dynamic range (2NtrJbS = 0.1) is fulfilled, anincrease of 0 corresponds to a decrease in fo . Referring to(6). this reduction in the maximum-activity frequency reducesboth denominators in the right-hand side. Thus the systemperforms better for low average activity distributions, likely


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464 I E E E T RANS ACT I ONS ON NE URAL NE T W ORKS , VOL. 5. NO . 3. MAY 1994

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to be found in neural computation networks. For example, ina Kohonen map, the number of active cells is clustered in abubble that represents only a very small fraction of the totalnumber of cells, setting the networks average activity to asmall value CY


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MORTARA AND VlTTOZ COMMUNICATION ARCHITFCTLRE FOR ANA1OG VLSl A R T I F IC I A L N E U R A L NETWORKS 465

APPENDIXBDERIVATIONOF (13)Consider an N-bits coding and an integer r r i . 0 5 7 ri 5

2jV - 1. Let f ( m ) be the number of times rr l appears as theresult of a NSAC. We first determine the number f ( 2 " + n i )of times that 2" + 711 appears as result of NSAC with an( N + 1)-bits coding. 2.'- + 711 appears at the locations ofof TA+' upper triangle where rr i appears as NSAC result. I talso appears in TL'l's lower triangle locations corresponding

locations where rrr appears as NSAC result. This firstcontribution adds thus to 3 , f ( 711) . There are other appearancesof 2lV + v i , namely so many times as rn appears in T:+'as a SAC result. As argued in Appendix A this can happenonly in line m thus any appearance of entry 7r 1 in line r r i >of TC+' corresponds to the appearance of 2.' + ' rr1 as NSACresult in the corresponding location of TA+'.We now evaluatethis second contribution. It is the same for all addresses withthe same number u (m ) of 1 ' s in their expression, hence itis the same as fo r the string 00..011..1, with u ( r r / , ) LS B setto I . This string is the binary expression of 2"((") - 1. and itappears as SAC result exactly 2"('") -1, times when it collideswith any address smaller than 2"("') - 1. Summing the twocontributions we obtain:

f ( 2 " + m )= : j f ( ' r r r ) + z ~ ~ ( ~ ~ ~ )- 1 (B 1 )as f ( m )and f ( 2 " - + rri,) depend only on X. = u ( 7 r i 3 ) , (Bl ) canbe rewritten:

T.V+112 and TZ+"s upper triangles corresponding to locations

to TlY+11 1

f ( X : + 1) = 3 f ( k )+ 2 k - 1 (B 2 )(B2) can be recast in closed form by successively substitutingf (1) in f ( 2 ) . f ( 2 ) in f ( 3 ) and so on. The result is:

k - 2f ( k )= 3 ; ( 2 ' - ' - ; - 1)+ 3 " ' f ( 1) with f ' ( 1) = 0 (B3)

J =U

thus

Since using an N-bits coding there are (;) addresses with k1's in their expression,

(B.5) is (13).APPENDIXC

DERIVATIONOF (15)Consider first an N-bits code and an integel r r t 0 5 r r / 52' -'-1. The number of NSAC that dirappear by removing r / iI S denoted by d ( m ) With the help of the rewltu of AppendixA, we can calculate d(2 ' -' + r r i )

d Q - 1 + 7 r 1 ) = 2 t l ( r r , ) + ( p - 1 - 1 - r r c ) ( C l )

2 d ( ~ r 1 )is the contribution from the upper triangles of TG andT.2 column 2.v-' + v i , while 22Y-' - 1- 71))is the number ofentries in the lower triangle of Ti'; in column 2"-' + v i , , allNSAC as shown in Appendix A . Consider now a string withk 1 's . It can either:

1) be an index of TA , hence a number


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46 6 IEEE TRANSACTIONS ON NEURAL NETWORKS, VOL. 5, NO . 3, MAY 1994

Where the

-1

-1

--

N - 1 N - 2- I ) [ ( k - 1 ) - ( k - 2 ) ]

(;I;) + (, l )

Alessandro Mortara (S92) was born in Rome,Italy, in 1963. He obtained the Laurea degree inelectronic engineering in 1988 from the Universityof Rome, La Sapienza, and a Masters degreefrom the Massachusetts Institute of Technology in1991. He has held positions in the research de-partment of Olivetti S.P.A., Ivrea, Italy: the MITNational Magnet Laboratory; the CSEM (CentreSuisse dElectronique et d e M icrotechnique) and isnow working toward the Ph.D. degree at the SwissFederal Institute of Technology in Lausanne underthe supervision of Professor E. A. Vittoz. His research interests are in thefield of analog VLSI implementation of neural systems with special regardhas been used. Substituting (C3) in (C2) we obtain: to com munication issuesS (N ,I C ) = S (N - 1. IC) + 2 S ( N - 1.k - 1)

+ (- 2)(2 - 1); (C4)IC-1(C4) is (15).

[31[41

151

I61

[91

REFERENCESC. Mead, Analog VLSI and Nerrrul Systems. Reading, MA: Addison-Wesley, 1989.E. Seevinck, P. J. van Beers, and H. Ontrop, Current mode techniquesfor high speed VLSI circ uits with application to current sense amplifierfor CMOS SRAMs, IEEE .I.Solid-Stare Circuits. vol. 26, no. 4, pp .525-536, 1991.T. Kohonen, Self Organizatiori and Assoc iu t iw Memor-y. Berlin:Springer Verlag, 1989, 3rd edition.A. F. Murray, D. Del Corso, and L. Tarassenko, Pulse-stream VLSIneural networks mixing analog and digital techniques, IEEE Trans.Neural Nerworks. vol. 2, no . 2, 1991,pp. 193-204.M. M ahowald, VLSI analogs of neuronal visual processing: a synthesisof form and function, Ph.D. Thesis, Computation and Neural System s,California Institute of Technology, 1992.J. Lazzaro, J. Wawrzynek. M. M ahowa ld, M. Sivilotti, and D. Gillespie,Silicon auditory processors as computer peripherals, ProceedingsNIPS 1992 , Denver, CO , USA, to appear.A. Papoulis, Prohahil i ty. Random Variahles . atid Stochastic Processes .New York: McGraw-Hill, 1981.E. J. Bayly, Spectral analysis of pulse frequency modulation in thenervous systems, IEEE Trans . on Biomed. EnL?..vol. 15, no. 4, pp.257-265, 1968.C. A. Mead and T. Delbriick, Scanners for visualizing activity of analogVLSI circu itry, California Institute of Technology, CNS mem o I I , June1991.

Eric A. Vittoz (A63-M72-SM87-F89) was bornin Lausan ne, Switzerland in 1938. He received theM.S. and Ph.D. degrees in electrical engineeringfrom the Swiss Federal Institute of Technology inLausanne (EPFL) in 1961 and 1969, respectively.After spending one year as a research assistant,he joined the Centre Electronique Horloger S . A .(CEH ), Neuch ltel, in 19 62, where he became in-volved in micropower integrated circuit develop-ment for watches, while working on a thesis inthe same field. In 1971, he was appointed ViceDirector, supervising advanced developments in electronic watches and othermicropower sy stems. In 19 84, he took the responsibility of the Circuitsand Systems Research Division of the Swiss Center for Electronics andMicrotechnology (CSEM) in Neuchltel, where he was appointed ExecutiveVice-president, Circuit and System Design, in 1991. His field of personalresearch interest is the design of low-power analog CMOS circuits, with anemphasis on their application to neural networks. Since 197.5, he has beenlecturing and supervising student projects in analog circuit design at EPFL,where he became a Professor in 1982.Dr. Vittoz has published more than 70 papers and holds 25 patents.

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A Communication Architecture Tailored for