A CMOS Potentiostatic Delta-Sigma for Electrochemical Sensorspserra/cnm/2018 - A 6.5-uW 70-dB 0.18... · Potentiostatic Delta-Sigma for Electrochemical Sensors Joan Aymerich, Michele

Low-power potentiostat 2nd Order CT ADC for ECS

J. Aymerich Gubern PRIME 2018

A CMOS Potentiostatic Delta-Sigma for Electrochemical Sensors

Joan Aymerich, Michele Dei, Lluís Teres and Francisco [email protected]

Integrated Circuits and Systems (ICAS)Instituto de Microelectrónica de Barcelona, IMB-CNM(CSIC)

July 2018

1/26



Sensors Market Vision

Sensors/year

Year

56%/year

21%/year

222%/year

Electrochemical sensors are growing exponentially due to potential of miniaturization and mass production

2/26

Several organizations created visionsfor continued growth to trillion(s) sensors

Applications in biosensors, quality control, ...

Expected sensor production growth per year

$15 trillion by 2022

www.tsensorssummit.org

Monolithic or hybrid integrationonto CMOS platforms



3/26

1 Amperometric Electrochemical Sensors

Conclusions

2 Potentiostatic Modulator architecture

3

4

5

Low-Power Circuit Implementation

0.18- CMOS Design Example



4/26


Conclusions


3

4

5





5/26

Amperometric Electrochemical Sensors

Electrochemical time constant:

Measurement independent of the R and C impedances.

Three electrodes:

Interaction with microorganismsInteraction with microorganismsSelectivity by functionalization

Reduced speed and life timePotentiostatic and amperometricoperations

Current associated to the electronsinvolved in a redox process



5/26

Amperometric Electrochemical Sensors

Cyclic Voltammetry (CV)

Different detection methods are required

Chronoamperometry (CA)

Sensor performance,rapid location of redox potentials, ...

fixed and monitored as a function of time while concentration is swept

1

0.7

0.0

0.1

0.2

0.3

0.4

0.5

0.6

t [s]

[A]

-1-1 10

0

1

-1

0

1

[A]

0

1

0

t [s]1

Sweeping electrode potential and measuring resulting current

Oxidation

Reduction

Potentiostat must sink/source current

0.1mM 0.2mM0.3mM 0.4mM

0.5mM0.6mM

2mM



Classic circuit implementation

A1 establishes the control loop toaccomplish potentiostat operation

&

Requires multiples OpAmps + ADC

A2 converts sensor current to voltage for digitization and readout

Large area and power consumption

Potentiostat

Amperometry

6/26



7/26


Conclusions


3

4

5





Behaviour similar to low-pass first-ordersingle-bit CT A/D modulator

Error current converted into voltage and shaped in frequency by the electrochemical sensor itself

High oversampling ratios (OSR>100)can be easly obtained with kHz-rangeclock frequencies fS

8/26

Potentiostatic

Amperometric read-out through the modulation of output bit stream by chemical input



From electrochemical only to hybrid/mixed EC/electronic

9/26

Allows precise potentiostatic operation

Feed-Forward through Stabilize the loop

Electronic time constant

[5] J. Aymerich, M. Dei, L. Terés and F. Serra-Graells, ”Design of a Low-Power Potentiostatic Second-Order CT Delta-Sigma ADC for Electrochemical Sensors,” 2017 13th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)

Tones and pattern noise suppression

9/26



Direct path from Vr to input the single-bit quantizer

Improved architecture

Area and power consumption

Low-power CMOS circuits

Large flexibility on the selection of potentiostatic voltage

Wide common-mode voltage range

10/26



11/26


Conclusions


3

4

5





Single-bit quantizer: Wide input common-mode voltage range

Transconductance : Wide input/output common-mode voltage range

Large flexibility on the selection of potentiostatic voltage.





12/26



13/26

Single-bit quantizer

Rail-to-rail complementary latch comparator

Combinational logic allows to merge bothNMOS-PMOS-input comparators

Zero-static power consumption

Comb.logic

High-input impedance

PMOS-input latch

NMOS-input latch



14/26


PMOS OFF: Input common-mode > (Vdd-VTHp)

Outp nodes remain at the negative rail regardless


Combinational logic allows to merge both NMOS-PMOS-input comparators





15/26


NMOS OFF: Input common-mode < (VTHn)

Outn nodes remain at the positive rail regardless

PMOS OFF: Input common-mode > (Vdd-VTHp)

Outp nodes remain at the negative rail regardless







From 1st order to 2nd order

Single-bit quantizer: Wide input common-mode voltage range

Transconductance : Wide input/output common-mode voltage range

Large flexibility on the selection of potentiostatic voltage.





16/26



17/26

Gm-C Integrator

Constant gm over the input common-mode voltage

Sum of the tail currents constant

Avoid variations in the electronic integrator time constantM1 - M4 operated in weak inversion

Wide output swingOverdrive voltage



17/26


Conclusions


3

4

5





18/26

Gm-C integrator occupy most of the area

Low-power 0.18- CMOS Design

to minimize offset, i.e potentiostatic error (Vr - Vpot)slow integrator time constant(sampling frequency @ 1kHz)

Large Feedback DACTo minimize low-frequency noise.(DAC noise added directly to the input, it is not shaped by the delta-sigma loop-filter)

Ongoing run XFAB-XH018



Post-Layout Simulations

19/26

Output spectrum comparison w/ and w/o electronic transient

40dB/dec

70-dB dynamic range for 1.25uA current full scale. (280pA RMS, noise)

Higher resolution is achievable enlarging thearea of the feedback DAC



Post-Layout Simulations

Cyclic Voltammetry

Triangular waveform is applied to the reference electrode while the sensor current is measured simultaneously

VerilogA model: Vrw-Isens DC look-up tables based on two experimental measurements of ferricyanide CVs

23/26

0.7

0.0

0.1

0.2

0.3

0.4

0.5

0.6

t [s]

Vp

ot-V

ref

[V]

00

0.9

1.8

Vpot-Vref [V]0.70.2 0.4 0.60.50.1 0.3

Ferricyanide Cyclic Voltammetry

20/26



Simulation Results

21/26

Performance simulation results

Power consumption mainly determined by feedback current DAC

Rest of circuit blocks



22/26


Conclusions


3

4

5





23/26

Conclusions

High resolution with kHz-range clock frequencies:

Compact architecture thanks to the electrode-electrolyte interface used as an integrator stage in the structure

Minimalist analog circuits fully integrable in purely digital CMOS technologies

Low-power ( ) operation compared to sensor consumption

Conclusions



24/26

Conclusions

High resolution with kHz-range clock frequencies:

Compact architecture thanks to the electrode-electrolyte interface used as an integrator stage in the structure

Minimalist analog circuits fully integrable in purely digital CMOS technologies

Low-power ( ) operation compared to sensor consumption

Conclusions

Energy storageElectrochemical sensor<1mm2 ASIC: Potentiostat RF antennas

Smart tags for food quality control

Wireless contact lens for health monitoring

Future work



10/26


PMOS and NMOS ON

Vint > Vr






10/26


PMOS and NMOS ON




Vint > Vr

Vint < Vr



26/26


PMOS and NMOS ON




Vint > Vr

Vint < Vr



26/26

Power Consumption Comparison

Documents

A CMOS Potentiostatic Delta-Sigma for Electrochemical Sensorspserra/cnm/2018 - A 6.5-uW 70-dB 0.18... · Potentiostatic Delta-Sigma for Electrochemical Sensors Joan Aymerich, Michele