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A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek 1,2 , Ahmed S. H. Ahmed 1 , Ali A. Farid 1 , Utku Soylu 1 and Mark J. W. Rodwell 1 1 University of California Santa Barbara, Santa Barbara, CA 2 Movandi, Irvine, CA

A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

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Page 1: A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

A 140 GHz Two-Channel CMOS Transmitter using Low-Cost

Packaging Technologies

Arda Simsek1,2, Ahmed S. H. Ahmed1, Ali A. Farid1, Utku Soylu1 and Mark J. W. Rodwell1

1University of California Santa Barbara, Santa Barbara, CA2Movandi, Irvine, CA

Page 2: A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

Why 140GHz Wireless ?

2

Large available spectrum at mm-waves

Shorter wavelength – small IC, antenna arrays

Massive # of parallel channels – multiple independent beams

Low-cost antenna and transition design is critical

IC design above 100 GHz is easier with developments in CMOS and III-V

Packaging and antenna design is the challenge

Page 3: A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

140 GHz 4-Channel Receiver

3

Direct conversion receiver

140 GHz LNA, double balanced passive mixer

LO distribution through two x9 multipliers from common LO port

1.69 mm x 1.76 mmGlobalFoundries 45nm SOI CMOS

-5

0

5

10

15

20

0 5 10 15 20

IC1-Ch.1IC1-Ch.4IC2-Ch.1IC2-Ch.4

Co

nvers

ion

Ga

in (

dB

)

BB Frequency (GHz)

Fixed LO @ 145.9 GHz

18 dB conversion gain 12 GHz 3-dB BW495 mA @ 1V

A. Simsek, et al, 2018 IEEE BCICTS,

Page 4: A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

140 GHz 4-Channel Transmitter

4

Direct conversion transmitter

140 GHz PA (same with LNA), I/Q Gilbert Cell Active Mixer

LO distribution thru two x9 multiplier from common LO port

-10

-8

-6

-4

-2

0

2

4

140 145 150

VDD = 1 V

VDD = 1.1 V

VDD = 1.2 V

Tx

Ou

tpu

t P

ow

er

(dB

m)

Carrier Frequency (GHz)

Pout = -2 dBm @ 145 GHz463 mA @ 1V

1.69 mm x 1.76 mmGlobalFoundries 45nm SOI CMOS A. Simsek, et al, 2018 IEEE BCICTS,

Page 5: A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

Proposed Low-Cost Package

5

Multi layer PCBs with

high resolution

large number of vias with < 8 mil diamater

cavity

…are expensive

Can we used 2 separate cheaper PCBs and align the height?

Less number of vias in the antenna board with higher resolution

Carrier PCB with large number of vias and less resolution

Page 6: A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

Fully Packaged 2-Channel Transmitter

6

2-channel of one 4-channel CMOS transmitter and

2-channels of the 4-channel series-fed patch antenna array

2 I/Q baseband inputs and single LO input thru SMA connectors

Separation between the carrier and antenna PCB is < 50 um

Wirebond length is < 250-300 um which gives < 250-300 pH @ 140 GHz

Page 7: A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

Fully Packaged 4-Channel Receiver

7

Two 4-channel CMOS receiver ICs used due to wirebond density

2-channel of each IC connected to the 4-channel series-fed patch antenna array

4 I/Q baseband outputs and two LO inputs thru SMA connectors

Separation between the carrier and antenna PCB is < 50 um

Wirebond length is < 250-300 um which gives < 250-300 pH @ 140 GHz

Page 8: A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

Antenna Design and Measurements

8

Antennas and transitions designed in Astra MT77 substrate

5 mil substrate thickness, with Dk = 3, and Df = 0.0017

35 mil FR4 under to match the height with CMOS carrier + CMOS chip height

Test structures with GSG 150 um pitch wafer probe interface

(Single patches and 8-element series-fed patch array)

4-5 GHz frequency shift

Page 9: A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

Antenna Design and Measurements

9

8-element series-fed patch antenna arrays designed in Astra MT77 substrate

5 mil substrate thickness, with Dk = 3, and Df = 0.0017

Test structure created with GSG 150 um pitch wafer probe interface

136, 140 and 144 GHz series-fed antenna arrays are designed

-20

-15

-10

-5

0

135 140 145 150 155

Re

turn

Lo

ss (

dB

)

Frequency (GHz)

137-145 GHz

140-150 GHz

144 GHz antenna array

Frequency shifted ~ 4-5 GHz

Radiation patterns simulated at 144 GHz, measured at 148 GHz

Page 10: A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

Wirebond Transition Design

10

Ref. plane-1

Ref. plane-2

CMOS GSG pads (75 um pitch) to 50 Ohm microstrip line transition

90 Ohm GCPW line as a series tuning element

Fringing capacitance between wide microstrip to ground provides shunt tuning

Ground vias with 6 mil diameter/4 mil edge spacing – adds additional inductance

Insertion loss without the line = ~ 1.8 dB @148 GHz

Insertion loss with the line = ~ 2.5 dB @ 148 GHz

0.7 mil diameter gold wedge bonding with < 250-300 μm length

Page 11: A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

System Experiments

11

2-channel transmitter board measurements:

Data transmission and open eyes up to 14.4 Gb/s QPSK using 1-channel

@25 cm wireless distance

Power combining experiment with 2 Tx channels

Tx-1 EIRP ~ 15 dBm

Tx-2 EIRP ~ 15 dBm

Combined EIRP ~ 20 dBm (ideally 6-dB higher)

Alignment and phases are imperfectly

Page 12: A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

System Experiments

12

4-channel receiver board measurements:

20-21 dB conversion gain (single ended) with 4-5 GHz 3-dB BW

2 I/Q channels are shown here

I2 channel has a problem in the connector

Page 13: A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

System Experiments

13

1-channel transceiver measurements:

25 cm wireless distance

1-channel transmitter and receiver

All losses de-embedded

Page 14: A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

System Experiments

14

1-channel transceiver measurements:

4096 x 400 symbol length from AWG

BPSK modulation (same data on I/Q)

Saved I/Q output using DSA

Oversampling ratio of 8/10

Offline MMSE channel equalization

10 cm wireless data trans.

< 1x10-5 BER with

22 dB SNR (5 GBaud)

25 cm wireless data trans.

< 3x10-5 BER with

19 dB SNR (5 GBaud)

Page 15: A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

Conclusion and Future Direction

15

• Low-cost antenna design and measurements at D-Band

• Wirebond transition design with < 2 dB insertion loss above 140 GHz

• Fully packaged, modular 2-channel transmitter and a fully packaged 4-channel receiver

• Beamforming gain demonstrated for a simple 2-channel transmitter

• 1-channel wireless data transmission experiments using these boards:

– 10 cm wireless data transmission with < 1x10-5 BER with 22 dB SNR (5 Gbaud BPSK)

– 25 cm wireless data transmission with < 3x10-5 BER with 19 dB SNR (5 Gbaud BPSK)

What is next?

• Higher order modulation schemes, larger arrays

• Multi-beam communications

• III-V PA integration for higher power

Page 16: A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

Acknowledgments

16

• National Science Foundation (NSF) GigaNets program, Contract NO. CNS-1518812

• Global Foundries for the 45 nm CMOS SOI chip fabrication

• Advotech for the assembly

• Navneet Sharma, Hamidreza Memerzadeh, Nikolaus Klammer and Gary Xu at Samsung Research America for valuable suggestions and the measurement equipment.

• Prof. James F. Buckwalter for valuable comments.

Page 17: A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

System Experiments

17

2-channel transmitter board measurements:

Farid

et al.

Visweswaran

et al.

Carpenter et

al.

Sawaby

et al.This Work

Technology22nm FDSOI

CMOS28nm CMOS 250nm InP

55nm SiGe

HBT45nm CMOS

Freq. [GHz] 125-145 138-151 110-170 110-150 140-150

Pout (dBm) 2.8 7 9 2.5 2

EIRP (dBm) - 11.5 - -20

(2-Ch)

Data Rate

(Gb/s)- - 44 (QPSK) 36 (QPSK) 14.4 (QPSK)

Pdc [mW]198 (Rx)

196 (Tx)

500

(3 TRx)

357

(1 TRx)

220

(1 Tx)

500

(4 Tx)

Area [mm2]1.44 (Tx)

1.44 (Rx)

6.5

(3 TRx)

2.34

(1 TRx)

90

(package)

2.94

(4 Tx)

Integration No Antenna On-Chip Antenna Wafer ProbingOff-Chip

Antenna

Off-Chip

Antenna

Comparison between state-of-the art designs

Page 18: A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

Back-up Slides

Page 19: A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

Antenna Design and Measurements

Unit cell design and patch results

Page 20: A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

Antenna Design and Measurements

136 GHz (measured @140 GHz, return loss is not available)

140 GHz (measured @144 GHz)

-25

-20

-15

-10

-5

0

5

10

15

-80 -60 -40 -20 0 20 40 60 80

E-plane MeasuredH-plane SimulatedE-plane SimulatedH-plane Measured

Ga

in (

dB

)

Theta (Degree)

Page 21: A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

Transmitter Beamforming Gain

Page 22: A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

Transceiver (Bathtub)

Page 23: A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

LNA

Measurements – Circuit Blocks

0

5

10

15

20

25

-30

-20

-10

0

10

20

120 130 140 150 160 170 180

Gain_Sim

NF_Sim

Gain_Meas

S11_Sim

S22_Sim

S11_Meas

S22_Meas

Gain

(d

B)

S11

/S2

2 (d

B)

Frequency (GHz)

-6

-4

-2

0

2

4

6

140 145 150 155 160

Measured #1 (VDD: 1 V)

Measured #2 (VDD: 1 V)

Measured #1 (VDD: 1.1 V)

Measured #2 (VDD: 1.1 V)

SimulatedOu

tpu

t P

ow

er

(dB

m)

Frequency (GHz)

x9 LO Multiplier

41 mA @ 1V

Peak Gain = 19.9 dB @ 145 GHz

3-dB BW = 10GHz

98 mA @ 1V

Peak output power = 1.5 dBm

@ 148 GHz

Page 24: A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

Measurements – Receiver Channel

-5

0

5

10

15

20

0 5 10 15 20

IC1-Ch.1IC1-Ch.4IC2-Ch.1IC2-Ch.4

Co

nvers

ion

Ga

in (

dB

)

BB Frequency (GHz)

Fixed LO @ 145.9 GHz0

5

10

15

20

135 140 145 150 155 160 165 170

IC1-Ch.1IC1-Ch.4IC2-Ch.1IC2-Ch.4

Co

nvers

ion

Ga

in (

dB

)

RF Frequency (GHz)

Fixed BB @ 100 MHz

18 dB conversion gain 12 GHz 3-dB BWNarrow-band notch in RF response - limits the data rate163 mA + 109 mA + 223 mA = 495 mA @ 1V

Page 25: A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

Measurements – Transmitter Channel

3-dB modulation bandwidth ~ 6 - 8 GHzTotal transmitter output power: -2 dBm with 1 V supply,

3 dBm with 1.2 V supply @ 145 GHz161 mA + 94 mA + 208 mA = 463 mA @ 1V

-10

-8

-6

-4

-2

0

2

4

140 145 150

VDD = 1 V

VDD = 1.1 V

VDD = 1.2 V

Tx

Ou

tpu

t P

ow

er

(dB

m)

Carrier Frequency (GHz)

-20

-15

-10

-5

0

5

0 2 4 6 8 10 12 14 16

IC1-Ch.1IC1-Ch.4IC2-Ch.1IC2-Ch.4

Re

lati

ve S

ide

ban

d

Po

wer

(dB

m)

Modulation Frequency (GHz)

Fixed RF @ 146.01 GHz

LO

LO+BBLO-BB

Page 26: A 140 GHz Two-Channel CMOS Transmitter using …...A 140 GHz Two-Channel CMOS Transmitter using Low-Cost Packaging Technologies Arda Simsek1,2, Ahmed S. H. Ahmed 1, Ali A. Farid ,

Outline

• Motivation

• 140 GHz Transceiver in 45 nm CMOS SOI

• Proposed Low-Cost Package

– 2-Channel Transmitter

– 4-Channel Receiver

• Wirebond Transition Design

• 140 GHz Antenna Design and Measurements

• System Experiments and Results

• Conclusion and Future Direction26