8085 Microprocessor Programming

8/12/2019 8085 Microprocessor Programming

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Microprocessor programming

ByPROF. Y. P. JADHAV.

Physics dept.Smt. C.H.M. College, Ulhasnagar-3


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INSTRUCTION SET OF 8085

MICROPROCESSORThe 8085 microprocessor has 74 basic and 246 totalinstructions.

Each instruction has one byte opcode.

Instructions can be 1-byte, 2-bytes or 3-bytes

1-byte instruction has only an opcode, while 2-byteinstruction has an opcode, followed by 8-bit (1-byte) data or

address and 3-byte instruction has an opcode, followed by16-bit (2-bytes) data or address.

While storing 3-bytes instruction in memory, thesequence of storage is first the opcode, followed by low-byte of data or address, and then high-byte of data or

address. YPJ


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Groups of the 8085 instruction set

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Data

Transfer

Instructions

Loads the given data into register

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Copies data from register to register

Copies data from register to memory and vice

versa.

Do not affect Condition flags.


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Instructions Task performed

1 MVI r, data (8-bit) Move 8-bit immediate data to register r.

2 MVI M, data (8-

bit)

Move 8-bit immediate data to memory whose address is in the

HL register (Memory pointer).3 MOV rd, rs Move 8-bit data from source register (rs) to destination register

(rd).

4 MOV M, rs Move 8-bit data from source register (rs) to memory whose

address is in the memory pointer.

5 MOV rd, M Move 8-bit data from memory whose address is in the memory

pointer to destination register (rd).

6 LXI rp, data (16-

bit)Load 16-bit immediate data in the specified register pair

7 STA addr Store the content of register A at the address given in the

instruction.

8 LDA addr Load data into register A directly from the address given in the

instruction.

9 SHLD addr Store the content of HL register in to memory

(addr) (L) & (addr + 1) (H)

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10 LHLD addr Load the content of memory into HL register

(L) (addr) & (H) (addr + 1).

11 STAX rp Store the content of the register A into the memory whose

location is specified by BC or DE register pair

12 LDAX rp Load the content of the memory, whose location is specified

by BC or DE register pair, into register A

13 XCHG Exchange the content of HL and DE register pair

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INSTRUCTIONS SET OF 8085MOV Rd, Rs.(Move data from Rs to Rd).

Example:

MOV C,B. Move the content of register B to C.

Initially After execution

B=10H. B=10H.

C=20H. C=10H.

Flags Affected :No flags affected.

Addressing mode: Register.


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DATA TRANSFER GROUPMOV Rd, M (Move data from Memory to Rd).

Example:

MOV C,M. Move the content of Memory to C.

Suppose the Data at memory pointed By HL pair at C200H is 10H.


H=C2,L=00,C=30H H=C2,L=00,C=10H.


Addressing mode: Indirect.


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DATA TRANSFER GROUPMVI R, Data.(Move Immediate data to Register).

Example:

MVI B, 30H. (Move the data 30 H to Register B)Initially After execution

B=40H B=30H


Addressing mode: Immediate.


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DATA TRANSFER GROUPLXI Rp,16 bit.(Load 16 bit data to Register pair Immediate).

Example:

LXI SP, C200H. (Load Stack pointer with C200H).


SP=C800H SP=C200H.




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DATA TRANSFER GROUPSTA address.(Store Acc data to address).

Example:

STA C200H. (Move the data from Acc to C200H).Suppose in Acc the data is 10H.


A=10H, C200=20H C200=10H , A=10H


Addressing mode: Direct.


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DATA TRANSFER GROUPLHLD address.(Load HL pair with data from address).Example:

LHLD C200H. (Move the data from C200 to HL pair).Suppose at C200 the data is 20H,30H .

Initially After executionH=10H,L=20H H=20H,L=30H.

C2=20H,00=30H C2=20H,00=30H

Flags Affected :No flags affected.Addressing mode: Direct.


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DATA TRANSFER GROUP XCHG(Exchange the data from HL pair to DE pair)

Example : XCHG


H=20H,L=30H, H=40H,L=70H.

D=40H,E=70H. D=20H,E=30H.




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DATA TRANSFER GROUPIN 8 bit address(Move the data from address to Acc)

Example: IN 80H

Move the data from 80H port address to Accumulator.Suppose data at 80H is 39H.


A=20H. A=39H




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DATA TRANSFER GROUPOUT 8 bit address(Move the data from Acc to address)

Example: OUT 80H

Move the data from Acc to port address 80H.Suppose data at Acc is 39H.


A=39H. 80=10H. A=39H,80=39H.




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ArithmeticInstructions

Instructions

- to add and subtract,

- increment or decrement data in

register, register pair or memory and

- to adjust 8-bit data for BCD

arithmetic are in this group.

Flag conditions are change after execution ofinstruction from this group.


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Addition ADD r Add register (r) to Accumulator

ADD M Add data in memory to Accumulator

ADI 8-bit data Add immediate 8-bit data to Accumulator

ADC r Add register (r) with carry to Accumulator

ADC M Add data in memory to Accumulator with carry.

ACI 8-bit data Add immediate 8-bit data to Accumulator with carry

DAD rp Add (rp) to (HL) and store the result in HL pair

DAA Adjusts Accumulator to packed BCD after adding two BCD numbers.

Subtraction SUB r Subtract register (r) from AccumulatorSUB M Subtract data in memory from Accumulator

SUI 8-bit data Subtract immediate 8-bit data from Accumulator

SBB r Subtract register (r) with borrow from Accumulator

SBB M Subtract data in memory from Accumulator with borrow.

SBI 8-bit data Subtract immediate 8-bit data to Accumulator with carry

Increment and

Decrement

content of

register/

register pair/

memory

INR r Increment the content of specified register

INR M Increment the content of specified memory

INX rp Increment the content of specified register pair

DCR r Decrement the content of specified register

DCR M Decrement the content of specified memory

DCX rp Decrement the content of specified register pair YPJ


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Logic Instructions This group instructions perform logic

operations such as AND, OR and XOR

Compare data between registers or betweenregister and memory

Rotate and complement data in registers.

Flag conditions are altered after execution of

instruction of this group

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1 ANA r Logically AND (r) with (A)

2 ANA M Logically AND (M) with (A)

3 ANI 8-bit data Logically AND immediate 8-bit data with (A)4 XRA r Logically XOR (r) with (A)

5 XRA M Logically XOR (M) with (A)

6 XRI 8-bit data Logically XOR immediate 8-bit data with (A)

7 ORA r Logically OR (r) with (A)

8 ORA M Logically OR (M) with (A)

9 ORI 8-bit data Logically XOR immediate 8-bit data with (A)

10 CMP r Logically compare (r) with (A)

11 CMP M Logically compare (M) with (A)

12 CPI 8-bit data Logically compare immediate 8-bit data with (A)

13 STC Sets carry flag.

14 CMC Complements carry flag

15 CMA Complements (A)

16 RLC Rotate accumulator left by one bit

17 RRC Rotate accumulator right by one bit

18 RAL Rotate accumulator left through carry by one bit

19 RAR Rotate accumulator right through carry by one bit YPJ


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ARITHMEIC GROUPADD M(ADD H or L Reg content with Acc and result in A ).

Example:

ADD M. (ADD the content of HL with A).

Suppose the Data at memory pointed by HL register 1020H is10H.


. H= 10H ,L=20H . H=10H,L=20H.

A=20H,C=10H. A=30H.

Flags Affected :All flags are modified.Addressing mode: Register Indirect.


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ARITHMETIC GROUPADI Data(ADD immediate data with Acc and result in A ).

Example:

ADI 30H. (ADD 30H with A).


A=20H, A=50H.

Flags Affected :All flags are modified.



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ARITHMETIC GROUPADC R(ADD register content with Acc and carry and result in A ).

Example:

ADC C. (ADD the content of C with A with carry).

Suppose the Data at C register is 10H and carry is 01H.


. C= 10H ,A=10H A=21H,C=10H.

Flags Affected :All flags are modified.Addressing mode: Register


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ARITHMETIC GROUPExample:Write a program to perform 16 bit addition of 1234H&

4321H. Store answer at H & L registers.

MVI B,21H B=21H

MVI A,34H A=34HMVI C,43H C=43H

MVI D,12H D=12H

ADD B A=34+21H

MOV L,A L=55HMOV A,C A=43H

ADC D A=43+12H

MOV H,A H=55H

RST1 STOP.


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ARITHMETIC GROUPSBB R(Subtract register content from Acc with borrow and result

in A ).

Example:SBB B. (Subtract the content of B from A with borrow).

Suppose the Data at B register is 10H and borrow is 01H .


B= 0FH ,A=20H A=10H,B=0FH.



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ARITHMETIC GROUPSUI Data(Subtract immediate data from Acc and result in A ).

Example:

SUI 30H. (Subtract 30H from A).


A=80H, A=50H.

Flags Affected :All flags are modified.

Addressing mode: Immediate


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ARITHMETIC GROUPExample: Subtract data of C800 H from C200H.Store the result at

C201.

LDA C800HMOV B,A

LDA C200H

SUB B

STA C201H

RST1


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ARITHMETIC GROUPDAD Rp(Add specified register pair with HL pair)

Example: DAD D.(Add the content of E with L and that of Dwith H register and result in HL pair)

Suppose the content of HL pair is H=20H ,L=40H and DEpair is D=30H, E=10H.

Initially After executionH=20H ,L=40H H=50H ,L=50H

D=30H, E=10H D=30H, E=10H

Flags Affected :Only carry flag is modified.Addressing mode: Register.


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ARITHMETIC GROUPDAA (Decimal adjust accumulator)Example:MVI A,12H

ADI 39HDAA . This instruction is used to store result in BCD form.If lower

nibble is greater than 9 ,6 is added while if upper nibble isgreater than 9,6 is added to it to get BCD result.

Initially After execution12+39=4B 12+39=51 in BCD form.



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ARITHMETIC GROUPINR R(Increment register content by 1 ).

Example:

INR C. (Increment the content of C by 1).

Suppose the Data at C register is 10H.


C= 10H C=11H.

Flags Affected :All flags are modified except carry flag.



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ARITHMETIC GROUPDCR R(Decrement register content by 1 ).

Example:

DCR C. (Decrement the content of C by 1).



C= 10H C=0FH.

Flags Affected :All flags are modified except carry flag.



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ARITHMETIC GROUPINX Rp(Increment register pair content by 1 ).

Example:

INX SP (Increment the content of Stack pointer pair by 1).

INX B. (Increment the content of BC pair by 1).

Suppose the Data at BC register is 1010H and SP is C200H


BC= 1010H BC=1011H.SP=C200H SP=C201H.

Flags Affected :No flags are modified.



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LOGICAL GROUPANA R(Logically AND register content with Acc and result in A ).

Example:

ANA C (AND the content of C with A).



C= 10H ,A=10H A=10H,C=10H.

Flags Affected :S,Z,P are modified Cy=reset,AC=set.Addressing mode:Register.


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LOGICAL GROUPANI Data(Logically AND immediate data with Acc and result in A ).

Example:

ANI 10H (AND 10H with A).


A=11H A=10H

Flags Affected :S,Z,P are modified Cy = reset, AC = set.



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LOGICAL GROUPORA R(Logically OR register content with Acc and result in A5 ).

Example:

ORA C (OR the content of C with A).



C= 17H ,A=10H A=17H,C=17H.

Flags Affected :S,Z,P are modified Cy=reset,AC=reset.Addressing mode:Register.


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LOGICAL GROUPORI Data(Logically OR immediate data with Acc and result in A ).

Example:

ORI 10H (OR 10H with A).


A=30H A=30H

Flags Affected :S,Z,P are modified Cy=reset,AC=set.



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LOGICAL GROUPXRA R(Logically XOR register content with Acc and result in A ).

Example:

XRA C (XOR the content of C with A).



C= 17H ,A=10H A=07H,C=17H.

Flags Affected :S,Z,P are modified Cy=reset,AC=reset.Addressing mode:Register.


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LOGICAL GROUPCPI Data(Compare immediate data with Acc ).

Example:

CPI 10H (Compare the content of C with A).


A=17H A=17H.

Flags Affected :S=0,Z=0,P=0, Cy=reset,AC=reset.

Addressing mode:Immediate.


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LOGICAL GROUPRLC (Rotate accumulator left ).

Example:

MOV A,03H.

RLC (Rotate accumulator left).


A=03H A=06H.

Flags Affected :Only carry flag is affected.

Addressing mode:Implied.


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LOGICAL GROUPRAL(Rotate accumulator left with carry ).

Example:

MOV A,03H.

RAL (Rotate accumulator left with carry).


A=03H , carry =01H A=07H.




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LOGICAL GROUPRRC(Rotate accumulator right ).

Example:

MOV A,03H.

RRC (Rotate accumulator right).


A=03H , A=81H.




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LOGICAL GROUPWrite a program to reset last 4 bits of the number 32H

Store result at C200H.

MVI A, 32H A=32HANI F0H 00110010 AND 1111000

=00110000=30H

STA C200H. C200=30H

RST1 Stop


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Branch Instructions

Allows the microprocessor to change thesequence of a program execution eitherunconditionally or under certain test

conditions. Cause the microprocessor to transfer the

program control from the execution of theinstruction of main program to the instructions

whose address is specified in the instruction. Conditional branch instructions examine the

status of the specified flag and determine ifbranch instruction is to be executed or not.

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This group includes:Jump instructions direct or indirect

(unconditional and conditional)

Call instructions (unconditional andconditional)Return instructions (unconditional and

conditional)

Restart instructions (unconditional)

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Unconditional

Jump

JMP 16-bit addr Jump unconditionally to the address specified in

the instruction

Conditional

Jump

Jcondition addr

JC 16-bit addr

JNC 16-bit addr

JP 16-bit addr

JM 16-bit addr

JPE 16-bit addrJPO 16-bit addr

JZ 16-bit addr

JNZ 16-bit addr

Jump conditionally to the address specified in the

instruction.Jump on carry (CY = 1)

Jump on no carry (CY = 0)

Jump on positive (S = 0)

Jump on negative (S = 1)

Jump on even parity (P = 1)Jump on odd parity (P = 0)

Jump on zero (Z = 1)

Jump on not zero (Z = 0)

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Indirect jump LXI H 16bit addr

and PCHL

Initialize memory pointer and

then Load (HL) to (PC)

Restart n RST n (0 to 7)

RST 0

RST 1

RST 2

RST 3RST 4

RST 5

RST 6

RST 7

Transfer the program control

to the specified memory address:

0000H

0008H

0010H

0018H0020H

0028H

0030H

0038HYPJ


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BRANCH GROUP

JMP address(Unconditional jump to address)

Example:

JMP C200H. After this instruction the Program Counter is loaded with thislocation and starts executing and the contents of PC are loadedon Stack.

Flags Affected :No Flags are affected.Addressing mode:Immediate.


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CALL address(Unconditional CALL from

address)

Example:

CALL C200H.

After this instruction the Program Counter is loaded with thislocation and starts executing and the contents of PC are loadedon Stack.

Flags Affected :No Flags are affected.

Addressing mode:Immediate


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BRANCH GROUPConditional Jump Instructions.

JC (Jump if Carry flag is set)

JNC (Jump if Carry flag is reset) JZ (Jump if zero flag set)

JNZ (Jump if zero flag is reset)

JPE (Jump if parity flag is set)

JPO (Jump if parity odd or P flag is reset )

JP (Jump if sign flag reset ) JM (Jump if sign flag is set or minus)


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BRANCH GROUPConditional Call Instructions.

CC (Call if Carry flag is set)

CNC (Call if Carry flag is reset) CZ (Call if zero flag set)

CNZ (Call if zero flag is reset)

CPE (Call if parity flag is set)

CPO (Call if parity odd or P flag is reset )

CP (Call if sign flag reset ) CM (Call if sign flag is set or minus)


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BRANCH GROUPRET(Return from subroutine)

Example:

MOV A,CRET

After this instruction the Program Counter POPS PUSHEDcontents from stack and starts executing from that address .

Flags Affected :No Flags are affected.Addressing mode:Register indirect .


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BRANCH GROUPRST (Restart instruction)

Example:

MOV A,CRST 1.

After this instruction the Program Counter goes to address0008H and starts executing from that address .

Flags Affected :No Flags are affected.Addressing mode:Register indirect.


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BRANCH GROUP

The addresses of the respective RST commands are:

Instruction Address

RST 0 0000H

RST 1 0008HRST 2 0010H

RST 3 0018H

RST 4 0020HRST 5 0028H

RST 6 0030H

RST 7 0038H


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This group consists of following

instructions

CALL:

1.CALL addr (unconditional Call)

2.Ccondition addr (Conditional Call)

RETURN:

1.RET addr (unconditional Return)

2.Rcondition addr (Conditional Return)

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Call and Return Instructions



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Unconditional Call CALL 16-bit addr Call unconditionally a subroutine whose address is

specified in the instruction.

Conditional Call Ccondition 16-bit addr

CC 16-bit addr

CNC 16-bit addr

CP 16-bit addr

CM 16-bit addr

CPE 16-bit addr

CPO 16-bit addr

CZ 16-bit addrCNZ 16-bit addr

Call conditionally a subroutine whose address is

specified in the instruction.Call a subroutine on carry (CY = 1)

Call a subroutine on no carry (CY = 0)

Call a subroutine on positive (S = 0)

Call a subroutine on negative (S = 1)

Call a subroutine on even parity (P = 1)

Call a subroutine on odd parity (P = 0)

Call a subroutine on zero (Z = 1)Call a subroutine on not zero (Z = 0)

Unconditional Return RET 16-bit addr Return unconditionally from the subroutine.

Conditional Return Rcondition 16-bit addr

RC 16-bit addr

RNC 16-bit addrRP 16-bit addr

RM 16-bit addr

RPE 16-bit addr

RPO 16-bit addr

RZ 16-bit addr

RNZ 16-bit addr

Return conditionally from the subroutine.

Return from subroutine on carry (CY = 1)

Return from subroutine on no carry (CY = 0)Return from subroutine on positive (S = 0)

Return from subroutine on negative (S = 1)

Return from subroutine on even parity (P =1)

Return from subroutine on odd parity (P = 0)

Return from subroutine on zero (Z = 1)

Return from subroutine on not zero (Z = 0)YPJ

Stack and Machine Control Instructions


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This group includes instructions related to stack, I/O port

(reading and writing data), interrupt, as well as No Operation

and halt program execution.

Stack Operations: LXI SP 16-bit addr and SPHL

PUSH and POP

CALL and RETURN

RESTART

XTHL

Input/ Output Instructions: IN 8-bit (port addr)

OUT 8-bit (port addr)

Interrupt enable / disable instructions : EI

DIInterrupt mask set / read instructions :

o SIM

o RIM

Machine control instructions : NOP

HLT YPJ


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STACK AND MACHINE CONTROLPUSH Rp.(Push register pair contents on stack).

Example:LXI SP FFFFH.PUSH H. (Move the content of HL pair on Stack).

Suppose at HL pair the data is H= 20H,L= 30H & SP isinitialized at FFFFH

Initially After executionH=20H,L=30H H=20H,L=30H.SP=FFFF H FFFD=30H,FFFE=20H

Flags Affected :No flags affected.Addressing mode: Register indirect.


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STACK AND MACHINE CONTROLPOP Rp.(Pop register pair contents from stack).

Example:POP D(POP the content of DE pair from Stack).

Suppose at DE pair the data is H= 20H,L= 30H SP wasinitialized at FFFFH


D=20H,E=30H D=10H,E=80H.

FFFD=80H,FFFE=10H


Addressing mode: Register indirect


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STACK AND MACHINE CONTROLXTHL (Exchange HL register pair contents with top of stack).

Example: XTHL(Exchange top with HL pair).

Suppose at HL pair the data is H= 20H,L= 30H & SP =FFFFH& at locations FFFF=10H and at FFFE= 80H.


H=20H,L=30H H=10H,L=80H.

SP=FFFF =10H,FFFE=80H FFFD=20H,FFFE=30H


Addressing mode: Register indirect.

8085 INSTRUCTIONS AFFECTING THE STATUS FLAGS


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Instructions Status Flags

CY AC Z S P

ACI 8-bit A A A A A

ADC reg A A A A A

ADC M A A A A A

ADD reg A A A A A

ADD M A A A A A

ADI 8-bit A A A A A

ANA reg 0 1 A A A

ANA M 0 1 A A A

ANI 8-bit 0 1 A A A

CMC A NA NA NA NA

CMP reg A A A A A

CMP M A A A A A

CPI 8-bit A A A A A

DAA A A A A A

DAD Rp A NA NA NA NA

DCR reg NA A A A A

DCR M NA A A A A YPJ

CY AC Z S P

INR NA A A A A


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INR reg NA A A A A

INR M NA A A A A

ORA reg 0 0 A A A

ORA M 0 0 A A A

ORI 8-bit 0 0 A A A

RAL A NA NA NA NA

RAR A NA NA NA NA

RLC A NA NA NA NA

RRC A NA NA NA NASBB reg A A A A A

SBB M A A A A A

SBI 8-bit A A A A A

STC A NA NA NA NA

SUB reg A A A A A

SUB M A A A A A

SUI 8-bit A A A A A

XRA reg 0 0 A A A

XRA M 0 0 A A A

XRI 8-bit 0 0 A A AYPJ


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NOTE:

A : Flag affected.

NA: Flag not affected.

0 : Flag always zero.1 : Flag always one.

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Registers Code Registers Pairs Code

B 0 0 0 BC 0 0C 0 0 1 DE 0 1

D 0 1 0 HL 1 0

E 0 1 1 AF or SP 1 1

H 1 0 0L 1 0 1

M (Memory) 1 1 0

A 1 1 1

DDD defines the destination register, SSS defines the source register

and DD defines the register pair.

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D t t f i t ti


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1 MVI r, 8-bit data : Move 8bit data immediate to register r.

Operation : (r) 8 bit data (byte)

Description : The content of byte 2 of the instruction is directly

moved to specified register r.

No. of bytes : 2 bytesFirst byte: Opcode of MVI r.

Second byte: 8bit data.

Instruction

format

:

Addressing mode : Immediate addressing

Flags affected : None

0 0 D D D 1 1 0

Data

Data transfer instructions

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Example:

MVI B, 54H ; This instruction will load 54H directly into register B.

Before execution After execution

MVI B, 54HA F

B C

D E

H L

A F

B 54H C

D E

H L

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3 MOV Rd Rs : Move (copy) data from source register (Rs) to


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3 MOV Rd, Rs : Move (copy) data from source register (Rs) to

destination register (Rd).

Operation : (Rd) (Rs)

Description : This instruction copies data from source register to

destination register. The Rs and Rd are general

purpose registers such as A, B, C, D, E, H and L

registers.

No. of bytes : 1 byteOpcode of MOV Rd, Rs

Instruction

format

:

Addressingmode

: Register addressing


0 1 D D D S S S

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4 MOV M, Rs : Move data from source register into memory location


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4 MOV M, Rs : Move data from source register into memory location

whose address is given by memory pointer - (HL)

register pair.

Operation : (M) (Rs)

Description : The content of source register is copied into specified

memory location.

No. of bytes : 1 byte

Opcode of MOV M, Rs

Instruction

format

:

Addressingmode

: Register indirect addressing


0 1 1 1 0 S S S

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5 MOV Rd M : Move data from memory location whose address is


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5 MOV Rd, M : Move data from memory location, whose address is

pointed by memory pointer, into destination register.

Operation : (Rd) (M)

Description : The content of specified memory location is copied

into destination register

No. of bytes : 1 byte

Opcode of MOV M, Rd

Instruction

format

:

Addressing

mode

: Register indirect addressing


0 1 D D D 1 1 0

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3.2.3 Addressing Modes

Microprocessorneeds memoryaddress to accessdata from thememory.

Assembly language

may use severaladdressing modes toaccomplish thistask.

Add i M d


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Addressing Modes

continued

Every instruction of a program has to operate on a data -constants, values held in registers or values held in memory(or ports). The method of specifying the data to be operated

by the instruction is called ADDRESSING.

The different ways that a microprocessor canaccess data are referred to as Addressing modes.

The 8085 havefiveAddressing modes:

1. Immediate Addressing2. Register Addressing3. Direct Addressing4. Indirect Addressing5. Implied Addressing.

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Immediate Addressing

In this mode, 8 or 16-bit data can be

specified as a part of instruction. Theinstructions ending with letter I are generallyfall under this category. Here the operand is thespecified constant in the instruction itself.

Examples:MVI A, 20H ; Move immediate 8-bit data (20H) into

; the accumulator.LXI H, C000H ;Move immediate 16-bit data

; (C000H) into memory/ data

; pointer i.e. in HL register pair.YPJ


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Register Addressing

This mode specifies the source operand ordestination operand or both to be in the 8085registers. This results in faster execution, sinceit is not necessary (required) to access memory

location for operands. Here the operand is thecontents of the named registers.

Examples:

MOV A,B ;Move the content of register B into the accumulator.

ADD C ; Add the content of register C into the accumulator.

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Direct Addressing

This mode specifies the 16-bit address in the

instruction itself. The second and the third bytes ofinstruction contain 16-bit address. Here the operand isthe contents of the specified memory location.

Examples:

LDA D000H ; Loads the 8 bit content of memory D000H into the

; accumulator.

SHLD 3000H ; stores the content of HL register pair in to two consecutive

; memory locations, the content of register L into memory

; location 3000H and the content of register H into memory

; location 3001H.

YPJ

I di Add i


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Indirect AddressingIn this mode the memory address, at which data is

stored or to be stored, is specified by the contents of theregister pair. (The specified register pair contains theaddress of the operand.)

Examples:LDAX D ; Loads the accumulator with content of memory

; pointed by DE register pair

MOV M, A ; Store the content of accumulator in memory

; pointed by memory (HL) pointer.

YPJ


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Implied Addressing (indicated by suggestion rather than explicit reference)

In implied addressing, opcode only specifies the

address of the operands. The addressing mode of certaininstructions is implied by the instructions function. Forexample, the STC (set carry flag) instruction deals onlywith the carry flag, the DAA (decimal adjustaccumulator) instruction deals with the accumulator.

Examples:

CMA ; Complements the content of accumulator.

RAL ; Rotates the content of accumulator left through;carry.

STC ;(set carry flag) instruction deals only with the carry flag,

DAA ;(decimal adjust accumulator) instruction deals with the

; accumulator.

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Some instructions use a combination ofaddressing modes. A CALLinstruction, forexample, combines direct addressing andregister indirect addressing. The direct address

in a CALLinstruction specifies the address ofthe desired subroutine; the register indirectaddress is the stack pointer. The CALLinstruction pushes the current contents of the

program counter into the memory locationspecified by the stack pointer.


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Instruction Formats

The 8085 instruction set consists ofone, two and three byte instructions.

The first byte of instruction is alwaysthe opcode; in two byte instruction thesecond byte is usually data (or port

address); in the three byte instructionthe second and third byte representaddress or 16-bit data.

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One byte instruction:

FORMAT: Opcode

1 byteExample: MOV A, B is one byte Instruction. This instruction copies the contents of register B into

register A.

Two byte instruction:

FORMAT: Opcode Operand

2 byte

Example: MVI C, 00H. In this instruction the first byte is the opcode for

MVI C and is followed by a data byte (00H in this case). This instruction copies immediate data 00H into

register C.

Three byte instruction:

FORMAT: Opcode Operand Operand3 byte

Example: JMP D050H. The opcode of this instruction is C3 first byte and is followed by 16-bit address

D050H (2bytes). This instruction transfers program control to memory location D050H, by loading this

address into program counter.

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Algorithm

A problem is solved by processor in step bystep method. We call each step an instruction.Thus the solution of the problem is divided inseveral instructions. An Algorithm is such

sequence of instructions to solve a particularproblem.

An algorithm has following characteristics.

1. Input:an algorithm may or may not require input data.

2. Output:Each algorithm is expected to have at least one result.3. Definiteness:each instruction must be clear and unambiguous.4. Finiteness:If the instructions of an algorithm are executed, the

algorithm should terminate a program after finite number of steps.

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Flowchart

To develop programming logic programmerhas to write down various actions, which are tobe performed in proper sequence.

- AFlowchartis a Graphical representation ofan algorithm - that illustrates the sequence ofoperations to be performed to arrive at thesolution.

- Special-purpose symbols connected by arrows

(flowlines)- Flowchart is very useful for clearunderstanding of programming logic.

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The table shows the graphic symbols used in the flowchart.


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Symbol Name Purpose

Oval:Start/Stop

Box

To begin a flowchart

To end flowchart

Parallelogram:

Input Box

To gate input data

Rectangle:

Processing Box

To do calculations

Diamond:

Decision Box

To make comparisons

Out put Box To print result

Double sided

rectangle:

subroutine Box

To execute subroutine

Arrow To indicate flow of

instruction

Circle with

alphabet or

number

A: any alphabet

or number

To indicate continuation

YPJ

A

1 MVI A, 8-bit data


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MVI B, 8-bit data

ADD B

STA C200H

RST 1

2 MVI A, 8-bit data

MVI B, 8-bit data

MVI C, 00H

ADD B

JNC :NO CARRY

INR C

NO CARRY: STA C201H

MOV A,C

STA C200H

HLT / RST 1 YPJ


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3 MVI C, 00H

LXI H C100H

MOV A, M

INX H

ADD M

JNC :NO CARRY

INR C

NO CARRY: INX H

MOV M, C

INX H

MOV M, A

HLT

YPJ


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4

LXI H C100H

MOV A, M

INX H

ADD M

MOV L, A

MVI A, 00H

ADC A

MOV H, A

RST 1

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5

LXI H C100H

MOV A, M

INX H

ADD M

MOV L, AMVI A, 00H

ADC A

MOV H, A

CALL MODIAD

HLT

YPJ


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8 BIT DECIMAL SUBSTRACTION

if 2nd no is greater than 1st no then the answer will in 2's complement

store 1st 8 bit no in the memory location C050

store 2nd 8 bit no in the memory location C051

Result is stored in C052

LXI H,C051MVI A,99

SUB M

INR A

DCX H

ADD M

DAA

STA C052

HLT


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Write an assembly language program to multiply two 8-bit

hexadecimal numbers, using successive addition method. Store theproduct in HL register pair.

XRA A/ SUB A/ MVI A, 00H

MVI B, 8-bit data

MVI D, 8-bit dataMOV C, A

AGAIN: ADD B

JNC : NO CARRY

INR C

NO CARRY : DCR D

JNZ : AGAINMOV H,C

MOV L,A

RST 1


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Write an assembly language program to

transfer 16 bytes of data stored in locations at

C150H to C15FH to the new memory locationstarting from C200H onward.

LXI H C150HLXI D C200H

MVI C, 10H

NEXT: MOV A, M

STAX D

INX HINX D

DCR C

JNZ: NEXT

HLT


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Fibonacci Series Generation

To run the Program simply load at memory location C050=01,C051=01

MVI C,09 //Counter

LXI H,C050 //Memory Pointer

NEXT: MOV A,M

INX H

MOV B,M

INX H

ADD B

DAA

MOV M,A

DCX H

DCR CJNZ:NEXT

RST 1


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State the task performed, byte size and the addressing modes of the followinginstructions.

Instruction Task performed Byte

size

Addressing mode

ADI 37H Add 37H immediately to register A(accumulator)

2 Immediateaddressing

STAX D Store the content of the register A into

the memory whose location (address)

is specified by DE register pair

1 Indirect

addressing

MOA B, A Move 8-bit data from source register A

to destination register B.

1 Register

addressing


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Write the programming instructions to perform the following task

Sr.

no

Task Programming

instructions

1 Load AAH in register A MVI A, AAH

2 Load 7BH in register C MVI C,7BH

3 Copy the content of accumulator in register B MOV B,A

4 Subtract the content of register C from accumulator contents SUB C

5 Store the result at C100H STA C100H

6 Stop program execution. HLT/ RST n

h f i f d b h f h f ll i


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State the function performed by each of the following8085 microprocessor instructions:

1. LXI D, C350H : Load register pair DE immediately with C350H2. ADC H :Add content of register C to accumulator with carry

(i.e. (A) = (A) +(C) +CY) This instruction modifies all flags.3. CALL 036EH : The program control is transferred to the address

specified by the operand (036EH). Before the transfer of the controlthe address of the next instruction to the CALL is pushed

tothe stack.

4. NOP : No operation or do nothing.

5. RST1 : This instruction can be used as software interrupt totransferthe program execution (program control) to address 0008H

6. LDA EO40H : The content of memory location E040H are copied to theaccumulator.

The data in the accumulator register B and register C of 8085


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The data in the accumulator, register B and register C of 8085

microprocessor is 90H, 2AH and 17H respectively, what will be the

content of the accumulator, register B and register C after

executing each instruction in the following program

Accumulator

(A)

(B) (C)

Initially 90H 2AH 17HADD B BAH 2AH 17H

MOV C, A BAH 2AH BAH

MVI A, 32H 32H 2AH BAH

RST 1 32H 2AH BAH

State the function performed by each of the


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State the function performed by each of the

following microprocessor instructions

MOV B, C Move (copy) 8-bit data from source register C to destination

register B.

ADI 52H Add immediate 8-bit data 52H to Accumulator.

RAL Rotate accumulator left through carry by one bit.

JZ C100H Transfer the program control to memory location C100H when

zero flag is set.

OUT 01H Send data from Accumulator to output port# 01H.

PCHL The contents of HL pair are copied into the program counter.

The data in the accumulator, register C and register D of


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8085 microprocessor is 00H, 0FH and 49H respectively, what

will be the content of these registers after executing each

instruction in the following program

A C D

Initially 00H 0FH 49H

MVI A, 68H 68H 0FH 49H

SUB C 59H 0FH 49H

MOV D, C 59H 0FH 0FH

ORA D 5FH 0FH 0FH

RST 1 5FH 0FH 0FH

1. State how many times the following loop will be executed

LXI B 0005H


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LXI B 0005H

again: DCX B

JNZ : again

Infinite number of times

A

MVI A, 95H 95H

ANI 0FH 05H

CMA FAH

Give the content of the accumulator after execution of each

of the instruction in the following program segment

MVI A, 95H

ANI 0FH

CMA

I iti ll th l t t t 82H d fl i


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Initially the accumulator contents 82H and carry flag is

RESET. After executing following instructions in

sequence, give the content of accumulator and carry

flag.

A CY

Initially 82H 0

ORI 07H

RAL

MVI A, 00H

87H 0

0EH 1

00H 1

//five consecutive numbers to be sorted in ascending order

Store numbers from memory location C020


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Store numbers from memory location C020

START : MVI D,05 //Counter

W : LXI H,C020

MVI C,05 //Counter

X : MOV A,M

INX H

MOV B,M

CMP B

JM Y

MOV M,A

DCX H

MOV M,B

INX H

Y : DCR CJNZ X

DCR D

JNZ W

HLT


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104/104

Write an assembly language program to Add 3207H to 8051H

using DAD instruction. Store the result in memory locations

C150H and C151H.

LXI H 3207H

LXI B 8051H

DAD BSHLD C150H

HLT

Documents

8085 Microprocessor Programming