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An Introduction to Microprocessor

Architecture

using intel8085 as a classic processor

http://educate.intel.com/en/TheJourneyInside/ExploreTheCurriculum/EC_Microprocessors/http://educate.intel.com/en/TheJourneyInside/ExploreTheCurriculum/EC_Microprocessors/

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Intel 8085

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3

Intel 8085 Pin

Configuration

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4Signals and I/O Pins

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The 8085 and Its Buses

The 8085 is an 8-bit general purposemicroprocessor that can address 64KByte of memory.

It has 40 pinsand uses +5V for power. It can run at a maximum frequency of

3 MHz. The pins on the chip can be grouped into 6 groups:

AddressBus.

DataBus.

Control and StatusSignals. Power supplyand frequency.

Interrupt and Externally Initiated Signals.

Serial I/O ports.

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The Address and Data Bus Systems

The address bus has 8 signal linesA8A15which are unidirectional.

The other 8 address bits are multiplexed(time shared)with the 8 data bits.

So, the bitsAD0AD7are bi-directionaland serve asA0A7and

D0D7at the same time.

During the execution of the instruction, these lines carry the

address bits during the early part, then during the late parts of

the execution, they carry the 8 data bits.

In order to separate the address from the data, we can use a latch tosave the value before the function of the bits changes.

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ALE used to demultiplex address/data bus

7

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The Control and Status Signals

There are 4main controland statussignals. These are:

ALE:Address Latch Enable. This signal is a pulse that become 1when the AD0 AD7 lines have an address on them. It

becomes 0 after that. This signal can be used to enable a latch tosave the address bits from the AD lines.

RD: Read.Active low.

WR:Write.Active low.

IO/M: This signal specifies whether the operation is a memory

operation(IO/M=0) or an I/O operation(IO/M=1).

S1 and S0: Status signals to specify the kind of operationbeingperformed. Usually not used in small systems.

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Power Supply and Frequency Control

Signals

+VCC= +5V VSS=GND

There are 3important pins in the frequency control group.

X0and X1are the inputsfrom the crystalor clock generating circuit.

The frequency is internally divided by 2.

So, to run the microprocessor at 3 MHz, a clock running at 6 MHz shouldbe connected to the X0 and X1 pins.

CLK(OUT): An output clock pin to drive the clock of the rest ofthe system.

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Interrupt and Externally Initiated

Signal Interrupt Pins These are hardware interrupts used to

initiate an interrupt service routine stored at predefinedlocations of the system memory.

1. INTR- General purpose interrupt

2. INTA-Acknowledge an interrupt

3. RST 7.5, RST 6.5, RST 5.5- Restart Interrupt. They havehigher Priority than INTR interrupt.

4.TRAP- Nonmaskable interrupt and has highest priority

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5. Reset In- Reset the Microprocessor. The ProgramCounter inside the microprocessor is set to Zero.

6. Reset Out- Indicates CPU is being reset. Can beused as a system reset.

7. HOLD, HLDA- These pins are used when datatransfer is to be performed directly between an external

device and the main memory of the system.

8. Ready- It sets the ready signal after completing thepresent job. The microprocessor enters into WAIT statewhile the READY pin is disabled

Interrupt and Externally Initiated

Signal (cont.)

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Serial I/O Ports

SID( Serial Input Data)

SOD(Serial Output Data)

These pins are used to interface 8085 with a serial device.

One bit information can be read or sent out serially

through these signal lines

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Intel 8085 Architecture

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Intel 8085 CPU Block Diagram

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The ALU

In addition to the arithmetic & logic circuits, the ALU

includes an accumulator, which is a part of every arithmetic

& logic operation.

Also, the ALU includes a temporary register used for holding

data temporarily during the execution of the operation. This

temporary register is not accessible by the programmer.

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S Z AC P CY

D7 D6 D5 D4 D3 D2 D1 D0

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The Flags register There is also a flag register whose bits are affected by the arithmetic & logic

operations. S-sign flag

The sign flag is set if bit D7 of the accumulator is set after anarithmetic or logic operation.

Z-zero flag

Set if the result of the ALU operation is 0. Otherwise is reset. This

flag is affected by operations on the accumulator as well as otherregisters. (DCR B).

AC-Auxiliary Carry

This flag is set when a carry is generated from bit D3 and passed toD4 . This flag is used only internally for BCD operations.

P-Parity flag

After an ALU operation, if the result has an even # of 1s, the p-flagis set. Otherwise it is cleared. So, the flag can be used to indicate evenparity.

CY-carry flag

This flag is set when a carry is generated from bit D7 after an unsignedoperation.

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Timing and Control unit

This unit works as the brain of the CPU andgenerates all the timing and control signals toperform all the internal & external operations of

the CPU On chip generator controlled by external crystal

Clock o/pwhich gives internal clock frequency

RESET i/p, RESET o/p

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Timing and Control unit Status output-S0and S1signifies the states of

the CPU

Three o/ps RD, WR and IO/M to controlexternal units

READY i/p- The CPU goes to WAIT Stateuntil the READYbecomes high.

HOLD-This signal indicates that a peripheralsuch as DMA(Direct Memory Access)

Controller is requesting the use of the addressand data buses.

HLDA-This signal acknowledges the HOLDrequest

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Instruction Register and Decoder

IR & Instruction Decoder are part of ALU

When instruction is fetched from memory, it isloaded into the IR

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Registers

The Registers are of 8-bit & 16-bit size used for differentpurposes

A- AccumulatorThis is an special purpose register.

All the ALU operations are performed with referenceto the contents of Accumulator.

B,C,D,E,H,L General purpose registers. Theseregisters can also be used for 16-bit operations in

pairs. The default pairs are BC, DE & HL.

.

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PC Program Counter This is a 16-bitregister used to address the memory locationfrom where an instruction is going to be

executed.

SP Stack pointer - This is a 16-bit registerused to address the top of the stack memorylocation.

Temporary register, W & Z These registersare only used by 8085 and are not available forthe programmer.

Registers

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The 8085 has 5 extended hardware interrupt

INTR,RST 5.5, RST 6.5, RST 7.5 and TRAP

Interrupt besides TRAPare enabled by EnableInterrupt instruction (EI) and disabled byDisable Interrupt instruction (DI) or by a

RESET, or by the acknowledge of an interruptrequest..

Interrupt Control

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8085 has two signals used for software

controlled serial I/O SOD(Serial Output Data)

SID (Serial Input Data)

Data is controlled through two instructionsSIM(Set Interrupt Mask) and RIM(Reset

Interrupt Mask)

Serial I/O control