40GB LR4 QSFP+ ROSA Antario Technologies Confidential DEC-04-2016

Version 1.5

40GB QSFP+ LR4 ROSA

Description

The 40GB QSFP LR4 ROSA is a 4x10Gb/s, 1310nm

CWDM receiver optical subassembly features a PLC

optical de-multiplexer to separate the four incoming

CWDM wavelengths from a single fiber input. The ROSA

contains four high speed PIN photodiodes, and a 4ch

transimpedance limiting amplifier with an I2C control

interface packaged in a hermetic package. Two flex

circuits are used for electrical interface.

Features

1. Integrated 1:4 optical de-multiplexer / filter with

PLC technology

2. Four channel trans-impedance limiting amplifier

array

3. Mechanically compatible to QSFP+ MSA

4. Four high reliability, high performance PIN

detectors

5. 10.3125Gb/s per channel

6. Flex circuit for electrical interface

7. LC receptacle, electrically isolated from ROSA

signal ground

8. Standard operating temperature range from

(-5 to +75C).

Applications

The ROSA is intended for 40GBASE-LR4 QSFP+

module applications serving 40G-LR4 (10km) links

at 4x10.3125Gb/s, per IEEE 802.3ba.

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Absolute Maximum Ratings

Exposure to absolute Maximum Ratings may cause permanent damage to the device and may

adversely affect reliability. These are absolute stress ratings only. Functional operation of the

device is not implied at these or any other conditions in excess of those given in the operational

sections of the data sheet.

Parameter Conditions Min Max Unit

Storage Temperature Range — -40 85 °C

Case Operating Temperature — -5 75 °C

Storage and Operating Relative Humidity — — 85 %

Supply Voltage Vcc -0.3 +4.5 V

Voltage at any output Vio -0.3 Vcc+0.3 V

Current into any input or output Iio -20 20 mA

Peak optical input power Pop +9 dBm

Electrostatic discharge (100pF, 1.5kΩ) Vesd -2 +2 KV

Flex (FPC) Soldering Temperature (*) 10s max 260 °C

(*) Local heating only. Package body not to exceed 120°C, receptacle cannot exceed 85°C.

(**) The optoelectronic devices are sensitive to static electricity (ESD, electro-static discharge).

The product can be damaged by ESD. Take proper precautions during both handling and

testing.

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ROSA Electro-Optical Characteristics

All parameters are end of life (EOL), with Vcc = +3.3V +/-5% and over a case operating

temperature range of -5 to +75C, unless stated otherwise. (Ta=25°C unless specified).

Table 1. Optical Specifications

Parameter Symbol Conditions Min Max Unit

Center Wavelength - lane 0 λc0 1265.5 1276.5 nm

Center Wavelength - lane 1 λc1 1285.5 1296.5 nm

Center Wavelength - lane 2 λc2 1305.5 1316.5 nm

Center Wavelength - lane 3 λc3 1325.5 1336.5 nm

Receiver Sensitivity, OMA URS_MOA_n each laneA -12 dBm

Error-free power range, OMA EF_OMA_n each laneB -10 +2 dBm

Receiver Saturation, OMA OVL_ n each laneC +3 dBm

Differential output swing Per IEEE 802.3ba D

Differential return loss Per IEEE 802.3ba D

Receiver reflectance ORL -26.0 dB

Table 2. Electrical Specifications

Parameter Symbol Conditions Min Max Unit

ICC per channel ICC_CHAN E 55 mA

Total ICC ICC_TOTAL 160 mA

Output bias voltage VOUT Vcc-0.5 Vcc V

RSSI slope GRSSI F 0.35 mA/mW

Notes:

A. At BER of 1e-12, 10.3125Gb/s, PRBS31 pattern, 3.5dB ER, any wavelength in the channel range. The other 3

lanes also have PRBS31 data at a level 7.5dB higher than the lane under test. All 4 lanes are referenced from

the same clock source and are synchronous.

B. BER not to exceed 1e-15 for any power in the range. 10.3125Gb/s PRBS31 pattern with 3.5dB ER and at any

wavelength in the channel range.

C. At BER of 1e-12, 10.3125Gb/s, PRBS31 pattern, 3.5dB ER, any wavelength in the channel range. The other 3

lanes also have PRBS31 data at the same power as the lane under test. All 4 lanes are referenced from the

same clock source but with different patterns, skewed from each other, on each lane.

D. Must meet 5e-5 hit ratio eye mask definition in Table 86A-3 of IEEE802.3ba when measured at TP4 through a

module compliance board (MCB). The MCB reference insertion losses are in IEEE802.3ba CI. 86A. 5.1.1.1.

E. ICC =24.52+N x 29.08 +/- 15%, N is the number of channels turned on in the chip.

F. The RSSI slope is the output current against average input power, per lane, measured at -10dBm mean input

power.

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Outline dimension and Pin assignment

Dimensions are in millimeters

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Flex Circuit Configurations

Dimensions are in millimeters

Flex Circuit

FLEX PINOUT

ROSA-TOP LEVEL ROSA-BOTTOM LEVEL

PIN # DESCRIPITON PIN # DESCRIPITON

9 GND 10 GND

8 Rx1n(1271nm) 11 Rx2n(1291nm)

7 Rx1p(1271nm) 12 Rx2p(1291nm)

6 GND 13 GND

5 Rx3n(1311nm) 14 Rx4n(1331nm)

4 Rx3p(1311nm) 15 Rx4p(1331nm)

3 GND 16 GND

2 SERIAL DATA, SDA 17 MONITOR CURRENT, RSSI

1 CLOCK SIGNAL, SCL 18 TIA SUPPLY VOLTAGE,

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Ordering Information

Part Number Description

A0410-R10-M-A00 4x10Gb/s, 1310nm CWDM ROSA with Gigoptix 5104 TIA, for 40GBASE-LR4

applications (with standard Flex circuit)

A0410-R10-M-A60 4x10Gb/s, 1310nm CWDM ROSA with Gigoptix 6104 TIA, for 40GBASE-LR4

applications (with standard Flex circuit)

A0410-R10-M-A03 4x10Gb/s, 1310nm CWDM ROSA with Gigoptix 5104 TIA, for 40GBASE-LR4

applications (with Flex circuit option 2)

A0410-R10-M-A63 4x10Gb/s, 1310nm CWDM ROSA with Gigoptix 6104 TIA, for 40GBASE-LR4

applications (with Flex circuit option 2)