4017 decade counter

The 4017 IC is a 16-pin CMOS decade counter from the 4000 series. It takes clock pulses from the clock input, and makes one of the ten outputs come on in sequence each time a clock pulse arrives.

Pinout

Pin number

Name Purpose

1 6 The 6th sequential output

2 2 The 2nd sequential output

3 1 The 1st sequential output

4 3 The 3rd sequential output

5 7 The 7th sequential output

6 8 The 8th sequential output

7 4 The 4th sequential output

80 V, VDD

The connection to the 0 V rail

9 9 The 9th sequential output

10 5 The 5th sequential output

11 10 The 10th sequential output

12 COCarry out output - outputs high on counts 0 to 4, outputs low on counts 5 to 9 (thus a transition from low to high occurs when counting from 9 back to 0)

13 LELatch enable - latches on the current output when high (i.e. the chip counts when LE is low)

14 CLK Clock in

15 RST Reset - sets output 1 high and outputs 2 through 10 low, when taken high

16+9 V, VCC

The connection to the +VCC rail (voltage between +3 V and +15 V)

Example: Electronic Roulette

Electronic Roulette circuit diagram.

The circuit diagram on the right shows how to create a game of roulette using the 4017 decade counter and various other electronic parts. The variable resistor adjusts the spin speed.

4026 counter and display decoder

The 4026 IC is a 16-pin CMOS seven-segment counter from the 4000 series. It counts clock pulses and returns the output in a form which can be displayed on a seven-segment display. This avoids using a binary-coded decimal to seven-segment decoder, but it can only be used to display the (decimal) digits 0-9.

Pinout

Pin Name Purpose

number

1 CLK Clock in

2 CI Clock inhibit - when low, clock pulses increment the seven-segment

3 DEDisplay enable - the chip outputs to the seven-segment when this is high (i.e. when it's low, the seven-segment is off) - useful to conserve battery life, for instance

4 DEO Display enable out - for chaining 4026s

5 COCarry out output - Is high when changing from 9 to 0. It provides an output at 1/10 of the clock frequency, to drive the clock input of another 4026 to provide multi-digit counting.

6 F Output for the seven-segment's F input

7 G Output for the seven-segment's G input

8 VDD The connection to the 0 V rail

9 D Output for the seven-segment's D input

10 A Output for the seven-segment's A input

11 E Output for the seven-segment's E input

12 B Output for the seven-segment's B input

13 C Output for the seven-segment's C input

14 UCSUngated C-segment - an output for the seven-segment's C input which is not affected by the DE input. This output is high unless the count is 2, when it goes low.

15 RST Reset - resets all outputs to low when taken high

16 VSS The connection to the +9 V rail