3D PLUS ORIGINE: 3D PLUS S.A. 78532 BUC Cedex · 3D PLUS ORIGINE: 3D PLUS S.A. 641, ... SOP 40 -05 – Package G8 Part Number: ... For the 8Mb EEPROM module MMEE08001808S-C the capacitance

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3D PLUS ORIGINE: 3D PLUS S.A. 641, rue Hélène Boucher - Z.I.

78532 BUC Cedex

DETAIL SPECIFICATION

8Mbit EEPROM –1M x 8 – 2.7V to 5.5V

SOP 40 -05 – Package G8

Part Number: MMEE08001808S-C

3DPA1630-3 Name Responsibility Date Signature

J.ZHANG Hi-Rel. Product Manager 26/06/07

Approved Responsibility Date Signature

P. MAURICE General Manager

D.BLAIN Quality Assurance Manager

P.E.BERTHET Sales & Marketing Director

N.FIANT Test Manager

First Issue: 29/09/06 Archive : Buc

DOCUMENT REFERENCE COMPANY CLASSIFICATION PAGES

Type Doc.

Document N° Issue Language Code

Secret

Reserved

26

3DPA 1630 3 GB Confidential

Not protected

Doc. N°:3DPA1630-3 Page 2 / 26

DIFFUSION LIST

Document Management D. BLAIN – Quality Assurance Manager

Distributed to Responsibility

P. MAURICE General Manager

N.FIANT Test Manager

Customers

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CHANGE RECORD

Ed./Rev. Date Approved Description Written by

1 29/09/06 DB/PEB/NF Initial Document PM

2 20/04/07 DB/PEB/NF • 1st page : 3.3V replaced by 2.7V to 5.5V

• Table 1(a), §4.5.4: Modifications IAW Automatic reflow

• Table 1(b) Max storage Temperature decreased from +150°C to +125°C

• Figure 1: Radius of leads was changed from 1.00mm to 0.40mm

• Creation of §1.8 and Table 1(c)

• §2: New revisions for Applicable Documents

• §2: Addition of “3D-Plus response to NASA advisory – NA-GSFC-2005-04” as Applicable document

• §3.3: Add marking figure 3D PLUS

• §4.1.1: EEPROM TSOP Lot definition was added

• §4.1.3: Modification of EEPROM TSOP Lot Acceptance Test IAW PID Rev.5

• §4.1.5: Addition of Data retention test in step 4

• §4.1.5.2: Addition of data retention test (set-up to zero and read back after burn-in)

• §4.1.5.3: Addition of “The test, test conditions and limits are identical to those performed at 25°C”

• §4.1.6 : Addition of the table that gives the Nbr of LAT samples IAW the Lot size

• §4.5.1: Definition of Packing Trays

• §4.6: Addition of Radiation characteristics

PM

3 26/06/07 PM/DB/PEB/NF • Page 6: Addition of MS extension in Table 1(a)&Table1(b)

• §1.6: Change HN58C1001 to HN58V1001 in

JZ

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the schema diagram

• §1.8: Addition of timing diagram

• §4.1.5.3: Addition of IB,IS and MS version test conditions Correction of Typo error

• §4.5.1: Correction of Typo error desiccant

• §4.6: Modification of Radiation Data

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TABLE OF CONTENTS

Front Page 1

Diffusion List 2 Change Record 3 Summary 4 1) GENERAL ..................................................................................................................................................................6

1.1 PURPOSE AND SCOPE ...........................................................................................................................................6 1.2 TYPE VARIANTS ..................................................................................................................................................6 1.3 MAXIMUM RATINGS ............................................................................................................................................6 1.4 PHYSICAL DIMENSIONS .......................................................................................................................................7 1.5 PIN ASSIGNMENT – FIGURE 2A ............................................................................................................................7 1.6 MODULE SCHEMATIC – FIGURE 2B......................................................................................................................9 1.7 MODULE CAPACITANCE TABLE.........................................................................................................................10 1.8 ELECTRICAL PERFORMANCE AND CHARACTERISTICS ........................................................................................10

2) APPLICABLE DOCUMENTS ...............................................................................................................................14

2.1 REFERENCE DOCUMENTS ..................................................................................................................................14 2.2 APPLICABLES DOCUMENTS ...............................................................................................................................14

3) PACKAGING REQUIREMENTS .........................................................................................................................15

3.1 MECHANICAL REQUIREMENTS ..........................................................................................................................15 3.1.1 Dimension check .....................................................................................................................................15 3.1.2 Weight .....................................................................................................................................................15

3.2 CASE, MATERIAL AND FINISHES........................................................................................................................15 3.2.1 Case.........................................................................................................................................................15 3.2.2 Lead Material and finishes......................................................................................................................15

3.3 MARKING ..........................................................................................................................................................15 3.3.1. General....................................................................................................................................................15 3.3.2. Pin 1 indicator.........................................................................................................................................15 3.3.3. Module Part Number...............................................................................................................................15 3.3.4. Module Serial Number (only for space grade models)............................................................................15 3.3.5. Date Code (WWYY).................................................................................................................................16

4) MEMORY MODULE..............................................................................................................................................17

4.1 GENERAL...........................................................................................................................................................17 4.1.1 Procurement of EEE Components...........................................................................................................17 4.1.2 Procurement of Printed Circuits Board (PCB) .......................................................................................17 4.1.3 EEPROM TSOP Lot Acceptance Test .....................................................................................................17 4.1.4 Module Manufacturing............................................................................................................................18 4.1.5 Module Screening....................................................................................................................................18 4.1.6 Module Lot Acceptance Test (Not applicable for Industrial Grade Model)............................................24

4.2 FAILURE CRITERIA.............................................................................................................................................24 4.2.1 Parameter Limit Failure .........................................................................................................................24 4.2.2 Parameter Limit Failure .........................................................................................................................24

4.3 LOT REJECTION .................................................................................................................................................24 4.4 DATA DOCUMENTATION....................................................................................................................................25 4.5 PACKING, HANDLING, STORAGE AND MOUNTING REQUIREMENTS ...................................................................25

4.5.1 Packing....................................................................................................................................................25 4.5.2 Handling..................................................................................................................................................25 4.5.3 Storage ....................................................................................................................................................25 4.5.4 Board Assembly.......................................................................................................................................25 4.5.5 Electrostatic Discharge Sensitivity..........................................................................................................26

4.6 RADIATIONS ......................................................................................................................................................26

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1) GENERAL

1.1 Purpose and Scope

The following document details all the activities to be performed to produce and test a 3D PLUS memory module for space application. In particular details the ratings, physical and electrical characteristics, tests and inspection data for the 3D PLUS Module 8Mb EEPROM 1Mx8, PN : MMEE08001808S-C and shall be read in conjunction with the applicable documents the requirements of which are supplemented herein.

1.2 Type Variants Variants of the module specified herein, which are also covered by this specification, are given in Table 1(a).

Table 1(a) – Component Type Variants Variant – Part Number Function Case Lead Material and Finish

MMEE08001808S-C-IB Industrial Grade -40°C to +85°C

SOP 40 pins – G8 package (see Fig. 1a)

Kovar Ni+Au plating

MMEE08001808S-C-IS Space Grade -40°C to +85°C


Kovar Ni+Au plating

MMEE08001808S-C-MS Space Grade -55°C to +125°C


Kovar Ni+Au plating

Note: These variants are suitable for automatic reflow assembly process qualified by ESA (PID 3300-0546). Module assembly on board must follow reflow guidelines as defined in: http://www.3d-plus.com/PDF/Application/Assembly_recommendations_Automatic_Reflow_v2.pdf or (For Manual reflow only) http://www.3d-plus.com/PDF/Application/Assembly_recommendations_Manual_Reflow_v2.pdf

1.3 Maximum Ratings

The maximum ratings, which shall not be exceeded at any time during use or storage, applicable to the module specified herein, are as scheduled in Table 1.b.

Table 1(b) – Absolute Maximum Ratings (Note 1) N° Characteristics Symbol Maximum

Ratings Unit Remarks

1 Voltage on any pin relative to VSS

Vin, Vout -0.5 to 7.0 V

2 Voltage on VDD supply relative to VSS

VCC -0.6 to 7.0 V

3 Storage Temperature Range Tstg -55 to +125 °C 4 Operating Temperature Range Top -40 to +85

-55 to +125 °C IB and IS versions

MS version 5 Power Dissipation PD 1 W 6 Reflow Temperature (Peak) Tsol 215 °C Measured at module side

level 7 Soldering Temperature –

Manual reflow Tsol 250 °C Hand soldering

5 sec. max / lead 8 Thermal resistance Junction to

ambient RTH(J-A) 70 °C/W Note 2

Note 1: Permanent device damage may occur if “Absolute Maximum Ratings” are exceeded. Operating Temperature Range may be increased to +125°C during dynamic Burn-in and Life test. Functional operation should be restricted to recommended operating condition. Exposure to higher than recommended voltage for extended periods of time could affect device reliability.

Note 2: In RTH(J-A) (Thermal resistance Junction to ambient), Ambient is defined as the temperature at the bottom of the leads in contact with the board.

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1.4 Physical Dimensions The physical dimensions of the used package are shown in figure 1.

1.5 Pin Assignment – Figure 2a

Pin Nbr

Signal Name

Pin Nbr

Signal Name

Pin Nbr

Signal Name

Pin Nbr

Signal Name

Pin Nbr

Signal Name

1 VSS 9 A15 17 A5 25 A1 33 I/O5 2 #CE7 10 VCC 18 A4 26 A0 34 I/O6 3 A11 11 RDY/BUSY 19 #CE5 27 I/O0 35 I/O7 4 A9 12 A16 20 #CE6 28 I/O1 36 #CE0 5 A8 13 A14 21 #CE4 29 I/O2 37 A10 6 A13 14 A12 22 #CE3 30 VSS 38 #OE 7 #WE 15 A7 23 A3 31 I/O3 39 #CE1 8 #RES 16 A6 24 A2 32 I/O4 40 #CE2

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FIG. 1 – Physical Dimensions

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1.6 Module Schematic – Figure 2b

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1.7 Module Capacitance Table For the 8Mb EEPROM module MMEE08001808S-C the capacitance values are: (Ta=25°C, F = 1MHz)

Parameter Symbol Min Typ Max Unit Input Capacitance (#CE0 to #CE7) CI1 - - 8 pF Input Capacitance (all other inputs) CI2 - - 48 pF Output Capacitance COut - - 96 pF

1.8 Electrical Performance and characteristics The table 1(c) below gives the different timings for both 1Mb EEPROM TSOP and 8Mb EEPROM module

Reading Timing waveform

Data polling timing waveform

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Write Timing waveform (1) (/WE controlled)

Write timing waveform (2) (/CE controlled)

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Page write timing waveform (/WE controlled)

Page write timing waveform (/CE controlled)

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Table 1(c) – Timings

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2) APPLICABLE DOCUMENTS

2.1 Reference Documents • MIL-STD-883 G: “Tests Methods and Procedures for Microelectronics” – RD1 • MIL-PRF-38534D : « Hybrid Microcircuits, General Specifications for, » - RD2 • ECSS-Q-60-05A : « Space Product Assurance – Generic procurement Requirements for

Hybrid Microcircuits » - Draft document – RD3

2.2 Applicables Documents • PID 3D PLUS Ref. 3300-0546 – DA1 • Exigences générales d’approvisionnement et de contrôle d’entrée des composants EEE Ref.

3DPA0350 – DA2 • Dossier de Définition – 8Mb EEPROM – 1Mx8 – SOP 40-05 – Package G8 – Ref. 3300-1519

DA3 • RENESAS Datasheet for 1Mb EEPROM HN58V1001 – REJ03C0146-0800Z, Rev. 8.00

dated Nov. 28, 2003 – DA4 • EIDP Format Procedure Ref. 3DPQ0050 – DA5 • Exigences générales d’approvisionnement et de contrôle d’entrée des Circuits Imprimés Ref.

3DPA0460 – DA6 • Procédure de DPA module – 3DPF2290 – DA7 • 3D-Plus response to NASA advisory – NA-GSFC-2005-04 – DA8

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3) PACKAGING REQUIREMENTS

3.1 Mechanical Requirements

3.1.1 Dimension check The dimensions of the module shall be checked on a sample of 3 pieces per lot in step 9 of the screening (see 4.1.5). They shall conform to those shown in figure 1

3.1.2 Weight The weight of the module specified herein shall be 3,6g +/-0.3g

3.2 Case, Material and Finishes

3.2.1 Case The case corresponds to 3D PLUS Package : SOP 40 leads – G8 Package – See Figure 1.

3.2.2 Lead Material and finishes Lead material : FeNiCo (Kovar) Finishes : Gold Plating (1 to 2µm) over Nickel (3 to 5µm)

3.3 Marking

3.3.1. General Each component shall be marked during laser grooving manufacturing step with : a) 3D PLUS Logo b) Pin 1 indicator c) Part Number d) Module Serial Number (only for space grade models) e) Date Code

3.3.2. Pin 1 indicator An index shall be located at the top of the package in the position defined in figure 1 to identify pin N°1. The pin numbering shall be read in a counter clockwise order starting with pin N°1.

3.3.3. Module Part Number Each module will be marked with the Module PN as defined in the left column of Table 1 (a)

3.3.4. Module Serial Number (only for space grade models) Each component will be serialized. Such number will not be re-affected to another part corresponding to the same device

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3.3.5. Date Code (WWYY) Each module will be marked with a date code corresponding to the Week (WW) and the year (YY) of the laser grooving step. The date code corresponds to the laser grooving operation step. The module Lot is defined by following common elements : • Homogeneous lots of components • Screening steps performed at the same time Therefore modules from the same lot may have different date code. For each module the full traceability (linked to the SN of the module) is given in the EIDP

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4) MEMORY MODULE

4.1 General

4.1.1 Procurement of EEE Components The module is made of 8 memories 1Mb from RENESAS PN: HN58V1001 – Package TSOPI, procured in accordance with DA2. 1Mb EEPROM TSOP HN58V1001T (Die Mask Rev. R) are from the same lot if they were procured at the same time, shipped in the same original boxes, have the same Date Code and Lot Number.

4.1.2 Procurement of Printed Circuits Board (PCB) A PCB is used in the for the leads assembly. It is procured in accordance with DA6 for type 3 PCB.

4.1.3 EEPROM TSOP Lot Acceptance Test For each EEPROM TSOP lot used for Flight (Space grade), 22 pcs/lot are following the below flow :

Test Description Test Conditions Qty (Reject allowed)

1 Component Serialization 22(0)

2 Electrical Measurements (22 Parts) Read & Record at 25°C

According to § 4.1.5.1

3 Dynamic Burn In – 240 hrs – 125°C (Note 1) (Note 2) and data retention test

MIL-STD-883G Meth.1015 cond.D and according to §4.1.5.2



5 Electrical Measurements (22 Parts) Read & Record at -40°C and +85°C


6 Parameter Drift Calculation at +25°C According to § 4.1.5.4

22(1)

7 Life Test 1000hrs. at 125°C (20 parts) (Note 1) (Note 2) and data retention test




9 Electrical Measurements(22 Parts) Read & Record at -40°C and +85°C


10 Parameter Drift Calculation at +25°C According to § 4.1.5.4

22(0) or 21(0) if 1 Failure during steps 2, 4, 5 or 6.

Note 1: If Junction Temperature during life test or burn-in is above maximum ratings, then Burn-in or Life Test Temperature of the oven is given by: TLT (°C) = 125 – PD * RJC PD = VCCmax * ICOMP = Power dissipated during Burn-in or Life Test RJC = Thermal Resistance junction/case of the component.

Note 2: Only 20 pieces follow the steps 3 & 6. The remaining 2 pieces are used as reference.

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4.1.4 Module Manufacturing According to 3D PLUS PID (DA1) for stacked TSOPs (Referenced as Flow 1 in DA3).

4.1.5 Module Screening Each Flight Module will follow the following screening flow: Test Description

Test Condition

1 Stabilization Bake 72hrs +125°C MIL-STD-883G Meth.1008 cond.B

2 Temperature Cycling – 10 Cycles –55°C / +125°C MIL-STD-883G Meth.1010 cond.B

3 Electrical Test at 25°C with R&R According to § 4.1.5.1

4 Dynamic Burn-In – 168hrs +125°C and Data retention test


5 Electrical Test at Tmin,+25°C and Tmax with R&R According to § 4.1.5.3

6 Parameter Drift Calculation According to § 4.1.5.4

7 PDA Calculation According to § 4.3

8 External Visual Inspection 3D PLUS Procedure ref. 3300-0776

9 Dimension check According to § 3.1.1

Note : For industrial grade Models, Screening is limited to steps 1, 2, 5, 8 & 9

4.1.5.1 Electrical measurements at +25°C The following functional sequences shall be performed on the 8 Mb EEPROM Module. Static and Dynamic measurements shall be done according to Table 2a and 2b.

Test Conditions • Supply : VCC = 2.7V then VCC=5.5V • Frequency : f=4MHz [in respect with AC parameters ] • Driver : Vil=0.4V Vih=2.4V • Comparator : Vol=1.4V Voh=1.4V • Load : Iol=1mA Ioh=-0.5mA

Functional Sequences The functional sequences are executed on each EEPROM at a time. An individual Chip Select pin (CE0/ to CE7/) allows the test program to access the EEPROM under test. Static and Dynamic measurements are done according to Table 2a and 2b respectively.

• Zeros (VCCmin and VCCmax):

Write and Read the memory with 0x00 (tested addresses A(00:16) = 0x00000 to 0x0007F and 0x1FF80 to 0x1FFFF) 8 test sequences for module test (1 per CE pin).

• Ones (VCCmin and VCCmax):

Write and Read the memory with 0xFF (tested addresses A(00:16) = 0x00000 to 0x0007F and 0x1FF80 to 0x1FFFF)

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8 test sequences for module test (1 per CE pin).

• Check (VCCmin and VCCmax): Write and Read the memory with a Checkerboard (0xAA for odd addresses-0x55 for even addresses) and a Checkerboard Invert (0x55 for odd addresses –0xAA for even addresses) Tested addresses A(00:16) = 0x00000 to 0x0007F and 0x1FF80 to 0x1FFFF 8 test sequences for module test (1 per CE pin).

Table 2a: Electrical measurements at room Temperature - Dynamic Parameters

TSOP/FLEX MODULE

PARAMETERS Symbol TEST CONDITIONS Min Max Min Max

Address Access Time tAA - 250 ns - 250 ns

#CS Access Time tCE - 250 ns - 250 ns

Output Enable to Output Valid tOE

VCC = 2.7V VIL = 0.4V, VIH = 2.4V VOL = 1.4V, VOH = 1.4V IOL = 1mA, IOH = -0.5mA

- 120 ns - 120 ns

Note: All these parameters are recorded in the datalog file.

Table 2b: Electrical measurements at room Temperature - Static Parameters

TSOP/FLEX MODULE PARAMETERS Symbol TEST CONDITIONS

Min Max Min Max CMOS Standby Current ICC1 CE/ = VCC - 20 µA - 160 µA

TTL Standby supply Current ICC2 CE/= VIH - 1 mA - 8 mA

Operating Current ICC3_1mhz

Vcc = 5.5V, Iol=0mA, F=1Mhz

- 15 mA - 15 mA

Operating Current ICC3_4mhz

Vcc = 5.5V, Iol=0mA, F=4Mhz

- 50 mA - 50 mA

Input leakage current on RES/, low level

ILILres Vcc=5.5V, VIN=0V -100µA 100µA -800µA 800µA

Input leakage current on RES/, high level

ILIHres Vcc=5.5, VIN=5.5V -100µA 100µA -800µA 800µA

Input leakage current, low level ILIL Vcc=5.5V, VIN=0V -2µA 2µA -2µA 2µA

Input leakage current, high level ILIH Vcc=5.5, VIN=5.5V -2µA 2µA -2µA 2µA

Output leakage current, low level ILOL Vcc=5.5V, VOUT=0V -2µA 2µA -2µA 2µA

Output leakage current, high level ILOH Vcc=5.5V, VOUT=5.5V -2µA 2µA -2µA 2µA

Output voltage low level VOL Vcc=5.5V, IOL=1mA 0.4V 0.4V

Output voltage high level VOH Vcc=2.7V, IOH=0.5mA 2.16V 2.16V

Note: All these parameters are recorded in the datalog file.

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4.1.5.2 Dynamic Burn-in Set up to zero: Before burn-in and delivery, all addresses are set up to 0x00. During Burn-In, continuous readings are performed on each EEPROM at 125 KHz. To avoid data bus conflicts, one memory is acceded at a time. Functional read back: After Burn-in All the addressed are read to check that they are set –up to 0x00.

Burn-in and Life test conditions are given in Table 3. Life test circuit for TSOP is given in figure 3 Life test circuit for module is given in figure 4

Table-3 Conditions for Dynamic Burn-in and Life test

No. CHARACTERISTICS Symbol Condition Unit

1 Clock Frequency f 125 KHz

2 Power Supply VCC 5.5 V

3 Temperature Tamb 125 °C

4 Duration time burn-in - 168 Hrs

5 Duration time life test - 1000 Hrs

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Figure 3 : Dynamic Burn-in and Life Test circuit for

1 Mbit EEPROM TSOP

R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ 5.5V R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ

A11 ----- A9 ----- A8 -----

A13 ----- #WE -----

#RES ----- A15 -----

VCC ----- RDY/#BUSY -----

A16 ----- A14 ----- A12 ----- A7 ----- A6 ----- A5 ----- A4 -----

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17

----- #OE ----- A10 ----- #CE ----- I/O7 ----- I/O6 ----- I/O5 ----- I/O4 ----- I/O3 ----- VSS ----- I/O2 ----- I/O1 ----- I/O0 ----- A0 ----- A1 ----- A2 ----- A3

R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ GND R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ

• Number of positions / Board = 20 • Each signal (input or output) is connected to a 10 KΩ resistor to ensure electrical insulation

between the different positions • Addresses, Data and command signals are connected to the driver board for burn-in software

operation

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Figure 4 : Dynamic Burn-in and Life Test circuit for

8 Mbit EEPROM Memory Module

GND R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ 5.5V R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ

VSS ----- #CE7 -----

A11 ----- A9 ----- A8 -----

A13 ----- #WE -----

#RES ----- A15 -----

VCC ----- RDY/BUSY -----

A16 ----- A14 ----- A12 ----- A7 ----- A6 ----- A5 ----- A4 -----

#CE5 ----- #CE6 -----

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21

----- #CE2 ----- #CE1 ----- #OE ----- A10 ----- #CE0 ----- I/O7 ----- I/O6 ----- I/O5 ----- I/O4 ----- I/O3 ----- VSS ----- I/O2 ----- I/O1 ----- I/O0 ----- A0 ----- A1 ----- A2 ----- A3 ----- #CE3 ----- #CE4

R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ GND R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ R=10KΩ

• Number of positions / Board = 18 • Each signal (input or output) is connected to a 10KΩ resistor to ensure electrical insulation

between the different positions • Addresses, Data and command signals are connected to the driver board for burn-in software

operation

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4.1.5.3 Electrical Test at Tmin, +25°C and Tmax The test, test conditions and limits are identical to those performed at 25°C. • For IB and IS versions, Tmin=-40°C and Tmax=+85°C • For MS version, Tmin=-55°C and Tmax=+125°C The electrical measurements shall be performed with read and record according to §4.1.5.1 of this document. However, at –40°C an additional functional test is performed at VCC = 3.0V: • Full Memory cells (Nominal VCC): Write and Read the entire memory with 0xFF (tested addresses A(00:16) = 0x00000 to 0x1FFFF) Write and Read the entire memory with 0x00 (tested addresses A(00:16) = 0x00000 to 0x1FFFF) Write and Read the entire memory with 0xFF (tested addresses A(00:16) = 0x00000 to 0x1FFFF) 8 test sequences for module test (1 per CE pin).

4.1.5.4 Parameter Drift Calculation Parameter drift values between pre and post dynamic burn-in test measurements at 25°C shall be calculated and recorded in absolute values for all parameters measured, as per Table 4 of this document.

Table 4 – Parameter Drift Calculation

DRIFT LIMIT TSOP/FLEX

DRIFT LIMIT MODULE PARAMETERS SYMBOL

MIN MAX MIN MAX Standby power supply Current ICC1 -10 µA + 10 µA -20 µA + 20 µA

Standby power supply Current ICC2 - 0.5 mA + 0.5 mA - 2 mA + 2 mA

Operating power supply current ICC3_1mhz - 10% + 10% - 10% + 10%

Operating power supply current ICC3_4mhz - 10% + 10% - 10% + 10%

Input leakage current on RES/, low level ILILres - 50 µA + 50 µA - 100 µA + 100 µA

Input leakage current on RES/, high level ILIHres - 50 µA + 50 µA - 100 µA + 100 µA

Input leakage current, low level ILIL - 1 µA + 1µA - 1 µA + 1µA

Input leakage current, high level ILIH - 1 µA + 1µA - 1 µA + 1µA

Output leakage current, low level ILOL - 1,5 µA + 1,5µA - 1,5 µA + 1,5µA

Output leakage current, high level ILOH - 1,5 µA + 1,5µA - 1,5 µA + 1,5µA

Output voltage low level VOL - 100 mV + 100 mV - 100 mV + 100 mV

Output voltage high level VOH - 100 mV + 100 mV - 100 mV + 100 mV

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4.1.6 Module Lot Acceptance Test (Not applicable for Industrial Grade Model) Some modules that passed module screening will be used for module LAT. Modules with minor visual defects may be accepted for LAT. The table below gives the quantity of modules D.P.A. is performed on 1 module that went through life testing.

Module lot size Sample 1° lot Sample next lots 1 to 25 2 1 26 to 50 3 2 51 to 90 4 3

> 90 5 4

The following test flow shall be applied to LAT Modules: Test Description Test Condition 1. Dynamic Life Test – 1000hrs Test conditions for Life test detailed in

Table 3 Test circuit as per figure 4

2. Electrical test at Tmin/+25°C/Tmax As per para 4.1.5.3 of this document 3. Parameter Drift Calculation As per para 4.1.5.4 of this document

4. External Visual Inspection 3D PLUS Procedure ref. 3300-0776

5. DPA (1 module / LAT Lot) According to 3D PLUS procedure 3DPF2290

4.2 Failure criteria

4.2.1 Parameter Limit Failure A component shall be counted as a limit failure if one or more parameters exceed the limits shown in Tables 2 and Table 4 of this specification. Any component which exhibits a limit failure prior to the burn-in sequence shall be rejected, but not counted when determining lot rejection

4.2.2 Parameter Limit Failure

A component shall be counted as a failure in any of the following cases: - catastrophic failure; - mechanical failure; - handling failure; - lost component.

4.3 Lot Rejection

On the basis of the failure criteria described above (excluding handling failures and lost components) the following criteria will be applied : • If the number of modules that do not pass the drift calculation at +25°C, is above +5%, the lot is

rejected. • If the cumulative number of modules that do not pass the drift calculation at +25°C and the

electrical tests at Tmin, +25°C, Tmax after Burn-in is above 10%; the lot is rejected.

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4.4 Data Documentation The Flight modules (Space Grade) are delivered with an End Item Data Package (EIDP) , whose format is defined in DA4. This document includes a Certificate of Conformance to this specification, and lists all the information regarding : - Traceability - Electrical test results - Screening test results - Non Conformances - … For industrial grade Models, modules are delivered with Certificate of Conformance only.

4.5 Packing, Handling, Storage and Mounting Requirements

4.5.1 Packing Modules are packed in G8 Trays (9-BE00020) Each box is sealed with antistatic plastic under vacuum with desiccant. Each box is marked with: - 3D PLUS Logo - Module description : 8Mb EEPROM - Module PN : See Table 1 (a) - Qty

4.5.2 Handling 3D PLUS modules must be handled with antistatic gloves and antistatic brackets.

4.5.3 Storage In order to avoid a degradation due to humidity, components, must be handled according to the following procedure: • Storage in sealed bag: 5~35°C and ≤ 85% relative humidity (RH) • After the sealed bag is opened, devices must be stored at ≤ 30% relative humidity and

temperature 22°C +/-2°C. Note: Device container cannot be subjected to temperature > 80°C, so devices must be baked on another tray.

4.5.4 Board Assembly

Prior to mounting on PCB, the modules must be baked 48hrs at +125°C +/-5°C. Do not bake modules in trays. The use of scotch tape as kapton on the side of the module during assembly is prohibited.

Module assembly on board must follow reflow guidelines as defined in: http://www.3d-plus.com/PDF/Application/Assembly_recommendations_Automatic_Reflow_v2.pdf or (For Manual reflow only) http://www.3d-plus.com/PDF/Application/Assembly_recommendations_Manual_Reflow_v2.pdf

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4.5.5 Electrostatic Discharge Sensitivity

In order to avoid ESD damage and to guarantee reliable assembling of the 8Mb EEPROM module, 3D PLUS methods and instructions for ESD protections or equivalent have to be applied.

4.6 Radiations

The following generic radiation tolerance data are available at 3D PLUS: Total Dose : 80 kRad(Si) 25 kRad(Si) (Write mode) SEL: 80Mev-cm2/mg SEU Threshold : 80 Mev-cm2/mg (Standby mode)

25 Mev-cm2/mg (Read mode) 10 Mev-cm2/mg (Write mode), 5E-04 cm2/device

Note: Specific radiation verification test can be performed on request for specific batch guarantee.