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TRAFFIC LIGHT CONTROLLER WITH 8085 AIM To write an assembly language program to simulate the traffic light at an intersection using a traffic light interface. APPARATUS R E QUIR E D: SL.NO ITEM SPECIFICATION QUANTITY 1 Microprocessor kit 8085,Vi 1 2 Power supply +5 V dc 1 3 Traffic light Vi Microsystems 1 ALGORI TH M : 1. Initialize the ports. 2. Initialize the memory content, with some address to the data. 3. Read data for each sequence from the memory and display it through the ports. 4. After completing all the sequences, repeat from step2. A S A M P LE SEQ U E N C E: 1. (a) Vehicles from south can go to straight or left. (b) Vehicles from west can cross the road. (c) Each pedestrian can cross the road. (d) Vehicles from east no movement. (e) Vehicles from north, can go only straight. 2. All ambers are ON, indicating the change of sequence. 3. (a) Vehicles from east can go straight and left. (b) Vehicles from south, can go only left. (c) North pedestrian can cross the road. (d) Vehicles from north, no movement. (e) Vehicles from west, can go only straight. 4. All ambers are ON, indicating the change of sequence.

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TRAFFIC LIGHT CONTROLLER WITH 8085

AIMTo write an assembly language program to simulate the traffic light at an intersection using a traffic light interface.

APPARATUS REQUIRED:

SL.NO

ITEM

SPECIFICATION

QUANTITY

1

Microprocessor kit

8085,Vi Microsystems

1

2

Power supply

+5 V dc

1

3

Traffic light interface kit

Vi Microsystems

1

ALGORITHM:1. Initialize the ports.2. Initialize the memory content, with some address to the data.3.Read data for each sequence from the memory and display it through the ports. 4. After completing all the sequences, repeat from step2.

A SAMPLE SEQUENCE:1. (a) Vehicles from south can go to straight or left. (b) Vehicles from west can cross the road.(c) Each pedestrian can cross the road. (d) Vehicles from east no movement.(e) Vehicles from north, can go only straight.

2. All ambers are ON, indicating the change of sequence.

3. (a) Vehicles from east can go straight and left. (b) Vehicles from south, can go only left.(c) North pedestrian can cross the road. (d) Vehicles from north, no movement.(e) Vehicles from west, can go only straight.

4. All ambers are ON, indicating the change of sequence.

5. (a) Vehicles from north can go straight and left. (b) Vehicles from east, can go only left.(c) West pedestrian can cross the road. (d) Vehicles from west, no movement.(e) Vehicles from south, can go only straight.

6. All ambers are ON, indicating the change of sequence.

7. (a) Vehicles from west can go straight and left. (b) Vehicles from north, can go only left.(c) South pedestrian can cross the road. (d) Vehicles from south, no movement.(e) Vehicles from east, can go only straight.

8. All ambers are ON, indicating the change of sequence.

9. (a) All vehicles from all directions no movement. (b) All pedestrian can cross the road.

BIT ALLOCATION:

BIT

LED

BIT

LED

BIT

LED

PA0

SOUTH LEFT

PB0

NORTH LEFT

PC0

WEST STRAIGHT

PA1

SOUTH RIGHT

PB1

NORTH RIGHT

PC1

NORTH STRAIGHT

PA2

SOUTH AMBER

PB2

NORTH AMBER

PC2

EAST STRAIGHT

PA3

SOUTH RED

PB3

NORTH RED

PC3

SOUTH STRAIGHT

PA4

EAST LEFT

PB4

WEST LEFT

PC4

NORTH PD

PA5

EAST RIGHT

PB5

WEST RIGHT

PC5

WEST PD

PA6

EAST AMBER

PB6

WEST AMBER

PC6

SOUTH PD

PA7

EAST RED

PB7

WEST RED

PC7

EAST PD

PATH REPRESENTATION:

CONTROL ----- 0F ( FOR 8255 PPI ) PORT A----- 0CPORT B ----- 0D PORT C ----- 0E

PROGRAM :

ADDRESS

LABEL

MNEMON ICS

OPCO DE

OPER AND

COMMENT

8100

MVI A, 81

3E

81

Move 80 immediately to accumulator

8102

OUT CONTROL

D3

0F

Outputcontentsof accumulator to OF port

8104

LXI H,DATA_SQ

Load address 817B to HL register

8107

LXI D,DATA_E

11

81,87

Load address 8187 to DE register

810A

CALL OUT

CD

42, 81

Call out address

810D

XCHG

EB

Exchange contents of HL with DE pair

810E

MOV A,M

7E

MoveMcontentto accumulator

810F

OUT PORT A

D3

0C

Load port A into output port

8111

CALL DELAY1

CD

66, 81

Call delay address

8114

XCHG

EB

Exchange content of HL with DE pair

8115

INX D

13

Increment the content of D

8116

INX H

23

Increment the content of H

8117

CALL OUT

CD

42, 81

Call out the address

811A

XCHG

EB

Exchange content of HL with DE pair

811B

MOV A,M

7E

MoveMcontentto accumulator

811C

OUT PORT B

D3

0D

Load port B into output port

811E

CALL DELAY1

CD

66, 81

Call DELAY address

8121

XCHG

EB

Exchange content of HL with DE pair

8122

INX D

13

Increment D register

8123

INX H

23

Increment H register

8124

CALL OUT

CD

42, 81

Call specified address

8127

XCHG

EB

Exchange content of HL with DE pair

8128

MOV A,M

7E

MoveMcontentto accumulator

8129

OUT PORT C

D3

0E

Load port C into output port

812B

CALL DELAY1

CD

66, 81

Call DELAY address

812E

XCHG

EB

Exchange content of HL with DE pair

812F

INX D

13

Increment D register

8130

INX H

23

Increment H register

8131

CALL OUT

CD

42, 81

Call specified address

8134

XCHG

EB

Exchange content of HL with DE pair

8135

MOV A,M

7E

MoveMcontentto accumulator

8136

OUT PORT C

D3

0E

Load port C into output port

8138

INX H

23

Increment H register

8139

MOV A,M

7E

MoveMcontentto accumulator

813A

OUT PORT A

D3

0C

Load port A into output port

813C

CALL DELAY1

CD

66, 81

Call DELAY address

813F

JMP REPEAT

C3

04, 81

Jump to specified address

8142

MOV A,M

7E

MoveMcontentto accumulator

8143

OUT PORT C

D3

0E

Load port C into output port

8145

INX H

23

Increment H register

8146

MOV A,M

7E

MoveMcontentto accumulator

8147

OUT PORT B

D3

0D

Load port B into output port

8149

INX H

23

Increment H register

814A

MOV A,M

7E

MoveMcontentto accumulator

814B

OUT PORT A

D3

0C

Load port A into output port

814D

CALL DELAY

CD

51, 81

Call DELAY address

8150

RET

C9

Return to accumulator

8151

PUSH H

E5

Push the register H

8152

LXI H,001F

21

1F,00

Load 00 1F in HL register pair

8155

LXI B,FFFF

01

FF,FF

Load FF FF in DE register pair

8158

DCX B

0B

Decrement B register

8159

MOV A,B

78

MoveBcontentto accumulator

815A

ORA C

B1

ORcontent of C with accumulator

815B

JNZ LOOP

C2

58, 81

Jump to LOOP if no zero

815E

DCX H

2B

Decrement H register

815F

MOV A,L

7D

MoveLcontentto accumulator

8160

ORA H

B4

ORcontent of H with accumulator

8161

JNZ L1

C2

55, 81

Jump to L1 if no zero

8164

POP H

E1

Pop the register H

8165

RET

C9

Return from subroutine

8166

PUSH H

E5

Push the register H

8167

LXI H,001F

21

1F,00

Load 00 1F in HL register pair

816A

LXI B,FFFF

01

FF,FF

Load FF FF in DE register pair

816D

DCX B

0B

Decrement B register

816E

MOV A,B

78

MoveBcontentto accumulator

816F

ORA C

B1

ORcontent of C with accumulator

8170

JNZ LOOP2

C2

6D, 81

Jump to LOOP2 if no zero

8173

DCX H

2B

Decrement H register

8174

MOV A,L

7D

MoveLcontentto accumulator

8175

ORA H

B4

ORcontent of H with accumulator

8176

JNZ L2

C2

6A, 81

Jump to L2 if no zero

8179

POP H

E1

Pop the register H

817A

RET

C9

Return to subroutine

817B

DATA SEQ DB

12 27 44 10 2B 92 10 9D 84 48 2E 8448 4B 20 49 04

RESULT:

Thus an assembly language program to simulate the traffic light at an intersection using a traffic light interfaces was written and implemented.