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2018 Assessment Report Electronics (ELT315114) Page 1 of 23
ELECTRONICS (ELT315114) QUESTION 1 Average mark = C +
1ai) T=4x10µs=40µs
1aii) f=1/T=25kHz
1b) gain= G = -Vout/ Vin=-12v/3mv= negative4000 (one mark for near 4000x, one for inverted or
negative).
QUESTION 2 Average mark = B
2a) This question had an infinite arrangement of functional solutions. Each was studied. Marks were
allocated for each correctly placed component and deducted for additional inclusions that
destroyed or were irrelevant to circuit functionality.
NOTE: If a student uses the spare diagram, make a note of this on the question so that markers
know to look at the back of the booklet.
2 bi)
2 bii) P=VI = 8.9x 0.0051= 45.4mW=0.045W
2018 ASSESSMENT REPORT
2018 Assessment Report Electronics (ELT315114) Page 2 of 23
QUESTION 3 Average mark = C –
3ai) Fuse. Many students confused this with a resistor. Half marks for calling it a breaker or similar.
3aii) For a bridge rectifier all four diodes point towards the positive DC output side. The orientation of
the rectifier was subtly different from usual. This sorted those who had visualisation from those
with understanding.
3b) Vp=1.414x12Vrms=17V
3c) Reduces 240vac to 12v, Isolates DC from the AC, Limits current.
3di)
3dii) To limit the current through the LED. Many students mentioned voltage dropper, but then
omitted to explain how this limits the current.
QUESTION 4 Average mark = A -
4ai) light sensor, ai2)=timer, aii)=lamp
4bi) logic, bii)=light sensor, biii)=driver, biv)=comparator
4ci) light sensor (not the driver not the lamp), cii)=logic, ciii)=comparator
2018 Assessment Report Electronics (ELT315114) Page 3 of 23
QUESTION 5 Average mark = C
5a) = Appearance is not Mt Fuji, test continuity while manipulating joint
5b) = Look for cracks, test for lack of continuity, test resistance between track ends as R=zero if not
cracked. (Note: Some students confused an open track with a vacant pad.)
5c) = Look for solder bridges, touching legs, tracks would have continuity if tested, there would be no
voltage difference between the tracks when powered up.
5d) = May appear charred or deformed, calculate power to component and compare to datasheet
rating, touch component with power applied to feel if it is heating up, confirm correct orientation.
Those candidates who explained how –i.e. what to expect, in addition to what to use, gained
marks.
QUESTION 6 Average mark = T +
6a) With DC circuits, digital or analogue voltmeter can be inserted, hover the pointer over the track
to read the voltage. With AC, the amplitude on AC sources such as signal generator can be set,
Oscilliscope can be attached to both inputs and outputs. Probes can be inserted and display a
graph of waveform.
(Many students thought that one example was sufficient to answer this part, not realizing that the 3
marks indicated an expectation of the depth and breadth of response required.)
6b) Components are assumed to be ideal and ignore tolerances of real world components. CWZ is a
poor simulator of high frequency analogue circuits. A remedy is to slow the time base.
2018 Assessment Report Electronics (ELT315114) Page 4 of 23
QUESTION 7 Average mark = C +
7ai)
7aii) When temperature is sensed to be below set-temperature > pump turns on and circulates hot
water > temp in the room goes up > when sensor rises above set temp, pump turns off.
7bi) =comparator, bii) =temperature sensor, biii) =relay
QUESTION 8 Average mark = A -
8ai) =2200pF, aii)=2n2, 0.002µF
8b) In Series. R=R1+R2= 82+18=100Ω
8c) Advantages: current is shared so heating is lessened. Using 1% gives a total resistance of almost
exactly 50Ω whereas 47Ω±5% has greater variation. Disadvantages: additional component cost;
more space required on PCB/; looks untidy if piggybacked.
2018 Assessment Report Electronics (ELT315114) Page 5 of 23
QUESTION 9 Average mark = C
9a) = NOR gate.
9b) = Bi-stable or latch
9c) Any arrangement that used resistors to tie an input high or low with alternate switching was also
considered. Some looked different, but achieved the same outcome. Many candidates left this
blank. Marks were gained for grounding both throws via a resistor (1), connecting to the NOR
gates (1), Adding the input voltage rail (1).
9d) = NAND gates.
9e) C and D need to be in different states, OR alternatively both high.
(A ‘truth table’ is not required for this question, only here for deeper understanding.)
2018 Assessment Report Electronics (ELT315114) Page 6 of 23
QUESTION 10 Average mark = C -
10a) = Op-Amp (operational amplifier), Q10b) = Connected to ground
10c) The voltage at the inverting input will be pretty close to zero since the op amp produces an
inverted output, the feedback proportion of which will negate any signal so it matches the zero
voltage at the grounded non-inverting input. At higher frequencies this is more difficult to achieve
due to the coupling capacitor passing more of the signal and lag through the op-amp delaying
feedback to negate the input signal.
10d) At higher frequencies, the coupling capacitor reactance (Xc) falls, allowing more amplitude
through, thus the inverting op-amp has to increase the voltage of its output to drag this back to
zero via the feedback resistor, (so as to keep inputs at equal voltage.) If the op-amp saturates, then
the output will also be distorted.
QUESTION 11 Average mark = T +
11a, b, c, d, e)
Solution is shown on the diagram below. Where a candidate placed an additional feedback resistor
directly onto the inverting input it was marked correct.
2018 Assessment Report Electronics (ELT315114) Page 7 of 23
11f) It allows control of the voltage gain (volume), and reduces likelihood of saturation and therefore
distortion.
11g) Advantage= A single voltage supply is simpler than two. Disadvantage = the output cannot swing
into negative voltages. Thus, halving the maximum output range from 24V to 12V.
QUESTION 12 Average mark = C
12a) 08M2 is fussy and requires pretty close to 5 V. (That’s why the programmer board has a 7805
voltage regulator chip)
12b) The CLK of U2 is connected to Leg 7 (Pin C.0)
12c) Because Pin 7 does not exist. For the 08M2, Legs are the metal things that we solder and pins are
not the same thing. If the programmer wants the 08M2 to go high on Leg 7, then the command
should be HIGHC.0 or just HIGH0, unless pin 0 is defined as another variable.
12d) Advantages= Able to change the function (program) easily for versatility, development or error
correction. A microcontroller replaces many IC’s required for a complex function so PCB’s are
simpler and easier to fault find and may be cheaper. It’s easier to find an error in a program than a
complex breadboarded multi IC circuit.
12e) Vss is the acronym for Sinking Source. It is connected to ground.
2018 Assessment Report Electronics (ELT315114) Page 8 of 23
QUESTION 13 Average mark = T
13a) A transformer gained full mark (it is additionally centre-tapped, ±6V output)
13b) Sketch graph shown below.
13c) C1 smooths the varying voltage humps by storing charge when the transformer Vout is higher
than C1 and releasing charge when the transformer Vout is lower than C1 charge voltage.
13d)
2018 Assessment Report Electronics (ELT315114) Page 9 of 23
QUESTION 14 Average mark = C +
14a)
14b) When the clock is low, the ‘D’ (data) input is ignored. Thus, output states remain unchanged. (In
alternate language; ‘D’ is a synchronous input and is thus read only when the clock=1.)
14c) This was a challenging question for most due to the fact that it was a data latch. Marks were
awarded as follows:
i. CLKs were connected together (0.5)
ii. There was a Latch on each D-Type Flip Flop (0.5)
iii. LED was on Q output (0.5)
iv. No Floating switches (0.5)
v. Set=High and Reset=Low (0.5)
2018 Assessment Report Electronics (ELT315114) Page 10 of 23
14d)
QUESTION 15 Average mark = C -
15a) A variety of solutions are plausible. For example: LED, Photodiode/transmitter, Hall-Effect
sensor/switch, PIR motion detector. A microcontroller is not a sensor.
15b) The anticipated component was a Toggle. E.g. D-type flip-flop with toggle link. Stating
‘microcontroller’ necessitated an attempt at code to halve the frequency.
15c) Add another Toggle.
QUESTION 16 Average mark = T +
16a) It’s a three stage binary counter and thus has, 2 x 2 x 2= 8 output states.
16b) All ‘C’ inputs are linked directly to the circuit CLK input.
16c) The AND gate generates the logic for JK inputs of FF2. Namely, when J=K=1 then FF2 will toggle.
When J=K=0, then FF2 output Q2 will remain unchanged. (from truth table).
2018 Assessment Report Electronics (ELT315114) Page 11 of 23
16d) Marks were awarded for showing both Q0 and Q1 toggling on PGE of clock pulse, and showing
the AND gate response (shown below at clock pulse 5.) Which indicated the candidate had
understood that the AND gate is reading the pre-existing Q0=Q1=1 condition upon
commencement of CLK pulse 5.
16e) This is a 3-bit synchronous up counter. Q2 is the MSB. Thus Q2,Q1,Q0 is counting 000 > 001 >
010 > 011 > 100 > 101 > 110 > 111 > 000
QUESTION 17 Average mark = B -
17a) It takes one Tc to charge to 63%, which is 6.3V. From the graph, this occurs by 3ms
17b) 15ms. Solution marked correct whether sourced mathematically (5Tc = 5 x 3ms = 15ms.), or
from the graph.
17c) A resistor of twice the value would double the time it takes to reach both key points on the graph.
The 63% point will be at 6ms, while charging to 10V won’t be reached till 30ms. Full marks were
awarded for sketching the curve through these two points.
2018 Assessment Report Electronics (ELT315114) Page 12 of 23
17d) 33Hz represents a period of 1/33 = 0.030sec (30ms) . This is 10Tc. Thus, each square wave cycle
is high for 5Tc and low for 5Tc. The Curves will fully charge and discharge as shown below:
330Hz is 10 times faster and therefore each cycle is 10 times shorter. Thus each square wave is
high for only 5Tc/10 = 0.5Tc and low for 0.5 Tc. From EXAM FIGURE 17b, this allows for
charging and discharging of only 40% at each cycle.
The curves would also appear linear at that scale, as shown below.
Candidates were given 1 mark for a straight line that rose to 4V on the first cycle before falling. An
additional 0.5 for recognising that it is 40% of the voltage gradient at each cycle, and thus the cycle
amplitude gradually rises.
2018 Assessment Report Electronics (ELT315114) Page 13 of 23
QUESTION 18 Average mark = T
18a) 0V to 12Volts DC. (12V was marked correct). The 12V Zener diode will act like a 12 meter high
river dam with a tap near its bottom. The pressure at the tap will match the height of water inside
the dam up to 12m. Any higher water level will flow over the top of the dam, leaving no extra
pressure behind the tap.
18b) The input is a 15V ±0.1V signal. As 14.9V is still over 12V, the output will not dip below 12V.
There will be no ripple. (The waves will just fall over the dam and not affect the pressure in the
tap)
18c) It is the maximum safe amount of electrical power (Watts) that can be converted to heat within
the Zener (1 mark). Of the input voltage, up to 12V will be stopped by the Zener. Any further
voltage from a greater input voltage will be dropped across the resistor and cause current flow
through the Zener. Since Amps= Power/Volts= 0.400W/12 = 0.033A. Thus the 400mW rating
also allows calculation of the maximum current. This is 0.033A= 33mA. (1 mark)
18d) Uppermost output is 24 Volts and next down is 15Volts.
18e) To gain the full range requires an input of ≥39Volts. (1 mark). 15V+15V+9V= 39V. (1 mark)
Zeners can only stop or drop voltage, not create it.
QUESTION 19 Average mark = C -
19a) They form a voltage divider to establish a bias of half of V+ (supply voltage) at non-inverting input.
19b) Cin is an input coupling/decoupling capacitor. It blocks DC and passes only the AC frequencies of
the input signal. Co does the same on the output signal of the op-amp.
19c) The LM358 chip contains two op-amp circuits. ½ indicates that only one of these is being used.
19d) As the signal enters the inverting input, this will be an inverting op-amp. Gain is limited by the use
of negative feedback via Rf.
2018 Assessment Report Electronics (ELT315114) Page 14 of 23
QUESTION 20 Average mark = C –
20a) The graph in part (b) shows that in low light, the LDR resistance increases. Since the LDR forms a
voltage divider with R3, the voltage at the non-inverting input falls. When this drops below the
inverting input voltage (held/biased at 2.81V calculated from voltage divider R1 & R2), then op-
amp output saturates low (infinitely amplifying the inverted difference) to near zero volts. This
results in a voltage drop being established across LED A. So this one illuminates.
20b) R3 is a variable resistor. (trimpot, pot, potentiometer, rheostat) It allows variation of the ratio of its
voltage divider resistances so the output voltage can be altered. Thus a choice of light level can be
made to trigger the op-amp.
20c) From the graph, at 220Lux the LDR has a resistance of 2kΩ. Next step, use the voltage divider
equation as provided on the exam information sheet and let R1=2000Ω, R2 is the unknown we
are trying to find, Vin=9V and Vout is the threshold voltage =2.81V. However, this now requires a
complex algebraic manipulation. Too hard. So easier to hypothetically invert the divider, so that R2
becomes the LDR (2000Ω), and the voltage drop across it is 9-2.81=6.19V). Now, Vin=9V,
Vout=6.19V, R1=unknown, R2=2000Ω. Manipulating this gives: R1=R2(Vi-Vo)/Vo = 908Ω
20d) Rising sun means increasing Lux, which decreases LDR resistance. Thus voltage at non-inverting
input climbs. When it exceeds inverting bias voltage, then Op-amp output saturates high. Thus LED
A ceases to have voltage difference across it and turns off, while LED B gains voltage to illuminate
it. The information provided for Q20 states that when an LED lights up, it operates motor via
coupled photocell. Thus, the illumination of B, via photocell D operates the door, to raise it.
2018 Assessment Report Electronics (ELT315114) Page 15 of 23
QUESTION 21 Average mark = T +
21a) The symbol is for an Op-amp. The positive feedback via R2 creates hysteresis while the voltage
divider via R1 & R2, determines the extent of threshold separation. The LM358 functions from a
single supply and has output able to fall to Zero volts, making it particularly suited for use in logic
circuits. Thus this circuit could be used to convert a noisy signal into a stable square wave or as a
thermostat control to reduce thrashing/flicking.
21b) Positive Feedback
21ci) Hysteresis
21cii) As the input voltage decreases, to fall below the non-inverting input (which is held at Zero volts,
via both Vref and Vout), then Vout saturates high to Vcc. Saturation is almost immediate as typical
uncontrolled gain for an Op-amp can be in the order of 200,000 times and positive feedback
increases the difference between inputs, which the Op-amp again amplifies. In this state, the non-
inverting input is held slightly above zero by the voltage divider bridging Vo and Vref.
QUESTION 22 Average mark = B -
22a)
2018 Assessment Report Electronics (ELT315114) Page 16 of 23
22b) Some candidates seemed unaware the E12 series was provided on the info sheet. A number were
unable to manipulate the voltage divider formula.
QUESTION 23 Average mark = C
23a)
2018 Assessment Report Electronics (ELT315114) Page 17 of 23
23b)
23c) Competence converting uF and mH is required for this question.
23d) If an erroneous answer to ‘X’ was carried forward, no marks were lost in this question if the correct method shown below was set out.
2018 Assessment Report Electronics (ELT315114) Page 18 of 23
QUESTION 24 Average mark = C +
24ai) assigns ‘LED’ to pin 4 (ie leg 3)
24aii) push button switch on pin 2. (ie leg 5)
24aiii) switch closed? Then go to the ‘flash’ subroutine
24aiv) start b2 at 5.
24av) wait for 500ms (0.5sec)
24avi) go back to (beginning of) the ‘main’ subroutine
24avii) turn LED on
24b) Starts with: LED on pin 4, switch connected to pin 2 and counter set to zero (b1)
2018 Assessment Report Electronics (ELT315114) Page 19 of 23
QUESTION 25 Average mark = T +
25a) Since the non-inverting input is tied to zero, the inverting input will always be higher, leading to an
inverted output. A common oversight was to leave out the negative sign.
25b)
25c)
2018 Assessment Report Electronics (ELT315114) Page 20 of 23
QUESTION 26 Average mark = B -
26a) Where solutions were incorrect, excessive economy of setting out denied candidates partial marks
in all sections.
26b) Limited algebraic manipulation skills hindered candidates in this question.
26c)
2018 Assessment Report Electronics (ELT315114) Page 21 of 23
QUESTION 27 Average mark = B +
27a)
27b)
A ‘toggles’ each 0.8 sec (since A= output at Q4. This is at 1/8th of clock frequency. 10Hz÷8 =
1.25Hz. and is a period of 1÷1.25=0.8sec.) Thus R is on for 3x0.8=2.4sec, then R & Y for 0.8sec,
then G for 2x0.8=1.6sec, then y & G for 2x0.8=1.6sec, then repeating the cycle.
Many candidates answered differently to the solutions provided above. Marks were also awarded
to those that could identify the function of both the OR and AND gates (1) and the states needed
to light the yellow and green LED (0.5). Along with the Boolean expressions for each LED to light
(0.5). Being in C7, such expression was considered a reasonable interpretation if the question.
2018 Assessment Report Electronics (ELT315114) Page 22 of 23
QUESTION 28 Average mark = C –
28a) 1.5V
28b) P=IV = 1.5V x 100mA = 150mW (0.15Watt)
28ci) R=V/Imax = (18-1.5)V/0.1A = 165Ω. Therefore the closest E12 higher than this is 180Ω (to
keep current under Imax)
28cii) P=V2/R = 16.52/180 = 1.51 Watts. Therefore would need a resistor of at least 2 watt rating.
QUESTION 29 Average mark = B +
29a)
29b)
29c)
2018 Assessment Report Electronics (ELT315114) Page 23 of 23
QUESTION 30 Average mark = B –
30a) Both the Boolean expression and computer science notation were accepted for this question.
Though candidates are reminded that a Boolean expression needs to be written in the exam as
taught in the Electronics course.
30b)