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The 8086 can operate in two modes and they are minimum (oruniprocessor) mode and maximum ( or multiprocessor) mode.13. What is the data and address size in 8086?The 8086 can operate on either 8-bit or 16-bit data. The 8086 uses 20bit address to access memory and 16-bit address to access 1/0 devices.14. Explain the function of M/IO in 8086.The signal M/IOis used to differentiate memory address and 1/0address When the processor is accessing memory locations MI10 isasserted high and when it is accessing 1/0 mapped devices it is assertedlow.15. Write the flags of 8086.The 8086 has nine flags and they are1. Carry Flag (CF) 6. Overflow Flag (OF)2. Parity Flag (PF) 7. Trace Flag (TF)3. Auxiliary carry Flag (AF) 8. Interrupt Flag (IF)4. Zero Flag (ZF) 9. Direction Flag (DF)5. Sign Flag (SF)16. What are the interrupts of 8086?The interrupts of 8085 are INTR and NMI. The INTR is generalmaskable interrupt and NMI is non-maskable interrupt.17. How clock signal is generated in 8086? What is the maximum internalclock frequency of 8086?The 8086 does not have on-chip clock generation circuit. Hence theclock generator chip, 8284 is connected to the CLK pin of8086. Theclock signal supplied by 8284 is divided by three for internal use. Themaximum internal clock frequency of8086 is 5MHz.18. Write the special functions carried by the general purpose registers of8086.

The special functions carried by the registers of 8086 are the following.Register Special function1. AX 16-bit Accumulator2. AL 8-bit Accumulator3. BX Base Register4. CX Count Register5. DX .Data Register19. What is pipelined architecture?In pipelined architecture the processor will have number of functionalunits and the execution time of functional units are overlapped. Eachfunctional unit works independently most of the time.

20. What are the functional units available in 8086 architecture?The bus interface unit and execution unit are the two functional unitsavailable in 8086 architecture.21. List the segment registers of 8086.The segment registers of 8086 are Code segment, Data segment, Stacksegment and Extra segment registers.22. Define machine cycle.Machine cycle is defined as the time required to complete oneoperation of accessing memory, I/O, or acknowledging an externalrequest. This cycle may consist of three to six T-states.23. Define T-State.

T-State is defined as one subdivision of the operation performed in


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one clock period. These subdivisions are internal states synchronizedwith the system clock, and each T-State is precisely equal to oneclock period.24. List the components of microprocessor (single board microcomputer)based systemThe microprocessor based system consist of microprocessor as CPU,semiconductor memories like EPROM and RAM, input device, outputdevice and interfacing devices.25. Why interfacing is needed for 1/0 devices?Generally I/O devices are slow devices. Therefore the speed of I/Odevices does not match with the speed of microprocessor. And so aninterface is provided between system bus and I/O devices.26. What is the difference between CPU bus and system bus?The CPU bus has multiplexed lines but the system bus has separatelines for each signal. (The multiplexed CPU lines are demultiplexed bythe CPU interface circuit to form system bus).27..What does memory-mapping mean?The memory mapping is the process of interfacing memories tomicroprocessor and allocating addresses to each memory locations.28..What is interrupt 1/0?If the 1/0 device initiate the data transfer through interrupt then the 1/0is called interrupt driven 1/0.29. Why EPROM is mapped at the beginning of memory space in 8085system?In 8085 microprocessor, after a reset, the program counter will haveOOOOH address. If the monitor program is stored from this addressthen after a reset, it will be executed automatically. The monitorprogram is a permanent program and stored in EPROM memory. If

EPROM memory is mapped at the beginning of memory space, i.e., atOOOOH, then the monitor program will be executed automaticallyafter a reset.30. What is the need for system clock and how it is generated in 8085?The system clock is necessary for synchronizing various internaloperations or devices in the microprocessor and to synchronize themicroprocessor with other peripherals in the system.31.What is DMA?The direct data transfer between I/O device and memory is calledDMA.32. What is the need for Port?

The I/O devices are generally slow devices and their timingcharacteristics do not match with processor timings. Hence the I/Odevices are connected to system bus through the ports.33.What is a port?The port is a buffered I/O, which is used to hold the data transmittedfrom the microprocessor to I/O device or vice-versa.34.Give some examples of port devices used in 8085 microprocessor basedsystem?The various INTEL I/O port devices used in 8085 microprocessorbased system are 8212, 8155, 8156, 8255, 8355 and 8755.35. Write a short note on INTEL 8255?

The INTEL 8255 is a I/O port device consisting of 3 numbers of 8 -bit


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of an instruction stored in memory. Every instruction starts with opcodefetch machine cycle.46. What operation is performed during first T -state of every machine cyclein 8085 ?In 8085, during the first T -state of every machine cycle the low byteaddress is latched into an external latch using ALE signal.47. Why status signals are provided in microprocessor?The status signals can be used by the system designer to track theinternal operations of the processor. Also, it can be used for memoryexpansion (by providing separate memory banks for program & dataand selecting the bank using status signals).48. How the 8085 processor differentiates a memory access (read/write)and 1/0 access (read/write)?The memory access and 1/0 access is differentiated using 10 IM signal.The 8085 processor asserts 10 IM low for memory read/write operationand 10 IM is asserted high for 1/0 read/write operation.49. When the 8085 processor checks for an interrupt?In the second T -state of the last machine cycle of every instruction, the8085 processor checks whether an interrupt request is made or not.50. What is interrupt acknowledge cycle?The interrupt acknowledge cycle is a machine cycle executed by 8085processor to get the address of the interrupt service routine in-order toservice the interrupt device.51. How the interrupts are affected by system reset?Whenever the processor or system is resetted , all the interrupts exceptTRAP are disabled. fu order to enable the interrupts, El instruction hasto be executed after a reset.52. What is Software interrupts?

The Software interrupts are program instructions. These instructionsare inserted at desired locations in a program. While running aprogram, if software interrupt instruction is encountered then theprocessor executes an interrupt service routine.53. What is Hardware interrupt?If an interrupt is initiated in a processor by an appropriate signal at theinterrupt pin, then the interrupt is called Hardware interrupt.54. What is the difference between Hardware and Software interrupt?The Software interrupt is initiated by the main program, but theHardware interrupt is initiated by an external device.In 8085, the Software interrupt cannot be disabled or masked but the

Hardware interrupt except TRAP can be disabled or masked.55. What is Vectored and Non- Vectored interrupt?When an interrupt is accepted, if the processor control branches to aspecific address defined by the manufacturer then the interrupt iscalled vectored interrupt.In Non-vectored interrupt there is no specific address for storing theinterrupt service routine. Hence the interrupted device should give theaddress of the interrupt service routine.56. List the Software and Hardware interrupts of 8085?Software interrupts: RST 0, RSTl, RST 2,RST 3, RST 4, RST 5,

RST 6 and RST 7.


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Hardware interrupts: TRAP, RST 7.5, RST 6.5,RST 5.5 and INTR.57. What is TRAP?The TRAP is non-maskable interrupt of8085. It is not disabled byprocessor reset or after reorganization of interrupt.58. Whether HOLD has higher priority than TRAP or not?The interrupts including mAP are recognized only if the HOLD is notvalid, hence TRAP has lower priority than HOLD.59. What is masking and why it is required?Masking is preventing the interrupt from disturbing the currentprogram execution. When the processor is performing animportant job (process) and if the process should not beinterrupted then all the interrupts should be masked or disabled.In processor with multiple 'interrupts, the lower priority interruptcan be masked so as to prevent it from interrupting, the executionof interrupt service routine of higher priority interrupt.60. When the 8085 processor accept hardware interrupt?The processor keeps on checking the interrupt pins at the second T-state of last Machine cycle of every instruction. If the processorfinds a valid interrupt signal and if the interrupt is unmasked andenabled then the processor accepts the interrupt. The acceptanceof the interrupt is acknowledged by sending an OOA signal to theinterrupted device.61. When the 8085 processor will disable the interrupt system?The interrupts of 8085 except TRAP are disabled after anyone of thefollowing operations1. Executing El instruction.2. System or processor reset.

3. After reorganization (acceptance) of an interrupt.62. What is the function performed by Dl instruction?The function of Dl instruction is to enable the disabled interrupt system.63. What is the function performed by El instruction?The El instruction can be used to enable the interrupts after disabling.64. How the vector address is generated for the INTR interrupt of8085?For the interrupt INTR, the interrupting device has to place either RSTopcode or CALL opcode followed by l6-bit address. I~RST opcode isplaced then the corresponding vector address is generated by theprocessor. In case of CALL opcode the given l6-bit address will be thevector address.

65. How clock signals are generated in 8085 and what is the frequency ofthe internal clock?The 8085 has the clock generation circuit on the chip but an externalquartz crystal or L C circuit or RC circuit should be connected at thepins XI and X2. The maximum internal clock frequency of 8085A is3.03 MHz.66. What happens to the 8085 processor when it is resetted?When the 8085 processor is resetted it execute the first instruction at theOOOOH location. The 8085 resets (clears) instruction register, interruptmask bits and other registers.67. What are the operations performed by ALU of 8085?

The operations performed by ALU of 8085 are Addition, Subtraction,


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Logical AND, OR, Exclusive OR, Compare Complement, Increment,Decrement and Left IRight shift68. What is a flag?Flag is a flip flop used to store the information about the status of theprocessor and the status of the instruction executed most recently.69. List the flags of 8085There are five flags in 8085. They are sign flag, zero flag, Auxiliarycarry flag, parity flag and carry flag.70. What is the Hardware interrupts of 8085?The hardware interrupts in 8085 are TRAP, RST 7.5, RST 6.5 andRST 5,5. 41.71.Which interrupt has highest priority in 8085? What is the priority ofother interrupts?The TRAP has the highest priority, followed by RST 7.5, RST 6.5,RST 5.5 and INTR.72 What is an ALE?The ALE (Address Latch Enable) is a signal used to demultiplex theaddress and data lines, using an external latch. It is used to enable theexternal latch.73. Explain the function of IO/M in 8085.The IO/M is used to differentiate memory access and I/O access. For INand OUT instruction it is high. For memory reference instructions it islow.74. Where is the READY signal used?READY is an input signal to the processor, used by the memory or I/Odevices to get extra time for data transfer or to introduce wait states inthe bus cycles.75. What is HOLD and HLDA and how it is used?

Hold and hold acknowledge signals are used for the Direct MemoryAccess (DMA) type of data transfer. The DMA controller place a highon HOLD pin in order to take control of the system bus. The HOLDrequest is acknowledged by the 8085 by driving all its tristated pins tohigh impedance state and asserting HLDA signal high.76.What is Polling?Polling is a scheme or an algorithm to identify the devices interruptingthe processor. Polling is employed when multiple devices interrupt theprocessor through one interrupt pin of the processor.77. What are the different types of Polling?The polling can be classified into software and hardware polling. In

software polling the entire polling process is govern by a prograrn.1nhardware polling, the hardware takes care of checking the status ofinterrupting devices and allowing one by one to the processor.78.What is the need for interrupt controller?The interrupt controller is employed to expand the interrupt inputs. Itcan handle the interrupt request from various devices and allow one byone to the processor.79. List some of the features of INTEL 8259 (Programmable InterruptController)1. It manage eight interrupt request2. The interrupt vector addresses are programmable.

3. The priorities of interrupts are programmable.


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4. The interrupt can be masked or unmasked individually.80. What is a programmable peripheral device ?If the functions performed by a peripheral device can be altered orchanged by a program instruction then the peripheral device is calledprogrammable device. Usually the programmable devices will have controlregisters. The device can be programmed by sending control word in theprescribed format to the control register.81. What is synchronous data transfer scheme?For synchronous data transfer scheme, the processor does not check thereadiness of the device after a command have been issued forread/write operation. fu this scheme the processor will request thedevice to get ready and then read/W1.ite to the device immediatelyafter the request. In some synchronous schemes a small delay isallowed after the request.82. What is asynchronous data transfer scheme?In asynchronous data transfer scheme, first the processor sends arequest to the device for read/write operation. Then the processorkeeps on polling the status of the device. Once the device is ready, theprocessor execute a data transfer instruction to complete the process.83. What are the operating modes of 8212?The 8212 can be hardwired to work either as a latch or tri-state buffer.If mode (MD) pin is tied HIGH then it will work as a latch and so itcan be used as output port. If mode (MD) pin is tied LOW then itwork as tri- state buffer and so it can be used as input port.84. Explain the working of a handshake output portIn handshake output operation, the processor will load a data to port.When the port receives the data, it will inform the output device tocollect the data. Once the output device accepts the data, the port will

inform the processor that it is empty. Now the processor can loadanother data to port and the above process is repeated.85.What are the internal devices of 8255 ?The internal devices of 8255 are port-A, port-B and port-C. The portscan be programmed for either input or output function in differentoperating modes.86. What is baud rate?The baud rate is the rate at which the serial data are transmitted. Baudrate is defined as l /(The time for a bit cell). In some systems one bitcell has one data bit, then the baud rate and bits/sec are same.87. What is USART?

The device which can be programmed to perform Synchronous orAsynchronous serial communication is called USART (UniversalSynchronous Asynchronous Receiver Transmitter). The INTEL 8251Ais an example of USART.88. What are the functions performed by INTEL 8251A?The INTEL 825lA is used for converting parallel data to serial or viceversa. The data transmission or reception can be either asynchronouslyor synchronously. The 8251A can be used to interface MODEM andestablish serial communication through MODEM over telephone lines.89. What is an Interrupt?Interrupt is a signal send by an external device to the processor so as to

request the processor to perform a particular task or work.


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90. What are the control words of 8251A and what are its functions ?The control words of 8251A are Mode word and Command word.The mode word informs 8251 about the baud rate, character length,parity and stop bits. The command word can be send to enable thedata transmission and reception.91. What are the information that can be obtained from the status word of8251 ?The status word can be read by the CPU to check the readiness of thetransmitter or receiver and to check the character synchronization insynchronous reception. It also provides information regarding variouserrors in the data received. The various error conditions that can bechecked from the status word are parity error, overrun error andframing error.92. Give some examples of input devices to microprocessor-based system.The input devices used in the microprocessor-based system areKeyboards, DIP switches, ADC, Floppy disc, etc.93. What are the tasks involved in keyboard interface?The task involved in keyboard interfacing are sensing a key actuation,Debouncing the key and Generating key codes (Decoding the key).These task are performed software if the keyboard is interfacedthrough ports and they are performed by hardware if the keyboard isinterfaced through 8279.94. How a keyboard matrix is formed in keyboard interface using 8279?The return lines, RLo to RL7 of 8279 are used to form the columns ofkeyboard matrix. In decoded scan the scan lines SLo to SL3 of 8279are used to form the rows of keyboard matrix. In encoded scan mode,the output lines of external decoder are used as rows of keyboardmatrix.

95. What is scanning in keyboard and what is scan time?The process of sending a zero to each row of a keyboard matrix andreading the columns for key actuation is called scanning. The scan timeis the time taken by the processor to scan all the rows one by onestarting from first row and coming back to the first row again.96. What is scanning in display and what is the scan time?In display devices, the process of sending display codes to 7 -segmentLEDs to display the LEDs one by one is called scanning ( ormultiplexed display). The scan time is the time taken to display all the7-segment LEDs one by one, starting from first LED and coming backto the first LED again.

97. What are the internal devices of a typical DAC?The internal devices of a DAC are R/2R resistive network, an internallatch and current to voltage converting amplifier.98. What is settling or conversion time in DAC?The time taken by the DAC to convert a given digital data tocorresponding analog signal is called conversion time.99. What are the different types of ADC?The different types of ADC are successive approximation ADC,counter type ADC flash type ADC, integrator converters and voltageto-frequency converters.100. Define stack

Stack is a sequence of RAM memory locations defined by the


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programmer.101. What is program counter? How is it useful in program execution?The program counter keeps track of program execution. To execute aprogram the starting address of the program is loaded in programcounter. The PC sends out an address to fetch a byte of instruction frommemory and increments its content automatically.102. How the microprocessor is synchronized with peripherals?The timing and control unit synchronizes all the microprocessoroperations with clock and generates control signals necessary forcommunication between the microprocessor and peripherals.103. What is a minimum system and how it is formed in 8085?A minimum system is one which is formed using minimum number ofIC chips, The 8085 based minimum system is formed using 8155,8355and 8755.104. What is mean by microcontrollerA device which contains the microprocessor with integratedperipherals like memory, serial ports, parallel ports, timer/counter, interruptcontroller, data acquisition interfaces like ADC,DAC is calledmicrocontroller.105.List the features of 8051 microcontroller?The features are*single_supply +5 volt operation using HMOS technology.*4096 bytes program memory on chip(not on 8031)*128 data memory on chip.*Four register banks.*Two multiple mode,16-bit timer/counter.*Extensive boolean processing capabilities.*64 KB external RAM size

*32 bidirectional individually addressible I/O lines.*8 bit CPU optimized for control applications.106.Explain the operating mode0 of 8051 serial ports?In this mode serial enters &exits through RXD, TXD outputsthe shift clock.8 bits are transmitted/received:8 data bits(LSB first).The baudrate is fixed at 1/12 the oscillator frequency.107 Explain the operating mode2 of 8051 serial ports?In this mode 11 bits are transmitted(through TXD)or received(through RXD):a start bit(0), 8 data bits(LSB first),a programmable 9th databit ,& a stop bit(1).ON transmit the 9th data bit (TB* in SCON)can beassigned the value of 0 or 1.Or for eg:, the parity bit(P, in the PSW)could be

moved into TB8.On receive the 9th data bit go in to the RB8 in SpecialFunction Register SCON, while the stop bit is ignored. The baud rate isprogrammable to either 1/32or1/64 the oscillator frequency.108. Explain the mode3 of 8051 serial ports?In this mode,11 bits are transmitted(through TXD)orreceived(through RXD):a start bit(0), 8 data bits(LSB first),a programmable9th data bit ,& a stop bit(1).In fact ,Mode3 is the same as Mode2 in allrespects except the baud rate. The baud rate in Mode3 is variable.In all the four modes, transmission is initiated by any instructionthat uses SBUF as a destination register. Reception is initiated in Mode0 bythe condition RI=0&REN=1.Reception is initiated in other modes by the

incoming start bit if REN=1.


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109.Explain the interrupts of 8051 microcontroller?The interrupts are:Vector address

External interrupt 0 : IE0 : 0003H

Timer interrupt 0 : TF0 : 000BH

External interrupt 1 : IE1 : 0013H Timer Interrupt 1 : TF1 : 001BH Serial InterruptReceive interrupt : RI : 0023HTransmit interrupt: TI : 0023H110.Write A program to perfom multiplication of 2 nos using 8051?MOV A,#data 1MOV B,#data 2MUL ABMOV DPTR,#5000MOV @DPTR,A(lower value)

INC DPTRMOV A,BMOVX @ DPTR,A111.Write a program to mask the 0th &7th bit using 8051?MOV A,#dataANL A,#81MOV DPTR,#4500MOVX @DPTR,ALOOP SJMP LOOP112.List the addressing modes of 8051? Direct addressing

Register addressing Register indirect addressing.

Implicit addressing

Immediate addressing

Index addressing Bit addressing113.Write about CALL statement in 8051?There are two subroutine CALL instructions. They are*LCALL(Long CALL)*ACALL(Absolute CALL)Each increments the PC to the 1st byte of the instruction & pushes them

in to the stack.114.Write about the jump statement?There are three forms of jump. They areLJMP(Long jump)-address 16AJMP(Absolute Jump)-address 11SJMP(Short Jump)-relative address115.Write program to load accumulator ,DPH,&DPL using 8051?MOV A,#30MOV DPH,AMOV DPL,A116.Write a program to find the 2s complement using 8051?

MOV A,R0


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CPL AINC A117.Write a program to add 2 8-bit numbers using 8051?MOV A,#30HADD A,#50H118.Write a program to swap two numbers using 8051?MOV A, #dataSWAP A119.Write a program to subtract 2 8-bit numbers &exchange the digits using8051?MOV A,#9FMOV R0,#40SUBB A,R0SWAP A120.Write a program to subtract the contents of R1 of Bank 0from the contentsof R0 of Bank 2 using 8051?MOV PSW,#10MOV A,R0MOV PSW,#00SUBB A,R1Part B

1. Draw & explain the architecture of 8085 microprocessor

Block Diagram

Registers Available

Function Of Accumulator Explanation about all blocks in the block diagram2. Draw the Pin Diagram of 8085 and explain the function of various signals.

Pin Diagram Explanation about all signals3. Explain the instruction classification & instruction sets Data Transfer Instructions

Arithmetic Instructions

Logical Instructions

Branch Instructions

Machine Control Instructions4. Write a program to sort the numbers in ascending and descending order.

Program

Result Verification

5.Draw the timing diagram of the following Instructions PUSH

IN Port A

STA 5000

MVI A, 08

Explain the machine cycles needed for every Instructions anddraw the timing diagram6. Explain the 8085 based microcomputer system7. With neat sketch explain the functions of 8255 PPI.

Block Diagram

Explanation about all the ports available.

Explanation about the modes of transfer


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Explain the control Word Register8. With neat sketch explain the functions of 8251. Block Diagram

Types of data transfer

Explanation about all the blocks.

Explain the control Word Register, Status Register9. With neat sketch explain the function of DMA contoller.

Block Diagram Explanation about all blocks in the block diagram10.With neat sketch explain the function of Programmable Interrupt Controller.

Block Diagram

Explanation about all blocks in the block diagram11.With neat sketch explain the function of Keyboard and display controller.

Block Diagram

Types of Display Available

Types of keys available

Explanation about all blocks in the block diagram12. With neat sketch explain the function of A/D converter.

Fundamental steps

Figure

Explain the functions.13. With neat sketch explain the function of D/A converter.

Fundamental steps

Figure

Explain the functions.14.With neat sketch explain the architecture of 8051 microcontroller.

Block Diagram Explanation about all blocks in the block diagram15. Draw the Pin Diagram of 8051 and explain the function of various

signals.

Pin Diagram

Explanation about all signals16. List the various Instruction available in 8051 microcontroller. Data Transfer Instructions

Arithmetic Instructions

Logical Instructions Boolean variable Manipulation Instructions

Program and Machine Control Instructions

UNIT-I -2Marks

SDIC

1. What is the op-amp? Why it is called so?


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An operational amplifier is a DC-coupled high-gain electronic voltage amplifier with

a differential input and, usually, a single-ended output. An op-amp produces an output

voltage that is typically hundreds of thousands times larger than the voltage difference

between its input terminals.

An operational amplifier can perform all arithmetic operations like addition ,subtraction, log, antilog, differentiation, integration etc. hence it is called so.

2. What are the different linear IC packages?

There are three popular packages available

1. The metal can(TO) packages

2. The dual-in-line packages(DIP)

3. The flat package of flat packOp-amp packages may contain single, two (dual) or four (quad) op-amps. Typical

packages have 8 terminals, 10 terminals and 14 terminals.

3. What are the basic terminals of the OP-AMP?

There OP-AMP has five basic terminals .They are

Two input terminals

Inverting(Pins 2 )

Non Inverting Terminal(Pin 3)

One output terminal (Pin 6)

Two Power Supply Terminals(Pins 4 for +Vcc and 7 forVee)

4. What are the DC characteristics of an OP-AMP?

The non-ideal dc characteristics that add error components to the dc output

voltage are:

Input bias current

Input offset current

Input offset voltage

Thermal drift

5. What is input-bias current?


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The average amount of current entering into the Inverting and the Non inverting

terminals of the op-amp is called Input bias current. Its value is 500nA for IC741A

The input-bias current(Ib) is given by

Ib=(Ib1+Ib2)/2

6.What is the input-offset current?

Even before applying the inputs to the inverting and the Non inverting terminals

there is a small amount of output is obtained because the terminals are not electrically

balanced. In order to rectify this we apply the input offset current.

The algebraic difference between the currents into the Inverting and the Non

inverting input terminals to make the output as zero is referred to as input offset current.

It is 200nA maximum for IC741C

7. What is the input-offset voltage?



balanced. In order to rectify this we apply the input offset voltage.

The voltage that is applied between the inverting and the Non-inverting terminals

of the OP-AMP to make the output as zero. Hence we nullify the output .So it is called as

Input Offset Voltage.

8. What is thermal drift?

The DC characteristics like the Bias current, Offset voltage change with

temperature. The change of the values of the DC characteristics with temperature is

called as Thermal Drift. Offset current Drift is expressed in nA/0C and offset voltage drift in

mV/0C.

This effect can be reduced by Using Proper printed circuit board layout and by

Forced air cooling.


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9. What are the AC characteristics of an OP-AMP?

The AC characteristics of an OP-AMPs are

Frequency Response

Frequency Compensation

Slew Rate

Supply Voltage Rejection Ratio

Large Signal Voltage Ratio

Gain Bandwidth Product

Transient Response

10. What is slew rate?

It is defined as the maximum ratio of change of output Voltage per unit Time. It is

always expressed in terms of Volts per micro seconds. For example, a 1V/us slew rate

means that the output rises or falls by 1V in one micro seconds.

An ideal slew rate is infinite which means that op-amps output voltage should

change instantaneously in response to input step voltage.

11. What is input resistance and input capacitance in an OP-AMP?

Input Resistance:

It is defined as the resistance measured between any one of the input terminal to

ground by making the other input terminal already connected to the ground

Input Capacitance:

It is defined as the capacitance measured between any one of the input terminal to

ground by making the other input terminal already connected to the ground.


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12. What is the input voltage range for OP-AMP?

This voltage is the common mode voltage that can be applied to both input

terminals without disturbing the performance of the op-amp . For the 741C the range ofthe input common-mode voltage is (+or -) 13V. Common mode configuration is used only

for test purpose to determine the degree of matching between the inverting and the non

inverting terminals.

13. What is CMRR?

The relative sensitivity of an op-amp to a difference signal as compared to a

common mode signal is called as common mode rejection ratio(CMRR) and gives the

figure of merit p for the differential amplifier. So CMRR is given by:

And it is expressed in decibel (dB). For example the uA741 op-amp has a maximum

CMRR of 70 dB.

14. What is SVRR?

The change in an OP-AMPs input offset voltage due to variations in supply voltage

is called the supply voltage rejection ratio. Some manufactures use the terms like Power

Supply Rejection ratio(PSRR) or Power supply sensitivity(PSS). These terms are expressed

in microvolts per volts or in decibel For IC741c,SVRR-150uV/V. Lower the value of the

SVRR, better the op-amp.

15. What is large signal voltage gain?

An op-amp amplifies the difference voltages between the two input terminals and

therefore, its voltage gain is defined as, The ratio between the output voltage to the

differential input voltage


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Since the amplitude of the output signal is much larger than the input signal, the

voltage gain is referred as large signal voltage gain.

16. What is output voltage swing?

The output voltage swing indicates the value of positive and negative saturation

voltages of an op-amp and never exceeds the supply voltage. For IC741C, the output

voltage swing is guaranteed ti be between +13V and -13V for RL >2kohms.

17.What is Output Resistance?

The output Resistance Ro is the resistance measured between the output terminal

of the op-amp and the ground. The Output Resistance for the IC 741C op-amp is 75ohms.

18. What is Transient Response?

The rise time and overshoot are the two characteristics of the transient response

of any circuit. These parameter are of importance whenever selecting an op-amp for ac

applications. The transient response test circuit is included in the data sheet for IC741C,

Rise time is 0.3us and overshoot is 5%.

19. Explain the method for increasing the input resistance of an Op-Amp?

1.One of the method to obtain the higher values of Input Resistance is by using

Darlington Pair in the place of transistors.

2. Another method to increase the Input Resistance is to fabricate a FET

differential pair as the input stage with the rest of the stages made by BJT. The Input

Resistance of the order of 1012

ohms is possible with such JFET inputs.


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20.what are the applications of comparator?

1. Zero crossing detector

2. Window detector

3. Time marker generator

4. Phase meter


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UNIT-II (2 marks)

1.Define duty cycle?

The ratio of high output period and low output period is given by mathematical

parameter called duty cycle. It is defined as the ratio of ON time(high output) to the total

time of one cycle.

W= time for output is high

T= time for one cycle

D= duty cycle=W/T

%D=W/T*100

2. Explain the principle of free running multivibrator with its relations?

Astable multivibrator is also called as free runnig multivibrator. The principle of

generation of square wave output is to force an op-amp to operate in the saturation

region.

T1=RC ln (1+/1-)

T= 2T1

If R1=R2 then

T= 2RC

F0=1/2RC

3.Why bistable is not possible in 555 timer? Explain

A negative pulse to pin 2 turns the output positive A negative pulse to pin 4 turns the output negative The timer is stable in each of these sates. Its run time has become infinite

4.What is the time constant for the design of monostable multivibrator?

The time constant is given by

T= RC ln (1+ VD/ V sat)/ (1-)

If R1=R2 then


21/72

T= 0.69 RC

7. State the conditions of RS flipflop with a neat table?

Qn Qn+1 R S

0 0 dont care 0

0 1 0 1

1 0 1 0

1 0 0 dont care

When S=1 & R=0, set condition

When S=0 & R=1, reset condition


8. What is the capacitor connected to pin number 5 of 555 timer?

If the control voltage function is not used a 0.001 F capacitor should be

connected between pin 5 & ground.

This will filter any electrical noise from entering pin 5

9. What are the possible modes of operation for 555 timer?

Astable Monostable

10. Does 555 timer is compatible for TTL. CMOS, RTL, IIL and other logic families

The 555 timer can be used with supply voltage in the range of +5 V to +18 V and

can drive load upto 200 mA. It is compatible with both TTL and CMOS logic circuits.


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11. Explain the function of reset terminal of 555 in Monostable and Astable modes

Monostable mode:

If a negative going reset pulse is applied to the reset terminal (pin-4) during the

timing cycle, transistor Q2. Q1 becomes on and the external timing capacitor is immediately

discharged.

Astable mode:

The reset terminal of IC-timer(pin 4) should be tied to Vcc in the normal

circumstances. More precisely voltage at pin 4 should be greater then 0.8v. A voltage less

than that resets the output. Whether you have connected the timer in the monoshot or

astable mode of operation the output goes low the moment you being the reset terminal

below 0.8v.

12. What is VCO?

A voltage controlled oscillator(VCO) is an oscillator circuit in which the frequency

of oscillations can be controlled by an externally applied voltage. The VCO provides the

linear relationship between the applied voltage and the oscillation frequency.

13. What is capture range and lock in range?

Capture range:

The range of frequencies over which the PLL can acquire lock with an input signal is

called the capture range. This parameter is expressed as percentage of f0

Lock in range:

The range of frequencies over which the PLL can maintain lock with the incoming signal is

called lock in range. The lock range is expressed as a percentage of f0, the VCO frequency

14. Define pull in time?

The total time taken by the PLL to establish lock is called pull in time. This depends

on the initial phase and frequency difference between the 2 signals as well as on the

overall loop gain and loop characteristics


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15. Define voltage to frequency conversion factor?

The voltage to frequency conversion factor is determined by Kv= f0/Vc

Where Vc is the change in modulating signal required to produce a corresponding shift,

fo in frequency

16. State few applications of PLL

Frequency multiplier

Frequency translation

AM detection FM demodulation Frequency shift keying demodulator

17. what are the two standard frequencies used for FSK flipflop?

1070 hz & 1270 hz

18.Write the basic equation for D/A conversion

The basic aquatio for D/A conversion

V0 = KVFS (d1 2-1

+ d2 2-2

++ dn 2-n

)

V0 = output voltage

VFS = full scale output voltage

K = scaling factor usually adjustable to unity

D1,d2.dn= n bit binaray fractional word with decimal point located at the shift.

19.What are the various D/A conversions?

Weighted resistor DAC


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Inverted R-2R ladder

Multiplier DACs

Monolithic DACs

20.What are the various A/D conversions?

Direct type ADCs:

Parallel comparator A/D converter Counter type A/D converter Servo tracking A/D converter Successive approximation converter

Indirect type ADCs:

Charge balancing ADC

Dual slope ADC

21. Define resolution, linearity, accuracy, stability:

Resolution:

The resolution of a converter is the smallest change in voltage which may be produced at

the output of the converter

Resolution ( in volts)= VFS/2n-1

Linearity:

Linearity of an A/D or D/A converter shows us how close the converter output is to its

ideal transfer characteristics

In actual DAC equal increment in the digital input should produce equal increment in the

analog output and the transfer curve should be linear and the transfer curve should be

linear

The static performance of a DAC is determined by fitting a straight line through the

measured output points.


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Accuracy:

Absolute accuracy is the maximum deviation between the actual converter output and the

ideal converter output. Relative accuracy is the maximum deviation after gain and offset

errors have been removed.

Stability:

The performance of converter changes with temperature, age and power supply

variations. So all the relevant parameters such as offset, gain, linearity error and

monotonicity must be specified over the full temperature and power supply ranges.

22. Give examples for A/D conversion ICs:

AD 7520/AD 7530 10 bit binary multiplying type

AD 7521/Ad 7531 12 bit binary multiplying type

ADC 0800/0801/0802 8 bit ADC

23. Give examples for D/A conversion ICs:

DAC 0800/0801/0802 8 bit DAC

DAC 0830/0831/0832 microprocessor compatible 8 bit DAC

DAC 1200/1201 12 bit DAC

DAC 1208/1209/1210 12 bit micrpprocessor compatible DAC


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UNIT III

1. Compare MOORE and MEALY machines.

Moore Machine Mealy Machine

i)The output is a function of present state

only.

ii)Input changes does not affect the output.

iii)It requires more number of states for

implementing same function.


as well as present input.

ii)Input changes may affect the output of

the circuit.

iii)It requires less number of states for


2. Compare synchronous and asynchronous sequential circuits.

Synchronous Circuits Asynchronous Circuits

i)In this type of of circuits all are clocked flip

flops.

ii)The change in input signal can affect

memory element upon activation of clock.

iii)Easier to design.

iv)The maximum operating speed of clock

depends on time delays involved.

i)In this type of circuits, memory elements

are either unclocked flip flops or time delay

elements.


memory element at any instant of time.

iii)More difficult to design.

iv)Because of absence of clock, these can

operate faster than synchronous circuits .

3. What is Static Hazard? Explain it.

Static hazard is a condition which results in a single momentary incorrect output dueto change in a single input variable when the output is expected to remain in same state.There are two types i) Static `0`Hazard: When output is to remain at value 0 and momentary 1 output is possible during thetransition between the two input states then its called as static 0 hazard.

ii) Static `1` Hazard: When output is to remain at value 1 and momentary 0 output ispossible during the transition between the two input states then its called as static 1 hazard.

4.What is Dynamic Hazard?Explain it.


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A Dynamic hazard is defined as a transient change occurring 3 or more times at anoutput terminal of a logic network. When the output is supposed to change only onceduring a transition between two input states differing in the value of one variable.

5.What is Essential Hazard?

Essential hazard is a type of hazard that exists only in asynchronous sequentialcircuits with two or more feedbacks. An essential hazard is caused by unequal delays alongtwo or more paths that originates from the same input. An excessive delay through aninverter circuit in comparison to the delay associated with the feedback path may causeessential hazard.

6. What is Glitch? Give its examples.Glitch is an undesired transition that occurs before the signal settles to its

intended value. In other words, glitch is an electrical pulse of short duration that is usuallythe result of a fault or design error, particularly in adigital circuit.

There are two types i) `0` Glitch:When output is to remain at value 0 and momentary 1 output is possible during thetransition between the two input states then its called as 0 glitch.

ii)`1` Glitch: When output is to remain at value 1 and momentary 0 output ispossible during the transition between the two input states then its called as 1 glitch.

7. What are hazards in digital circuits? Explain it with examples.

Hazards is an unwanted transient i.e. spike or glitch that occurs due to unequal pathor unequal propagation delays through a combinational circuits.

Example: When output is to remain at value 0 and momentary 1 output ispossible during the transition between the two input states then its called as 0 hazard.

8. What is State Reduction? Why we go for State Reduction?

The state reduction technique basically avoids the introduction of redundant states. Thereduction in redundant states reduce the number of flip flops and logic gates, reducingthe cost of final circuit. The two states are said to be redundant or equivalent, if everypossible set of inputs generate exactly same output and same next. When two states areequivalent, one of them can be removed without altering the input output relationship.

9.Compare Ring and Johnson Counters.

Ring Counter Johnson Counter

i) A ring counter connects the output of the

last shift register to the first shift register

input and circulates a single one (or zero)

bit around the ring.

ii)Its also known as Overbeck counter .

iii) For example, in a 4-register counter,

i) A Johnson counter connects the

complement of the output of the last shift

register to its input and circulates a stream

of ones followed by zeros around the ring.

ii)Its also known as twisted ring counter

or Moebius counter


with initial register values of 0000, the

repeating pattern is: 0000, 1000, 1100,
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0001, 1000... .

1110, 1111, 0111, 0011, 0001, 0000

.

10.What is Racing condition?Race condition is defined as a

condition when a device's output depends on two [or more] nearly simultaneous eventsto occur at the input(s) of a device and cause the device's output to switch. Which inputoccurred first causes the device to change, the arrival of the other input may cause theoutput to switch back or simply be ignored.11.Write the excitation equations of basic flip flops. JK flipflop: Qnext=JQ+KQ D flip flop :Qnext=Din12.Write MOORE and MEALY equations.


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UNIT IV

1. What are hazards in digital circuits? Explain it with examples?

The unwanted switching transients that may appear at the output of a circuit are called

Hazards.

The main cause of hazards is the different propagation delays at different paths.

Hazards occur in combinational circuits may cause temporary false output. When

such circuits are used in asynchronous sequential circuits , they may result in wrong

state table.

Types:

1. Static -1 hazardIf the output goes momentarily 0 when it should remain a 1,

known as static-1 hazard.2. Static -0 hazardIf the output goes momentarily 1 when it should remain a 0,

known as static-0 hazard.

3. Dynamic hazard Output changes three or more times when it should change

from 1 to 0 or from 0 to 1.

2. Define RTL? Give an example for RTL.

To describe a digital system in terms of functions such as adders, decoders and

registers, it is necessary to employ a higher level mathematical notation. The

register transfer logic method fulfills this requirement. EX: Data transfer between

two registers using multiplexer.

3. Compare bus transfer logic with multiplexed bus transfer logic?

A group of wires through binary information is transferred one at a time among

registers is called a bus. For parallel transfer, the number of lines in bus is equal to

the number of bits in the registers. Buses are used to transfer data from memory to

processor or vice versa.

In microprocessor, multiplexed bus transfer logic which transfers address by

enabling the ALE signal and data over the common bus.


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4. What are the advantages of PLA control logic?

1. Using PLA for the combinational circuit, it is possible to reduce the number of

ICs and the number interconnection wires.

2. It is an LSI device which can implement any complex combinational circuit.

3. It is similar to sequence register and decoder.

5. What are the advantages of microprocessor control logic?

1. The purpose of micro program control unit is to initiate a series of sequential

steps of micro operations.

2. Use of micro program involves placing all the control variables in words of the

ROM for use by the control unit through successive read operations

.

6. Design a 2 Bit ALU unit?


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9.What is microoperation?

The operations performed on the data stored in registers are

called microoperations.A microoperation is an elementary operation that can be

performed in parallel during one clock pulse period.The result of the operation

may replace the previous binary information of a register or may be transferred to

another register.

10.What Is hardwired control unit ?

The hardwired control unit is implemented using SSI and MSI

technology.The speed of hardwired control unit is high.For modification, the entire

circuit must be rewired.

11.What is microprogram control unit ?

The microprogram control unit is implemented using LSI

technology such as PLA. The speed of microprogram control unit is low. It can be

easily modified by changing the content of the memory.


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12.State the function of Processor and Control unit ?

FUNCTION OF PROCESSOR UNIT:

The processor unit performs arithmetic and other

data-processing tasks as specified by the program.

FUNCTION OF CONTROL UNIT:

The control unit supervises the flow of

information between the various units.The control unit retrieves the instructions,

one by one , from the program which is stored in memory .For each instruction, the

control unit informs the processor to execute the operation specified by the

instruction.

UNIT-I -2Marks

1. What is the op-amp? Why it is called so?

An operational amplifier is a DC-coupled high-gain electronic voltage amplifier with

a differential input and, usually, a single-ended output. An op-amp produces an output

voltage that is typically hundreds of thousands times larger than the voltage difference

between its input terminals.

An operational amplifier can perform all arithmetic operations like addition ,

subtraction, log, antilog, differentiation, integration etc. hence it is called so.

2. What are the different linear IC packages?

There are three popular packages available

4. The metal can(TO) packages

5. The dual-in-line packages(DIP)6. The flat package of flat pack

Op-amp packages may contain single, two (dual) or four (quad) op-amps. Typical

packages have 8 terminals, 10 terminals and 14 terminals.


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3. What are the basic terminals of the OP-AMP?

There OP-AMP has five basic terminals .They are

Two input terminalsInverting(Pins 2 )

Non Inverting Terminal(Pin 3)

One output terminal (Pin 6)

Two Power Supply Terminals(Pins 4 for +Vcc and 7 forVee)

4. What are the DC characteristics of an OP-AMP?

The non-ideal dc characteristics that add error components to the dc output

voltage are:

Input bias current

Input offset current

Input offset voltage

Thermal drift

5. What is input-bias current?

The average amount of current entering into the Inverting and the Non inverting

terminals of the op-amp is called Input bias current. Its value is 500nA for IC741A

The input-bias current(Ib) is given by

Ib=(Ib1+Ib2)/2

6.What is the input-offset current?



balanced. In order to rectify this we apply the input offset current.


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The algebraic difference between the currents into the Inverting and the Non

inverting input terminals to make the output as zero is referred to as input offset current.

It is 200nA maximum for IC741C

7. What is the input-offset voltage?



balanced. In order to rectify this we apply the input offset voltage.

The voltage that is applied between the inverting and the Non-inverting terminals

of the OP-AMP to make the output as zero. Hence we nullify the output .So it is called as

Input Offset Voltage.

8. What is thermal drift?

The DC characteristics like the Bias current, Offset voltage change with

temperature. The change of the values of the DC characteristics with temperature is

called as Thermal Drift. Offset current Drift is expressed in nA/0C and offset voltage drift in

mV/0C.

This effect can be reduced by Using Proper printed circuit board layout and by

Forced air cooling.

9. What are the AC characteristics of an OP-AMP?

The AC characteristics of an OP-AMPs are

Frequency Response

Frequency Compensation

Slew Rate

Supply Voltage Rejection Ratio Large Signal Voltage Ratio

Gain Bandwidth Product

Transient Response

10. What is slew rate?


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It is defined as the maximum ratio of change of output Voltage per unit Time. It is

always expressed in terms of Volts per micro seconds. For example, a 1V/us slew rate

means that the output rises or falls by 1V in one micro seconds.

An ideal slew rate is infinite which means that op-amps output voltage should

change instantaneously in response to input step voltage.

11. What is input resistance and input capacitance in an OP-AMP?

Input Resistance:

It is defined as the resistance measured between any one of the input terminal to

ground by making the other input terminal already connected to the ground

Input Capacitance:

It is defined as the capacitance measured between any one of the input terminal to

ground by making the other input terminal already connected to the ground.


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12. What is the input voltage range for OP-AMP?

This voltage is the common mode voltage that can be applied to both input

terminals without disturbing the performance of the op-amp . For the 741C the range ofthe input common-mode voltage is (+or -) 13V. Common mode configuration is used only

for test purpose to determine the degree of matching between the inverting and the non

inverting terminals.

13. What is CMRR?

The relative sensitivity of an op-amp to a difference signal as compared to a

common mode signal is called as common mode rejection ratio(CMRR) and gives the

figure of merit p for the differential amplifier. So CMRR is given by:

And it is expressed in decibel (dB). For example the uA741 op-amp has a maximum

CMRR of 70 dB.

14. What is SVRR?

The change in an OP-AMPs input offset voltage due to variations in supply voltage

is called the supply voltage rejection ratio. Some manufactures use the terms like Power

Supply Rejection ratio(PSRR) or Power supply sensitivity(PSS). These terms are expressed

in microvolts per volts or in decibel For IC741c,SVRR-150uV/V. Lower the value of the

SVRR, better the op-amp.

15. What is large signal voltage gain?

An op-amp amplifies the difference voltages between the two input terminals and

therefore, its voltage gain is defined as, The ratio between the output voltage to the

differential input voltage


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Since the amplitude of the output signal is much larger than the input signal, the

voltage gain is referred as large signal voltage gain.

16. What is output voltage swing?

The output voltage swing indicates the value of positive and negative saturation

voltages of an op-amp and never exceeds the supply voltage. For IC741C, the output

voltage swing is guaranteed ti be between +13V and -13V for RL >2kohms.

17.What is Output Resistance?

The output Resistance Ro is the resistance measured between the output terminal

of the op-amp and the ground. The Output Resistance for the IC 741C op-amp is 75ohms.

18. What is Transient Response?

The rise time and overshoot are the two characteristics of the transient response

of any circuit. These parameter are of importance whenever selecting an op-amp for ac

applications. The transient response test circuit is included in the data sheet for IC741C,

Rise time is 0.3us and overshoot is 5%.

19. Explain the method for increasing the input resistance of an Op-Amp?

1.One of the method to obtain the higher values of Input Resistance is by using

Darlington Pair in the place of transistors.

2. Another method to increase the Input Resistance is to fabricate a FET

differential pair as the input stage with the rest of the stages made by BJT. The Input

Resistance of the order of 1012

ohms is possible with such JFET inputs.


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20.what are the applications of comparator?

5. Zero crossing detector

6. Window detector

7. Time marker generator

8. Phase meter


39/72

UNIT-II (2 marks)

1.Define duty cycle?

The ratio of high output period and low output period is given by mathematical

parameter called duty cycle. It is defined as the ratio of ON time(high output) to the total

time of one cycle.

W= time for output is high

T= time for one cycle

D= duty cycle=W/T

%D=W/T*100

2. Explain the principle of free running multivibrator with its relations?

Astable multivibrator is also called as free runnig multivibrator. The principle of

generation of square wave output is to force an op-amp to operate in the saturation

region.

T1=RC ln (1+/1-)

T= 2T1

If R1=R2 then

T= 2RC

F0=1/2RC

3.Why bistable is not possible in 555 timer? Explain

A negative pulse to pin 2 turns the output positive A negative pulse to pin 4 turns the output negative The timer is stable in each of these sates. Its run time has become infinite

4.What is the time constant for the design of monostable multivibrator?

The time constant is given by

T= RC ln (1+ VD/ V sat)/ (1-)

If R1=R2 then


40/72

T= 0.69 RC

7. State the conditions of RS flipflop with a neat table?

Qn Qn+1 R S

0 0 dont care 0

0 1 0 1

1 0 1 0

1 0 0 dont care


When S=0 & R=1, reset condition


8. What is the capacitor connected to pin number 5 of 555 timer?

If the control voltage function is not used a 0.001 F capacitor should be

connected between pin 5 & ground.

This will filter any electrical noise from entering pin 5

9. What are the possible modes of operation for 555 timer?

Astable Monostable

10. Does 555 timer is compatible for TTL. CMOS, RTL, IIL and other logic families

The 555 timer can be used with supply voltage in the range of +5 V to +18 V and

can drive load upto 200 mA. It is compatible with both TTL and CMOS logic circuits.


41/72

11. Explain the function of reset terminal of 555 in Monostable and Astable modes

Monostable mode:

If a negative going reset pulse is applied to the reset terminal (pin-4) during the

timing cycle, transistor Q2. Q1 becomes on and the external timing capacitor is immediately

discharged.

Astable mode:

The reset terminal of IC-timer(pin 4) should be tied to Vcc in the normal

circumstances. More precisely voltage at pin 4 should be greater then 0.8v. A voltage less

than that resets the output. Whether you have connected the timer in the monoshot or

astable mode of operation the output goes low the moment you being the reset terminal

below 0.8v.

12. What is VCO?

A voltage controlled oscillator(VCO) is an oscillator circuit in which the frequency

of oscillations can be controlled by an externally applied voltage. The VCO provides the

linear relationship between the applied voltage and the oscillation frequency.

13. What is capture range and lock in range?

Capture range:

The range of frequencies over which the PLL can acquire lock with an input signal is

called the capture range. This parameter is expressed as percentage of f0

Lock in range:

The range of frequencies over which the PLL can maintain lock with the incoming signal is

called lock in range. The lock range is expressed as a percentage of f0, the VCO frequency

14. Define pull in time?

The total time taken by the PLL to establish lock is called pull in time. This depends

on the initial phase and frequency difference between the 2 signals as well as on the

overall loop gain and loop characteristics


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15. Define voltage to frequency conversion factor?

The voltage to frequency conversion factor is determined by Kv= f0/Vc

Where Vc is the change in modulating signal required to produce a corresponding shift,

fo in frequency

16. State few applications of PLL

Frequency multiplier

Frequency translation

AM detection FM demodulation Frequency shift keying demodulator

17. what are the two standard frequencies used for FSK flipflop?

1070 hz & 1270 hz

18.Write the basic equation for D/A conversion

The basic aquatio for D/A conversion

V0 = KVFS (d1 2-1

+ d2 2-2

++ dn 2-n

)

V0 = output voltage

VFS = full scale output voltage

K = scaling factor usually adjustable to unity

D1,d2.dn= n bit binaray fractional word with decimal point located at the shift.

19.What are the various D/A conversions?

Weighted resistor DAC


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Inverted R-2R ladder

Multiplier DACs

Monolithic DACs

20.What are the various A/D conversions?

Direct type ADCs:

Parallel comparator A/D converter Counter type A/D converter Servo tracking A/D converter Successive approximation converter

Indirect type ADCs:

Charge balancing ADC

Dual slope ADC

21. Define resolution, linearity, accuracy, stability:

Resolution:

The resolution of a converter is the smallest change in voltage which may be produced at

the output of the converter

Resolution ( in volts)= VFS/2n-1

Linearity:

Linearity of an A/D or D/A converter shows us how close the converter output is to its

ideal transfer characteristics

In actual DAC equal increment in the digital input should produce equal increment in the

analog output and the transfer curve should be linear and the transfer curve should be

linear

The static performance of a DAC is determined by fitting a straight line through the

measured output points.


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Accuracy:

Absolute accuracy is the maximum deviation between the actual converter output and the

ideal converter output. Relative accuracy is the maximum deviation after gain and offset

errors have been removed.

Stability:

The performance of converter changes with temperature, age and power supply

variations. So all the relevant parameters such as offset, gain, linearity error and

monotonicity must be specified over the full temperature and power supply ranges.

22. Give examples for A/D conversion ICs:

AD 7520/AD 7530 10 bit binary multiplying type

AD 7521/Ad 7531 12 bit binary multiplying type

ADC 0800/0801/0802 8 bit ADC

23. Give examples for D/A conversion ICs:

DAC 0800/0801/0802 8 bit DAC

DAC 0830/0831/0832 microprocessor compatible 8 bit DAC

DAC 1200/1201 12 bit DAC

DAC 1208/1209/1210 12 bit micrpprocessor compatible DAC


45/72

UNIT III

4. Compare MOORE and MEALY machines.

Moore Machine Mealy Machine


only.

ii)Input changes does not affect the output.

iii)It requires more number of states for



as well as present input.

ii)Input changes may affect the output of

the circuit.

iii)It requires less number of states for


5. Compare synchronous and asynchronous sequential circuits.

Synchronous Circuits Asynchronous Circuits

i)In this type of of circuits all are clocked flip

flops.


memory element upon activation of clock.

iii)Easier to design.

iv)The maximum operating speed of clock

depends on time delays involved.

i)In this type of circuits, memory elements

are either unclocked flip flops or time delay

elements.


memory element at any instant of time.

iii)More difficult to design.

iv)Because of absence of clock, these can

operate faster than synchronous circuits .

6. What is Static Hazard? Explain it.

Static hazard is a condition which results in a single momentary incorrect output dueto change in a single input variable when the output is expected to remain in same state.There are two types i) Static `0`Hazard: When output is to remain at value 0 and momentary 1 output is possible during thetransition between the two input states then its called as static 0 hazard.

ii) Static `1` Hazard: When output is to remain at value 1 and momentary 0 output ispossible during the transition between the two input states then its called as static 1 hazard.

4.What is Dynamic Hazard?Explain it.


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A Dynamic hazard is defined as a transient change occurring 3 or more times at anoutput terminal of a logic network. When the output is supposed to change only onceduring a transition between two input states differing in the value of one variable.

5.What is Essential Hazard?

Essential hazard is a type of hazard that exists only in asynchronous sequentialcircuits with two or more feedbacks. An essential hazard is caused by unequal delays alongtwo or more paths that originates from the same input. An excessive delay through aninverter circuit in comparison to the delay associated with the feedback path may causeessential hazard.

6. What is Glitch? Give its examples.Glitch is an undesired transition that occurs before the signal settles to its

intended value. In other words, glitch is an electrical pulse of short duration that is usuallythe result of a fault or design error, particularly in adigital circuit.

There are two types i) `0` Glitch:When output is to remain at value 0 and momentary 1 output is possible during thetransition between the two input states then its called as 0 glitch.

ii)`1` Glitch: When output is to remain at value 1 and momentary 0 output ispossible during the transition between the two input states then its called as 1 glitch.

7. What are hazards in digital circuits? Explain it with examples.

Hazards is an unwanted transient i.e. spike or glitch that occurs due to unequal pathor unequal propagation delays through a combinational circuits.

Example: When output is to remain at value 0 and momentary 1 output ispossible during the transition between the two input states then its called as 0 hazard.

8. What is State Reduction? Why we go for State Reduction?

The state reduction technique basically avoids the introduction of redundant states. Thereduction in redundant states reduce the number of flip flops and logic gates, reducingthe cost of final circuit. The two states are said to be redundant or equivalent, if everypossible set of inputs generate exactly same output and same next. When two states areequivalent, one of them can be removed without altering the input output relationship.

9.Compare Ring and Johnson Counters.

Ring Counter Johnson Counter

i) A ring counter connects the output of the

last shift register to the first shift register

input and circulates a single one (or zero)

bit around the ring.

ii)Its also known as Overbeck counter .


i) A Johnson counter connects the

complement of the output of the last shift

register to its input and circulates a stream

of ones followed by zeros around the ring.

ii)Its also known as twisted ring counter

or Moebius counter



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0001, 1000... .

1110, 1111, 0111, 0011, 0001, 0000

.

10.What is Racing condition?Race condition is defined as a

condition when a device's output depends on two [or more] nearly simultaneous eventsto occur at the input(s) of a device and cause the device's output to switch. Which inputoccurred first causes the device to change, the arrival of the other input may cause theoutput to switch back or simply be ignored.11.Write the excitation equations of basic flip flops. JK flipflop: Qnext=JQ+KQ D flip flop :Qnext=Din12.Write MOORE and MEALY equations.


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UNIT IV

5. What are hazards in digital circuits? Explain it with examples?

The unwanted switching transients that may appear at the output of a circuit are called

Hazards.

The main cause of hazards is the different propagation delays at different paths.

Hazards occur in combinational circuits may cause temporary false output. When

such circuits are used in asynchronous sequential circuits , they may result in wrong

state table.

Types:

4. Static -1 hazardIf the output goes momentarily 0 when it should remain a 1,

known as static-1 hazard.5. Static -0 hazardIf the output goes momentarily 1 when it should remain a 0,

known as static-0 hazard.

6. Dynamic hazard Output changes three or more times when it should change

from 1 to 0 or from 0 to 1.

6. Define RTL? Give an example for RTL.

To describe a digital system in terms of functions such as adders, decoders and

registers, it is necessary to employ a higher level mathematical notation. The

register transfer logic method fulfills this requirement. EX: Data transfer between

two registers using multiplexer.

7. Compare bus transfer logic with multiplexed bus transfer logic?

A group of wires through binary information is transferred one at a time among

registers is called a bus. For parallel transfer, the number of lines in bus is equal to

the number of bits in the registers. Buses are used to transfer data from memory to

processor or vice versa.

In microprocessor, multiplexed bus transfer logic which transfers address by

enabling the ALE signal and data over the common bus.


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8. What are the advantages of PLA control logic?

4. Using PLA for the combinational circuit, it is possible to reduce the number of

ICs and the number interconnection wires.

5. It is an LSI device which can implement any complex combinational circuit.

6. It is similar to sequence register and decoder.

5. What are the advantages of microprocessor control logic?

1. The purpose of micro program control unit is to initiate a series of sequential

steps of micro operations.

2. Use of micro program involves placing all the control variables in words of the

ROM for use by the control unit through successive read operations

.



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9.What is microoperation?

The operations performed on the data stored in registers are

called microoperations.A microoperation is an elementary operation that can be

performed in parallel during one clock pulse period.The result of the operation

may replace the previous binary information of a register or may be transferred to

another register.

10.What Is hardwired control unit ?

The hardwired control unit is implemented using SSI and MSI

technology.The speed of hardwired control unit is high.For modification, the entire

circuit must be rewired.

11.What is microprogram control unit ?

The microprogram control unit is implemented using LSI

technology such as PLA. The speed of microprogram control unit is low. It can be

easily modified by changing the content of the memory.


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12.State the function of Processor and Control unit ?

FUNCTION OF PROCESSOR UNIT:

The processor unit performs arithmetic and other

data-processing tasks as specified by the program.

FUNCTION OF CONTROL UNIT:

The control unit supervises the flow of

information between the various units.The control unit retrieves the instructions,

one by one , from the program which is stored in memory .For each instruction, the

control unit informs the processor to execute the operation specified by the

instruction.


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2 MARK QUESTIONS & ANSWERS

1.What are four generations of Integration Circuits?SSI (Small Scale Integration)MSI (Medium Scale Integration)LSI (Large Scale Integration)VLSI (Very Large Scale Integration)

2.Give the advantages of IC?Size is lessHigh SpeedLess Power Dissipation

3.Give the variety of Integrated Circuits?More Specialized CircuitsApplication Specific Integrated Circuits(ASICs)Systems-On-Chips

4.Give the basic process for IC fabrication

Silicon wafer PreparationEpitaxial GrowthOxidationPhotolithographyDiffusionIon ImplantationIsolation techniqueMetallization

Assembly processing & Packaging

5.What are the various Silicon wafer Preparation?Crystal growth & dopingIngot trimming & grindingIngot slicingWafer polishing & etchingWafer cleaning.

6.Different types of oxidation?Dry & Wet Oxidation

7.What is the transistors CMOS technology provides?n-type transistors & p-type transistors.

8.What are the different layers in MOS transistors?

Drain , Source & Gate


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9.What is Enhancement mode transistor?The device that is normally cut-off with zero gate bias.

10. What is Depletion mode Device?The Device that conduct with zero gate bias.

11.When the channel is said to be pinchedoff?If a large Vds is applied this voltage with deplete the Inversion layer .This Voltageeffectively pinches off the channel near the drain.

12.Give the different types of CMOS process?p-well processn-well processSilicon-On-Insulator ProcessTwin- tub Process

13.What are the steps involved in twin-tub process?Tub FormationThin-oxide ConstructionSource & Drain ImplantationContact cut definitionMetallization.

14.What are the advantages of Silicon-on-Insulator process?No Latch-upDue to absence of bulks transistor structures are denser than bulk silicon.

15.What is BiCMOS Technology?It is the combination of Bipolar technology & CMOS technology.

16.What are the basic processing steps involved in BiCMOS process?Additional masks defining P base region

N Collector areaBuried Sub collector (SCCD)Processing steps in CMOS process

17.What are the advantages of CMOS process?Low power DissipationHigh Packing densityBi directional capability

18.What are the advantages of CMOS process?

Low Input ImpedanceLow delay Sensitivity to load.


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19.What is the fundamental goal in Device modeling?To obtain the functional relationship among the terminal electrical variables of the

device that is to be modeled.

20.Define Short Channel devices?

Transistors with Channel length less than 3- 5 microns are termed as Short channeldevices. With short channel devices the ratio between the lateral & vertical dimensionsare reduced.

21.What is pull down device?A device connected so as to pull the output voltage to the lower supply voltage usually

0V is called pull down device.

22.What is pull up device?A device connected so as to pull the output voltage to the upper supply voltage usually

VDD is called pull up device.

23. Why NMOS technology is preferred more than PMOS technology?N- channel transistors has greater switching speed when compared tp PMOS transistors.

24. What are the different operating regions foe an MOS transistor?

Cutoff regionNon- Saturated RegionSaturated Region

25. What are the different MOS layers?

n-diffusionp-diffusionPolysiliconMetal

26.What is Stick Diagram?It is used to convey information through the use of color code. Also it is the cartoon of

a chip layout.

27.What are the uses of Stick diagram?

It can be drawn much easier and faster than a complex layout.These are especially important tools for layout built from large cells.

28.Give the various color coding used in stick diagram?

Greenn-diffusionRed- polysiliconBlue metal


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Yellow- implantBlack-contact areas.

29. Compare between CMOS and bipolar technologies.

CMOS Technology Bipolar technology Low static power dissipation

High input impedance (low drivecurrent)

Scalable threshold voltage

High noise margin

High packing density

High delay sensitivity to load (fan-out limitations)

Low output drive current

Low gm (gm Vin)

Bidirectional capability

A near ideal switching device

High power dissipation

Low input impedance (high drivecurrent)

Low voltage swing logic

Low packing density

Low delay sensitivity to load

High output drive current

High gm (gm eVin)

High ft at low current Essentially unidirectional

30.Define Threshold voltage in CMOS?

The Threshold voltage, VT for a MOS transistor can be defined as the voltage

applied between the gate and the source of the MOS transistor below which the drain

to source current, IDS effectively drops to zero.

31.What is Body effect?

The threshold volatge VT is not a constant w. r. to the voltage difference between the

substrate and the source of MOS transistor. This effect is called substrate-bias effect or

body effect.

32.What is Channel-length modulation?The current between drain and source terminals is constant and independent of theapplied voltage over the terminals. This is not entirely correct. The effective length of theconductive channel is actually modulated by the applied VDS, increasing VDS causes the

depletion region at the drain junction to grow, reducing the length of the effectivechannel.33. What is Latchup?

Latch up is a condition in which the parasitic components give rise to the establishment

of low resistance conducting paths between VDD and VSS with disastrous results.

Careful control during fabrication is necessary to avoid this problem.


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34. Give the basic inverter circuit.

35. Give the CMOS inverter DC transfer characteristics and operating regions

36.Define Rise time

Rise time, r is the time taken for a waveform to rise from 10% to 90% of its steady-state

value.

37. Define Fall time

Fall time, f is the time taken for a waveform to fall from 90% to 10% of its steady-state

value.


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38. Define Delay time

Delay time, d is the time difference between input transition (50%) and the 50%

output level. This is the time taken for a logic transition to pass from input to output.

39. What are two components of Power dissipation.

There are two components that establish the amount of power dissipated in a

CMOS circuit. These are:

i) Static dissipation due to leakage current or other current drawncontinuously from the power supply.

ii) Dynamic dissipation due to- Switching transient current- Charging and discharging of load capacitances.

40. Give some of the important CAD tools.Some of the important CAD tools are:

i) Layout editorsii) Design Rule checkers (DRC)

iii) Circuit extraction

41.What is Verilog?

Verilog is a general purpose hardware descriptor language. It is similar in syntaxto the C programming language. It can be used to model a digital system at manylevels of abstraction ranging from the algorithmic level to the switch level.

42. What are the various modeling used in Verilog?

1. Gate-level modeling2. Data-flow modeling3. Switch-level modeling4. Behavioral modeling

43. What is the structural gate-level modeling?

Structural modeling describes a digital logic networks in terms of the componentsthat make up the system. Gate-level modeling is based on using primitive logic

gates and specifying how they are wired together.

44.What is Switch-level modeling?

Verilog allows switch-level modeling that is based on the behavior of MOSFETs.Digital circuits at the MOS-transistor level are described using the MOSFETswitches.


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45. What are identifiers?

Identifiers are names of modules, variables and other objects that we canreference in the design. Identifiers consists of upper and lower case letters, digits0 through 9, the underscore character(_) and the dollar sign($). It must be a single

group of characters.

Examples:A014, a ,b, in_o, s_out

46. What are the value sets in Verilog?

Verilog supports four levels for the values needed to describe hardware referred toas value sets.

Value levels Condition in hardware circuits

0 Logic zero, false condition1 Logic one, true conditionX Unknown logic valueZ High impedance, floating state

47. What are the types of gate arrays in ASIC?

1) Channeled gate arrays2) Channel less gate arrays

3) Structured gate arrays

48. Give the classifications of timing control?

Methods of timing control:1. Delay-based timing control2. Event-based timing control3. Level-sensitive timing control

Types of delay-based timing control:

1. Regular delay control2. Intra-assignment delay control3. Zero delay control

Types of event-based timing control:1. Regular event control2. Named event control3. Event OR control


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4. Level-sensitive timing control

49 Give the different arithmetic operators?

Operator symbol* Operation performedMultiply Number of operandsTwo

/ Divide T+ Add Two- Subtract Two% Modulus Two** Power (exponent) Two

50. Give the different bitwise operators.

Operator symbol~

Operation performedBitwise negation

Number of operandsOne

& Bitwise and Two| Bitwise or Two^ Bitwise xor Two

^~ or ~^ Bitwise xnor Two~& Bitwise nand Two~| Bitwise nor Two

51. What are gate primitives?

Verilog supports basic logic gates as predefined primitives. Primitive logicfunction keyword provide the basics for structural modeling at gate level. Theseprimitives are instantiated like modules except that they are predefined in verilogand do not need a module definition. The important operations are and, nand, or,xor, xnor, and buf(non-inverting drive buffer).

52. Give the two blocks in behavioral modeling.

1. An initial block executes once in the simulation and is used to set upinitial conditions and step-by-step data flow

2. An always block executes in a loop and repeats during the simulation.

53. What are the types of conditional statements?


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1. No else statementSyntax : if ( [expression] ) truestatement;

2. One else statementSyntax : if ( [expression] ) truestatement;

else false-statement;

3. Nested if-else-ifSyntax : if ( [expression1] ) true statement 1;else if ( [expression2] ) true-statement 2;else if ( [expression3] ) true-statement 3;else default-statement;

The [expression] is evaluated. If it is true (1 or a non-zero value) true-statement isexecuted. If it is false (zero) or ambiguous (x), the false-statement is executed.

54. Name the types of ports in Verilog

Types of port Keyword

Input port InputOutput port OutputBidirectional port inout

55. What are the types of procedural assignments?

1. Blocking assignment2. Non-blocking assignment

56. Give the different symbols for transmission gate.

57. Give the different types of ASIC.

1. Full custom ASICs


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2. Semi-custom ASICs

* standard cell based ASICs* gate-array based ASICs

3. Programmable ASICs

* Programmable Logic Device (PLD)* Field Programmable Gate Array (FPGA).

58. What is the full custom ASIC design?

In a full custom ASIC, an engineer designs some or all of the logic cells, circuits orlayout specifically for one ASIC. It makes sense to take this approach only if thereare no suitable existing cell libraries available that can be used for the entire design.

59. What is the standard cell-based ASIC design?

A cell-based ASIC (CBIC) USES PREDESIGNED LOGIC CELLS KNOWN ASSTANDARD CELLS. The standard cell areas also called fle4xible blocks in a CBICare built of rows of standard cells. The ASIC designer defines only the placement ofstandard cells and the interconnect in a CBIC. All the mask layers of a CBIC arecustomized and are unique to a particular customer.

60. Differentiate between channeled & channel less gate array.

Channeled Gate Array Channel less Gate Array

1. Only the interconnect is customi

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