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Chapter 1 2-0 Lumped-element model and distributed model 1.集總電路模型(lumped-circuit model): 兩端元件或三端元件 : R, L, and C 與元件結構與尺寸大小有關 2.天線 : 無法使用 lumped-circuit model 解釋 3.集總電路模型 :實際電路的最大電性尺寸比 /10還小, 可用此模型 4.下例: 說明集總電路模型的限制! A. Lumped element model shared by:www.cnantennas.com www.cnantennas.com

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Page 1: 2-0 Lumped-element model and distributed shared … · 2017-12-27 · 1. Electromagnetics for Engineering with applications by Clayton R. Paul 2. Field and waves electromagnetics

Chapter 1

2-0 Lumped-element model and distributed model

1.集總電路模型(lumped-circuit model): 兩端元件或三端元件 : R, L, and C 與元件結構與尺寸大小有關 2.天線 : 無法使用 lumped-circuit model 解釋

3.集總電路模型 :實際電路的最大電性尺寸比 /10還小,

可用此模型

4.下例: 說明集總電路模型的限制!

A. Lumped element model

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Page 2: 2-0 Lumped-element model and distributed shared … · 2017-12-27 · 1. Electromagnetics for Engineering with applications by Clayton R. Paul 2. Field and waves electromagnetics

Chapter 1

Figure 2-1a Illustration of the parasitic inductance and capacitance of the connection leads of a

lumped-circuit component such as a capacitor.

(a) The physical dimensions of the connection leads.

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Chapter 1

Figure 2-1b Illustration of the parasitic inductance and capacitance of the connection leads of a

lumped-circuit component such as a capacitor.

(b) Inductance of the connection leads.

(H) )ln( La

sL o

lead

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Chapter 1

Figure 2-1c Illustration of the parasitic inductance and capacitance of the connection leads of a

lumped-circuit component such as a capacitor.

(c) Capacitance of the connection leads.

(F) L

)ln(

a

sC o

lead

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Chapter 1

Figure 2-1d Illustration of the effect of

connection leads on the high-

frequency performance of a

capacitor. (a) Lumping the lead

capacitance and inductance.

(b) The frequency response of

the input impedance of the leads

showing that above the resonant

frequency, the lumped capacitor

appears to be an inductor!

C=1000pF

L=1.27cm

S=0.635cm

#20 AWG radius=0.406mm

14nH )ln( La

sL o

lead

pF 0.128L

)ln(

a

sC o

lead

MHz6.42MHz6.42 ffoThe capacitor appears to be an inductor!

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Page 6: 2-0 Lumped-element model and distributed shared … · 2017-12-27 · 1. Electromagnetics for Engineering with applications by Clayton R. Paul 2. Field and waves electromagnetics

Chapter 1

Figure 2-2 Illustration of the effect of element interconnection leads.

L

v

LT

v

LT

v

LT

v

LT

L

Question :

R

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Chapter 1

B. Lumped-element model and distributed model for digital problem

1.圖2-2 在集總電路模型下:電路元件只關注端點, 基本上假設金屬線的長度沒有影響 2.實際上:連接線有時間延遲(Time delay),長度L延遲 eq.自由空間中(Free space):傳播 1m 距離需3.3ns 1ns時間電磁波於自由空間可傳播 300mm: 300mm/1ns

1ns時間電磁波於PCB上大約可傳播 150mm: 150mm/1ns

(如下圖2.3)

3. 此時在頻率響應上來看時會造成相位差(相位延遲)

smvv

LT /103, 8

0

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Chapter 1

Figure 2-3 A printed circuit board (PCB) used in a laser printer illustrating the interconnection

lines.(雷射印機表的印刷電路板(PCB)所顯示出的相互連接線),

載板厚度 : 1.4 mils(35m), 線寬 : 5 mils(127 m),典型線長 : 18cm (1ns delay)

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Chapter 1

: 相位常數(Phase constant) : (radian/m)

= 2f : see Fig.2.2

= L (radian) : phase shift (相位移), L : 導線長度

= 2, : wave length (波長)

see Fig.2.4a

波的特性 : 觀察海洋中的波浪,波浪的波峯會移動, 但海水(介質)只是上下運動

追蹤固定點 : cos(固定值)(假設固定值=0°,t增加則z增加波向前)

, : 波的傳播速度

:波的相位移代表時間的延遲

( , ) cos( ) :i z t I wt z 電流波

)2

cos(),( zwtItzi

f

w

wff

2

211

))(cos())(cos()cos(),(v

ztwIz

wtwIzwtIzti

2

d

zt

v

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Chapter 1

Figure 2-4 Wave propagation. (a) Wave propagation in space and wavelength.

(b) Wave propagation as time progresses.

L

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Page 11: 2-0 Lumped-element model and distributed shared … · 2017-12-27 · 1. Electromagnetics for Engineering with applications by Clayton R. Paul 2. Field and waves electromagnetics

Chapter 1

a. L 代表電路或導線的長度 L = , =360。導線輸入與輸出同相 (electric length=360 。)

L = /2, =180。導線輸入與輸出反相

L = /10, =36。導線輸入與輸出相差36。

L = /20, =18。導線輸入與輸出相差18。

L = /100, =3.6。相位可忽略,導線效應就不重要了!

一般L < /10, =36。導線輸入與輸出相位就可忽略!

Ex. L=˙7.5mm, =30mm, L= /4,electrical length=90 。 )

Ex. L=˙7.5mm, =15mm, L= /2,electrical length=180 。 )

b. 電性尺寸(Electrical dimension): 以波長為衡量單位的幾何尺寸大小(Geometry dimension)

電性尺寸比幾何尺寸大小重要許多!

集總電路模型 :實際電路的最大電性尺寸比 /10還小,可用此模型

而波長與操作頻率有關!

c. 波長大小相對於頻率 : see Table 2.2

Table 2.3 : 不同頻率及對應波長和各種不同的應用 1. 手機,衛星與雷達 : GHz (尺寸在mm範圍集總電路才有效)

2. 數位電腦與嵌入式處理器的時脈 : GHz

(electrically small)

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Chapter 1

Table 2.2

Table 2.3

HzGHz 91011

cm30

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Chapter 1

4. 數位時脈頻率上升,類比操作頻率提高

→必須了解電磁定律與原理

a.圖2.5a/b :1v,1 MHz, 50%, rise/fall time 12.5ns

(偶次諧波存在) b.圖2.5c/d CPU clock : 600MHz, 3.3v, 50% duty cycle rise/fall time : 500ps →進入GHz的頻率範圍 c.第七個諧波(4.2GHz) 仍然可用lumped-circuit model : 電路尺寸必須小於 0.71cm d. 電路尺寸不能再小→用EM theory與Maxwell equation 求解

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Chapter 1

Figure 2-5 A spectrum analyzer for determining the frequency (spectral) content of a periodic

signal (reprinted from C.R. Paul, Introduction to Electromagnetic Compatibility, John

Wiley Interscience, 1992, p. 378, courtesy of Agilent Technologies © 2002).

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Chapter 1

Figure 2-6 a/b (p. 8) Digital clock signal. (a) In the

time domain. (b) In the

frequency domain (reprinted

from C.R. Paul, Introduction

to Electromagnetic

Compatibility, John Wiley

Interscience, 1992, p. 378,

courtesy of Agilent

Technologies © 2002).

1v,1 MHz, 50% duty cycle,

rise/fall time : 12.5ns

(偶次諧波存在)

1V

Digital clock signal.

tr=12.5ns : 上升時間或轉換時間

1 MHz 5 MHz

上升時間: rise time (或transition time) shared by:www.cnantennas.com

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Page 16: 2-0 Lumped-element model and distributed shared … · 2017-12-27 · 1. Electromagnetics for Engineering with applications by Clayton R. Paul 2. Field and waves electromagnetics

Chapter 1

Figure 2-3 c/d (p. 8) Digital clock signal. (a) In the

time domain. (b) In the

frequency domain (reprinted

from C.R. Paul, Introduction

to Electromagnetic

Compatibility, John Wiley

Interscience, 1992, p. 378,

courtesy of Agilent

Technologies © 2002).

600MHz 3GHz

3.3V

2.73V

0.135V

CPU clock:600MHz, 3.3v, 50% duty cycle rise/fall time: 0.5 ns →進入GHz的頻率範圍

第七個諧波(4.2GHz) 仍然要用lumped-circuit model 則

電路尺寸必須小於 0.71cm

tr=0.5 ns : 上升時間或轉換時間

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Chapter 1

Figure 2-7 (a) A transmission line illustrating propagating waves and reflections at the terminations.

(傳輸線用於說明在終端處傳輸的波和反射)

2.0.3 電磁學中傳輸線的工程應用 a.高速數位電路設計(Design of high-speed digital electronics)

Propagation delay(傳輸延遲) T=L / , =3108 m/s

))(cos()cos(),(),,(v

ztwAzwtAtzItzV

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Chapter 1

4.In digital circuit, conductors may be treated as transmission lines

if the propagation time is equal to or greater than transition times. (當訊號在數位電路中傳播時間大於或約等於上升時間時要考慮傳輸線效應)

5. Typical transition times for digital integrated circuits:

Devices family Transition Times

CMOS 5-20ns

TTL 1-10ns

ECL 0.5-3ns

GaAs 100-200ps

6. The propagation speed on a typical printed circuit board is

about 150 mm/ns.

(transition time 就是rise time)

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Chapter 1

You know: In digital circuit,

If the propagation time is equal to or greater than transition times, conductors may be treated as transmission lines

Suppose : the propagation speed on a typical printed circuit board is

about 150 mm/ns.

During the design of a new high speed computer using ECL circuits,

It became evident the printed-circuit backplane may have traces as

long as 750mm. Should the designers be concerned with transmission-

line effects? (The transition times of the ECL device is 0.5-3 ns)

Question1 :

Answer : Yes! 傳播時間是 5ns 但上升時間transition time 只有 3 ns!

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Chapter 1

Suppose : the propagation speed on a typical printed circuit board is

about 150 mm/ns.

During the design of a new high speed computer using High-Speed

COMS circuits, suppose the transition times of the CMOS device is

0.1 ns. How long for the printed-circuit transmission-line must concern

with transmission-line effects?

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Chapter 1

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Chapter 1

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Chapter 1

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Chapter 1

I

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Chapter 1

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Chapter 1

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Chapter 1

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Chapter 1

參考文獻 :

1. Electromagnetics for Engineering

with applications by Clayton R. Paul

2. Field and waves electromagnetics

by D. K. Cheng

3. High speed digital design

A handbook of black magic by Howard W. Johnson

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