Upload
asghar-farhadi
View
216
Download
0
Embed Size (px)
Citation preview
8/10/2019 10.1109-MWSCAS.2007.4488734-A Systematic System Level Design Methodology for Dual Band CMOS RF Receiv
1/410141-4244-1176-9/07/$25.002007 IEEE.
A Systematic System Level Design Methodology
for Dual Band CMOS RF Receivers
Mohamed El-Nozahi, Kamran Entesari, and Edgar Sanchez-SinencioElectrical and Computer Engineering Department
Texas A&M University
College Station, Tx, USA
Email: [email protected]
Abstract A systematic system-level design methodology fordual-band RF CMOS receiver is proposed. The methodologyhelps the designer to find the optimum set of specifications of thereceivers building blocks for minimizing the power consumption.Our analysis is based on analytical expressions for the inputreferred noise, input referred third order intercept point andgain as a function of the frequency for the various blocks. Thismethodology is applied to a dual-band receiver for the GSM (900MHz) and PCS (1900 MHz) standards. Simulations show that
having an LNA with a constant gain behavior reduces the powerconsumption by 75% compared to an LNA with a decreasinggain versus frequency.
I. INTRODUCTION
Dual-band radio frequency transceivers have played a criti-
cal role in wireless communications in the 900 MHz-10.3 GHz
range. With cellular and cordless phone standards operating at
900 MHz and 1.8 GHz, the Global Positioning system (GPS)
at 1.2 and 1.5 GHz, Bluetooth at 2.4 GHz, wireless local area
network (WLAN) at 2.4, 5.2 and 5.8 GHz bands, and ultra
wideband (UWB) at 3.1-10.3 GHz, it is desirable to combine
one or more bands in one mobile unit.
Several dual band architectures, which are based on ei-ther direct conversion or heterodyne architectures, have been
proposed in the literature [1][3]. The main focus during
the design of these systems is to achieve the highest level
of integration by the reuse of the building blocks for the
two bands. Receiver budget distribution along the various
building blocks, such as low noise amplifier (LNA) and RF
mixer, is a challenging problem for the system designer.
Recently, a system-level design methodology for a single-
band receiver to minimize the power consumption has been
proposed [4]. In the case of dual-band receivers, the budget
distribution for minimum power consumption still depends on
the experience of the designer. The main challenge in the
dual-band receiver system-level design is the change of theperformance specifications of the RF bandpass filter, LNA and
RF mixer (in terms of noise figure (NF) and input referred
intercept point (IIP3) and gain) at the two different frequency
bands. After the RF mixer, the two bands share the same
spectrum, and therefore both of them are treated equally. This
is demonstrated in Fig. 1 for the direct conversion receiver.
In this paper, a system-level design methodology for a dual
band receiver is presented. This methodology minimizes the
power consumptions by providing the optimum values of the
LNABPF
BPFLO1
LNABPF
LO2
ADCTo DSP
Band1
Band2
Two bands are propagating at the same frequencyTwo bands are propagating at different frequencies
Fig. 1. A dual-band direct conversion receiver
performance specifications. To the best of our knowledge,
this is the first paper which provides a systematic design
methodology for dual-band RF CMOS receivers. The paper
is organized as follows. In section II, analytical expressions
for the various performance specifications of the RF receiver
system level and circuits are presented. The optimum design
methodology for low power consumption is presented insection III, and the simulation results are shown in section
IV. Finally, section V concludes the results.
II. RF RECEIVER SYSTEM AND CIRCUIT
SPECIFICATIONS
The first step towards achieving the optimum system level
design methodology is to find closed form expressions for the
performance parameters (Gain,NF, andI IP3) of the various
building blocks and the overall RF receiver.
A. System level specifications
Overall system level specifications are usually calculated
from the bit error rate (BER) requirements specified in thestandard. The BER is then translated to the signal to noise
ratio (SNR), from which the NF and IIP3 are calculated.
Depending on the channel conditions, modulation scheme,
error correction, and channel coding the SNR at the output,
SNRo, of the receiver is determined from:
SNRo = Eb
No
R
NEB, (1)
where Eb is the energy per information bit, No is the noise
power spectral density, R is the bit rate in bps and NEB is
8/10/2019 10.1109-MWSCAS.2007.4488734-A Systematic System Level Design Methodology for Dual Band CMOS RF Receiv
2/41015
Vdd Vdd
Rs Lg1 Cg1 Lg3Rs Lg2
Lg1
Cg1Lg2 Cg2
RL
Ld
M2
M1
Ls
Cd1
Ld1
M2
M1
Ls
Vin Vin
Cg2 Cg3
Vb1 Vb1
Ld2 Cd2
Vb2
Vout Vout
(a) (b)
Fig. 2. (a) Common Source Concurrent LNA (b) wide band LNA
the noise-equivalent bandwidth. The SNRo in (1) represents
a lower limit for the receiver design, and usually an additional
margin that accounts for additional non-idealities such as
process variations, and phase noise of the synthesizer is added.
The overall noise figure, NFov, and third order input intercept
point, V2IIP3,ov, of the receiver are found from [4], [5]:
NFov = Pmds 10log(KTB) SNRo, (2)
V2IIP3,ov = 3Pmds NFov 10log(KTB)
2 , (3)
where Pmds is the minimum detectable signal, K is the
Boltzmann constant, T is the temperature in Kelvin, and B
is the channel bandwidth.
B. Building Blocks Performance Specifications
In this part of the section, analytical expressions of the
performance parameters for the various blocks are obtained.
Low Noise amplifier: Common source LNAs with induc-
tive source generation have been used for narrow band RF
front-ends frequently [5]. For the dual band systems, parallel
LNAs, a concurrent LNA or a wide band LNA, as shown in
Fig. 2, can be used [6]. Assuming perfect matching at the two
different bands, the input referred noise, input referred third
order intercept point, and gain of the LNA are [4]:
V2ni = 4KTgm1R2
s(o
T)2, (4)
V2IIP3 = 16
3
I
gm1R
2
s(o
T)2, (5)
A = RL
2Rs
T
o, (6)
where is a noise factor, o is the operating frequency, Tis the cut-off frequency of the transistor, I is the DC current,
is a parameter to account for mobility degradation, and Rsand RL are the source and load resistances, respectively.
Two important observations are concluded from the ana-
lytical expressions in equations (4) to (6). The first one is
the proportionality of the dynamic range, DR, to the biasing
current and hence the power consumption, P [4]:
DR=V2IIP3V2ni
= 4
3KTI=
P
Pc,LNA, (7)
where Pc,LNA is a proportionality coefficient that relates the
DR to the power consumption and is technology dependent.
It is important to mention that the DR is independent of the
operating frequency.
The second observation is the dependency of the LNAs
performance parameters on the operating frequency. For single
band receiver, this dependency is not a problem because the
receiver is designed at a specific frequency. However, for the
dual-band system, the gain of the LNA decreases and the NF
and IIP3 increase with the operating frequency. This is themain challenge for minimizing the power consumption.
RF Mixer:A single or double balanced mixer is commonly
used in RF receivers. For a double balanced Gilbert cell
mixer, the total input referred noise, input referred third order
intercept point, and gain are calculated from [7], [8]:
V2ni 22KT
gm1, (8)
V2IIP3 = 16
3
vsatL
(o+ 2vsatL)Vod
16
3
I
gm1, (9)
A = 2
gm1RL. (10)
wherevsat is the saturation voltage, o is the mobility, and
Vod is the overdrive voltage.Similar to the LNA, the dynamic range of the mixer depends
on the biasing current but with a different mixer power
coefficient, PC,mixer . As depicted in the set of equations
from (8) to (10), none of the parameters depends on the
frequency. However, internal nodes parasitic capacitances can
change this dependency when the operating frequency is very
high such as in millimeter wave applications. In this paper,
we neglect this dependency as we consider low giga-hertz
receivers. Howevever, similar analysis could be conducted if
the internal node parasitic capacitances are effective.
Second mixing and baseband stages: The remaining
blocks of the RF receiver could be a second mixing stage
followed by baseband processing. Sheng et al. proved that
baseband circuits also have a dynamic range that is propor-
tional to the power consumption [4], and the same postulate
is used through the rest of this paper.
C. Overall System level specifications
For a cascaded receiver, either it is a homodyne or hetero-dyne, the overall performance specifications are:
(N Fov() 1)KT=nXi=1
ai() , 1
V2IIP3,ov()=
nXi=1
bi(),
ai() =
81, bi() =
81.
(11)
wherei is the block index andn is the total number of blocks.
III. BUDGET DISTRIBUTION OF DUAL BAND
RECEIVER
In this section, the system level design methodology is
demonstrated. Two different cases are considered. In the first
one, the gain of the LNA is assumed to decrease with the
operating frequency as demonstrated by (6). In the second
one, an LNA with constant gain is assumed.
8/10/2019 10.1109-MWSCAS.2007.4488734-A Systematic System Level Design Methodology for Dual Band CMOS RF Receiv
3/41016
A. Conditions for Minimum Power Consumption
The overall power consumption, Pov,of the dual band RF
receiver is obtained by the summation of the power consump-
tion of each building block, hence:
Pov =
n
i=1
Pc,iDRi= constant. (12)
As indicated by equation (12), the power consumption inde-pendent on the operating frequency and therefore the overall
power consumption for the two bands is the same.
Similar analysis to [4] has been conducted to find the
optimum conditions for minimum power consumption. A
constraint optimization problem is solved using Lagrange
Multipliers, where the power consumption, defined in (12),
is the dependent variable to be minimized, the overall NFovand V2IIP3,ov are the constraints, and the input referred noise
voltage and input referred third order intercept point of each
building block are the independent variables. As a result, the
input referred noise voltage and IIP3 of each block are:
V2ni,i =
8>:
(NFov()1)KT
50 3Pc,i
Pnj=1
3Pc,j
ifi = 1
(NFov()1)KT50 3Pc,i
Pnj=1
3Pc,j
Qi1j=1 A
2j ifi >1
(13)
V2IIP3,i =
8>:
V2IIP3,ov()Pnj=1
3Pc,j
3Pc,i
ifi = 1
V2IIP3,ov()Pnj=1
3Pc,j
3Pc,i
Qi1j=1 A
2j ifi >1
(14)
Equations (13) and (14) show the conditions for the input
referred noise voltage and IIP3 of each building block forminimum power consumption. However, these equations do
not provide sufficient information about the values of the gain
of the blocks for minimum power consumption. For a single-
band receiver, gain is considered a degree of freedom [4]. Thisis not the case for a dual-band system, as shown below. To
emphasize the importance of gain, two cases are considered.
The first one considers an LNA with decreasing gain versus
frequency, and with a constant gain frequency response.
B. Case 1: Gain of LNA is decreasing with the frequency
This case assumes that the load resistance and power
consumption for the two bands are the same for the LNA. As
a result, the NF, IIP3 and gain of the LNA are frequencydependent as shown earlier in (4) to (6). Substituting these
equations in (11), the NFov and V2IIP3,ov are reduced to:
(NFov()
1)KT
50 = (V2ni,LNA(1) +V2
ni,MixerA2LNA
(1)
+V2ni,Filter
A2LNA (1)A2
mixer
+ )( 1
)2,(15)
1
V2IIP3,ov() = ( 1
V2IIP3,LNA(1)+
A2LNA (1)
V2IIP3,Mixer
+A2LNA (1)A
2
Mixer
V2IIP3,Filter
+ )(1
)2, (16)
where A(1) is the gain of the LNA at the first frequencyband. Equations (15) and (16) indicate that the lower frequency
band have better overall noise figure on the cost of worselinearity when compared to the higher band. Hence, during thebudget distribution, the required noise figure, defined in (4),should be monitored for the upper frequency band, whilethe non-linearity, defined in (5), should be considered forthe lower frequency band. The results show that the LNAwill be overdesigned with respect to the noise figure forthe lower frequency band, and with respect to the linearityrequirements for the upper frequency band. Hence, the overall
power consumption increases. The overall nosie figure, IIP3and power consumption at the two bands are:
N Fov(1) = 1 + (N Fov(2) 1)(1
2)2, (17)
N Fov(2) =Pmds 10log(KT B) SN Ro, (18)
V2IIP3,ov(1) = 3Pmds NFov 10log(KT B)
2 , (19)
V2IIP3,ov(2) = V2IIP3,ov(1)(
2
1)2, (20)
Pov = V2IIP3,ov(1)
(N Fov(2) 1)KT 50(nXj=1
3p
Pc,j)3(
2
1)2. (21)
The above result points out that the dynamic range of the
blocks is required to increase as the two frequency bandsare further apart. As a result, the total power consumption
increases. In the following part, it is shown that power
consumption may be decreased if the gain versus frequency
behavior of the LNA is kept constant.
C. Case 2: Constant Gain Response of the LNA
In this case, a constant gain of the LNA for the two bands
is considered. Constant gain can be achieved by adjusting the
value of RL, which does not change the blocks NF and
IIP3. Under the assumption of constant gain response of theLNA, equations (15) and (16) are modified to:
(NFov() 1)KT 50 = (V2ni,LNA(1)(
1 )2
+
V2ni,Mixer
A2LNA (1)
+V2ni,Filter
A2LNA
(1)A2
mixer
+ ), (22)
1
V2IIP3,ov() = ( 1
V2IIP3,LNA
(1)(1
)2 + A2LNA (1)
V2IIP3,Mixer
+A2LNA (1)A
2
Mixer
V2IIP3,Filter
+ ), (23)
For this case, the contribution of NF and IIP3 of theblocks that follow the LNA remains the same, and is frequency
independent. The constant gain case is the commonly used
case for the system-level design of the dual-band RF CMOS
receivers because it reduces the power consumption. For thiscase, equations (17), (20), and (21) are changed to:
NFov(1) = 1 + (NFov(2)1)
Pnj=1
3pPc,j
3pPc,1(
21
)2 +Pn
j=23pPc,j
, (24)
V2IIP3,ov(2) = V2IIP3,ov(1)
Pnj=1
3pPc,j
3pPc,1(
12
)2 +Pn
j=23pPc,j
, (25)
Pov =V2IIP3,ov(1)
(NFov(2)1)KT 50
(Pn
j=13pPc,j)4
3pPc,1(
12
)2 +Pn
j=23pPc,j
. (26)
8/10/2019 10.1109-MWSCAS.2007.4488734-A Systematic System Level Design Methodology for Dual Band CMOS RF Receiv
4/41017
TABLE I
POWER COEFFICIENTS OF THE VARIOUS BLOCKS OF THE RECEIVER
Pc,LNA Pc,Mixer Pc,Filter
5.6 1020 [W/Hz] 7.3 1018[W/Hz] 11.4 1018[W/Hz]
D. Design Methodology:The systematic system level design methodology for a dual
band receiver is summarized as follows:
Obtain the BER specifications from the wireless standard.
Determine the necessary SNRo from system level sim-
ulations using equation (1).
Determine the minimum NFov and V2
IIP3,ov that satis-
fies the SNRo using (2) and (3).
Depending on the gain versus frequency behavior, find the
requiredNFov and V2
IIP3,ov for the two bands. Lower
power consumption is achieved if an LNA with constant
gain response is used.
Find the budget of each building block to satisfy the BER
of the standard using (13) and(14).
IV. VERIFICATION OF THED ESIGN M ETHODOLOGY
Our system-level design methodology for dual-band re-
ceivers is investigated for the homodyne receiver, shown in
Fig. 1, for mobile communication standards. The first band is
considered as the GSM band at 900 MHz, while the higher
band is considered as PCS at 1900 MHz. In our analysis,
recent published receiver specifications with an NFov lower
than 4 dB, and an V2IIP3,ov higher than -12 dBm using 0.25m
CMOS technology is assumed. The sensitivity of the receiver
is -102 dBm, which means an overall gain of 100 to 107 dB
is required.Typical values for the power coefficient, for a 2.8 V supply,
of the receiver are assumed. These values are obtained by
making a search over the available designs using the 0.25m
technology node, and they are tabulated in Table I.
The proposed design methodology, defined in section III.D,
is applied for the two gain cases of the LNA to find the block
specification. Table II shows the block specifications of the
optimized dual-band receiver. As depicted, for the first case
(LNA with decreasing gain), the lower band has the worst
non-linearity, while the upper band has the worst noise figure.
For this case, the NFov is 1.26 dB for the lower frequency
band, while it is 4 dB for the upper band. For the V2IIP3,ov,
it is -12 dBm and -5 dBm for the lower and upper bands,respectively.
For the second case with constant gain, the NFov is 3
dB and 4 dB for the lower and upper bands, respectively.
The V2IIP3,ov, it is -12 dBm and -11.5 dBm for the lower
and upper bands, respectively. These results indicate that the
overall performance specifications for the receiver at the two
different bands is almost similar. It should be mentioned that
the first case is hard to realize, while it is possible to realize
the second case. Finaly, the ratio of the power consumption
TABLE II
BLOCK LEVEL SPECIFICATIONS FOR DUAL-BAND GSM/PCS RECEIVER
LNA Mixer Filter
NF IIP3 A NF IIP3 NF IIP3
[dB] [dBm] [dB] [dB] [dBm] [dB] [dBm]
Case 1 (1) 0.2 -3.4 16 8 8 20 19.3
Case 1 (2) 0.82 3 9.6 8 8 20 19.3
Case 2 (1) 0.6 -3.4 16 12.3 8 24.7 19.3
Case 2 (2) 2.12 3 16 12.3 8 24.7 19.3
between the two cases is:
Pov,case1
Pov,case2= (
2
1)2
3Pc,1(
12
)2 +n
j=23Pc,j
nj=1
3Pc,j
= 3.98. (27)
The above expression indicates that more power is wasted
if the ratio (21
) is increased. Hence, having an LNA with
constant gain helps in reducing the overall power consumption
of the receiver, which is 75% in this case.V. CONCLUSION
In this paper, a systematic system level design method-
ology for a dual-band RF CMOS receiver was proposed.
The methodology considers the frequency dependency of the
performance specifications of the building blocks. Expressions
for the optimum values for the noise figure and input referred
third order intercept point and gain for each individual block
are obtained. Our analysis showed that the gain response of the
LNA affects the overall power consumption. This methodology
was applied to a dual-band receiver for the GSM and PCS
standards at 900MHz and 1900MHz, respectively. The results
showed that having an LNA with constant gain responsereduces the power consumption by 75% compared to an LNA
with a decreasing gain versus frequency.
REFERENCES
[1] S. Wu and B. Razavi, A 900-MHz/1.8-GHz CMOS receiver for dual-band applications, In IEEE Journal of Solid-State Circuits,vol. 33,pp. 2178-2185, December 1998.
[2] J. Ryynanen, K. Kivekas, J. Jussila, A. Parssinen, and K. A. I. Halonen, A dual-band RF front-end for WCDMA and GSM applications, In IEEEJournal of Solid-State Circuits,vol. 36, pp. 1198-1204, August 2001.
[3] E. Song, Y. Koo, Y.-J. Jung, D.-H. Lee, S. Chu, and S.-I. Chae, A0.25-m CMOS quad-band GSM RF transceiver using an efficient LOfrequency plan, InIEEE Journal of Solid-State Circuits,vol. 40, pp. 1094-1106, May 2005.
[4] W. Sheng, A. Emira, and E. Sanchez-Sinencio, CMOS RF receiver
system design: A systematic approach, In IEEE Transactions on Circuitsand Systems-I,vol. 53, pp. 1023-1034, May 2006.
[5] B. Razavi, RF Microelectronics. Upper Saddle River, NJ:Prentice-Hall,1998.
[6] A. Bevilacqua and A.M. Niknejad, An ultra-wideband CMOS LNA for3.1 to 10.6 GHz wireless receivers, InProceedings of IEEE InternationalSolid-State Conference,vol. 1, pp. 382-533, February 2004.
[7] H. Darabi and A.A. Abidi, Noise in RF-CMOS mixers: a simplephysical model, In IEEE Journal of Solid-State Circuits,vol. 35, pp. 15-25, January 2000.
[8] T. Soorapanth and T.H. Lee, RF linearity of short-channel MOSFETs,In Proceedings of1st international workshop on Design of mixed-modeintegrated circuits and applications, pp. 81-84, 1997.