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H d S ft Cd i Hardware-Software Codesign 1It d ti 1. Introduction Lothar Thiele 1 - 1 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory

1 Introduction

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Page 1: 1 Introduction

H d S ft C d iHardware-Software Codesign

1 I t d ti1. Introduction

Lothar Thiele

1 - 1Swiss FederalInstitute of Technology

Computer Engineeringand Networks Laboratory

Page 2: 1 Introduction

ContentsContentsWhat is an Embedded System ?

Levels of Abstraction in Electronic System Design

Typical Design Flow of Hardware-Software Systems

1 - 2Swiss FederalInstitute of Technology

Computer Engineeringand Networks Laboratory

Page 3: 1 Introduction

Embedded SystemsEmbedded systems (ES) = information processing

t b dd d i t l d t

Embedded Systems

systems embedded into a larger product

Examples:p

Main reason for buying is not information processing

1 - 3Swiss FederalInstitute of Technology

Computer Engineeringand Networks Laboratory

Page 4: 1 Introduction

Embedded SystemsEmbedded Systems

external processhuman interfacehuman interface

embedded system sensors, actuatorse bedded syste

1 - 4Swiss FederalInstitute of Technology

Computer Engineeringand Networks Laboratory

Page 5: 1 Introduction

Parallel and Distributed Target PlatformsParallel and Distributed Target Platforms

ACC

ABSESP

ASR

enginegcontrol powertrain

control

1 - 5Swiss FederalInstitute of Technology

Computer Engineeringand Networks Laboratory

Page 6: 1 Introduction

Example: Cell ProcessorExample: Cell ProcessorCell Processor (IBM) combines general-purpose architecture core with coprocessing elements which greatly accelerate multimedia

and vector processing applications as well as many otherand vector processing applications, as well as many other forms of dedicated computation.

1 - 6Swiss FederalInstitute of Technology

Computer Engineeringand Networks Laboratory

Page 7: 1 Introduction

Communicating Embedded SystemsCommunicating Embedded Systems sensor networks (civil engineering, buildings, environmental

monitoring, traffic, emergency situations)monitoring, traffic, emergency situations) smart products, wearable/ubiquitous computing

MICSMICSMICSMICS

1 - 7Swiss FederalInstitute of Technology

Computer Engineeringand Networks Laboratory

Page 8: 1 Introduction

Trends in Information and Communicatione ds o at o a d Co u cat o

Large-scaleDistributed Systems

CentralizedSystems

NetworkedSystems

New Applications andInternet

1 - 8Swiss FederalInstitute of Technology

Computer Engineeringand Networks Laboratory

System Paradigms

Page 9: 1 Introduction

ComparisonComparisonEmbedded Systems General Purpose Computing Few applications that are

known at design-time. Not programmable by end

Broad class of applications.

Programmable by end userNot programmable by end user.

Fixed run-time requirements ( dditi l ti

Programmable by end user.

Faster is better.(additional computing power not useful).

Criteria: Criteria:• cost• power consumption

Criteria:• cost• average speed

• predictability• meeting time bounds•

1 - 9Swiss FederalInstitute of Technology

Computer Engineeringand Networks Laboratory

• …

Page 10: 1 Introduction

Design ChallengesDesign ChallengesChallenges in the design of embedded systems increasing application complexity even in standard and large

volume products• large systems with legacy functions• large systems with legacy functions• mixture of event driven and data flow tasks • examples: multimedia, automotive, mobile communication p , ,

increasing target system complexity• mixture of different technologies, processor types, and design styles• large systems-on-a-chip combining components from different

sources, distributed system implementations numerous constraints and design objectives numerous constraints and design objectives

• examples: cost, power consumption, timing constraints, dependability

1 - 10Swiss FederalInstitute of Technology

Computer Engineeringand Networks Laboratory

Page 11: 1 Introduction

Implementation AlternativesImplementation Alternatives

General-purpose processors

Application-specific instruction set processors (ASIPs)

• MicrocontrollerPerformance

Power Efficiency Flexibility

Microcontroller• DSPs (digital signal processors)

Programmable hardware

• FPGA (field-programmable gate arrays)

Application-specific integrated circuits (ASICs)

1 - 11Swiss FederalInstitute of Technology

Computer Engineeringand Networks Laboratory

Page 12: 1 Introduction

ContentsContentsWhat is an Embedded System ?

Levels of Abstraction in Electronic System Design

Typical Design Flow of Hardware-Software Systems

1 - 12Swiss FederalInstitute of Technology

Computer Engineeringand Networks Laboratory

Page 13: 1 Introduction

Abstraction, Models and SynthesisAbstraction, Models and SynthesisModel

F l d i ti f l t d ti f t b t Formal description of selected properties of a system or subsystem A model consists of data and associated methods

Classification of modelsClassification of models Degree of abstraction, granularity

• hardwarre: system architecture logic transistor• hardwarre: system, architecture, logic, transistor, • software: module, block/class, function/method, ...

View• behavior, structural, physical

Synthesis Linking adjacent levels of abstraction (refinement) Stepwise adding of structural information

1 - 13Swiss FederalInstitute of Technology

Computer Engineeringand Networks Laboratory

Page 14: 1 Introduction

Levels of AbstractionsLevels of Abstractions

B h iBehavior

SystemArchitectureProcess/Module

Structure

RTLFunction SW HWGate level models Structure

Object Code

Gate-level modelsSwitch-level modelsCircuit-level modelsDevice-level models

1 - 14Swiss FederalInstitute of Technology

Computer Engineeringand Networks Laboratory

Device level modelsLayout models

Page 15: 1 Introduction

ContentsContentsWhat is an Embedded System ?

Levels of Abstraction in Electronic System Design

Typical Design Flow of Hardware-Software Systems

1 - 15Swiss FederalInstitute of Technology

Computer Engineeringand Networks Laboratory

Page 16: 1 Introduction

System DesignSystem DesignSpecification

System Synthesis Estimation

SW-Compilation HW-SynthesisInstruction Set

IntellectualProp. Block

IntellectualProp. Code

Machine Code Net lists

1 - 16Swiss FederalInstitute of Technology

Computer Engineeringand Networks Laboratory

Machine Code Net lists

Page 17: 1 Introduction

Fixed Processor ArchitectureFixed Processor ArchitectureSpecification

System Synthesis Estimation

SW-Compilation HW-SynthesisInstruction Set

IntellectualProp. Block

IntellectualProp. Code

Machine Code Net lists

1 - 17Swiss FederalInstitute of Technology

Computer Engineeringand Networks Laboratory

Machine Code Net lists

Page 18: 1 Introduction

Application Specific HW BlockApplication Specific HW BlockSpecification

System Synthesis Estimation

SW-Compilation HW-SynthesisInstruction Set

IntellectualProp. Block

IntellectualProp. Code

Machine Code Net lists

1 - 18Swiss FederalInstitute of Technology

Computer Engineeringand Networks Laboratory

Machine Code Net lists

Page 19: 1 Introduction

Application-Specific Instruction Set ProcessorApplication Specific Instruction Set ProcessorSpecification

System Synthesis Estimation

SW-Compilation HW-SynthesisInstruction Set

IntellectualProp. Block

IntellectualProp. Code

Machine Code Net lists

1 - 19Swiss FederalInstitute of Technology

Computer Engineeringand Networks Laboratory

Machine Code Net lists

Page 20: 1 Introduction

System-Level DesignSystem Level DesignSystem-level design is a complex synthesis tasks software synthesis and code generation hardware synthesis

f interface and communication synthesis hardware/software partitioning and component selection

h d / ft h d li hardware/software scheduling

Major Components:Major Components: application specification design space exploration and system optimizationdesign space exploration and system optimization estimation

1 - 20Swiss FederalInstitute of Technology

Computer Engineeringand Networks Laboratory

Page 21: 1 Introduction

The Mapping ProblemThe Mapping Problem

1 - 21Swiss FederalInstitute of Technology

Computer Engineeringand Networks Laboratory

Page 22: 1 Introduction

HW/SW Mapping and SchedulingHW/SW Mapping and SchedulingHardware/software mapping

P titi i f t f ti t bl t Partitioning of system function to programmable components (software), hard-wired or parameterized components (hardware) or application specific instruction set processors.pp p p

Similarity to scheduling and load distribution problem in real-time operating systems time constraints, context switch and context switch overhead,

process synchronization and communication Differences to real-time operating systems larger design space with very different solutions high optimization requirements (motivation for hardware design) underlying hardware is not fixed

1 - 22Swiss FederalInstitute of Technology

Computer Engineeringand Networks Laboratory

Page 23: 1 Introduction

HW/SW Mapping and SchedulingHW/SW Mapping and SchedulingSimilarity to allocation (or load distribution) problem in high-l l h i ( l i i )level synthesis (or real-time operating systems)

dedicatedHWcomponentsP2

P1

P3

P4

SWSW(processors)

1 - 23Swiss FederalInstitute of Technology

Computer Engineeringand Networks Laboratory

Page 24: 1 Introduction

EstimationEstimationThe principle of synthesis based on abstraction only makes sense if there are powerful estimation methods available:sense if there are powerful estimation methods available: Estimate properties of the next layer(s) of abstraction. Design decisions are based on these estimated properties: If Design decisions are based on these estimated properties: If

the estimation is not correct (or not accurate enough), the design will be sub-optimal or even not working correctly.

Design SpaceExploration

TimelineofD iEstimation of

highabstraction

Design

Design SpaceE l ti

Estimation oflower layerproperties ...

Exploration

D i S l

1 - 24Swiss FederalInstitute of Technology

Computer Engineeringand Networks Laboratory

Design SpaceExploration

lowabstraction


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