1 Découverte des Outils SI de Cadence − Ecole d’Electronique Numérique IN2P3 Roscoff 2006 −

DécouverteDécouverte des des OutilsOutils d’Analyse d’Analyse

d’Intégrité du Signal d’Intégrité du Signal

de Cadencede Cadence®®

Auto-formation de prise en main des outils Allegro PCB SI 610Auto-formation de prise en main des outils Allegro PCB SI 610

supportés au CERNsupportés au CERN

Jean-Michel SAINSON CERN IT Jean-Michel SAINSON CERN IT − − DES/ETSDES/ETS

Engineering Tools Services Engineering Tools Services

Janvier 2006Janvier 2006

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DescriptionDescription The purpose of these self learning hands-on is to try and ease the learning curve

needed to use Cadence Allegro SI tools. After a brief presentation of typical high-speed problems, a detailed step by step

method is presented to solve them, before or after printed circuit board layout. Real high-speed digital design issues such as long line characterization, technology

choice, clock-tree feasibility, backplane frequency upgrading will find a solution thanks to these tools’ functionalities.

Learning ObjectivesLearning Objectives Be able to use Cadence Allegro SI “Signal Integrity” tools to identify, and solve digital

high-speed design issues. All the Allegro SI tools currently supported at CERN; Model Integrity, Signal Explorer,

Allegro PCB SI 610 and Constraint Manager will be used pragmatically to find a solution before or after printed circuit board layout. A validation method to be confident with IBIS signal integrity analysis standard models, that could be a source of inaccuracy, is also systematically applied.

AgendaAgenda Hands_On1 → LVCMOS Long Lines Characterization Hands_On2 → Technology Choice for 80 MHz Point to Point Lines Hands_On3 → 120 MHz Differential Clock Distribution Feasibility Study Hands_On4 → Frequency Upgrading of an Existing Backplane

Découverte des Outils SI de CadenceDécouverte des Outils SI de Cadence®®

Découverte des Outils SI de Cadence® − Ecole d’Electronique Numérique IN2P3 Roscoff 2006 −

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SI_Hands_On_Ex1: SI_Hands_On_Ex1: LVCMOS Long Lines Characterization 1/3LVCMOS Long Lines Characterization 1/3

Découverte des Outils SI de Cadence® − Ecole d’Electronique Numérique IN2P3 Roscoff 2006 −

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SI_Hands_On_Ex1: SI_Hands_On_Ex1: LVCMOS Long Lines Characterization 2/3LVCMOS Long Lines Characterization 2/3

Découverte des Outils SI de Cadence® − Ecole d’Electronique Numérique IN2P3 Roscoff 2006 −

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SI_Hands_On_Ex1: SI_Hands_On_Ex1: LVCMOS Long Lines Characterization 3/3LVCMOS Long Lines Characterization 3/3

Découverte des Outils SI de Cadence® − Ecole d’Electronique Numérique IN2P3 Roscoff 2006 −

6 Découverte des Outils SI de Cadence® − Ecole d’Electronique Numérique IN2P3 Roscoff 2006 −

SI_Hands_On_Ex2: Technology Choice SI_Hands_On_Ex2: Technology Choice for 80 MHz Point to Point Lines 1/3 for 80 MHz Point to Point Lines 1/3

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SI_Hands_On_Ex2: Technology Choice SI_Hands_On_Ex2: Technology Choice for 80 MHz Point to Point Lines 2/3 for 80 MHz Point to Point Lines 2/3

Découverte des Outils SI de Cadence® − Ecole d’Electronique Numérique IN2P3 Roscoff 2006 −

8 Découverte des Outils SI de Cadence® − Ecole d’Electronique Numérique IN2P3 Roscoff 2006 −

SI_Hands_On_Ex2: Technology Choice SI_Hands_On_Ex2: Technology Choice for 80 MHz Point to Point Lines 3/3 for 80 MHz Point to Point Lines 3/3

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SI_Hands_On_Ex3: 120 MHz Differential CLK SI_Hands_On_Ex3: 120 MHz Differential CLK Distribution Feasibility Study 1/2Distribution Feasibility Study 1/2

Découverte des Outils SI de Cadence® − Ecole d’Electronique Numérique IN2P3 Roscoff 2006 −

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SI_Hands_On_Ex3: 120 MHz Differential CLK SI_Hands_On_Ex3: 120 MHz Differential CLK Distribution Feasibility Study 2/2Distribution Feasibility Study 2/2

Découverte des Outils SI de Cadence® − Ecole d’Electronique Numérique IN2P3 Roscoff 2006 −

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SI_Hands_On_Ex4: Frequency Upgrading of anSI_Hands_On_Ex4: Frequency Upgrading of an Existing Backplane 1/7 Existing Backplane 1/7

Découverte des Outils SI de Cadence® − Ecole d’Electronique Numérique IN2P3 Roscoff 2006 −

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SI_Hands_On_Ex4: Frequency Upgrading of anSI_Hands_On_Ex4: Frequency Upgrading of an Existing Backplane 2/7 Existing Backplane 2/7

Découverte des Outils SI de Cadence® − Ecole d’Electronique Numérique IN2P3 Roscoff 2006 −

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SI_Hands_On_Ex4: Frequency Upgrading of anSI_Hands_On_Ex4: Frequency Upgrading of an Existing Backplane 3/7 Existing Backplane 3/7

Découverte des Outils SI de Cadence® − Ecole d’Electronique Numérique IN2P3 Roscoff 2006 −

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SI_Hands_On_Ex4: Frequency Upgrading of anSI_Hands_On_Ex4: Frequency Upgrading of an Existing Backplane 4/7 Existing Backplane 4/7

Découverte des Outils SI de Cadence® − Ecole d’Electronique Numérique IN2P3 Roscoff 2006 −

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SI_Hands_On_Ex4: Frequency Upgrading of anSI_Hands_On_Ex4: Frequency Upgrading of an Existing Backplane 5/7 Existing Backplane 5/7

Découverte des Outils SI de Cadence® − Ecole d’Electronique Numérique IN2P3 Roscoff 2006 −

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SI_Hands_On_Ex4: Frequency Upgrading of anSI_Hands_On_Ex4: Frequency Upgrading of an Existing Backplane 6/7 Existing Backplane 6/7

Découverte des Outils SI de Cadence® − Ecole d’Electronique Numérique IN2P3 Roscoff 2006 −

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SI_Hands_On_Ex4: Frequency Upgrading of anSI_Hands_On_Ex4: Frequency Upgrading of an Existing Backplane 7/7 Existing Backplane 7/7

Découverte des Outils SI de Cadence® − Ecole d’Electronique Numérique IN2P3 Roscoff 2006 −