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1 ASSEMBLING THE "INC" INSTRUCTION INSTRUCTION OPERATION CODE INC AX 40h INC CX 41h INC DX 42h 4h _h INC AX 0100 0000 INC CX 0100 0001 INC DX 0100 0010 <----><-> I R

1 ASSEMBLING THE "INC" INSTRUCTION INSTRUCTIONOPERATION CODE INC AX40h INC CX41h INC DX42h 4h _h INC AX0100 0000 INC CX0100 0001 INC DX0100 0010 I R

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Page 1: 1 ASSEMBLING THE "INC" INSTRUCTION INSTRUCTIONOPERATION CODE INC AX40h INC CX41h INC DX42h 4h _h INC AX0100 0000 INC CX0100 0001 INC DX0100 0010 I R

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ASSEMBLING THE "INC" INSTRUCTION

INSTRUCTION OPERATION CODE

INC AX 40h

INC CX 41h

INC DX 42h

4h _h

INC AX 0100 0000

INC CX 0100 0001

INC DX 0100 0010

<----><->

I R

Page 2: 1 ASSEMBLING THE "INC" INSTRUCTION INSTRUCTIONOPERATION CODE INC AX40h INC CX41h INC DX42h 4h _h INC AX0100 0000 INC CX0100 0001 INC DX0100 0010 I R

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ASSEMBLING THE "INC" INSTRUCTION

16-Bit Register Designations

AX 000 SP 100

CX 001 BP 101

DX 010 SI 110

BX 011 DI 111

The formal description of the INC instruction

is:

0 1 0 0 0 reg reg = 000 --> 111

Page 3: 1 ASSEMBLING THE "INC" INSTRUCTION INSTRUCTIONOPERATION CODE INC AX40h INC CX41h INC DX42h 4h _h INC AX0100 0000 INC CX0100 0001 INC DX0100 0010 I R

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ASSEMBLING THE ”DEC" INSTRUCTION

The formal description of the DEC instruction

decrement a register by 1 is:

0 1 0 0 1 reg reg = 000 --> 111

so DEC AX is 48, DEC CX is 49, etc.

Page 4: 1 ASSEMBLING THE "INC" INSTRUCTION INSTRUCTIONOPERATION CODE INC AX40h INC CX41h INC DX42h 4h _h INC AX0100 0000 INC CX0100 0001 INC DX0100 0010 I R

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ASSEMBLING THE ”MOV" INSTRUCTIONMOV destination, immediate value

MOV AX,immed. B8h 1011 1000

MOV CX,immed. B9h 1011 1001

MOV DX,immed. BAh 1011 1010

MOV BX,immed. BBh 1011 1011

MOV SP,immed. BCh 1011 1100

MOV BP,immed. BDh 1011 1101

MOV SI,immed. BEh 1011 1110

MOV DI,immed. BFh 1011 1111

<----><->

I R

Page 5: 1 ASSEMBLING THE "INC" INSTRUCTION INSTRUCTIONOPERATION CODE INC AX40h INC CX41h INC DX42h 4h _h INC AX0100 0000 INC CX0100 0001 INC DX0100 0010 I R

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ASSEMBLING THE ”MOV" INSTRUCTIONMOV destination, immediate value

The formal description of MOV immediate is:

1 0 1 1 w reg data data if w=1

Example: MOV AX,FF00 = B8 00 FF

1 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 w reg data data

where w = word flag

Note “backwords” storage of data bytes

Page 6: 1 ASSEMBLING THE "INC" INSTRUCTION INSTRUCTIONOPERATION CODE INC AX40h INC CX41h INC DX42h 4h _h INC AX0100 0000 INC CX0100 0001 INC DX0100 0010 I R

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ASSEMBLING THE ”MOV" INSTRUCTIONMOV destination, immediate value

Consider: MOV AL,FF = B0 FF

1 0 1 1 0 0 0 0 1 1 1 1 1 1 1 1

w reg data

The 8-bit registers are designated:

AL 000 AH 100

CL 001 CH 101

DL 010 DH 110

BL 011 BH 111

Page 7: 1 ASSEMBLING THE "INC" INSTRUCTION INSTRUCTIONOPERATION CODE INC AX40h INC CX41h INC DX42h 4h _h INC AX0100 0000 INC CX0100 0001 INC DX0100 0010 I R

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ASSEMBLING THE ”MOV" INSTRUCTIONMOV destination, immediate value

MOV AL,immed. B0h 1011 0000

MOV CL,immed. B1h 1011 0001

MOV DL,immed. B2h 1011 0010

MOV BL,immed. B3h 1011 0011

MOV AH,immed. B4h 1011 0100

MOV CH,immed. B5h 1011 0101

MOV DH,immed. B6h 1011 0110

MOV BH,immed. B7h 1011 0111

<----><->

I R

Page 8: 1 ASSEMBLING THE "INC" INSTRUCTION INSTRUCTIONOPERATION CODE INC AX40h INC CX41h INC DX42h 4h _h INC AX0100 0000 INC CX0100 0001 INC DX0100 0010 I R

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ASSEMBLING THE ”MOV" INSTRUCTIONMOV register, register

1 0 0 0 1 0 d w mod reg r/m

operation code EA byte

w = word flag: w=0: byte; w=1: word

d = direction flag: d=1: reg is destination

d=0: r/m is destination

mod = mode indicator: 4 possible values:

00, 01, 10, 11

reg = register

r/m = register or memory indicator

EA = effective address: “move what to where”

Page 9: 1 ASSEMBLING THE "INC" INSTRUCTION INSTRUCTIONOPERATION CODE INC AX40h INC CX41h INC DX42h 4h _h INC AX0100 0000 INC CX0100 0001 INC DX0100 0010 I R

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ASSEMBLING THE ”MOV" INSTRUCTIONMOV register, register

Examples:

MOV BX,BP 1 0 0 0 1 0 1 1 1 1 0 1 1 1 0 1 8B DD

d w mod reg = r/m =

BX BP

MOV BP,BX 1 0 0 0 1 0 1 1 1 1 1 0 1 0 1 1 8B EB

d w mod reg = r/m =

BP BX

MOV BP,BX 1 0 0 0 1 0 0 1 1 1 0 1 1 1 0 1 89 DD

d w mod reg = r/m =

BX BP

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ASSEMBLING THE ”MOV" INSTRUCTIONMOV register, register

Consider 8-bit registers:

MOV BL,CH 1 0 0 0 1 0 1 0 1 1 0 1 1 1 0 1 8A DD

d w mod reg = r/m =

BL CH

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ASSEMBLING THE ”MOV" INSTRUCTIONMOV register, memory or MOV memory, register

1 0 0 0 1 0 d w mod reg r/m LSB of offset MSB of offset

1 0 0 0 1 0 1 1 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0

d w mod reg r/m LSB of offset MSB of offset

MOV BX,[F000] = 8B 1E 00 F0

• mod=00 and r/m=110 signify the bytes following the EA byte are an offset address

• Implied segment is DS: DS:[F000]• Note “backwords” storage of F000.

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ASSEMBLING THE ”MOV" INSTRUCTIONMOV register, memory or MOV memory, register

MOV [F000],BX Move the contents of register BX

to location DS:F000

1 0 0 0 1 0 0 1 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 F F F F 0 0 0 0

d w mod reg r/m LSB MSB

ADD [F000],BX Add register BX to the contents of location DS:F000

CMP CX,[0080] Compare register CX with the byteat location DS:0800

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ASSEMBLING THE ”MOV" INSTRUCTIONMOV register, memory or MOV memory, register

MOD=00 (and R/M isn't 110)

In this case r/m specifies a register in which to find

an address, as in:

mod reg r/m

MOV AX,[SI] 1 0 0 0 1 0 1 1 0 0 0 0 0 1 0 0

d w AX

-----SI----

"Move the contents of the address in SI to AX."

The three registers that may be used in this way, along

with their r/m values are: 100=SI, 101=DI, 111=BX.