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1786 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 47, NO. 4, JULY/AUGUST 2011

Pulsewidth Modulation Technique for BLDCMDrives to Reduce Commutation Torque Ripple

Without Calculation of Commutation TimeYong-Kai Lin and Yen-Shin Lai

AbstractThis paper presents a three-phase pulsewidth modu-lation (PWM) technique for brushless dc motor (BLDCM) drivesto reduce the commutation torque ripple. As compared to previousapproaches, the presented technique does not require any torqueobserver and calculation of commutation time which may be sen-sitive to motor parameters and may require more calculation time.The commutation time for the presented technique is determinedby a detection circuit which consists of simple comparator circuit.The experimental results derived from a field programmable gatearray based controlled BLDCM drive show that the commutationcurrent ripple can be significantly reduced by the presented PWMtechnique.

Index TermsBrushless dc motor (BLDCM), commutationtorque ripple, current ripple reduction.

NOMENCLATURE

CP Commutation period.

dc1 Used duty ratio in commutation period while

Sector = 2, 4, 6.dc2 Used duty ratio in commutation period while

Sector = 1, 3, 5.chopdn Chop signal with respect to dn.

chopdc Chop signal with respect to dc1 or dc2.chop j+ Chop signal for high side switch, j = a,b,c.chop j Chop signal for low side switch, j = a,b,c.Djp Output signal of the comparator; the reference volt-

age is kVPN and j = a,b,c,y.Djn Output signal of the comparator; the reference volt-

age is 0 V and j = a,b,c,y.deg Rotor position of brushless dc motor (BLDCM).

dn Used duty ratio in the noncommutation period.

E Peak value of back EMF.

ej Per-phase back EMF of BLDCM, j = a,b,c.

Manuscript received December 15, 2010; revised February 20, 2011;accepted March 22, 2011. Date of publication May 19, 2011; date of cur-rent version July 20, 2011. Paper 2010-EPC-441.R2, presented at the 2010Industry Applications Society Annual Meeting, Houston, TX, October 37,and approved for publication in the IEEE TRANSACTIONS ON INDUSTRYAPPLICATIONS by the Electrostatic Processes Committee of the IEEE IndustryApplications Society.

Y.-K. Lin was with the Center for Power Electronics Technology, NationalTaipei University of Technology, Taipei 10608, Taiwan. He is currently withthe Industrial Technology Research Institute, Hsinchu 326, Taiwan (e-mail:[email protected]).

Y.-S. Lai is with the Center for Power Electronics Technology, Na-tional Taipei University of Technology, Taipei 10608, Taiwan (e-mail:[email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TIA.2011.2155612

ex Back EMF of the noncommutation phase.

ey Back EMF of the outgoing phase.

ez Back EMF of the incoming phase.

I Peak value of the phase current.

Irated Rated current of BLDCM.

IPN Feedback signal of the dc-link current.

IPN Regular value for current control.

ij Per-phase current of BLDCM, j = a,b,c.

ix Current of the noncommutation phase.iy Current of the outgoing phase.

iz Current of the incoming phase.

i Current ripple of the phase current.j+ High side switch for each phase, j = a,b,c.j Low side switch for each phase, j = a,b,c.Ke Back EMF constant.

k Portion ratio of the voltage divider.

L Inductance of each phase.

N Negative terminal of dc-link.

P Positive terminal of dc-link.

Prated Rated power of BLDCM.

R Resistance of each phase.Ts Switching period of the chop signal.

tc1 Turn-on time with respect to dc1.

tc2 Turn-on time with respect to dc2.

tn Turn-on time with respect to dn.

Vd Forward voltage of parallel diode.

VPN DC-link voltage.

vy Terminal voltage of the outgoing phase.

vyN Terminal voltage of the outgoing phase with respect

to the negative dc-link.

vsN Central-tap voltage of three-phase winding with re-

spect to the negative dc-link.

vj Per-phase terminal voltage of BLDCM, j = a,b,c.

y+ High side switch of the outgoing phase.y Low side switch of the outgoing phase.

r Rotor speed of BLDCM.

I. INTRODUCTION

BLDCMs have been widely applied to industry and home

appliances recently for energy-saving concerns. For some

applications, torque ripple is one of the performance evaluation

indexes. Fig. 1(a) shows the ideal waveforms of the back EMF

and phase current of BLDCM. As shown in Fig. 1(a), the

current is with a flat waveform which is in phase with the back

EMF, thereby giving a smooth torque. However, due to the

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LIN AND LAI: PWM TECHNIQUE FOR BLDCM DRIVES TO REDUCE COMMUTATION TORQUE RIPPLE 1787

Fig. 1. Ideal and practical waveforms of BLDCM. (a) Ideal back EMF andphase current. (b) Practical terminal voltage (Ch1) and phase current (Ch2).

limitation of current slew rate and commutation of inverter, the

current waveform is not flat, as shown in Fig. 1(b). Moreover,

this fact gives a significant torque ripple which can be up to

50% of the average torque, as addressed in [1].

Some papers which reduce torque ripple by controlling the

commutation current have been presented to deal with this

issue. A current control method has been presented in [2]

to reduce current ripple. However, current ripple caused by

commutation is not fully considered in [2]. In [3], the com-

mutation current is reduced by changing the dc-link voltage,

which requires additional dc-link voltage control circuit and

capacitors, thereby increasing the cost. A predictive currentmethod which requires motor parameters is shown in [4] to

reduce commutation current ripple. As shown in [4, Fig. 13],

the results fail to meet the ideal ones. The commutation current

ripple can be reduced by changing duty during commutation, as

shown in [5] and [6]. However, two-phase pulsewidth modula-

tion (PWM) is retained in [5] and [6], which limits the contribu-

tion to current ripple reduction, as discussed in [7] and [8].

Three-phase PWM techniques are presented to reduce the

commutation current ripple in [7][9]. Either three-phase cur-

rent sensors or torque observer is required in [7] and [8], re-

spectively, in changing the PWM method to a three-phase one.

Therefore, these result in either cost increase or computation

and parameter sensitivity. In [9], the commutation time forcommutation control of three-phase PWM is determined by

Fig. 2. BLDCM drives.

calculation. However, inductance of motor winding is required

for commutation time calculation (see [9, eq. (27)]).

Several PWM techniques [10][12] have been proposed

to eliminate reversal dc-link current or circulating current of

BLDCM drives. These research results have not yet discussed

the reduction of commutation current ripple for BLDCM drives.In this paper, a PWM technique for current ripple reduction

is proposed. Moreover, a detection circuit for determining the

commutation period is presented. Finally, the experimental

results derived from a field programmable gate array (FPGA)

based BLDCM drive show that the commutation current ripple

can be significantly reduced by the presented PWM technique.

II. PROPOSED COMMUTATION TORQUEREDUCTION PWM TECHNIQUES

A new three-phase PWM technique for BLDCM drives that

is used to reduce the commutation torque is proposed. Ascompared to previous approaches, the presented technique does

not require any torque observer and calculation of commutation

time which may be sensitive to motor parameters and may

require more calculation time. The commutation time for the

presented technique is determined by a detection circuit which

consists of simple comparator circuit.

A. Basic Idea

Fig. 2 shows the block diagram of BLDCM drives. Moreover,

Fig. 3 shows the basic idea in reducing the commutation current

ripple. As shown in Fig. 3, using phase a as the noncommu-tation phase, phase b as the outgoing phase, and phase c as

the incoming phase, as an example, the basic idea is to retain

the same magnitude of current slew rate while with opposite

sign for the incoming and outgoing phases. This basic idea can

be achieved by controlling the duty during commutation.

Fig. 4 shows the proposed commutation control patent. Dur-

ing noncommutation period (CP = Low"), the required turn-on time tn is applied to PWM control, and two-phase PWM

control is retained during this period. tn can be derived from

a control loop such as speed control loop, torque control loop,

etc. In contrast, turn-on times tc1 and tc2 are used during

the commutation period (CP = High"), and three-phase PWM

control is applied, as shown in Fig. 4. tc1 and tc2 will bederived in the next section.

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Fig. 3. Basic idea of the proposed technique (|dib/dt| = |dic/dt|).

B. Derivation oftc1 andtc2 During the Commutation Period

As shown in Fig. 3, the three-phase windings of BLDCM

can be divided into noncommutation, incoming, and outgoing

phases during the commutation period. The current of the

noncommutation phase is maintained during the commutation

period. The current of the incoming phase increases with acontrolled slew rate. In contrast, the current of the outgoing

phase decreases during the commutation period. In order to

derive the general forms of tc1 and tc2, this paper uses

phases x, y, and z to represent the noncommutation,

outgoing, and incoming phases, respectively. Moreover, Table I

shows the relationship of x, y, and z between the three-

phase winding of BLDCM in different sectors.

During the commutation period of Sector 2, the circuit of

BLDCM is shown in Fig. 5(a) while the chop signal is on.

According to Table I, the equivalent model of BLDCM can

be derived as shown in Fig. 6(a) if the winding resistor is

neglected.

As shown in Fig. 6(a), (1)(3) can be derived by Kirchhoffsvoltage law

vsN =VPNLdix

dt ex (1)

vsN = Ldiy

dt ey (2)

vsN = Ldiz

dt ez. (3)

By (1)(3), the central tap voltage can be derived as

3vsN =VPNLdi

xdt +di

ydt +di

zdt (ex + ey + ez)

vsN =VPN

3

(ex + ey + ez)

3. (4)

Substituting (4) into (1)(3), the current slew rate of each

phase can be written as

dix

dt=

1

L(VPNvsNex) =

2VPN3L

+(ey+ez2ex)

3L(5)

diy

dt=

1

L(vsNey) =

VPN

3L+

(ex+ez2ey)

3L(6)

diz

dt= 1L

(vsNez) =VPN

3L+ (e

x+ey2ez)3L

. (7)

Fig. 4. Proposed three-phase PWM control for commutation currentreduction.

TABLE IRELATIONSHIP OF x, y, AN D z TO THREE-P HASE WINDING

Fig. 5. Circuit of BLDCM during the commutation period at Sector 2.(a) Chop on. (b) chop off.

When the chop signal becomes off, the circuit of BLDCM

is shown in Fig. 5(b). Moreover, the equivalent circuit of

Fig. 5(b) is shown in Fig. 6(b). As shown in Fig. 6(b), (8)(10)

can be derived by Kirchhoffs voltage law

vsN = Ldix

dt ex (8)

vsN =VPN Ldiy

dt ey (9)

vsN = Ldiz

dt ez. (10)

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Fig. 6. Equivalent circuit of Fig. 5. (a) Chop on. (b) Chop off.

By (8)(10), the central tap voltage can be derived as

3vsN =VPN L

dix

dt+diy

dt+diz

dt

(ex + ey + ez)

vsN =VPN

3

(ex + ey + ez)

3. (11)

Substituting (11) into (8)(10), the current slew rate of eachphase can be written as

dix

dt=

1

L(vsNex) =

VPN

3L+

(ey+ez2ex)

3L(12)

diy

dt=

1

L(VPNvsNey) =

2VPN3L

+(ex+ez2ey)

3L(13)

diz

dt=

1

L(vsNez) =

VPN

3L+

(ex+ey2ez)

3L. (14)

The average current slew rate of each phase can be written as

dixdt

Ts

=(5) dc1 + (12) (1 dc1)

=VPN(3dc1 1)

3L+

(ey + ez 2ex)

3L(15)

diy

dt

Ts

=(6) dc1 + (13) (1 dc1)

=VPN(2 3dc1)

3L+

(ex + ez 2ey)

3L(16)

diz

dt

Ts

=(7) dc1 + (14) (1 dc1)

= VPN

3L+ (e

x + ey 2ez)3L

(17)

where dc1 is the duty ratio during the commutation period

of Sector 2, and it can be defined as (18). In the succeeding

equation, Ts represents the switching period

dc1 =tc1

Ts. (18)

In order to retain the same magnitude of current slew ratewhile with opposite sign for the incoming and outgoing phases,

the following equation can be derived:diy

dt

Ts

=

diz

dt

Ts

VPN(2 3dc1)

3L+

(ex + ez 2ey)

3L

=VPN

3L

(ex + ey 2ez)

3L

dc1 =2ex ey ez

3VPN+

1

3. (19)

Moreover, the on-time tc1 during the commutation period

can be derived as

tc1 =

2ex ey ez

3VPN+

1

3

Ts. (20)

Assuming ey = eb = E, (20) can be rewritten as

tc1 =

4E

3VPN+

1

3

Ts (21)

where

E back EMF = Ker;

VPN dc-link voltage.Similarly, the on-time tc2 during the commutation period

of Sector 3 can be written as

tc2 =

ey + ez 2ex

3VPN+

1

3

Ts. (22)

Assuming ey = ea = E, (22) can be rewritten as

tc2 =

4E

3VPN+

1

3

Ts. (23)

C. Proposed Commutation Period Detection Circuit

Fig. 7 shows the block diagram of the commutation period

detection circuit. In Sectors 2, 4, and 6, the outgoing phase with

chop off control is used as an example, as shown in Fig. 7(b)

and (c). Fig. 7(b) and (c) shows the detection results under the

conditions of zero current and nonzero current, respectively. In

Fig. 7(b), the output of comparator Dyp is H if the current

of the outgoing phase is not zero during chop off. In contrast,

Dyp is L as the current of the outgoing phase becomes zero,

as shown in Fig. 7(c). Therefore, when the commutation period

comes to the end, the status of Dyp becomes low, thereby

indicating the commutation period. As the commutation period,

indicated by CP in Fig. 4, comes to its end, the duty ischanged to the required turn-on time tn, as shown in Fig. 4,

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Fig. 7. Proposed commutation period detection circuit. (a) Circuit.(b) Nonzero current @ chop off, (vyN = VPN + Vd) > VPN, and Sector =2, 4, and 6. (c) Zero current @ chop off, (vyN = floating) < VPN, andSector = 2, 4, and 6.

Fig. 8. Experimental result of the commutation period detection circuit.Ch1 = iy , Ch2 = chop y, Ch3 = Dyp, and Ch4 = CP.

and two-phase PWM control is resumed. A voltage divider

consisting of resistors R1 and R2 with division ratio of k isused to attenuate the terminal voltage.

Fig. 9. Measured waveforms for the case of y = b (phase b). Ch1 = iy ,Ch2 = Dyp, Ch3 = sampling signal, and Ch4 = CP.

Fig. 10. FPGA-based experimental system.

For the readers understanding, the waveforms of the compar-

ison circuit action with the phase current are shown in Fig. 8.

As shown in Fig. 8, for the current shown in Ch1 during

the chop off period of y (see Ch2), as the signal of

Dyp becomes L (see Ch3), it indicates that the related

commutation period Ch4 comes to its end.

For the presented commutation period detection circuit, the

fault detection issue caused by noise can be avoided by sam-

pling technique. For the case shown in Fig. 5(b), the measure-

ment results of the current of phase b in Sector 2 (see Fig. 4)

using this sampling technique are shown in Fig. 9. As shown in

Fig. 9, the output of Dyp is not sampled around the switching

points (see Ch2 in Fig. 9).

III. EXPERIMENTAL RESULTS

Fig. 10 shows the FPGA-based experimental system. Asshown in Fig. 10, the dc-link current is fed back for current

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Fig. 11. Block diagram in FPGA.

Fig. 12. Experimental results. IPN

= 0.8Irated, Ch1 = vaN, Ch2 = ia,

and Ch3 = CP. (a) Without the proposed method. (b) With the proposedmethod.

control. The dc-link voltage and switching frequency of the

inverter are 24 V and 20 kHz, respectively. The division ratio

of the voltage divider is 0.25 (R1 = 6.04 k and R2 = 2 k).Fig. 11 shows the block diagram of the proposed method

which is implemented using FPGA. As shown in Fig. 11, the

rotating speed of BLDCM is calculated by sensing Hall signals.

The chop signal chopdn is used in generating PWM signals

when CP = Low. As CP becomes high, the chop signalchopdc is used in generating PWM signals according to

Fig. 4.

The specifications of BLDCM are shown in the Appendix.Figs. 12 and 13 show the measured results of the terminal


= 0.5Irated, Ch1 = vaN, Ch2 = ia,and Ch3 = CP. (a) Without the proposed method. (b) With the proposedmethod.

voltage, phase current, and detected commutation period formethods with and without the proposed current ripple reduction

technique. Comparing the current ripple in Fig. 12(a) without

the proposed technique with that in Fig. 12(b) with the proposed

technique, it is obvious that the presented technique signif-

icantly reduces the current ripple and almost square current

waveform. Similar results can be derived for other current

command, as shown in Figs. 13 and 14 for current command =0.5Irated and 0.2Irated, respectively. These experimental resultsfully support the effectiveness of the proposed technique.

Fig. 15 shows the measurement system with load cell Kistler

4503A for the measurement of torque ripple. As shown in

Fig. 16(a), for the measured torque of 0.5 p.u. of the rated

current with coupling inertia, the torque ripple (peak to peak)

can be improved significantly. Fig. 17 shows the measured

speed for the same rated current while with/without torque

ripple compensation. As shown in Fig. 17, the speed can be in-

creased as compared to the case without torque compensation.

This is contributed by torque ripple reduction, confirming the

effectiveness of the method.

IV. CONCLUSION

This paper has presented a three-phase PWM technique

for BLDCM drives to reduce the commutation torque. The

presented technique does not require any torque observer andcalculation of commutation time which may be sensitive to

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= 0.2Irated, Ch1 = vaN, Ch2 = ia,and Ch3 = CP. (a) Without the proposed method. (b) With the proposedmethod.

Fig. 15. Measurement system.

motor parameters and may require more calculation time. The

commutation time for the presented technique is determined

by a detection circuit. The experimental results derived from

FPGA-based controlled BLDCM drives show that the com-

mutation current ripple can be significantly reduced by the

presented PWM technique.

APPENDIX I

MOTOR PARAMETERS

3 BLDCM, L = 0.6 mH,R = 0.33 , Prated = 70 W, andIrated = 3 A.

Fig. 16. Measured torque ripple (IPN

= 0.5 p.u.). (a) Without the torqueripple reduction method. (b) With the torque ripple reduction method.

Fig. 17. Measured results (Y-axis; in revolutions per minute) and speedversus I

PN(X-axis; in amperes).

APPENDIX II

MOTOR PARAMETERS

Influence of back EMF error on torque ripple. Fig. 18 shows

the torque ripple contributed by the back EMF error , as shown

in (A1), which shows the turn-on time. The torque ripple in perunit is derived by (A2). As shown in (A2), Tmin, Tmax, and

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Fig. 18. Simulation result of the torque ripple with back EMF error.

Tavg indicate the minimum, maximum, and average values of

the torque waveform, respectively

tc =

4E(1 + )

3VPN+

1

3

Ts (A1)

Tripple =Tmax Tmin

Tavg(A2)

where

Tmin minimum value of the torque waveform;

Tmax maximum value of the torque waveform;

Tavg average of the torque waveform.

REFERENCES

[1] R. Carlson, M. Lajoie-Mazenc, and J. C. D. S. Fagundes, Analysis oftorque ripple due to phase commutation in brushless dc machines, IEEETrans. Ind. Appl., vol. 28, no. 3, pp. 632638, May/Jun. 1992.

[2] C. T. Pan and E. Fang, A phase-locked-loop-assisted internal modeladjustable-speed controller for BLDC motors, IEEE Trans. Ind. Elec-tron., vol. 55, no. 9, pp. 34153425, Sep. 2008.

[3] K. Y. Nam, W. T. Lee, C. M. Lee, and J. P. Hong, Reducing torque rippleof brushless dc motor by varying input voltage, IEEE Trans. Magn.,vol. 42, no. 4, pp. 13071310, Apr. 2006.

[4] J. Cao, B. Cao, P. Xu, S. Zhou, G. Guo, and X. Wu, Torque ripplecontrol of position-sensorless brushless dc motor based on neural networkidentification, in Proc. IEEE ICIEA, 2008, pp. 752757.

[5] X. Xiao, Y. Li, M. Zhang, and M. Li, A novel control strategy forbrushless dc motor drive with low torque ripples, in Proc. IEEE IECON,2005, pp. 16601664.

[6] D. K. Kim, K. W. Lee, and B. I. Kwon, Commutation torque ripplereduction in a position sensorless brushless dc motor drive, IEEE Trans.Power Electron., vol. 21, no. 6, pp. 17621768, Nov. 2006.

[7] H. Lu, L. Zhang, and W. Qu, A new torque control method for torqueripple minimization of BLDC motors with un-ideal back EMF, IEEETrans. Power Electron., vol. 23, no. 2, pp. 950958, Mar. 2008.

[8] Y. Liu, Z. Q. Zhu, and D. Howe, Commutation-torque-ripple minimiza-tion in direct-torque-controlled PM brushless dc drives, IEEE Trans. Ind.

Appl., vol. 43, no. 4, pp. 10121021, Jul./Aug. 2007.[9] S. S. Bharatkar, R. Yanamshetti, D. Chatterjee, and A. K. Ganguli, Re-

duction of commutation torque ripple in a brushless dc motor drive, inProc. IEEE PECon, 2008, pp. 289294.[10] Y. S. Lai and Y. K. Lin, Quicken the pulse, IEEE Ind. Appl. Mag.,

vol. 14, no. 5, pp. 3444, Sep./Oct. 2008.[11] Y. S. Lai, F. S. Shyu, and Y. K. Lin, Novel PWM technique without

causing reversal dc-link current for brushless dc motor drives with boot-strap driver, in Conf. Rec. IEEE IAS Annu. Meeting, 2005, vol. 3,pp. 21822188.

[12] Y. S. Lai and Y. K. Lin, Assessment of pulse-width modulation tech-niques for brushless dc motor drives, in Conf. Rec. IEEE IAS Annu.

Meeting, 2006, vol. 4, pp. 16291636.

Yong-Kai Lin received the B.S., M.S., and Ph.D.degrees in electrical engineering from the NationalTaipei University of Technology, Taipei, Taiwan.

He is currently an Engineer with the IndustrialTechnologyResearch Institute, Hsinchu, Taiwan. Hisresearch interests include field programmable gatearray design and inverter control.

Yen-Shin Lai received the M.S. degree in electronicengineering from the National Taiwan University ofScience and Technology, Taipei, Taiwan, and thePh.D. degree in electronic engineering from the Uni-versity of Bristol, Bristol, U.K.

In 1987, he joined the Electrical Engineering De-

partment, National Taipei University of Technology,Taipei, as a Lecturer, where he has been a FullProfessor since 1999 and where he served as theChairperson in 20032006. He has been a Distin-guished Professor since 2006. His research interests

include the design of control IC, circuit design of dc/dc converter, and invertercontrol.

Dr. Lai served as the Secretary of the IEEE IAS Industrial Drives Committeein 20082009, theChapter Chair of theIEEE IAS Taipei Chapter in 20092010,and the Editor-in-Chief of the Journal of Power Electronics, Taiwan PowerAssociation, in 20082011. He is currently the Vice Chair (20102013) of theIEEE IAS Industrial Drives Committee and an Associate Editor of the I EEETRANSACTIONS ON INDUSTRIAL ELECTRONICS and IEEE TRANSACTIONSON INDUSTRY APPLICATIONS. He is an AdCom member (20112013) of theIEEE Industrial Electronics Society and board member of the Taiwan PowerElectronics Association. He received several national and international awards,including the John Hopkinson Premium for the session 19951996 from theInstitute of Electrical Engineers, the Technical Committee Prize Paper Awardfrom the IEEE IAS Industrial Drives Committee for 2002, the Best PresentationAward from IEEE IECON in 2004, and the Best Paper Award from TaiwanPower Electronics Conference in 2009 and 2010.

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