ΣΤΑΔΙΑ ΕΞΟΔΟΥ · OUTPUT STAGES- General Considerations Based on the above observationsthe parameters of interest in the design of power stages are : (1) “Distortion,”

ΣΤΑΔΙΑ ΕΞΟΔΟΥ

OUTPUT STAGES- General Considerations Why the amplifier stages studied in previous chapters are not suited to high-power applications. Let’s discuss it through the following example: Suppose we wish to deliver 1 W to an 8Ω speaker. Approximating the signal with a sinusoid of peak amplitude VP , we express the power absorbed by the speaker as

where VP /√2 denotes the root mean square (rms) value of the sinusoid and RL represents the speaker impedance. For RL = 8Ω and Pout = 1 W, => VP = 4V Also, the peak current flowing through the speaker is given by IP = VP/RL = 0.5 A.

Α number of important observations can be mentioned here: (1) The resistance that must be driven by the amplifier is much lower than the typical values

(hundreds to thousands of ohms) seen in previous chapters. (2) The current levels involved in this example are much greater than the typical currents (ma)

encountered in previous circuits. (3) The voltage swings delivered by the amplifier can hardly be viewed as “small” signals,

requiring a good understanding of the large-signal behavior of the circuit. (4) The power drawn from the supply voltage, at least 1W, is much higher than our typical

values. (5) A transistor carrying such high currents and sustaining several volts (e.g., between

collector and emitter) dissipates a high power and, as a result, heats up. High-power transistors must therefore handle high currents and high temperature (and high voltages in some cases )

OUTPUT STAGES- General Considerations Based on the above observationsthe parameters of interest in the design of power stages are : (1) “Distortion,” i.e., the nonlinearity resulting from large-signal operation. A high-quality audio amplifier must achieve a very low distortion so as to reproduce music with high fidelity. In previous chapters, we rarely dealt with distortion. (2) “Power efficiency” or simply “efficiency,” denoted by n and defined as For example, a cellphone power amplifier that consumes 3 W from the battery to deliver 1 W to the antenna provides n≈ 33:3%. In previous chapters, the efficiency of circuits was of little concern because the absolute value of the power consumption was quite small (a few milliwatts). (3) “Voltage rating.” As suggested by Eq. higher power levels or load resistance values translate to large voltage swings and (possibly) high supply voltages. Also, the transistors in the output stage must exhibit breakdown voltages well above the output voltage swings.

CLASSIFICATION OF OUTPUT STAGES

Collector current waveforms for transistors operating in (a) class A , (b) class B. (c) class AB, and (d) class C amplifier stages

The class A stage, whose associated waveform is shown in Fig. 1(a), is biased at a current Ic greater than the amplitude of the signal current, ic. Thus the transistor in a class A stage conducts for the entire cycle of the input signal; that is, the conduction angle is 360°.

The class B stage, is shown in Fig. (b) and is biased at zero dc current. A transistor in a class B stage conducts for only half the cycle, resulting in a conduction angle of 180°. As will be seen later, the negative halves of the sinusoid will be supplied by another transistor operating in the class B mode and conducts during the alternate half-cycles.

CLASSIFICATION OF OUTPUT STAGES

Collector current waveforms for transistors operating in (a) class A , (b) class B. (c) class AB, and (d) class C amplifier stages

An intermediate class between A and B, named class AB, involves biasing the transistor at a nonzero dc current much smaller than the peak current of the sine-wavesignal. As a result, the transistor conducts for an interval slightly greater than half a cycle, as illustrated in Fig. (c). The resulting conduction angle >180° but <<360°. The class AB stage has another transistor that conducts for an interval slightly greater than that of the negative half-cycle, and the currents from the two transistors are combined in the load. It follows that, during the intervals near the zero crossings of the input sinusoid, both transistors conduct:

Figure 14.1(d) shows the collector-current waveform for a transistor operated as a class C amplifier. Observe that the transistor conducts for an interval shorter than that of a half cycle; that is, the conduction angle is less than 180°. The result is the periodically pulsating current waveform shown.

CLASS A OUTPUT STAGE The emitter follower, due to its relatively low output impedance, may be considered a good candidate for driving “heavy” loads, i.e., low impedances.

Figure on the left shows an emitter follower. Q1 is biased with a constant current I supplied by transistor Q2. Since the emitter current iE1 = I + iL , the bias current I must be greater than largest negative load current; otherwise, Q, cuts off and class A operation will no longer be maintained

The transfer characteristic of the emitter follower is described by v 0 = v 1 - vBE1 If we neglect the relatively small changes in vBE1 ,with respect to Ie and I the linear transfer curve shown below is derived . As indicated, the positive limit of the linear region is determined by the saturation of Q1; thus

In the negative direction, depending on the values of I and RL, the limit of the linear region is determined either by Q1 turning off, i.e.

or by Q2 saturating,

The absolutely lowest output voltage is that given by Eq. above and is achieved provided that I > IL =>

CLASS A OUTPUT STAGE The output waveforms describing the operation of the emitter-follower circuit of for sine-wave input are shown in Figures below Neglecting VCEsat we see that if the bias current I is properly selected, the output voltage can swing from - Vcc to +VCC with the quiescent value being zero, as shown in Fig ( a) below. Specifically , in order that Vo be able to reach –Vcc , we consider that at that point (Vin=-VCC) Q1 =almost off and Ic=very close to zero => I=IL= Vcc/RL and this is the I value that permits output swing to reach as low as -Vcc ( the output can reach for positive Vin up to VCC –VCE sat = VCC if VCEsat is neglectd as mentioned above)

Signal waveforms in the class A output stage under the condition I = VCC/RL or, equivalently, RL = VCC/I.

Figure (b) shows the corresponding waveform of VCE1 = Vcc - Vo. Now, assuming that the bias current I is selected to allow a maximum negative load current of VCC/RL, IC1 will have the waveform shown in Fig. c)., Fig. (d) shows the waveform of the instantaneous power dissipation in Q1,

CLASS A OUTPUT STAGE Walking the behaviour of Class A output stage through an example

Let’s assume that we wish to deliver 1 W to an 8Ω speaker. It is also reminded that the voltage gain in an emitter follower is given by:

For RL = 8Ω , a gain near unity can be obtained if 1/gm<< RL, e.g., 1/gm = 0.8 Ω, requiring a collector bias current of 32.5 mA (since gm=Ic/VT). Analyzing the circuit’s behavior in delivering large voltage swings (e.g. 4 V peak ) to heavy loads we get:

For Vin = 0.8 V, we have Vout ≈ 0 and IC ≈ 32.5 mA. If Vin rises from 0.8 V to 4.8 V, the emitter voltage follows the base voltage with a relatively constant difference of 0.8 V, producing a 4-V swing at the output

CLASS A OUTPUT STAGE Walking the behaviour of Class A output stage through an example

Now suppose Vin begins from +0.8 V and gradually goes down [Fig. (c)]. We expect Vout to go below zero and hence part of I1 to flow from RL. For example, if Vin ≈ 0.7 V, then Vout ≈ -0.1 V, and RL carries a current of 12.5 mA. That is, IC1 ≈ IE1 = 20 mA. Similarly, if Vin ≈ 0.6 V, then Vout ≈ -0.2 V, IRL ≈ 25 mA, and hence IC1 ≈ 7.5 mA. In other words, the collector current of Q1 continues to fall.

Thus , we observe that for a sufficiently low Vin, the collector current of Q1 drops to zero and RL carries the entire I1 [Fig. (d)]. For lower values of Vin, Q1 remains off and Vout = -I1RL = -260 mV.

Summarizing we can mention that:. In the arrangement of Fig.(a) of previous slide, the output tracks the input as Vin rises because Q1 can carry both I1 and the current drawn by RL. On the other hand, as Vin falls, so does IC1, eventually turning Q1 off and leading to a constant output voltage even though the input changes. As illustrated in the waveforms of Fig. (a) below, the output is severely distorted. From another perspective, the input/output characteristic of the circuit, depicted in Fig. (b), begins to substantially depart from a straight line as Vin falls below approximately 0.4 V

CLASS A OUTPUT STAGE

Our study reveals that the follower of Fig. (a) of pervious slide cannot deliver voltage swings as large as +- 4 V to an 8Ω speaker. How can we remedy the situation? Noting that Vout,min = -I1 RL, we can increase I1 to greater than 50 mA so that when Vout = - 4 V, Q1 still remains on. Such a solution, however, yields a higher power dissipation and a lower efficiency.

(a) Distortion in a follower, (b) input/output characteristic.

Class B- Push-Pull Output Stage In Fig. (a) there is a possible realization of this kind of output stage. Here, the constant current source is replaced with a pnp emitter follower so that, as Q1 begins to turn off, Q2 “kicks in” and allows Vout to track Vin. This circuit is called the “push-pull” stage and is analyzed as follows”. We note that if Vin is sufficiently positive,Q1 operates as an emitter follower, Vout = Vin-VBE1, and Q2 remains off [Fig. (b)] because its base-emitter junction is reverse-biased.(because Vin>Vout. By symmetry, if Vin is sufficiently negative, the reverse occurs [Fig. (c)] and Vout = Vin+|VBE2|. We say Q1 “pushes” current into RL in the former case and Q2 “pulls” current from RL in the latter

(a) Basic push-pull stage, (b) current path for sufficiently positive inputs, (c) current path for sufficiently negative inputs

Class B- Push-Pull Output Stage As mentioned in previous slide ,

Vout = Vin + |VBE2| for very negative inputs and Vout = Vin - VBE1 for very positive inputs:

That is, for negative inputs, Q2 shifts the signal up, and for positive inputs, Q1 shifts the signal down. Figure 13.4 plots the resulting characteristic

(a) Push-pull stage characteristic.

What happens as Vin approaches zero? The rough characteristic in Fig. ( a) suggests that the two segments cannot meet if they must remain linear. In other words, the overall characteristic inevitably incurs nonlinearity and resembles that shown in Fig. (b), exhibiting a “dead zone” around Vin = 0.

(b)Push-pull stage characteristic with dead zone

Class B- Push-Pull Output Stage Why does the circuit suffer from a dead zone? We make two observations. First, Q1 and Q2 cannot be on simultaneously: for Q1 to be on, Vin > Vout, but for Q2, Vin < Vout. Second, if Vin = 0, Vout must also be zero. This can be proved by contradiction. For example, if Vout > 0 (Fig. below), then the current Vout/RL must be provided by Q1 (from VCC), requiring VBE1 > 0 and hence Vout = Vin - VBE1 < 0. In the same way it can be proved that it is not possible that Vout<0 That is, for Vin = 0, Vout=0 and both transistors are off.

Push-pull stage with zero input voltage

Now let’s assume that Vin begins to increase from zero. Since Vout is initially at zero, Vin must reach at least VBE ≈ 600-700mV beforeQ1 turns on. The output therefore remains at zero for Vin < 600 mV, exhibiting the dead zone depicted in Figs (a ) and (b) of previous slides . Similar observations apply to the dead zone for Vin < 0.

In summary, the simple push-pull stage operates as a pnp or npn emitter follower for sufficiently negative or positive inputs respectively, but turns off for -600 mV < Vin < +600 mV. The resulting dead zone distorts significantly the input signal

Class B- Push-Pull Output Stage Distortion in a push –pull stage

Suppose we apply a sinusoid with a peak amplitude of 4 V to the push-pull stage.

For Vin well above 600 mV, either Q1 or Q2 serves as an emitter follower, thus producing a reasonable sinusoid at the output. Under this condition, the plot in Figs below indicate that Vout = Vin + |VBE2| or Vin - VBE1. Within the dead zone, however, Vout ≈ 0. In Figs below, Vout exhibits distorted “zero crossings.” –we say the circuit suffers from “crossover distortion.”

Input and output waveforms in the presence of dead zone

Illustrating how the dead band in the class B transfer characteristic results in distortion.

Improved Push-Pull AB Output Stage In most applications, the distortion introduced by the simple push-pull stage proves unacceptable. We must therefore devise methods of reducing or eliminating the dead zone. The distortion in the push-pull stage fundamentally arises from the input connections: since the bases of Q1 and Q2 push-pull circuits are shorted together, the two transistors cannot remain on simultaneously around Vin = 0. A solution is given by the circuit below

A bias voltage VBB is applied between the bases of QN and QP. For vi = 0, v0 = 0, and a voltage VBB/2 appears across the base-emitter junction of each of QN and QP. Assuming matched devices, we get

Note. As it can be seen VBB= VBE (QN) + VEB (QP) . Why VBB should be equal to the transistors VBEs? The answer is given in the following: If Q1 is to remain on, then VB (QN )= Vout + VBEN. Similarly, if Q2 is to remain on, then VB (QP) = Vout -|VBEP|. Thus, VBB = VB (QN ) - VB (QP) = VBEN + |VBEP|

Improved Push-Pull AB Output Stage Circuit Analysis

When vi goes positive by a certain amount, the voltage at the base of QN increases by the same amount and the output becomes positive at an almost equal value, (considering that VBB/2 usually is equal to VBEN and VEBP) giving:

The positive v0 causes a current iL to flow through RL, and thus iN must increase: iN=IP + IL

The increase in iN will be accompanied by a corresponding increase in vBEN (above the quiescent value of VBB/2). However, since the voltage between the two bases remains constant at VBB, the increase in vBEN will result in an equal decrease in vEBP and hence in iP. The relationship between iN and iP can be derived as follows (considering that

As it can be seen (last equation) as iN increases, iP decreases by the same ratio while the product remains constant.

The above equations can be combined to yield iN for a given iL as the solution to the following quadratic equation

Improved Push-Pull AB Output Stage Discussion From the equations in previous slide , we can see

that for positive output voltages, the load current is supplied by QN, which acts as the output emitter follower. Meanwhile, QP will be conducting a current that decreases as v0 increases and for large v0 the current in QP can be completely ignored. For negative input voltages the opposite occurs: The load current will be supplied by QP, which acts as the output emitter follower, while QN conducts a current that gets smaller as vi becomes more negative. (Equation relating iN and iP, holds for negative inputs as well.) We conclude that the class AB stage operates in much the same manner as the class B circuit, with one important exception: For small vi both transistors conduct, and as vi is increased or decreased, one of the two transistors takes over the operation. Since the transition is a smooth one, crossover distortion will be almost totally eliminated. Figure on the left shows the transfer characteristic of the class AB stage.

Improved Push-Pull AB Output Stage Output Resistance

The output resistance of the class AB stage can be determined from the circuit from Fig. below taking into consideration the transistor T equivalent shown in Fig. on the right Based on theseit can be derived that:

reN and reP are the small-signal emitter resistances of QN and QP, respectively

At a given input voltage, the currents iN and iP can be determined, and reN and reP are given by

=>

Since as iN increases, iP decreases, and vice versa, the output resistance remains approximately constant in the region around vi = 0. This, in effect, is the reason for the absence of crossover distortion. At larger load currents, either iN or iP will be significant, and Rout decreases as the load current increases

Improved Push-Pull AB Output Stage Variations

The circuit shown in previous slides can be modified as shown in Fig.(a) below, where a battery of voltage VB is inserted between the two bases (VB = VBE1 + |VBE2|). It is obvious that the behavior of the circuit is similar to what has been explained in previous slides

(a) Addition of voltage source to remove the dead zone, (b) input and output waveforms, (c) input/output characteristic

With the connection of Vin to the base of Q2, Vout = Vin+|VBE2| ; i.e., the output is a replica of the input but shifted up by |VBE2|. If the base-emitter voltages of Q1 and Q2 are assumed constant, both transistors remain on for all input and output levels around Vin=0 , yielding the waveforms depicted in Fig. (b). The dead zone is thus eliminated. The input /output characteristic is illustrated in Fig. (c).

Improved Push-Pull AB Output Stage Variations

(a) Push-pull stage with input applied to base of Q1, (b) input and output waveforms, (c) input/output characteristic

In this circuit, both transistors remain on simultaneously around Vin=0, and Vout = Vin - VBE1. Thus, the output is a replica of the input but shifted down. Figures (b) and (c) show the corresponding waveforms and the input/output characteristic.

Improved Push-Pull AB Output Stage

We now determine how the battery VB of previous slides must be implemented. Since VB =VBE1 + |VBE2|, two diodes placed in series could provide the required voltage drop, thereby arriving at the topology shown in Fig. (a). Unfortunately, the diodes carry no current here exhibiting a zero voltage drop. This difficulty is overcome by adding a current source on top [Fig. (b)]. Now, I1 provides both the bias current of D1 and D2 and the base current of Q1.

Implementation of VB/VBB

(c)

The current flowing through D1 and D2 is equal to I1 - IB1 (Fig. (c) ). The voltage source Vin must sink both this current and the base current of Q2. Thus, the total current flowing through this source is equal to I1 - IB1 + |IB2|.

Improved Push-Pull AB Output Stage Implementation of VB/VBB

Here, we have V1 = Vin + VD1 and Vout = V1 - VBE1. If VD1 ≈ VBE1, then Vout ≈ Vin, exhibiting no level shift with respect to the input. Also, the current flowing through D1 is equal to I1 -IB1 and that through D2 equal to I2 -|IB2|. Thus, if I1 = I2 and IB1 ≈IB2, the input voltage source need not sink or source a current for Vout = 0, a point of contrast with respect to the circuit of Fig. c in previous slide .

Stage with input applied to midpoint of diodes.

Biasing Using the VBE Multiplier Improved Push-Pull AB Output Stage

An alternative biasing arrangement that provides the designer with considerably more flexibility in both discrete and integrated designs is shown in Fig. on the left

If we neglect the base current of Q1 then Rx and R2 will carry the same current IR, given by

and the voltage VBB across will be

In other words this circuit simply multiplies VBE1 by the factor (1 + R2/R1) and is known as the "VBE multiplier." The multiplication factor is under the designer's control and can be used to establish the value of VBB required since In IC design it is relatively easy to control accurately the ratio of two resistances- in discrete designs potentiometer can be used in series with R1 ,R2 VBE1 can be calculated from the above equation as follows:

=>

where the base current of QN is neglected, since for positive v0, even near its peak value that IB (QN) can become sizable and reduce the current available for VBB corresponds to only small changes in VBE1, as can be also seen by the equation above, leaving VBB and IR, almost constant

Addition of CE Stage

The two current sources in Fig. above can be realized with pnp and npn transistors as depicted in Fig. (a). We may therefore decide to apply the input signal to the base of one of the current sources so as to obtain a greater gain. Illustrated in Fig. (b), the idea is to employ Q4 as a common-emitter stage, thus providing voltage gain from Vin to the base of Q1 and Q2.3 The CE stage is called the “predriver.” The push-pull circuit of Fig. (b) is used extensively in high-power output stages and merits a detailed analysis. We must answer the following question: What is the overall voltage gain of the circuit in the presence of a load resistance RL?

Addition of CE Stage in an Push-Pull AB Output Stage


(a) Simplified circuit to calculate gain, (b) circuit with resistance of diodes neglected, (c)small-signal model

This question can be answered with the aid of the simplified circuit shown in Fig.(a), where VA=∞ and 2rD represents the total small-signal resistance of D1 and D2. Assuming for simplicity that 2rD is relatively small and v1 ≈ v2, further reducing the circuit to Fig. ( b) where


It follows that

This is a result expected of a follower transistor having a transconductance of gm1 + gm2.



To compute VN/Vin, we must first derive the impedance seen at node N, RN. From the circuit of Fig. (c), the reader can show that

Consequently:


Output impedance

The circuit of Fig. (a ) can be reduced to that in Fig. (b), and, with 2rD negligible, to that in Fig. (c). Utilizing the composite model illustrated in Fig. 7(c), we obtain the small-signal equivalent circuit of Fig. (d), where VA = ∞ for Q1 and Q2 but not for Q3 and Q4. Here, rO3||rO4 and rpi1||rpi2 act as a voltage divider

A KCL at the output node gives

The key observation here is that the second term in eq. above may raise the output impedance considerably. As a rough approximation, we assume rO3≈rO4 , gm1≈ gm2, and rπ1 ≈ rπ2, concluding that the second term is on the order of (rO/2)/β . This effect becomes particularly problematic in discrete design because power transistors typically suffer from a low β.


PNP power transistors typically suffer from both a low current gain and a low fT , posing serious constraints on the design of output stages. For this reason a combination of an npn device with a pnp transistor to improve the performance

Consider the common-emitter npn transistor, Q2, depicted in Fig (a).We wish to modify the circuit such that Q2 exhibits the characteristics of an emitter follower. To this end, we add the pnp device Q3 as shown in Fig. (b) and prove that the Q2-Q3 combination operates as an emitter follower. With the aid of the small-signal equivalent circuit in Fig. (c) (VA = ∞), and noting that the collector current of Q3 serves as the base current of Q2, and hence

we form a KCL at the output node:

where the first term on the left hand side represents the collector current of Q2.

Use of composite devices in AB output stages Replacement of the PNP Power Transistor with a composite (PNP+ NPN) one


From previous slide:

=> In analogy with the standard emitter follower we can view this result as voltage division between two resistances of values

and RL (Fig. (d)) and the output resistance of the circuit (excluding RL) is given by

since 1/rπ3 = gm3 /β3<< (β2+ 1) gm3 . If Q3 alone operated as a follower, the output impedance would be quite higher (1/gm3).

From the above equations, the voltage gain of the circuit can approach unity if the output resistance of the Q2-Q3 combination, [(β2 + 1) gm3 ] -1, is much less than RL. In other words, the circuit acts as an emitter follower but with an output impedance that is lower by a factor of β2 + 1.

where 1/ rπ3 is neglected with respect to (β2+ 1) gm3 .

Since the current drawn from the input is equal to (vin - vout)/rπ3 , we have from equation

Computation of the input impedance of the circuit shown in Fig. (c).

It follows that:

As shown by the above equations, RL is boosted by a factor of β3(β2+ 1) as seen at the input—as if the Q2-Q3 combination provides a current gain of β3(β2+ 1)


Pros and Cons of (pnp+npn) composite power transistor

Fig. (b) Addition of current source to improve speed of composite device.

The circuit of Fig. (a) that was analyzed proves superior to a single pnp emitter follower practically proving to be almost equivalent to a single pnp transistor having β ≈β3 • β2 . However, it also introduces an additional pole at the base of Q2. This compound device, although it has a relatively high equivalent ¡5, still suffers from a poor high-frequency response. It also suffers from another problem: The feedback loop formed by Q3 and Q2 is prone to high frequency oscillations (with frequency near to the fT of the pnp deviceMethods exist for preventing such oscillations (using techniques such as these for feedback-amplifier stability) Also, since Q3 carries a small current, it may not be able to charge and discharge the large capacitance at this node. To alleviate these issues, a constant current source is typically added as shown in Fig. (b) above so as to raise the bias current of Q3.

Use of composite devices in AB output stages

Fig. (a) Composite (npn+pnp) transistor

Use of composite devices in AB output stages Composite (pnp+npn) power transistor -comparison with simple (pnp) emitter follower

Voltage headroom for (a) simple follower, (b) composite device.

Comparing the two circuits depicted in Figs (a) and (b) above in terms of the minimum allowable input voltage and the minimum achievable output voltage. (Bias components are not shown) and assuming that the transistors do not enter saturation we get:

In the emitter follower of Fig. (a), Vin can be as low as zero such that Q2 operates at the edge of saturation . (Indeed for not entering saturation it has to hold that VB2≥ VC2=> VB2=VC2 =minimum voltage at the edge of saturation=> VB2=VC2=0) The minimum achievable output level is thus equal to |VBE2| ≈0.8 V. In the topology of Fig. (b), the minimum value of Vin can be equal to the collector voltage of Q3, which is equal to VBE2 with respect to ground. (Indeed for Q3 not to enter saturation it has to hold that Vin= VB3≥ VC3 => VB3=VC3=minimum voltage at the edge of saturation and in this case it is equal to VBE2=> minimum Vin (for not entering saturation) = VBE2=0.7 The (minimum) output is then given by Vin + |VBE3| = VBE2 + |VBE3| ≈ 1,6 V, a disadvantage of this topology. We say the circuit “wastes” one VBE in voltage headroom

Please also note that Q2 cannot enter saturation in this circuit (why?). This is due to the fact that VC2=Vout and as proven above Vout,mimnimum=1.6 Volts= Vcminimum> VB2= VBE2=0,7 Volts

Use of compound devices for both npn and pnp transistors of a push-pull stage

To increase the current gain of the output-stage transistors in the push-pull AB, and thus reduce the required base current drive, the Darlington configuration shown in Fig. on the left is frequently used to replace the npn transistor of the class AB stage. It is well known, that this configuration is equivalent to a single npn transistor having β = β1 • β2 , but almost twice the value of VBE.

The Darlington configuration can be also used for pnp transistors, and this is indeed done in discrete-circuit design. In IC design, however, the lack of good-quality pnp transistors prompted the use of the alternative compound configuration that was shown and analyzed in previous sides . As shown, this compound device is equivalent to a single pnp transistor having β ≈β1 • β2

To illustrate the application of the Darlington configuration and of the compound pnp, we show in Fig. on the left an output stage utilizing both. Class AB biasing is achieved using a VBE multiplier. Note that the Darlington npn adds one more VBE drop, and thus the VBE multiplier is required to provide a bias voltage of about 2 V.

Use of composite devices in AB output stages

Thermal Runaway

(a) Runaway in the presence of constant voltage shift, VB, (b) use of diodes to avoid runaway.

As described above, the output transistors in a power amplifier experience elevated temperatures. Even in the presence of a good heat sink, the push-pull stage is susceptible to a phenomenon called “thermal runaway,” which can damage the devices

To understand this effect, let us consider the conceptual stage depicted in Fig. (a), where the battery VB ≈2VBE eliminates the dead zone. What happens as the junction temperature of Q1 and Q2 rises? It can be proved that, for a given base-emitter voltage, the collector current increases with temperature. Thus, with a constant VB, Q1 and Q2 carry increasingly larger currents, dissipating greater power. The higher dissipation in turn further raises the junction temperature and hence the collector currents, etc. The resulting positive feedback continues until the transistors are damaged. Interestingly, the use of diode biasing [Fig. (b)] can prohibit thermal runaway. If the diodes experience the same temperature change as the output transistors, then VD1 + VD2 decreases as the temperature rises (because their bias current is relatively constant), thereby stabilizing the collector currents of Q1 and Q2.

Short Circuit Protection In some cases is possible that a person attempting to connect a speaker to a stereo may accidentally short the amplifier output to ground while the stereo is on. The high currents flowing through the circuit under this condition may permanently damage the output transistors. Thus, a means of limiting the short-circuit current is necessary. The principle behind short-circuit protection is to sense the output current (by a small series resistor) and reduce the base drive of the output transistors if this current exceeds a certain level.

In Fig. above an example of such a circuit is shown , where QS senses the voltage drop across r, “stealing” some of the base current of Q1 as Vr approaches 0.7 V. For example, if r = 0.25 Ω, then the emitter current of Q1 is limited to about 2.8 A. However, the protection scheme of this circuit suffers from several drawbacks. First, resistor r directly raises the output impedance of the circuit. Second, the voltage drop across r under normal operating condition, e.g., 0.5-0.6 V, reduces the maximum output voltage swing. For example, if the base voltage of Q1 approaches VCC, then Vout = VCC - VBE1 - Vr ≈ VCC -1.4 V

Power Rating and Efficiency in Output Stages Since power amplifiers draw large amounts of power from the supply voltage, their “efficiency” proves critical in most applications. The “power conversion efficiency” n of a PA, is defined as:

In order to compute the efficiency of an output stage, the procedure consists of three steps: (1) calculate the power delivered to the load, Pout; (2) calculate the power dissipated in the circuit components (e.g., the output transistors), Pckt; (3) determine n = Pout/(Pout + Pckt)

Emitter Follower Power Rating

Circuit for calculation of follower power dissipation.

First the power dissipated by Q1 is computed in the simple emitter follower of Fig. on the left assuming that the circuit delivers a sinusoid of VPsinωt to a load resistance RL

It is assumed hat I1≥ VP/RL to ensure that Vout can reach -VP . The instantaneous power dissipated by Q1 is given by IC • VCE and its average value (over one period) equals:

Power Rating and Efficiency in Output Stages


Recalling from previous slide that:

where T = 1/ω Since IC ≈IE = I1 +Vout/RL and VCE = VCC -Vout = VCC -VP sinωt, we have

To carry out the integration, we note that (1) the average value of sinωt over one period T is zero; (2) sin2ωt = (1 -cos 2ωt)/2; and (3) the average value of cos2ωt over one period T is zero. Thus,

Thus, the power dissipated by Q1 reaches a maximum in the absence of signals, i.e., with VP = 0:

At the other extreme, if VP ≈ VCC, then

The power dissipated by the current source I1 in the emitter follower of Fig above is calculated as follows:

The value is, of course, positive because VEE < 0 to accommodate negative swings at the output

Power Rating and Efficiency in Output Stages Emitter Follower Efficiency With the results obtained in previous slides,the

efficiency of emitter followers can be calculated. Recall that the power dissipated by Q1 is equal to


and that the power consumed by I1 is:

If VEE = -VCC, the total power “wasted” in the circuit is given by

It follows that

For proper operation, I1 must be at least equal to VP /RL, yielding

The efficiency reaches a maximum of 25% as VP approaches VCC. Note that this result holds only if I1 = VP /RL. For example if an emitter follower that is designed to deliver a peak swing of VP operates with an output swing of VP /2 then for calculating its efficiency we should consider that: Since the circuit is originally designed for an output swing of VP, we have VCC = -VEE ≈ VP and I1 = VP /RL. Replacing VP with VCC/2 and I1 with VCC/RL in eq. above we have n=1/15. This low efficiency results because both the supply voltages and I1 are “overdesigned.”

Power Rating and Efficiency in Output Stages Push Pull Output Stage Power Rating

We now determine the power dissipated by the output transistors in the push-pull stage (Fig.on the left) To simplify calculations, we assume that each transistor carries no current around Vout = 0 and turns off for half of the period. If Vout = VP sinωt, then IRL =(VP /RL) sinωt but only for half of the cycle. Also, VCE1= VCC- Vout = VCC - VP sinωt. The average power dissipated in Q1 then is calculated as follows:

where T = 1/ω, and β is assumed large enough to allow the approximation IC ≈ IE. Expanding the terms inside the integral and noting that we have:

For example, if VP = 4 V, RL = 8 , and VCC = 6 V, then Q1 dissipates 455 mW. Transistor Q2 also consumes the same amount of power if |VEE| = VCC. Equation above indicates that for VP ≈0 or VP ≈ 4VCC/π, the power dissipated in Q1 approaches zero, suggesting that Pav must reach a maximum between these extremes. Differentiating Pav

with respect to VP and equating the result to zero, we have VP = 2VCC/π and hence Please note that it’s impossible to have Pav = 0 with VP = 4 VCC/π since a supply voltage of VCC, cannot deliver a peak swing of 4VCC/π(> VCC).

Power Rating and Efficiency in Output Stages

Push Pull Output Stage Efficiency

The maximum efficiency of 25% of the simple emitter follower proves inadequate in many applications. For example, a stereo amplifier delivering 50 W to a speaker would consume 150 W in the output stage, necessitating very large (and expensive) heat sinks. The solution to this problem is given by the push-pull output stage as will be described in thefollowing

In previous slides we determined that each of Q1 and Q2 consumes a power of

Thus,

=>

The efficiency thus reaches a maximum of π/4 = 78:5% for VP ≈ VCC, a much more attractive result than that of the emitter follower. For this reason, push-pull stages are very common in many applications, e.g., audio amplifiers.

=π/4 (Vp/VCC)

Power Rating and Efficiency in Output Stages Enhanced Push Pull (with diodes )Output Stage Efficiency

It is assumed that the enhanced (with diodes) push pull circuit on the left has I1=I2 which is chosen so as to allow a peak swing of Vp at the output, and that VCC=-VEE, To calculate the efficiency of this circuit it is necessary to compute also the power consumed by the branch consisting of I1, D1,D2, and I2 To achieve this, it is reminded from previous slides that IC1 must be at least equal to VP/RL so as to be able to reach the positive peak of Vp at the output (please note that at this point IRL is totally provided by Q1 , since Q2 is off-similar comments holds for -Vp) . This means that I1 = (VP /RL) /β= Ι2

Τhus, the branch with the diodes and the bias currents consumes a power of 2VCC(Vp /RL)/β . Reminding also that the power consumed by each of Q1, Q2 is Pav= Vp/RL (VCC/ π - Vp/ 4) the overall efficiency of the circuit is :

Comparing the derived n with that of the simple push-pull stage it is obvious that the n of the latter one is larger than the one derived here since the denominator here is larger than the simple push-pull case by the factor Vp/β . This is due to the fact that with the diode branch present, we can no longer assume that each output transistor is on for only half of the cycle. That is, Q1 and Q2 consume slightly greater power, leading to a lower n.

= π/4 [1/(1+π/β)], if Vp≈VCC

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ΣΤΑΔΙΑ ΕΞΟΔΟΥ · OUTPUT STAGES- General Considerations Based on the above observationsthe parameters of interest in the design of power stages are : (1) “Distortion,”