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Monolithically Integrated InGaAsP/InP 1x2 SOA Optical Switch Ronald Millett 1 , Trevor Hall 1,2 , Karin Hinzer 1 , Valery Tolstikhin 2 , Kirill Pimenov 2 , Yury Logvin 2 , Brad Robinson 3 , Zhilin Peng 3 and Henry Schriemer 1 1 Centre for Research in Photonics, University of Ottawa 800 King Edward Ave., Ottawa, ON K1N 6N5 2 OneChip Photonics Inc., 46 Antares Dr. Suite 200 Ottawa, ON K2E 7Z1 3 Centre for Electrophotonic Materials and Devices, McMaster University 1280 Main St. W., Hamilton, ON L8S 4L7 ABSTRACT This paper describes a monolithically integrated 1x2 SOA-based switch in InGaAsP/InP. It can be fabricated in one epitaxial growth step, has a footprint of only 4.2mm x 0.35mm, operates on sub-ns time scales and is meant to be integrated with other passive and active waveguide devices on the same InP substrate. The design process optimized the device dimensions using a modified finite-element modal-overlap method. This method provides significant computational savings compared to full beam-propagation method (BPM) simulations. The device uses a single-mode vertical integration technique for a monolithic integration of active and passive waveguide components. To compensate for the polarization sensitivity, tensile-strained quantum well active regions are used. To switch a signal to an output waveguide, the SOA in that waveguide is forward-biased while the SOA in the other output waveguide is reverse-biased to provide a large attenuation (>30dB), resulting in minimal crosstalk. This switch has an estimated insertion loss of 4dB, with a polarization dependent loss of < 1dB. Keywords: photonics, switching, monolithic integration 1. INTRODUCTION Optical networks are moving in the direction of not only greater speed, but also greater flexibility in delivering bandwidth. A critical component in reconfigurable optical networks are optical switches that ideally have low loss, low polarization dependence, minimal crosstalk, and a fast switching speed. As in electronics, the trend in photonics has been towards increasing integration. There have been numerous integrated optical switch designs that have been proposed based on: Mach-Zehnder interferometry [1], digital optical switching (DOS) [2], multimode interference (MMIs) [3], directional couplers [4], microelectromechanical systems (MEMS) [5], and other designs [6]. Semiconductor optical amplifier (SOA) switches are a promising choice due to their high switching speed, which can be in the sub-ns range [7], and crosstalk values as low as -40 dB [8]. SOA switches have been demonstrated in networks with speeds of up to 40 Gb/s [9]. Integrated devices can be divided into two types: monolithic and hybrid. In hybrid integration, components are separately optimized and manufactured, then combined. This has the advantage of allowing the best material system for a particular component to be used, for instance, silicon-on-insulator passive waveguides with InP-based active components [10]. However, combining the components together requires an additional manufacturing step. With monolithic integration, every component is created using the same material, on the same wafer. There is no need to make components separately on different material systems, or to have to combine them using an additional processing step. Monolithic integration can offer a more easily manufactured device, although using a single general-purpose material system can possibly result in some performance degradation. Many monolithically integrated devices also require multiple complex regrowth steps to manufacture. These additional regrowth steps are particularly unwanted in monolithic devices since the main advantage of monolithic integration is fewer processing steps, and hence greater manufacturability. Photonics North 2007, edited by John Armitage, Proc. of SPIE Vol. 6796, 67962Y, (2007) 0277-786X/07/$18 · doi: 10.1117/12.778938 Proc. of SPIE Vol. 6796 67962Y-1 Downloaded From: http://spiedigitallibrary.org/ on 04/01/2014 Terms of Use: http://spiedl.org/terms

Monolithically integrated InGaAsP/InP 1x2 SOA optical switch

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Monolithically Integrated InGaAsP/InP 1x2 SOA Optical Switch

Ronald Millett1, Trevor Hall1,2, Karin Hinzer1, Valery Tolstikhin2, Kirill Pimenov2, Yury Logvin2, Brad Robinson3, Zhilin Peng3 and Henry Schriemer1

1Centre for Research in Photonics, University of Ottawa 800 King Edward Ave., Ottawa, ON K1N 6N5

2 OneChip Photonics Inc., 46 Antares Dr. Suite 200 Ottawa, ON K2E 7Z1 3Centre for Electrophotonic Materials and Devices, McMaster University

1280 Main St. W., Hamilton, ON L8S 4L7

ABSTRACT

This paper describes a monolithically integrated 1x2 SOA-based switch in InGaAsP/InP. It can be fabricated in one epitaxial growth step, has a footprint of only 4.2mm x 0.35mm, operates on sub-ns time scales and is meant to be integrated with other passive and active waveguide devices on the same InP substrate. The design process optimized the device dimensions using a modified finite-element modal-overlap method. This method provides significant computational savings compared to full beam-propagation method (BPM) simulations. The device uses a single-mode vertical integration technique for a monolithic integration of active and passive waveguide components. To compensate for the polarization sensitivity, tensile-strained quantum well active regions are used. To switch a signal to an output waveguide, the SOA in that waveguide is forward-biased while the SOA in the other output waveguide is reverse-biased to provide a large attenuation (>30dB), resulting in minimal crosstalk. This switch has an estimated insertion loss of 4dB, with a polarization dependent loss of < 1dB. Keywords: photonics, switching, monolithic integration

1. INTRODUCTION Optical networks are moving in the direction of not only greater speed, but also greater flexibility in delivering bandwidth. A critical component in reconfigurable optical networks are optical switches that ideally have low loss, low polarization dependence, minimal crosstalk, and a fast switching speed. As in electronics, the trend in photonics has been towards increasing integration. There have been numerous integrated optical switch designs that have been proposed based on: Mach-Zehnder interferometry [1], digital optical switching (DOS) [2], multimode interference (MMIs) [3], directional couplers [4], microelectromechanical systems (MEMS) [5], and other designs [6]. Semiconductor optical amplifier (SOA) switches are a promising choice due to their high switching speed, which can be in the sub-ns range [7], and crosstalk values as low as -40 dB [8]. SOA switches have been demonstrated in networks with speeds of up to 40 Gb/s [9].

Integrated devices can be divided into two types: monolithic and hybrid. In hybrid integration, components are separately optimized and manufactured, then combined. This has the advantage of allowing the best material system for a particular component to be used, for instance, silicon-on-insulator passive waveguides with InP-based active components [10]. However, combining the components together requires an additional manufacturing step. With monolithic integration, every component is created using the same material, on the same wafer. There is no need to make components separately on different material systems, or to have to combine them using an additional processing step. Monolithic integration can offer a more easily manufactured device, although using a single general-purpose material system can possibly result in some performance degradation. Many monolithically integrated devices also require multiple complex regrowth steps to manufacture. These additional regrowth steps are particularly unwanted in monolithic devices since the main advantage of monolithic integration is fewer processing steps, and hence greater manufacturability.

Photonics North 2007, edited by John Armitage,Proc. of SPIE Vol. 6796, 67962Y, (2007)

0277-786X/07/$18 · doi: 10.1117/12.778938

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Waveguide coreActive layer

Activewaveguide

Passivewaveguide

I.,.

This paper describes an SOA-based monolithically integrated 1x2 switch. To eliminate regrowth steps, a single-mode vertical integration (SMVI) technique was used that will be described in Section 2. The design process utilized a modified finite-element modal overlap method that is more computationally efficient than design using full BPM simulations. This technique, along with the modelling of the active region, will be described in Section 3.

.

2. SINGLE-MODE VERTICAL INTEGRATION A schematic of a general single-mode vertically-integrated device is shown in Figure 1. The fundamental optical mode is confined to the area under the ridge in the passive waveguiding areas. In the active regions, the optical mode is only evanescently coupled to the active layer that is grown on top of the passive waveguide ridge. To inject current into the active layer, lateral n-contacts are grown on top of the n-doped passive waveguide next to the active/passive ridge. The p-contact is deposited above p-doped layers that are grown on top of the active layer and form the active ridge. Since the optical mode is only evanescently coupled to the active layer, there is a high amount of modal overlap between the active and passive regions. This means that the passive/active or active/passive transition region will have minimal loss and can be made relatively small. The SMVI technique is a general-purpose material platform that can be used to create not only an optical switch, but can also be used to implement photodetectors, variable optical attenuators (VOAs), and SOAs, all on a single chip, without any regrowth steps [10].

The SOA-based switch that will be implemented wusing SMVI is shown in Figure 2. In this type of switch, a single input is split into two waveguides, each integrated with SOAs. To switch into one output waveguide, the SOA in that waveguide is forward-biased to achieve transparency or a modest amount of gain. The SOA in the other waveguide is reverse-biased so that the light in this waveguide is attenuated. For this type of switch, the input power splitter is designed using passive waveguides, with the active layers forming the SOAs in the output arms.

Figure 1. Single-mode vertically-integrated passive/active system

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Power splitter

+v -

+v -

Active tidges

SOA Region

3. DEVICE MODELLING 3.1 Power splitter design The power splitter portion of the switch was designed using a modified modal-overlap technique for Y-branch power splitters, described in more detail in [11]. In the modal-overlap method, the TE and TM fundamental optical mode of the passive ridge waveguide structure is determined using finite-element simulations for two cross-sections: a single ridge and double ridges. The cross-sections represent the mode profile immediately before, and immediately after, the single-input waveguide is divided into two separate output waveguides, as shown in the power splitter portion of the switch in Figure 2. The discontinuity between the single input waveguide and dual output waveguides is assumed to be the main source of scattering loss in the device. The modal-overlap method, as originally described in [11], assumed the waveguides were lossless, and focused on minimizing the scattering loss that occurred at the interface between the single ridge input and dual ridge output. The modified modal-overlap method used to design this power splitter goes one step farther by also considering the absorption loss of the ridge waveguides. This modification results in a more complex, yet realistic device design process.

Figure 2. SOA switch design

The optical power that is not coupled from the single input mode to the dual waveguide mode is assumed be scattered and is considered to be excess loss. The mode overlap, )(iη , is calculated as:

)()()()(

2)()(

)(

,,

,i

IIi

IIi

Ii

I

iII

iIi

HEHE

HE=η [1]

where i=TE,TM, EI,II is the electric field of the single (I) or dual (II) ridge waveguide, and HI,II is the magnetic field of the single (I) or dual (II) ridge waveguide. The inner product is defined as:

( )[ ]∫∫ ⋅×ℜ=S

z dSaHEHE ˆ21, * [2]

To determine the geometry that minimized the interface scattering loss, the single-ridge width and dual-ridge widths were varied, and a modal overlap calculation was performed. The modes were solved using FEMLAB finite-element simulation software. The mesh was adaptively refined to maximize the mesh density in the areas of the highest mode

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(a) )b)

density, with a mesh size as low as 0.15 µ m at the center of the optical mode. Figures 3a and 3b show representative mode profiles of single- and dual-ridge waveguides.

Figure 3. Mode profiles of a) single-ridge waveguide and b) dual-ridge waveguide

The single-ridge width was varied from 2 µ m to 13 µ m for dual-ridge widths between 2 µ m and 2.9 µ m. Earlier research showed that the scattering loss is minimized in all cases by having the smallest possible gap between the two output waveguides [1]. Thus the gap was fixed for all tests at 2 µ m, which is the smallest gap possible while remaining within manufacturing tolerances. Figure 4 shows the results of these modal-overlap calculations for dual-ridge widths of 2 µ m and 2.5 µ m.

The minimum scattering loss for the TE mode is 0.16dB at a single-ridge width of 10.5µ m and a dual-ridge width of 2.3 µ m. The minimum scattering loss for the TM mode is 0.13dB at a single-ridge width of 11.5 µ m and a dual-ridge width of 2.5 µ m. To minimize both the scattering loss and the polarization dependent loss (PDL) the single-ridge width could be set to 10.5 µ m and the dual-ridge widths to 2.25 µ m, resulting in a loss of 0.16dB for the TE mode and 0.14dB for the TM mode.

In the earlier version of the modal-overlap method, where it was assumed that the waveguides were lossless and all tapers and bends were adiabatic, this calculation gave the optimal geometry. Now that absorption and bending loss is considered, these ridge width values will optimize only the scattering loss at the interface and not necessarily the overall loss of the device. The standard passive waveguide is 4 µ m, and tapers must be used to reach these waveguide widths. Even assuming that the waveguide is tapered adiabatically, there will be absorption loss. The wider the width the ridge must taper to, the longer the taper, and hence the greater the absorption losses. These absorption losses must be balanced against the scattering losses when considering the final design. In addition, trade-offs can be made to reduce the device length by sacrificing a small amount of loss and using a smaller single ridge width.

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0.8

7

0.8

S

2

0.1

8 7 8 9 10 II 12 IS

Single-ridge width (microns)

Figure 4 Excess loss vs. single-ridge width for 2µ m and 2.5 µ m dual-ridges, TE and TM case

To find the best single-ridge width that accounted for these multiple factors, the interface scattering data was complemented by input taper loss data that was calculated using OptiBPM software. The absorption loss is accounted for by using the complex refractive index of the waveguide materials in the simulations. The single-ridge width at the output of the taper was varied from 6 µ m to 14 µ m, and the lowest loss taper was found for each value. A semi-vectorial simulation as used with a 40pts/ µ m in the x-direction, 45pts/ µ m in the y-direction, and a z step of 0.5 µ m. The results are shown in Figure 5.

Figure 5 shows a plateau of low-loss values centered on the optimal single-ridge value of 10.5µ m. While 10.5 µ m is still seen to be the best value of the single-ridge width for minimizing the loss of the device, using slightly smaller single ridge widths results in a shorter taper length and thus a more compact design. This can be clearly seen in the second curve of Figure 5. At an 8 µ m single-ridge width there is only 0.02dB more loss compared to the optimal 10.5 µ m value, and yet the taper required to reach this value is 200 µ m, compared to 550 microns for the optimal loss case. Thus a small trade-off of overall device loss results in a significant improvement in the compactness of the overall design.

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0.55 r il

=

S==-J

H-

In

-J

LU

BUD

400

9 ID IISingle ridge width (microns)

Figure 5. Taper loss/interface scattering loss for the TE mode and taper length for a 2.25 micron dual ridge width and

varying single ride widths

The output dual-ridge waveguide bends form the largest portion of the power splitter and must also be carefully optimized. The optimal dual-ridge waveguide widths of 2.25 µ m must be separated as adiabatically as possible to the desired output waveguide separation of 50 µ m but also tapered to the standard 4 µ m waveguide ridge width. Initially, the ridges were widened while simultaneously separating the waveguides. However, this resulted in excessive scattering or very long adiabatically separating waveguides. The solution was to immediately taper the dual-ridge waveguides to 4 µ m in width after the interface, and then begin separating the ridge waveguides. Using 4 micron waveguides in the bends resulted in stronger waveguiding and hence a more compact device. Since a gap of 2 µ m was the minimum due to fabrication constraints, the dual output waveguides were tapered on the outer edge while the middle gap remained constant, as shown in Figure 6.

Figure 6. Dual output taper design

All tapers and bends were realized using a fourth-order polynomial bend given by:

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0 600 1000 1600 2000 2600 3000

34

21 tty −= [3]

where t=x/L, and L is half the total length of the bend or taper. This equation describes half of the curve; the total curve is given by a reflection of this equation. This equation was chosen so that there would be no discontinuity in the radius of curvature of the waveguide. The radius of curvature of this bend goes to infinity at the ends, where the curve joins a straight waveguide. The radius of curvature, R, is given by:

( )"''' 2/322

yxyxR +

= [4]

Thus, the radius of curvature of a waveguide described by Equation 3 will be:

( )( )( )ttLh

tthLR6632

2

2/322322

−−+

= [5]

The final design of the power splitter is 3.2mm in length and has an excess loss of 0.56 dB for the TM mode and 0.65 dB for the TE mode, for a PDL of 0.09dB. A BPM simulation shown in Figure 7 clearly shows the scattering loss near the single/dual ridge interface, and some less pronounced scattering in the bend regions.

Figure 7. Contour plot of the 3-dB power splitter BPM simulation (1 dB contours) for the TE mode. The “interface” label

shows the discontinuity point between the single and dual ridge waveguides

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===

=

=

8

3. 44

a)

1680

3.48

3.42

34-

O0

0=10

0=20

033

040

450 1500 1550 1500

WveIength (nm)

ISSU 17W

-0.01

-0.02

1600 1660

Wavelength (nm)

1800

3.2 Active region

The characteristics of the active region were determined using a combination of the OptiHS material simulation software and finite-element analysis using FEMLAB. As shown in Figure 1, current is injected into the active layer via two lateral n-contacts and one p-contact on top of the active ridge. The active layer simulated here is bulk, tensile-strained In0.582Ga0.418As0.897P0.103, at a temperature of 300K. Using OptiHS, the material properties of this layer were determined. In particular, the complex refractive index of this layer was determined for varying carrier concentrations and wavelengths, shown in Figures 8a and 8b. At the wavelength of interest, 1550nm, a plot of the imaginary portion of the refractive index vs. the carrier concentration, shown in Figure 9, gives the material transparency carrier concentration. The transparency point, where the imaginary portion of the refractive index goes to zero, occurs at a carrier concentration of 12 x 1017 cm-3.

Figure 8 Carrier concentration and wavelength dependence of a) real portion of the refractive index, b) imaginary

portion of the refractive index of the InGaAsP active layer

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0.02

-0.02

0 5 ID IS 20 26 30 36 40 46 50

Carrier concentration (x 1017 cnr3)

Figure 9. Imaginary portion of the refractive index vs. electron concentration for the InGaAsP active layer at a wavelength

of 1550nm.

A complete modal analysis of the active ridge structure was then performed for each value of the complex refractive index to estimate the performance of the SOA structures. An example of a TM electric field of the active region cross-section is shown in Figure 9. The total active region gain/absorption vs. carrier concentration at 1550nm for TE and TM modes is shown in Figure 10. As expected, since the active layer is now surrounded by lossy layers, the transparency carrier density of the active waveguide structure is higher than the material transparency carrier density. The point of transparency occurs at a carrier concentration of 14.7 x 1017 cm-3 for the TM mode and 15.3 x 1017 cm-3 for the TE mode. Although the absorption differs significantly for smaller carrier concentrations, above the transparency point where this switch would operate there is reasonably small polarization independence. For instance, at a carrier concentration of 20 x 1017 cm-3, the TE gain is 0.46dB while the TM gain is 0.96dB, resulting in a PDL of 0.5dB.

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3

U

-5

ID

IS

-20

S TES TM

U S ID IS 20 26 30 36 40 46 50

Carrier concentration (xIU17 cm3)

Figure 10. TM mode electric field profile of active ridge cross-section

Figure 11. Gain vs. carrier concentration at 1550nm for TE and TM modes

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3.3 Final SOA switch design

The monolithic SOA switch was designed by simulating the active and passive waveguide regions separately. The loss at the interface between the active and passive ridges will be minimal since the mode in the SOA regions is only evanescently coupled into the active layers. A modal overlap calculation shows that there would be a scattering loss of 0.13 dB at an abrupt interface between these two waveguides assuming an active waveguide width of 3.5 µ m. To minimize this loss, the active waveguide ridge was tapered gradually to its final width, as shown in Figure 1. Assuming a minimum feature size of 2 microns, the active ridge could be as wide as 2 microns at the small end of the taper, resulting in a scattering loss from an abrupt junction calculated to be 0.04 dB.

The SOA switch has a 3.2mm input power splitter that has 0.56-0.65dB of excess loss for a total loss at the desired output arm of 3.65dB. The passive-to-active waveguide conversion region will add 0.04dB of loss. Assuming a carrier concentration in the active region of 20 x 1017 cm-3, the calculated gain will be 0.46dB/mm, or 0.46dB for a 1mm long active region and TE polarization. For TM polarization, the gain will be 0.96dB/mm, or 0.96dB for a 1mm long active region. Thus the insertion loss of the desired output signal will be 3.19dB for TE polarization and 2.6 dB for TM polarization. The PDL is therefore ~0.6dB and the total device dimensions are 4.2mm x 0.35mm.

4. CONCLUSION

The design of a 1x2 monolithically integrated SOA switch is described. A modified modal-overlap design method was used to create the power splitter portion of the switch, while OptiHS material simulation software and finite-element analysis were used to estimate the performance of the SOAs. The switch can be fabricated monolithically, without regrowth steps, has an on-chip loss of <3.2 dB, and a compact size of 4.2mm x 0.35mm. This switch is currently in fabrication.

5. ACKNOWLEDGMENTS

This research was performed at the School for Information Technology and Engineering (SITE) at the University of Ottawa. Jason Taylor provided valuable assistance in portions of this research.

Financial assistance was provided by the Canadian Institute for Photonic Innovations (CIPI), National Capital Institute of Telecommunications (NCIT), National Sciences and Engineering Research Council of Canada (NSERC), OneChip Photonics Inc., and the University of Ottawa.

REFERENCES

1. R. Prasanth, J.E.M. Haverkort, and J.H. Wolter, “Compact polarization-independent Mach-Zehnder space switch combining carrier depletion and the quantum confined Stark effect,” 39(2), 379-383, 2003. 2. S. Abdalla, et. al., “Carrier Injection-Based Digital Optical Switch With Reconfigurable Output Waveguide Arms,” IEEE Photon. Technol. Lett., 16(4), 1038-1040, 2004. 3. S.S. Agashe, K.-T. Schiu, and S.R. Forrest, “Compact Polarization-Insensitive InGaAsP-InP 2 x 2 Optical Switch,” IEEE Photon. Technol. Lett., 17(1), 52-54, 2005. 4. H.-M. Mak and H. Yanagawa, “High-Extinction Directional Coupler Switches by Compensation and Elimination Methods,” J. Lightwave Technol., 12(5), 899-908, 1994. 5. E. Ollier, “Optical MEMS Devices Based on Moving Waveguides,” IEEE J. Sel. Topics Quantum Elect., 8(1), 155-162, 2002. 6. G.I. Papadimitriou, C. Papazoglou, and A.S. Pomportsis, “Optical Switching: Switch Fabrics, Techniques, and Architectures,” J. Lightwave Technol., 21(2), 384-405, 2003.

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7. C.M. Gallep, and E. Conforti, “Reduction of Semiconductor Optical Amplifier Switching Times by Preimpulse Step-Injected Current Technique,” IEEE Photon. Tech. Lett., 14(7), 902-904, (2002). 8. M. Janson, et. al., “Monolithically integrated 2x2 InGaAsP/InP laser amplifier gate switch arrays,” Electron. Let., 28(8), 776-778, 1992. 9. E.F. Burmeister, and J.E. Bowers, “Integrated Gate Matrix Switch for Optical Packet Buffering,” IEEE Photon. Technol. Lett., 18(1), 103-105, 2006. 10. B. Jalali, and S. Fathpour, “Silicon Photonics,” J. Lightwave Technol, 24(12), 4600-4615, (2006). 11. V.I. Tolstikhin, “Single-Mode Vertical Integration of Active Devices within Passive Waveguides of InP-Based Planar WDM Components,” IPR ’02, Technical Digest, Vancouver, BC, 17-19 July 2002. 12. R. Millett, H.P. Schriemer, X. Zhang, and M. Cada, “Irrelevance of bending angle in simple Y-branch power splitter design,” Photonics North 2004, Ottawa, ON, 26-29 Sept. 2004.

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