Development of silicon micropattern pixel detectors

Nuclear Instruments and Methods in Physics Research A 348 (1994) 399-408 North-Holland

NUCLEAR INSTRUMENTS

& METHODS IN PHYSICS RESEARCH

Section A

Development of silicon micropattern pixel detectors

E.H.M. Heijne a,* F. Antinori a, H. Beker n G. Batignani m W" Beusch a, V. Bonvicini J, L. Bosisio m.o, C. Boutonnet b, p. Burger s.~, M. Campbell a, p. Cantoni k, M.G. Catanesi g, E. Chesi a, C. Claeys f, J.C. Clemens c, M. Cohen Solal c, G. Darbo i, C. Da Via a, I. Debusschere f, P. Delpierre b.c, D. Di Bari g, S. Di Liberto n, B. Dierickx f, C.C. Enz d, E. Focardi m, F. Forti ,1, y . Gaily c, M. Glaser a, T. Gys a, M.C. Habrard ~, G. Hallewell e, L. Hermans f, J. Heuser P, R. Hurst ~, P. Inzani J, J.J. J~eger b, p. Jarron ", T. Karttaavi "'+, S. Kersten P, F. Krummenacher u,++, R. Leitner r.**, F. Lemeilleur a, V. Lenti g, M. Letheren ", M. Lokajicek r,**, D. Loukas q'**, M. Macdermott e, G. Maggi g, V. Manzari g, P. Martinengo i, G. Meddeler a, F. Meddi n, A. Mekkaoui ~, A. Menetrey a, p. Middelkamp P, M. Morando l, A. Munns t.§~, p. Musico ~, P. Nava k, F. Navach g, C. Neyer e, F. Pellegrini ', F. Pengg ""~, R. Perego J, M. Pindo J, S. Pospisil r,**, R. Potheau c, E. Quercigh a, N. Redaelli J, J. Ridky ~'**, L. Rossi i, D. Sauvage c, G. Segato ', S. Simone g, B. Sopko r.**, G. Stefanini a, V. Strakos ~'**, P. Tempesta g, G. Tonelli m, G. Vegni J, H. Verweij a, G.M. Viertel e, V. Vrba r.** j. Waisbard b

CERN RD19 collaboration a CERN, b Collbge de France, " C P P M Marseille, ~ EPFLausanne, e ETH Zurich, f IMEC Leuven, g 1NFN and Uniuersity o f Bari, h Bologna, i Genova, j Milano, k Modena, lPadova, m Pisa, ~ Roma, o Trieste, p University GHS Wuppertal, q'** Technical Unicersity

Athens, r,** Group Praha, s,§§ Canberra Semiconductor NV, t,§§ GEC-Marconi (Caswell), ~'§~ Smart Silicon Systems SA

Successive versions of high speed, active silicon pixel detectors with integrated readout electronics have been developed for particle physics experiments using monolithic and hybrid technologies. Various matrices with binary output as well as a linear detector with analog output have been made. The hybrid binary matrix with 1024 cells (dimension 75 txm×500 ~m) can capture events at ~ 5 MHz and a selected event can then be read out in < 10 Ixs. In different beam tests at CERN a precision of 25 txm has been achieved and the efficiency was better than 99.2%. Detector thicknesses of 300 txm and 150 ixm of silicon have been used. In a test with a 1°gfd source a noise level of 170 e - r.m.s. (1.4 keV fwhm) has been measured with a threshold non-uniformity of 750 e - r.m.s. Objectives of the development work are the increase of the size of detecting area without loss of efficiency, the design of an appropriate readout architecture for eollider operation, the reduction of material thickness in the detector, understanding of the threshold non-uniformity, study of the sensitivity of the pixel matrices to light and low energy electrons for scintillating fiber detector readout and last but not least, the optimization of cost and yield of the pixel detectors in production.

1. I n t r o d u c t i o n

A development effort for silicon micropattern pixel detectors by the RD19 collaboration is conducted in the f ramework of the CERN detector R & D program in view of application in the future European Large Hadron Col-

* Corresponding author. ** Observer status. + Part-time, from SEFI', Espoo Helsinki.

++ Also with EPF Lausanne, Switzerland. § Fellowship Austria.

§§ The companies Canberra, GEC-Marconi and SSS are not formally member of the collaboration.

lider (LHC). From the work on Charge Coupled Devices (CCD) for particle detection by Damerell [1] the power of true 2-dimensional electronic detectors became immedi- ately apparent. At the first London Conference in 1987 we sketched roads towards a silicon micropat!ern pixel detector which could avoid many of the drawbacks of the CCD in high rate particle physics exper iments [2]. Around the same time also Nygren, Spieler and Kleinfelder at L B L

proposed " s m a r t " pixel detectors [3]. Now, many years later the first real devices are still in the prototype phase but results of their operation can be reported.

In section 2 the specifications for use in elementary particle physics will be described. Work on monoli thic devices will be discussed in section 3 and in section 4 the recent results o f the development work and use of hybrid

0168-9002/94/$07.00 © 1994 - Elsevier Science B.V. All rights reserved SSD1 0 1 6 8 - 9 0 0 2 ( 9 4 ) 0 0 3 7 9 - L

III. SEMICONDUCTOR DETECTORS

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detectors at CERN are given. Applications outside particle physics are briefly regarded in section 5 and some conclusions are drawn at the end.

2. P i x e l d e t e c t o r s f o r h i g h i n t e n s i t y p a r t i c l e p h y s i c s

e x p e r i m e n t s

For the high intensity, high rate particle physics experiments around the year 2000 a true 2-dimensional micro- vertex-detector will allow an essential improvement in the selectivity of the trigger. It is expected that many of the interesting events are characterized by short-lived particles, which often occur within dense jets. These particles can be identified if the detector indicates with < 15 t~m precision the pattern of positions of many simultaneous particles within each time frame of 15 or 25 ns. Whereas it may be possible to deal with the average multiplicity by using several layers of silicon microstrip detectors, the pixel detectors will be essential within the jets and could also alleviate the pattern recognition problems for the microstrip devices.

A number of issues have to be addressed in the development of such pixel detectors: - performance of the analog signal processing in speed,

noise and power; - physics requirements and technological constraints with

a view on detector geometry; - choice of manufacturing technology for detectors, read-

out electronics and interconnections, using hybrid or monolithic microelectronic techniques;

- on-chip/on-board information processing architecture and readout;

- peripheral functions like calibration and power supplies; - mechanical stability and cooling, preferably ambiant

temperature range; - reliability and yield; - survivability compatible with the expected radiation

environment.

2.1. What is a micropattern detector?

The typical pixel detector in a collider experiment will have to cover a relatively large area, of the order of 1 m e with ~ 108 sensor elements, and therefore information processing functions should be incorporated in the detector in order to reduce the need for transmission of voluminous raw data. We proposed to call such a " smar t " device a "micropattern detector". The micropattern particle detector can then be defined as the semiconductor device that consists of a matrix of contiguous particle sensing elements with dimensions between ~ 10 ixm and ~ 500 p,m which each are connected to an individual signal pulse processing chain (amplifier, comparator, memory, etc.) and a hierarchical readout architecture such that the user is provided with a pattern (true 2-dimensional coordinate

information) of the particle positions ( "h i t s " ) at every chosen timeframe, even at an interaction frequency in the MHz range. The high speed capability should allow the use in high multiplicity and high rate environments in the future hadron colliders as well as in heavy ion and B- physics experiments.

The incorporated "ac t ive" signal processing at a mi- croscopic level and (part of the) information extraction operations already on the detector are the features which mostly distinguish the micropattern pixel detector from the CCD pixel detector. In the latter each cell "pass ively" integrates the signal current together with the dark current and the contents of the complete matrix have to be shifted out in order to recognize the particle hits. For low dark current the CCD moreover needs to be cooled to liquid helium or nitrogen temperatures. However, because in CCD there is no electronics in the pixels, the pixel size can be considerably smaller, even below 10 ixm × 10 p~m.

The micropattern detector may be built monolithically in a single semiconductor chip or it may be in a "hybr id" form, with the "sensor-chip" connected by bump-bonds to a "readout-chip" with size similar to that of the sensor chip.

At first the RD19 group has been relatively modest in the performance targets for the binary pixel circuit and in fact we have not implemented on-chip any information processing like zero-suppression or pattern recognition. We aimed at proving feasibility in the Omega WA97 heavy ion fixed target experiment instead of pushing im- mediately for LHC objectives. The reasons for this are two-fold. It is important to encounter and understand the practical problems associated with building a micropattern detector for a real particle physics application. We have been able to overcome many of these problems by address- ing them one-by-one by virtue of the fact that we have some margin between our targets and the requirements of the Omega experiment. The other reason for our approach is to increase the level of confidence in the particle physics community in what has been considered a rather exotic detector.

2.2. Development of an analog pixel cell, Anapix

Besides the binary pixel cell also a cell with analog output has been developed. This cell contains a low noise amplifier, followed by a peak detector, memory and driver. An 8-channel chip has been connected to a segmented detector by wire bonding and the analog characteristics are being evaluated. The noise of the circuit is 100 e - r.m.s, at zero sensor capacitance and is linear up to a signal of 50 000 e- .

The principal objective of the analog matrix to be constructed in the next phase is the study of charge division and signal distribution inside the pixel detector matrix in various detector configurations. In a low multiplicity environment one might consider analog readout for

E.H.M. Heijne et al. /Nucl. Instr. and Meth. in Phys. Res. A 348 (1994) 399-408 401

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Fig. 1. Illustration of the concept of a hybrid pixel detector. The readout chip (a) with 1024 electronic circuits (b) is mated to the detector chip (c) using the bumps (d). A schematic drawing of the assembly is shown in (e).


402 E.H.M. Heijne et al. /Nucl. Instr. and Meth. in Phys. Res. A 348 (1994) 399-408

high precision particle localization using capacitive or resistive charge division schemes which would profit from the high signal/noise ratio caused by the small capacitance of the sensor element. Furthermore, once a comparator has been added to the present analog cell, the availability of the analog signal together with the corresponding discriminator response should allow a more precise study of the factors influencing the comparator threshold distribution.

At the same time, the existence of both an analog and a binary matrix will allow us to make a practical comparison between the relative merits of either solution under different circumstances.

Finally, some of the future experiments may be inter- ested in analog readout in spite of the overhead in power consumption and complexity in the off-line processing. For example, in a dedicated heavy ion physics experiment analog signals allow identification of particles with mo- menta in the low 1 / f l 2 region. Such particles do not reach the outer detector components because of the curl-up of their tracks in the magnetic field. With analog signals also identification of conversions will be possible.

4. Objectives and results in hybrid detector development

The first fully operational hybrid silicon micropattern particle detector has been used at the end of 1991 in the "Omega- Ion" experiment WA94 at CERN [7] which was the predecessor of the heavy ion experiment WA97, now under preparation.

The hybrid detector combines a two-dimensionally segmented silicon detector of 1024 sensor elements (16 columns and 64 rows) with a geometrically identical matrix of electronic readout circuits with fast, low-noise pulse processing electronics in each cell as schematically indi- cated in Fig. 1. A large number of events as in Fig. 2 have been recorded and these show the resolving power of the instrument in the high track density environment. The data from this test have been analyzed [8] and a detailed study was made of the characteristics of the electronics [9] in order to improve the performance.

3. SOI technology for monolithic pixel detectors

In an earlier stage CERN has collaborated with Vanstraelen of IMEC (Leuven) in the study of a detector compatible CMOS technology on high resistivity silicon substrates [4]. In the course of this work it has been concluded that as long as the detector rectifying contacts are made on the front side of the wafer the p-channel devices in the CMOS circuits can be placed only around the periphery. Parker et al. at SLAC have worked on the alternative solution with backside wafer processing for the detector diodes. They successfully made and tested in a Fermilab test beam the first prototypes [5] but so far they have included in the pixel only few transistors.

RD19 is now developing in a further collaboration with IMEC an adapted Silicon-On-Insulator (SOl) processing technology which has been applied to SIMOX, ZMR or bonded wafers. It is expected that this approach should offer more freedom in detector geometry and that full CMOS circuits can be built in the thin silicon layer directly above the detector area. In two reproducible process runs good quality detectors with a reverse leakage current of 10 nA cm 2 have been made, CMOS components have been tested and electrical parameters determined [6]. Simple amplifier circuits have been tested. More elaborate arrays have been designed recently and processing is under way.

The development of special processing technology, attractive as it is, needs extensive resources and takes con- siderable time. After a long development time one then may discover unexpected incompatibilities, which cannot always be eliminated by a change in the processing.

Fig. 2. A high multiplicity event in which 4 tracks are crossing all 3 detector planes (32 mm 2) and 2 more tracks appear in both downstream detectors. Such multiplicities are hard to deal with in

projective detectors.

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4.1. Noise and threshold variations

As in most electronics readout chains for LHC one is confronted with trade-offs between noise, precision, speed and power. We have seen from our first experience that low noise can be achieved with such a highly granular detector because of the small capacitance of the sensor element. It is straightforward to achieve noise levels around 100 e - r.m.s. This then allows a signal level of 10000 e - as provided by a 150 p,m thick Si detector layer.

The absolute calibration of the noise of the complete detector with associated electronics has been performed with a a°gCd radioactive source, which emits photons at 22 keV and 25 keV. By incrementing the threshold value of the discriminator in small steps and differentiating the integral numbers of counts one measures an energy spec- trum as shown in Fig. 3. In this way the noise for the electronic chain in a single pixel could be determined to be 170 e - r.m.s, or 1.4 keV FWHM.

The threshold varies from pixel to pixel and the values are distributed randomly, suggesting that the variation is caused by the poor reproduction of bias currents from one pixel to the next due to geometrical uncertainties in processing. The threshold value distribution has a standard deviation of 750 e - r.m.s, which is equivalent to 15 mV r.m.s, at the input to the discriminator. Monte Carlo simulations of the comparator circuit, using statistical data on the processing parameters as provided by the manufac- turer, have helped to identify the most critical components in the design. The transistors thus identified can be made

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Fig. 3. Differential number of counts in an incremental threshold scan for a single pixel irradiated by a l°9Cd radioactive source. The 22 keV and 25 keV lines are clearly separated, and this

indicates a noise of 170 e- r.m.s, or 1.4 keV FWHM.

less critical by increasing their size, or alternatively, the non-uniformity can be reduced by the use of a 1 Ixm technology instead of a 3 ~xm technology, while keeping the dimensions the same.

4.2. Demonstration of a 150 txm thick detector

In order to reduce loss of tracking precision by multiple Coulomb scattering and at the same time provide a more precise coordinate value along the track it is important to reduce the detector thickness below the customary 300 p~m in silicon microstrip detectors. The noise performance of the silicon pixel detector would in principle allow a signal of a few thousand e-h pairs, compatible with 60 -80 p~m of sensitive thickness. However, in the current binary detector readout the threshold non-uniformity of 750 e - r.m.s. imposes a minimum threshold of ~ 4000 e which enables the use of a signal of 104 e-h pairs from a detector thickness of 150 p~m.

A few silicon wafers of 100 mm diameter and 150 Ixm thickness were processed in the same way as the previous 300 ~ m detector wafers. The patterning, dicing and bonding needs more caution but no loss occurred. The readout chips were of the same thickness as previously (280-300 ~m).

The thin detector units were first tested electrically, and no difference was observed between the thin and thick devices. In a beam test at CERN 120 G e V / c pions are selected by a combination of scintillators, such that these particles cross the center of the detector setup. Alterna- tively, a 300 I~m thick detector and a 150 txm thick detector were employed. Events were recorded and a summed event distribution for each case is shown in Fig. 4. The threshold value for the 150 ~ m detector obviously had to be lowered in order to achieve an efficiency of 97%.

At the lower thresholds employed in this test we discovered that sometimes "propaga t ion" of a hit occurs towards one side of the array, along the column. Such a propagated hit may be seen as background in an event, and because the propagation always goes in the same direction, accumulation occurs towards that side. This can be seen very clearly at the low threshold setting in Fig. 5. The propagation is attributed to cross-talk from the reset signal at the end of the memory cycle into the adjacent pixel. The use of low-level logic should eliminate this phenomenon.

4.3. Readout architecture and timing

Intelligence on-chip will be needed to provide efficient readout / informat ion extraction in large arrays at LHC speed. A first approach towards sparse data readout has been implemented by Boutonnet et al. [10] and this will be used in the matrix now under design for DELPHI. This system makes use of a daisy chain on the lines and on the columns in such a way that the readout signal propagates


404 E.H.M. Heijne et aL /NucL Instr. and Meth. in Phys. Res. A 348 (1994) 399-408

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6 . ~ ~ 50 10

2 O0 2 0 0

OMEGA: 300 ~m, p one 2, 3 .00 V OMEGA: ' 50 ,u,m, p one 2 5 0 0 V

Fig. 4. Beam particles are defined by the coincidence of several small scintillators. The spot measures only ~ 1 mm X 2 mm and its profile is measured by the 300 p,m thick detector (left) as well as by the 150 p,m thick detector, at the same threshold of ~ 5000 e-.

directly to the lines and columns with hit pixels, and retrieves the addresses without ambiguity and without having to scan large numbers of empty pixels.

In order to further optimise the readout of such a highly granular detector it is important to consider very carefully the occupancies including both signals and background. A number of simulations have been done already in preparation for the ATLAS collider experiment proposal. We expect the inner tracker detector to cover a rapidity of up to 1.5 resulting in 20 M pixels per tracker plane, if each pixel has an area of 50 p,m X 500 &m (if possible 200 txm). As the number of particles generated in one LHC bunch crossing is expected to be around 2000, this implies an average occupancy of 10 -4 per pixel per bunch crossing, excluding pile-up and noise. This means that one pixel is highly unlikely to be hit more than once in the ~ 80 crossings during the 2 p,s latency time for the level one trigger. This in turn implies that we need to store at most one time-tag per pixel per level 1 trigger, i.e. pipelining is not required at the level of a single pixel. We are assuming a 15 ns bunch crossing interval which eventually may be relaxed to 25 ns but with equal or even enhanced luminos- ity.

This last statement has a direct effect on the readout architecture to be chosen. It makes the pixel readout architecture quite distinct from that of the projective tracking detectors. With such a low occupancy the optimum power consumption will be obtained using a data driven architecture if possible with unidirectional data transfer. The time stamp may be stored locally in one pixel in digital or analog form and passed to the periphery of the chip only after a level I trigger has been produced. In this case each pixel must be able to reset itself after one level 1 latency period.

An alternative architecture would pass the time stamp information to the periphery in a continuous manner ("peristaltic data transfer"). In either approach the digital control circuitry will have to be rather sophisticated. It may be desirable in a first iteration to implement this on a separate chip. We note that in this case a readout system based on flow of information along a single coordinate (e.g. by columns) presents certain practical advantages.

We now come to the problem of trade-off between speed and noise. We need to be able to give an exact time tag to hit pixels in order not to spoil one of the virtues of the silicon pixel detector, its fast signal. However, because of the very low occupancy of one pixel it is not necessary for the amplifier-discriminator chain to complete signal processing within the bunch crossing interval but merely with a time walk of less than this. Thus we can save power by optimising the time walk to the bunch crossing interval. It is interesting to note here that the time walk of a channel of the Omega2 chip from X 2 to X 10 threshold is already below 20 ns.

A number of control functions, bias current supplies, data bus, masking to suppress noisy pixels, etc. have to be implemented also on the chip periphery or on a separate pilot chip, Such a chip could be placed besides the direct readout chip and the connections, using bump bonds, all would be made at the same time via the Silicon Base Module which serves as the mechanical support as well as sensor array.

4.4. Testing and reliability including preassembly tests for pixel readout chips and detector

The feasibility of multi-chip arrays depends crucially on the availability of tested, fully functional components and one has to study the yield and reliability at all levels in

E.H.M. Heijne et al. /Nucl . Instr. and Meth. in Phys. Res. A 348 (1994) 399-408 405

the assembly in order to obtain in the end satisfactory arrays. Extensive testing of the electronic chips before bonding is necessary because bump bonding is not a reversible process, with the consequence that a malfunc- tioning chip involves the loss of the whole array of several ladders. We have been studying a set of parameters which allows with a high level of confidence to screen malfunc-

tioning chips efficiently. A first parameter is the measured value of the DC currents in the bias resistors. When testing the Omega-D chip we found that most of the malfunction- ing chips showed at least one DC value that is different from the standard one.

In a 2-step procedure the components are tested before the array construction. The DC parameters will be tested

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plane 2" Udis2 = 5,75 V Fig. 5. Projection of the beam spots for 2 different thresholds (5000 e- and 8000 e- ) for 300 Ixm and 150 g,m thick detectors. Hits are summed over all columns. The background of spurious hits with the left-right asymmetry (top) is caused by "propagation" of hits towards

the left side of the detector at low threshold.


406 E.H.M. Heijne et al. / Nucl. Instr. and Meth. in Phys. Res. A 348 (1994) 399-408

J

Fig. 6. Photograph of a single hybrid detector mounting (top left), of a ladder seen from the detector side (top right) and from the readout side (bottom right) and of a multi-chip module with bus lines incorporated.

on wafer using a standard probe station with dedicated probe card. Afterwards, these wafers are bumped, diced and bonded to the matching detectors. The second step is the test of finished, bump-bonded " l adde r s " before glue- ing these on a common ceramic support. Pulsing of the electronics and the detector has been investigated; a suc- cessful attempt using laser-excitation for the electronics was made, a gamma-source for the detector has been used, pulsing of the test row and pulsing at the detector back plane are also feasible. Acceptance limits for the measured parameters have to be defined, in order to decide which chips and which ladders are accepted for mounting of the final array.

Chip testing using a laser scan for the purpose of acceptance has also been studied and this method will certainly be useful as final verification of the assembled array. Evaluation of the detector assemblies is an essential part in our R & D effort because it provides the input for the subsequent improvements.

4.5. First application of the silicon pixel detector in the OMEGA heavy-ion experiment WA97

The experimental challenge consists in recognizing hyperon decays amidst the large density of tracks, up to 10

Fig. 7. Photograph of the ceramic plate with the connecting bus lines that should carry the array of 6 detector ladders with altogether 36 readout chips. On the left of the ceramic 6 readout chips have been mounted but without the detector attached. The wire bond from these

chips to the bus lines are invisible on the picture.

E.H.M. Heijne et al. / NucL Instr. and Meth. in Phys. Res. A 348 (1994) 399-408 407

per cm 2, existing in the region where the hyperon detectors need to be placed. This challenge can only be met by tracking devices capable to determine the space points on a track directly, i.e. with a two-dimensional readout, thus avoiding the large number of spurious points that would be generated from the intersection of wires or strips.

We have tested the first multi-chip " ladder" device covering 0.5 × 4 cm 2 as shown in Figs. 6 and 7 both electrically and with a l°6Ru electron source. Each of two ceramic supports (Fig. 7) carries 6 such detector ladders with the bus lines running perpendicularly underneath. Two successive planes can be staggered such that a 5 X 5 cm 2 area is hermetically covered by the detectors. By 1994 we plan to have three of these multi-chip arrays, which should be integrated into the WA97 hyperon detector. The space points provided by these arrays will improve the pattern recognition capabilities of the detector.

We intend to keep the readout very simple. Each row of pixels on an individual detector produces a 16-bit word and these words can be clocked into a bus at several MHz. A simple zero suppression at the receiving end provides sufficient data reduction for a readout speed compatible with that of the other WA97 detectors.

4.6. Silicon micropattern detectors in the ATLAS experi-

ment

The surface to be covered is ~ 0.5 m 2 for each of the two layers of the inner cylinder. The present proposal is to use Silicon Base Modules (SBMs) consisting of high resistivity Si, of ~ 10 cm 2 area on which 16 electronic readout chips of 8 X 8 mm 2 are bump-bonded. This gives a total of ~ 1200 detector modules. The preferred pixel size is 50 × 200 txm2; if this is impossible, longer pixels could also be acceptable (300 -400 &m). The material thickness of the detector/amplifier module can be as little as 300 p~m but this does not include the cooling and mechanical frame. The total thickness of the SITV using cooling with heat pipes would be about 4% of a radiation length at azimuthal angle 90 ° .

The specifications for the front-end electronics are severe. The total jitter (time walk + others) should be less than 5 ns for a power consumption less than 100 ~W per pixel. A readout system is needed which transmits only the addresses of the pixels hit at a bunch crossing with posi- tive ATLAS trigger (with 15 ns between beam crossings). The experiment is in continuous data acquisition (no inter- rupt on trigger). Because of the large number of sensor elements (about 108) and the small number of hit pixels the readout system should not send high speed signals to all sensor elements but only to hit pixels. This could avoid common mode problems but asks for more intelligence in the pixel cells and also may provide some unusual problems regarding functional testing of the electronics.

5. Other fields of applications

Although the development of the micropattern detectors is undertaken in view of the use in high intensity particle physics experiments one can easily imagine applications in other fields. The low noise and high speed of the pixel electronics would allow single photon counting in a variety of room temperature X-ray imaging experiments, even for intensities ~ 1011 cm -2 s - l . Contrast and dynamic range could be significantly increased in comparison with photo- graphic emulsions while achieving time resolution in the ~s region and possibly also photon energy information. In conjunction with Si sensor elements the micropattern detectors may be used with only relatively simple adaptations in experiments with ~ 10 keV photon beams at syn- chrotron radiation facilities. Some first studies are reported by C. Da Via' elsewhere in this Proceedings [11].

The hybrid approach enables the coupling of sensor chips made of heavy materials like CdTe or GaAs, which can achieve a better X-ray absorption efficiency than Si. This would allow extension of the applications towards the 100 keV region.

In another application that is studied in collaboration with an LAA group the pixel device is placed within a vacuum tube in which electrons are accelerated. Photoelec- trons with an energy of 30 keV penetrate silicon to a depth of less than 10 I.zm. Consequently, the design and quality of the surface of the detecting substrate are rather critical. The use of a thinned substrate would provide the advantages of reduced material, less severe demands on the substrate quality, reduced reverse bias voltage and lower sensitivity to irradiation. A monolithic approach using the SOl-technology on a high resistive detecting substrate seems to meet better the conditions of an image intensifier tube environment (as explained above, proximity of the photocathode or required vacuum for example).

Long term use of these devices poses the problem of radiation damage. The more efficient the detector, the less radiation can reach the downstream readout chip. Actually, silicon CCD are for this reason often used in conjunction with very thick phosphors. With the CCD one does not detect single photons but one integrates all charge during a time-frame of interest. In order to eliminate noise caused by the leakage current the device usually has to be cooled to cryogenic temperature and window effects can degrade the imaging performance.

Mass-production could in principle lead to detectors of acceptable cost, like it has been the case for CCD. How- ever, there is at this time no attractive consumer product like the video camera that needs a 10 MHz imaging sensor. The best way to achieve low cost devices is to adopt standard CMOS production technology and interconnect methods available from infrared devices or flat panel manufacturers,

IlL SEMICONDUCTOR DETECTORS

408 E.H.M. Heijne et aL /Nucl . Instr. and Meth. in Phys. Res. A 348 (1994) 399-408

6. Conclusions References

One should be aware that each iteration in the detector development and evaluation takes between 1 and 2 years. A group of experienced specialists may develop a fully operational device in 2 to 4 iterations and this leads to a typical development time of ~ 5 years. This time-scale is similar to that for typical VLSI IC development, in particu- lar for microprocessor or memory devices. In industry much larger groups are engaged for such projects, but we cannot and need not demand comparable reliability and manufacturing cost optimization. In comparison with the development time, on the contrary, final production can be much shorter, usually taking less than 2 - 3 months. Com- ponent testing, if well prepared industrially, can be performed also in a relatively short time. Moreover, the cost for the final manufacturing will be significantly lowered if a comprehensive test protocol has been developed well in advance and no surprises are allowed to be discovered in an advanced state of system construction.

Acknowledgements

It is a pleasure to acknowledge the effective work of our industrial partners and the continuous encouragement by the CERN Detector R & D Committee.

[1] C.J.S. Damerell, R.L. English, A.R. Gillman, A.L. Lintern, F.J. Wickens, G. Agnew and S.J. Watts, Nucl. Instr. and Meth. A 253 (1987) 478.

[2] E.H.M. Heijne, P. Jarron, A. Olsen and N. Redaelli, Nucl. Instr. and Meth. A 273 (1988) 615.

[3] H. Spieler, Proc. Int. Conf. on the Impact of Digital Micro- electronics and Microprocessors on Particle Physics, eds. M. Budinich, E. Castelli and A. Colavita.

[4] G. Vanstraelen, C. Claeys, I. Debusschere and G. Declerck, Nucl. Instr. and Meth. A 305 (1991) 541.

[5] W. Snoeys, J. Plummer, G. Rosseel, C.H. Aw, C. Kenney and S. Parker, Nucl. Instr. and Meth. A 326 (1993) 144, 1992.

[6] B. Dierickx et al., IEEE Trans. Nucl. Sci. NS-40 (1993) 753. [7] F. Anghinolfi et al., IEEE Trans. Nucl. Sci. NS-39 (1992)

650. [8] H. Beker et al., Nucl. Instr. and Meth. A 332 (1993) 188. [9] M. Campbell et al., Nucl. Instr. and Meth. A 342 (1994) 52.

[10] J.J. Jaeger, C. Boutonnet, P. Delpierre, J. Waisbard and F. Plisson, A sparse data scan circuit for pixel detector readout, submitted to IEEE Trans. Nucl. Sci.

[11] C. Da Via', M. Campbell, E.H.M. Heijne and G. Stefanini, Imaging of visible photons using hybrid silicon pixel detectors, presented at this Conference (3rd London Conf. on Position Sensitive Detectors London, UK, 1993).

Documents

Development of silicon micropattern pixel detectors