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STM, dev,clojure,
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@diego_pachecoSoftware Architect | Agile Coach
STM
Moore's law (Number os Transistors double ~2 years)
AMD Athlon 64 FX-53 CPU 2.4 GHz - Single CORE - 2005
Single Thread App: It’s ALL OVER !!!
More Than one CORE: Dual, Quad, etc..
Concurrent Threads == Challenges
Order of operations is not fixed…
Difficult to repeat failures…
WE often don’t think this way…
Testing effort is bigger…
JOB
P1
P2
P3
P5P4
JOBDONE
Multithreaded: 2 General Categories
JOB Group
JOB GroupDONE
J1J2
J3
J4 J5
Current Models
LocksActors
STM
Current Models - LOCKS
Locks
Shared-Memory
Surreal
OO
Actors
Current Models - Actors
NO Shared Data
Async Messages Lightweight Threads
Current Models - STM
STM
ACID
STM Implementations Guarantee NO:
Livelock
Race Conditions
Dead Locks
STM Issues:
Retry Waste: Lots of transactions retry
Overhead: Transaction Bookkeeping
Lack of Tools: Identify, learn, tunning, etc...
Clojure/Haskell: All Immutable
Everything is immutable!Change: AlwaysInside a Transaction.
Clojure: Persistent Data Structures
Clojure STM Implementation
Multi-Version Concurrency Control (MVCC) + Snapshot isolation
Databases (Mysql, Postgress & Oracle), Subversion, EhCache, JBoss Cache Clojure and several other solutions…
@diego_pachecoSoftware Architect | Agile Coach
STM
Thank You!