21
@diego_pacheco Software Architect | Agile Coach STM

STM

Embed Size (px)

DESCRIPTION

STM, dev,clojure,

Citation preview

Page 1: STM

@diego_pachecoSoftware Architect | Agile Coach

STM

Page 2: STM

Moore's law (Number os Transistors double ~2 years)

Page 3: STM

AMD Athlon 64 FX-53 CPU 2.4 GHz - Single CORE - 2005

Page 4: STM

Single Thread App: It’s ALL OVER !!!

Page 5: STM

More Than one CORE: Dual, Quad, etc..

Page 6: STM

Concurrent Threads == Challenges

Page 7: STM

Order of operations is not fixed…

Page 8: STM

Difficult to repeat failures…

Page 9: STM

WE often don’t think this way…

Page 10: STM

Testing effort is bigger…

Page 11: STM

JOB

P1

P2

P3

P5P4

JOBDONE

Multithreaded: 2 General Categories

JOB Group

JOB GroupDONE

J1J2

J3

J4 J5

Page 12: STM

Current Models

LocksActors

STM

Page 13: STM

Current Models - LOCKS

Locks

Shared-Memory

Surreal

OO

Page 14: STM

Actors

Current Models - Actors

NO Shared Data

Async Messages Lightweight Threads

Page 15: STM

Current Models - STM

STM

ACID

Page 16: STM

STM Implementations Guarantee NO:

Livelock

Race Conditions

Dead Locks

Page 17: STM

STM Issues:

Retry Waste: Lots of transactions retry

Overhead: Transaction Bookkeeping

Lack of Tools: Identify, learn, tunning, etc...

Page 18: STM

Clojure/Haskell: All Immutable

Everything is immutable!Change: AlwaysInside a Transaction.

Page 19: STM

Clojure: Persistent Data Structures

Page 20: STM

Clojure STM Implementation

Multi-Version Concurrency Control (MVCC) + Snapshot isolation

Databases (Mysql, Postgress & Oracle), Subversion, EhCache, JBoss Cache Clojure and several other solutions…

Page 21: STM

@diego_pachecoSoftware Architect | Agile Coach

STM

Thank You!