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OP-AMP applications
UNIT-5
Mohammad Asif IqbalAssistant Professor, Deptt of ECE,JETGI, Barabanki
Basic Op-Amp
The op-amp is a differential amplifier with a
very high open loop gain 25k ≤ AVOL ≤ 500k (much higher for FET inputs) high input impedance 500k ≤ ZIN ≤ 10M
low output impedance 25 ≤ RO ≤ 100
Op-Amp Equivalent Circuit
Op-Amp Specifications – DC Offset Parameters
• Even though the input voltage is 0, there will be an output. This is called offset. The following can cause this offset:• Input Offset Voltage• Output Offset Voltage due to Input Offset Current• Total Offset Voltage Due to Input Offset Voltage and Input Offset Current• Input Bias Current
General Op-Amp Specifications VIO
• Input Offset Voltage VIO
• The voltage that must be applied to the input terminals of an op amp to null the output voltage
• Typical value is 2mV with a max of 6mV• When operated open loop, must be nulled or device may saturate
General Op-Amp Specifications IIO
• Input Offset Current• The algebraic difference between the two input currents• These are base currents and are usually nulled• Typical value IIO 20 nA with a max of 200nA
Technique to Null VO
• Short Input terminals to ground• Connect potentiometer between compensation pins with wiper to VEE
• Potentiometer is usually a 10 turn device
• Connect meter to output and adjust potentiometer for VO = 0
General Op-Amp Specifications CMRR
• Common Mode Rejection Ratio• The ratio of the differential voltage gain (AD) to the common mode gain (ACM)• ACM is the ratio between the differential input voltage (VINCM) applied common mode,
and the common mode output voltage (VOCM)• it can exceed minimum is 70db with a typical value of 90 db• in properly designed circuit, it may exceed 110db
OD
IN
OCMCM
CM
D
CM
VA = V V A = V
A CMRR = 20 log A
General Op-Amp Specifications
• Input Bias Current• The average of the currents that flow into the inverting and noninverting
terminals• Typical values rage from 7nA to 80 nA
• Differential Input Resistance• Also know as the input resistance• Resistance seen looking into the input terminals of the device• Runs from a low of 2M for an LM741 to a high of 1012 for FET input devices
• Output resistance• Resistance between the output terminal ad ground• Typical values are 75 or less
• Input Capacitance• The equivalent capacitance measured at either the inverting or noninverting
terminal with the other terminal connected to ground• May not be on all spec sheets• Typical value for LM741 is 1.4pF
B+ B-B
I + I I = 2
General Op-Amp Specifications
• Power Supply Range• May be differential or single ended• Max is ± 22V
• Output Voltage Swing• Range of output voltage• Depends on power supply voltage used (typically about 85% to 90%)• Usually about ±13.5V for a power supply voltage of ±15V
• Slew Rate• The maximum rate of change in the output voltage in response to an input change• Depends greatly on device, higher is better (output resonds faster to input changes)• For LM741 it is .5V/s while for the LM318 it is 70V /s
• Gain Bandwidth Product• The bandwidth of the device when the open loop voltage gain is 1
Op Amp Equivalent Circuit
Practical Op-Amp Circuits
Typical Op-amp circuit configurations include the:• Unity Gain Buffer (Voltage Follower)• Inverting Amplifier• Noninverting Amplifier• Summing Amplifier• Integrator• Differentiator
Note: the integrator and differentiator are considered active filters
Unity Gain Buffer (Follower)
OV
1
O = 1
V
V A = V
V VA = 1
Inverting Op Amp
The input is applied to the inverting (-) inputthe non-inverting input (+) is groundedRF is the feedback resistor, and is connected from the output to the inverting inputThis is called negative feedback
Inverting Op Amp
We assume that no current enters the inverting terminalII- < 100nAVD 0V
O IN FV
S IN 1
FV
1
V I RA = = - V I RRA = -R
Inverting Op-Amp Gain
Closed Loop Gain is controlled by the external resistors: RF and R1
For Unity Gain: AV is -1 and RF = R1
The minus sign denotes a 180 degree phase shift between input and output
O IN FV
S IN 1
FV
1
V I RA = = - V I RRA = -R
F V
1
RA = - = -1R
Inverting Op Amp Compensated for Ibias
R is used to compensate for difference in IBIAS+ and IBIAS-
FV
1
RA = -R
Inverting Op-Amp
This configuration achieves high gain with a smaller range of resistor values than the basic inverter
A
V-
V+
2 F 2 FV
1 1 3
R + R R R A = - + R R R
Inverting Amplifier with High Zin
Use a Unity Gain Buffer to obtain a very high input resistance with an inverting amplifier
20
Inverting Amplifier for Low RL
Use a Unity Gain Buffer to obtain a very high input resistance to drive a low impedance load
Noninverting Amplifier
V- = V+ = vi
2O in
O 2V
in
R V = V 1 + R1
V R A = = 1 + V R1
Noninverting Op Amp Compensated for IBIAS
Rbias is used to compensate for difference in IBIAS+ and IBIAS-
Differential (Difference) Amplifier
A
AV1V2
O 2V
2 1 1
V R A = - = V - V R
-
Differential Amplifier Output
Instrumentation Amplifier Buffered Input
R1 = R2, RF1 = RF2F
V1
RA = R
-
Instrumentation Amplifier
R1 = R2, RF1 = RF2
F AV
1 B
R R A = 1 + 2 R R
-
Inverting Summing Amplifier
By applying KCL to the multiple inputs, we can consider the contribution of each source individuallyIF + I- = I1 + I2 + I3
but I- 0\IF = I1 + I2 + I3
VO = -IF RF
F F FO 1 2 3
1 2 3
1 2 3 O F
1 2 3
R R RV = - V + V + VR R R
V V VV = - R + + R R R
Non-inverting Summing Amplifier
Perform a source transformation for each inputSum the current sources and find RTH for the resistancesVIN+ = IT RTH
1 2 3IN + TH
1 2 3
TH 1 2 3
IN +O IN F
IN
O F V
IN + IN
V V V V = + + RR R R
where R = R // R // RVV = R + R R
V RA = = 1 + V R
The output is the integral of the inputThis circuit is a low-pass filter circuit, and is used and sensor conditioning circuits
(t)dtvRC1(t)v 1o
Integrator
Differentiator
The differentiator takes the derivative of the inputThis circuit is a high-pass filter circuits
dt(t)dvRC(t)v 1
o
Comparator
• High Gain Op Amp• Operated Open Loop• Designed to compare an input to a reference voltage• Gives output (digital level) to indicate if input is above or below reference
• Circuit designed to give VOSAT and –VOSAT only
Comparator Operation Example
Block Diagram of 555
Astable Multivibrator
555 Used as an Astable Multivibrator
Schmidt Trigger 7414
• A Schmidt trigger (a comparator with Hysteresis) is a bistable digital (two-state) device
• It accepts virtually any analog input and provides a logic 0 or 1 output• A typical use is to take distorted digital signals (due to RC time constant of transmission
line) and provide a used to square-wave output• Can be used to eliminate noise near reference point that would cause problems in analog
comparators
Real world (lab) is analog
V
t t
Computer (binary) is digital
D/A Conversion Computer DAC
Computer DACA/D Conversion
V
Digital to Analog Conversion (DAC or D/A)
8 bits
ComputerA/D
Digital to Analog conversion involves transforming the
computer’s binary output in 0’s and 1’s (1’s typically = 5.0
volts) into an analog representation of the binary
data
D/A conversion can be as simple as a weighted resistor network
4 - bit DAC Converter
Resistor values correspond to binary weights of the number D3 D2 D1 D0 , i.e. 1/8, 1/4, 1/2, and 1
Using EWB we can model this device
1. This setup requires a wide range of precision resistors
A 10 bit DAC needs resistors ranging from R to R/1024.
2. The circuit driving the DAC (usually a computer) must supply a wide range of currents for a constant Vout
Difficulties:
For a 8-bit DAC
Smallest step in output voltage is v/256
8 bits corresponds to 256 different values
For a 5.0 volt DAC this step size is ~ 19.5 mV
As was seen in the Workbench example, the output voltage from a DAC can change by only discrete amounts, corresponding to the level associated with a 1 bit binary change.
A modification of the weighted resistor DAC is the so called R-2R LADDER DAC, that uses only 2 different resistances
An actual R-2R DAC showing input 1 0 1 1
Voltmeter reading is determined by the binary number ABCD and the resistor weights
MSB = 1/2 of Vref
= 1/4 of Vref
= 1/8 of Vref
LSB = 1/16 of Vref
1 0 1 1 = 1/2 (5) + 1/4 (0) + 1/8 (5) + 1/16 (5) 3.4 volts
In actual DACs, the converters will drive amplifier circuits in most cases
Amplified DAC with bipolar ( ± Vout ) output
If one wants only positive or negative output, one can use a BASELINE ADJ. for the Op Amp
Analog-to Digital Conversion (ADC or A/D)
A/D
8 bits
Computer
An ideal A/D converter takes an input analog voltage and converts it to a perfectly linear digital representation of the analog signal
If you are using an 8-bit converter, the binary representation is 8-bit binary number which can take on 28 or 256 different values. If your voltage range were 0 - 5 volts, then
0 VOLTS 0000 0000
5 VOLTS 1111 1111
An 8-bit converter can represent a voltage to within one part in 256, or about 0.25 %. This corresponds to an inherent uncertainty of ± ½ LSB (least significant bit).
Decimal 128 = 0 1 1 1 1 1 1 1
Bit 1Bit 2Bit 3Bit 4Bit 5Bit 6Bit 7 Bit 0
LSBMSB
Notice the bits are designated B7 - B0. Bit B7 is the Most Significant Bit while B0 is the Least Significant Bit
0000
0000
0000
0001
0000
0010
0000
0011
1111
1111
1111
1110
1111
1101
. . . . . . . . .
Volt
age
(Vol
ts)
Analog Voltage
1111
1100
1 LSB
Number of Bits (N) Resolution (1/2N) Increment (mV) for 5 volts
6 1/64 78.1
8 1/256 19.6
10 1/1024 4.9
12 1/4096 1.2
14 1/16384 0.3
16 1/65536 0.07
Types of Analog to Digital Converters
1. Counter Type
2. Integrating or Dual Slope
3. Parallel or Flash
4. Successive Approximation
Counter Type
Control Logic
D A C Counter
START
Vin
Comparator
Digital Output
clock
• When START is received,
• control logic initializes the system, (sets counter to 0), and
• turns on Clock sending regular pulses to the counter.
As the Clock sends regular pulses to the counter, the counter outputs a digital signal to the Digital-to-Analog converter
D A C Counter
START
Vin
Comparator
Digital Output
clock
Control Logic
Control Logic
D A C Counter
START
Vin
Comparator
Digital Output
clock
As the counter counts, its output to the D A C generates a staircase ramp to the comparator.
Control Logic
D A C Counter
START
Vin
Comparator
Digital Output
clock
As the ramp voltage increases to the comparator, it rises closer and closer to Vin at which point the comparator shifts states
When the ramp voltage exceeds Vin , the comparator output shifts which signals the control logic to turn off the clock
Vin
Conversion time
V’in
Conv.time
With the clock off, the counter reading is proportional to Vin
Note that the conversion time depends on the size of the input signal
Vin
Comparator
Control Logic
D A C Counter
START
Vin
Comparator
Digital Output
clock
Once the digital output has been read by the associated circuitry, a new start signal is sent, repeating the cycle.
With a counter type A/D, if the signal is varying rapidly, the counter must count up and reset before each cycle can begin, making it difficult to follow the signal.
Track & Hold Logic
D A C
Up/Down Counter
Vin
Comparator
Digital Output
clock
Tracking ADC - similar to the counter type except it uses an up/down counter and can track a varying signal more quickly
Vin
-Vref
Control logic
Counter
clock
comparator
integrator
Digital Output
Integrating or Dual Slope A/D
Vin
-Vref
Control logic
Counter
clock
comparator
integrator
Digital Output
When conversion is initialized, the switch is connected to Vin which is applied to the op amp integrator. The integrator output (>0) is applied to the comparator
Vin
-Vref
Control logic
Counter
clock
comparator
integrator
Digital Output
As conversion is initiated, the control logic enables the clock which then sends pulses to the counter until the counter fills (9999)
Vin
-Vref
Control logic
Counter
clock
comparator
integrator
Digital Output
overflow
As the counter resets (9999 0000), an overflow signal is sent to the control logic
this activates the input switch from Vin to -Vref , applying a negative reference voltage to the integrator
The negative reference voltage removes the charge stored in the integrator until the charge becomes zero.
The total number of counts on the counter (determined by the time it took the fixed voltage Vref to cancel Vin ) is proportional to the input voltage, and thus is a measure of the unknown input voltage.
At this point, the comparator switches states producing a signal that disables the clock and freezes the counter reading.
fixed timemeasured time
Inte
grat
or O
utpu
t Vol
tage full scale conversion
quarter scale conversion
half scale conversion
The operation of this A/D requires 2 voltage slopes, hence the common name DUAL-SLOPE.
charging up the capacitor discharging the
capacitor
Since this A/D integrates the input as part of the measuring process, any random noise present in the signal will tend to integrate to zero, resulting in a reduction in noise.
These type of A/D s are used in almost all digital meters. Such meters usually are not used to read rapidly changing values in the lab. Consequently the major disadvantage of such converters (very low speeds) is not a problem when the readout update rate is only a few times per second.
Successive-Approximation A/D
Successive Approximation
Register
D/A ConverterVref
clock
analog input
Digital Output Data
At initialization, all bits from the SAR are set to zero, and conversion begins by taking STRT line low.
comparator
STRT
Successive Approximation
Register
D/A ConverterVref
clock
analog input
Digital Output Data
comparator
STRT
Successive-Approximation A/D
First the logic in the SAR sets the MSB bit equal to 1 (+5 V). Remember that a 1 in bit 7 will be half of full scale.
Successive Approximation
Register
D/A ConverterVref
clock
analog input
Digital Output Data
comparator
STRT
Successive-Approximation A/D
The output of the SAR feeds the D/A converter producing an output compared to the analog input voltage. If the D/A output is < Vin then the MSB is left at 1 and the next bit is then tested.
Successive Approximation
Register
D/A ConverterVref
clock
analog input
Digital Output Data
comparator
STRT
Successive-Approximation A/D
If the D/A output is > Vin then the MSB is set to 0 and the next bit is set equal to 1.
Successive bits are set and tested by comparing the DAC output to the input Vin in an 8 step process (for an 8-bit converter) that results in a valid 8-bit binary output that represents the input voltage.
CLOCK PERIOD
¼FS
½FS
¾FS
1 2 3 4 5 6 7 8
analog input voltage
D/A output for 8-bit conversion with output code 1011 0111
Successive approximation search tree for a 4-bit A/D
1111
1110
1101
1100
1011
1010
1001
1000
0110
D/A output compared with Vin to see if larger or smaller
0111
0101
0011
0010
0100
0001
Note that the successive approximation process takes a fixed time - 8 clock cycles for the 8-bit example.
For greater accuracy, one must use a higher bit converter, i.e. 10-bit, 12-bit, etc. However, the depth of the search and the time required increases with the bit count.
THANK YOU!
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