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VLSI Design Course 2001
CAD ToolsCAD ToolsMagic/IRSIM/SPICEMagic/IRSIM/SPICE 簡介簡介
Presenter :林郁翔Rm 330
4/06/2001
VLSI Design Course 2001
OutlineOutline
• Introduction
• Magic – Layout Editor
• IRSIM – Logic-level simulator for MOS circuits
• SPICE – Transistor-level simulator for MOS circuits
VLSI Design Course 2001
IntroductionIntroduction
Design Circuits Circuit-levelSimulator
SPICE
Layout ToolsMagic
Logic-levelSimulator
IRSIM
extract
verification
A
CC=A?
VLSI Design Course 2001
Magic – Layout EditorMagic – Layout Editor
VLSI Design Course 2001
What is Magic?What is Magic?
• A color painting tool?– Quite a bit about the nature of VLSI circuit
layout
• Additional operations– Built-in Design-Rule-Check (DRC)– Built-in Hierarchical circuit extractor– Some useful functions such as routing
tools
VLSI Design Course 2001
How to Get Help?How to Get Help?
• Manual– Hard copies– Electronic files
• postscript files available on workstation: – ~r89004/vlsi/magic_tutorial (tutorial files)– ~r89004/vlsi/magic_tutcells (example files for tutorial)
• On-line help– >> :help subject
VLSI Design Course 2001
Running MagicRunning Magic• 在 Linux 中的 magic 及 irsim, 均需要將 CAD_HOM
E 環境變數設到 /home/cad 目錄下 , 也就是 , 如果用的是 C Shell (csh, tcsh), 要加入下列兩行到 $HOME/.cshrc 中
setenv CAD_HOME /home/cad
set path=($path $CAD_HOME/bin)• 可在 shell 檔內加上 alias ,例:
alias magic 'magic -dX11 -T tsmc0p8_spdm' 則以後只要鍵入 magic iv 即可執行
• 在 Linux 中執行>> magic –dX11 –T tsmc0p8_spdm filename
VLSI Design Course 2001
The Box & the CursorThe Box & the Cursor
• Used to select things on the color display
Mouse left button
Mouse right button
VLSI Design Course 2001
Invoking CommandsInvoking Commands
• Invoking Commands– Type “:”(colon) or “;”(semi-colon) to invoke
command– Use macro
• E.g. ‘u’ means “:undo”
VLSI Design Course 2001
Painting CommandsPainting Commands
• Basic Painting– :paint layers (color)– :erase layers
• “ ^D ” (erase all layers underneath the cursor)
– Use Mouse• Select or box what U would like to paint• Move to the color (layer) U would like to paint• Press middle button (or press left & right
together if U use 2-button mouse)
VLSI Design Course 2001
Select CommandsSelect Commands
• If I mistake to take action…– :undo(u)– :redo(U)
• Select– Move over the portion and type ‘s’ – Type ‘S’ to select more – Select area ‘a’ / select more area ‘A’– Clear out the selection
• ‘C’ or “:select clear”
VLSI Design Course 2001
Commands on selectionCommands on selection
• Command on selection– :delete d– :move q(l), w(d), e(u), r(r)– :stretch Q, W, E, R– :copy c– :upsidedown (vertically flip)– :sideway (horizontally flip)– :clockwise
VLSI Design Course 2001
Label CommandsLabel Commands
• Label– :label [ text [ position [ layer ] ] ]– Erase a label
• Select it and delete it
– Erase all labels• :erase labels
– Labeling conventions• Vdd! GND! (important!!)
VLSI Design Course 2001
Other CommandsOther Commands
• Save to files– :writeall– :save [ filename ]
• Magic file format : *.mag
• Utility Commands– :grid [spacing]– :zoom z / Z (zoom in/out)
• Leaving Magic– :quit ( :q)
VLSI Design Course 2001
Advance Painting Commands(1)Advance Painting Commands(1)
• More useful painting – wiring– :tool (macro ‘space bar’)– :tool box (return to box mode)– Painting steps:
• Select the material you want to paint• Left click the material • Move the cursor and right click the path you
would like to paint • Use middle click to place contact
VLSI Design Course 2001
Advanced Painting Commands(2)Advanced Painting Commands(2)
• Manipulating Subcells– :getcell (name)– :array xsize ysize
• Cell Hierarchy– Expanding
• x (expand)• X (overview)
• Design Rule Checking– :drc why– :drc find
VLSI Design Course 2001
IRSIM – Logic-level simulator for IRSIM – Logic-level simulator for MOS circuitsMOS circuits
VLSI Design Course 2001
Function of IRSIMFunction of IRSIM
• Logic-level simulation (based on RC model)• Display simulation waveform• Differences from SPICE
– IRSIM is an event-driven logic-level simulator for MOS transistor circuits.
– SPICE is a circuit analysis tool for simulation of electrical circuits in steady-state, transient, and frequency domains.
VLSI Design Course 2001
IRSIM EXAMPLEIRSIM EXAMPLE
Follow the next steps:1. Load layout file and extract in magic command .
:load or4:extract
2. Convert .ext file to .sim file.ccsun> ext2sim or4.sim or4.ext
3. Construct command file for IRSIM.Use any text editor to edit command file *.cmd.
VLSI Design Course 2001
COMMAND FILE EXAMPLECOMMAND FILE EXAMPLE
***************or4.cmd*********************
h Vdd!
l GND!
vector INPUT a b c d
clock Vdd! 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
V INPUT 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111
R 1
VLSI Design Course 2001
Logic WaveformsLogic Waveforms
4. Execute IRSIM with *.sim and *.or4ccsun> irsim tsmc08.prm or4.sim -or4.cmd
5. Run analyze windowirsim> ana a b c d z
6. Analyzer window with simulation results will pop up.
VLSI Design Course 2001
ANALYZE WINDOWANALYZE WINDOW
VLSI Design Course 2001
SPICE – Transistor-level simulator SPICE – Transistor-level simulator for MOS circuitsfor MOS circuits
VLSI Design Course 2001
Magic to SpiceMagic to Spice
• Convert magic extracted files to spice net files ext2spice name.sp name.ext
VLSI Design Course 2001
SPICESPICE
• SPICE : Simulation Program with Integrated Circuit Emphasis
• Developed by University of alifornia/Berkeley (UCB) and is largely used by VLSI design
• Numerical Approach to Circuit Simulation– Circuit Node/Connections Define a Matrix
VLSI Design Course 2001
SPICE ExampleSPICE Example
1
Vin Vout
Vdd
Vss0
5
211
**********title********** .lib 'tsmc08.model' TT.option post.op.global vdd vss ** Circuit Description **M1 2 1 5 5 PCH L=1um W=1umM2 2 1 0 0 NCH L=1um W=1umC1 2 0 50f*drain gate source substrate
VLSI Design Course 2001
SPICE Example(cont’d)SPICE Example(cont’d)
** Sources**Vin 1 0 DC +2.5VVDD vdd 0 DC +5VVSS vss 0 DC 0V
** Analysis Requests **.DC Vin 0 5 0.1 .end
VLSI Design Course 2001
Output WaveformOutput Waveform
• >awaves
VLSI Design Course 2001
More about SPICE simulationMore about SPICE simulation
• Timing analysis– .tran tincs tstop– Clock source:
PULSE ( V1 V2 < Tdelay Trise Tfall Pwidth Period > )
• Sub circuit– Example:
.SUBCKT INV IN OUTM1 OUT IN VDD 0 P L=0.5u W=WPM2 OUT IN 0 0 N L=0.5u W=WNR1 OUT 4 1K.ENDS INV
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