Real-time Ethernet Protocol for connection of distributed...

1GDNET , Riccardo Ragnoli WFCS 2006

Torino, 27 June 2006 WFCS INDUSTRY DAY

Riccardo RagnoliSoftware Research Dept.

ragnoli@gefran.com

Real-time Ethernet Protocol

for connection of

distributed I/O

2GDNET , Riccardo Ragnoli WFCS 2006

COMPONENTS

Indication and control

of process variables

SENSORSMeasurement of

process variables

SYSTEMSHardware & Software for Automation

and Control of machines and industrial processes

MOTION CONTROL CC and AC motors

control

Gefran in the world

3GDNET , Riccardo Ragnoli WFCS 2006

Plastic machinery

•EXTRUSION

•BLOW MOULDING

•INJECTION MOULDING

•THERMOFORMING

4GDNET , Riccardo Ragnoli WFCS 2006

Plastic machinery: critical aspects

Number

of I/O

Timing performance

Numberof

Nodes

Jitter free

1 - 23 - 43 - 42 - 3

EXTRUSION BLOW MOULDING INJECTION MOULDINGTHERMOFORMING

= low critical = medium critical = high critical

5GDNET , Riccardo Ragnoli WFCS 2006

Plastic machinery: injection

• Main regulation

Cylinder temperature: typ . 8 thermocouples

Hot runner temperature: typ. 8 thermocouples

Position, Speed and Pressure of injection movements: analog input and output

Position Speed and Pressure of mould movements: analog input and output

• Type and number of I/O (typ.) = 48 DI, 48 DO, 8 AI, 8 AO, 16 Thermo Loop

6GDNET , Riccardo Ragnoli WFCS 2006

Threshold interception during injection movement Threshold interception during injection movement Plastic machinery: injection

PressureSpeed Injectionposition

Out flow

Threshold

Out pressure

t

Analoginput/output

Td : must be known and repeteable(Td ~ 1 ms, σTd ~ 3 µs)

Td

Position

7GDNET , Riccardo Ragnoli WFCS 2006

Threshold interception during injection movement Threshold interception during injection movement Plastic machinery: injection

PressureSpeed Injectionposition

Position

transducer

Td

Out flowOut pressure

Master

8GDNET , Riccardo Ragnoli WFCS 2006

Patent Pending

First RTE protocol in Italy

First plant running from 2004

Developed in collaboration with

University of Brescia

GDNET the solution of Gefran

State of the art (2003)

Fast I/O: local busDistributed I/O: CANopen

2003: no open RTE available

Technical requirements

I/O distribute High performance

Typ.Tc <= 1ms Jitter < 10µs

Few nodes (typ. 4)

Master requirements

PC-based R.T.O.S

No microprocessor for communicationVery light Software for

communication.

Industrial requirements

Std. Ethernet Hardware - RJ45, cat5, 100BaseT

- Different network cards- switch or hub

9GDNET , Riccardo Ragnoli WFCS 2006

GDNET: nodesGF-BOX: Network Master

• CPU Intel® Celeron® 400MHz, R.T.O.S • Etx technology (ethernet chip on board)• SoftPlc and HMI • GDNet interrupt handled every Tc ± 20 µs

• µP 32 bit, 200 MHz , 100Base-T, RJ45• Local timing (resolution ~150ns)• A/D: 16 bit (Tconv ~ 6µs)• D/A: 16 bit (Tconv ~ 10µs)• Thermal module = 8 thermocouples/RTD• ….

80Mbps

GILOGIK II: Slave R-ETH100

10GDNET , Riccardo Ragnoli WFCS 2006

• Each node Si: 1536 point of I/O ( 48 word Input / 48 word Output), 128 Thermo input

• Acyclic data A: up to 255 blocks of 64 word (16320 word)

• Network Tc min is a function of switch delay (configuration) and number of nodes (e.g. “store&forward” switch, 4 nodes, Tc=200 µs)

GDNET cycle

Logical Network1 Logical Network2 Logical Network3

S1

M A

S1 S2 SN NA

•M: cyclic output data A: acyclic data S: cyclic input data N: null slot

Up to 3 Logical networks

Cycle Tc Cycle Tc Cycle Tc

Up to 21 nodes

11GDNET , Riccardo Ragnoli WFCS 2006

GDNET Messages

HEADER

NetIDNcycle

MSGtype

Alias DataAlias Info

Alias Type

Alias DataWord 1-64

4 byte 2 byte 128 byte

Alias Message A

Master Message M

HEADER SLAVE 1 SLAVE N

NetID, Ncycle Msgtype , …

Aliasinfo

Event ack

Direct Acc.

DBout1 (word 1-48)

6 byte 114 byte 114 byte

Sincro DBout

Event ack

Direct Acc.

DBoutn(word 1-48)

Sincro DBout

4 byte 114 byte

Slave Message S

HEADER SLAVE N

NetIDNcycle

Alias info

Event

Direct Acc.

DBinput(word 1-48)

Sincro DBin

Each message takes a known time:

- M: < 66.4 µs - S: 11.52 µs -A: 12.8 µs

Tc is simple to design with constant bandwitdh occupancy

Direct Access:

writing or reading one word into I/O space or acyclic data

Event:

slave is programmable between always replay to Master message

or event depending

Sincro

- SincroDBin: timing input (e.g. Threshold)

- SincroDbout: programmable timing output

12GDNET , Riccardo Ragnoli WFCS 2006

GDNET performance

Minimum cycle time (NS < 8)

Tc = Tq ((NSW + 1) (NS + NA + NN ) + NS ))

Minimum cycle time (NS >= 8) Nln = number of logical network

Tc = Tq* Nln ((NSW + 1) (NS + NA + NN ) + NS ))

Maximum Band = (NS + NA ) / Tc

NS = number of nodes NA = number of slot for acyclic data NN number of null slot NSW = number of Switch

Maximum band

0,00%

12,00%

24,00%

36,00%

48,00%

60,00%

1 3 5 7 9 11 13 15 17 19 21

Number of nodes

Nsw=1Nsw=2Nsw=3Nsw=4Nsw=5

Cycle time

0,00

500,00

1000,00

1500,00

2000,00

2500,001 3 5 7 9 11 13 15 17 19 21

Number of nodes

Tc [u

s]

Nsw=1Nsw=2Nsw=3Nsw=4Nsw=5

13GDNET , Riccardo Ragnoli WFCS 2006

GDNET nodes synchronization

M M M

Syncout is programmable

Syncin synchronized to the average time distance between M messages (Delta RxM)

Tck = Tck-1 + α (TrxMk – TrxMk-1)

Synck = Synck-1 + Tck + β (TrxMk-1- Synck-1)

Tc

Syncin Syncout Syncin Syncin SyncinSyncout Syncout

TcTc

Delta RxM

14GDNET , Riccardo Ragnoli WFCS 2006

Threshold interception during injection movement Threshold interception during injection movement Plastic machinery: injection

PressureSpeed Injectionposition

Out flow

Threshold

Out pressure

t

Analoginput/output

Td : must be known and repeteable(Td ~ 1 ms, σTd ~ 3 µs)

Td

Position

15GDNET , Riccardo Ragnoli WFCS 2006

Threshold interception during injection movement Threshold interception during injection movement Plastic machinery: injection

PressureSpeed Injectionposition

Position

transducer

Td

Out flowOut pressure

Master

16GDNET , Riccardo Ragnoli WFCS 2006

MM M

t

New_Value

a

IN

Threshold

Syncin1

Crossin

Old_Value

b’

bc’

c

Crossin = (Syncin2-Syncin1)Threshold-Old_Value

New_Value- Old_ValueSyncin1 +

Crossin

SS S S SSyncout =

Crossin

Jitter 0

Analog input

Analog output

M M

1

1. Instant of threshold interception

2. Slave sends message to master

3. Master acquires information

4. Master sends message with action for ouput

5. Output action is performed

Syncin Syncout

TcSyncin Syncin Syncin Syncin SyncinSyncout Syncout Syncout Syncout

Syncin2 Syncin3

GDNET nodes synchronization

2

3 4

5

17GDNET , Riccardo Ragnoli WFCS 2006

GDNET: test measure

Outdig1

Indig1

Outdig2

Outdig3

Outdig6

Outdig5

Outdig4

Syncin

Analog input

OutdigA

OutdigA

Node 1

Node 2

Node 3

Node 4

Node 5

Node 6

Syncin

OutdigA

Syncin

18GDNET , Riccardo Ragnoli WFCS 2006

GDNET: measurement results

0%

1%

2%

3%

4%

5%

6%

7%

8%

375,991 375,995 375,999 376,003 376,007 376,011

Time (us)

Freq

uenc

y

0%1%2%3%4%5%6%7%8%9%

362,4 367,5 372,5 377,5 382,5 387,6

Time (us)

Freq

uenc

y

Tc = 375 µs Ns = 6 (imposed)

Node 1

Average value = 376.003 µs

Min Value = 363,443 µs

Max Value = 388,573 µs

σTrxM = 3.7 µs

Measure of Syncink –Syncink-1

(time distance between two Syncin signals)

Average value = 376.001 µs

σSincin << 100 ns

Measure of TrxMk – TrxMk-1

(time distance between two M message)

Tc = 375 µs Ns = 6 (imposed)

Node 5

25 µs

19GDNET , Riccardo Ragnoli WFCS 2006

GDNET: measurement resultsMeasure of Syncin1 – Syncin2

(time distance between two Syncin signals)

Average value = 1,27 µs

σ Syncin1 – Syncin2 = 0,14 µs

Average value = 1,83 µs

σ Syncin1 – Syncin6 = 0,23 µs

Node 1 – 2 (under the same switch) Node 1 – 6 (under different switch)

0%

2%

4%

6%

8%

10%

12%

0,584 0,808 1,032 1,256 1,480 1,704

Time (us)

Freq

uenc

y

0%

2%

4%

6%

8%

10%

12%

1,068 1,373 1,679 1,984 2,290 2,595

Time (us)

Freq

uenc

y

Tc = 375 µs Ns = 6 (imposed) Tc = 375 µs Ns = 6 (imposed)

Measure of Syncin1 – Syncin6

(time distance between two Syncin signals)

20GDNET , Riccardo Ragnoli WFCS 2006

GDNET: measurement results

Average value of TL= 1503,9 µs

σ TL = 0, 25 µs

TL= 4 * Tc = 1500 µs

0%

5%

10%

15%

20%

25%

1503,2 1504,0 1504,8

Time (us)

Freq

uenc

y

0%

2%

4%

6%

8%

10%

12%

14%

1,1 1,5 2,0 2,4 2,8

Time (us)Fr

eque

ncy

Average value of ∆TL= 2,04 µs

σ ∆TL = 0, 22 µs

Outdig1 =

not (Indig1)

Outdig1 =

not (Indig1)

Outdig6 =

not (Indig1)

TL

Tc = 375 µs , Ns = 6 (imposed)

Node 1

∆TL

Tc = 375 µs , Ns = 6 (imposed)

Node 1 - 6

21GDNET , Riccardo Ragnoli WFCS 2006

GDNET: test measure

Outdig1

Indig1

Outdig2

Outdig3

Outdig6

Outdig5

Outdig4

Syincin

Analog input

OutdigA

OutdigA

Node 1

Node 2

Node 3

Node 4

Node 5

Node 6

Syncin

OutdigA

Syncin

22GDNET , Riccardo Ragnoli WFCS 2006

Threshold interception: Node 1Threshold interception: Node 1

OutdigA

Trigger Trigger Trigger

Delay in threshold interceptionDelay in threshold interception Delay in threshold interceptionDelay in threshold interception

0%

1%

2%

3%

4%

5%

6%

7%

8%

9303,4 9305,9 9308,3 9310,8 9313,3

Time (us)

Freq

uenc

y

Ns = 6, Tc = 375

Average ThreShInt = 9,309 ms

Delay = ThreShInt – Tr

Delay = (9,309 – 7,8) ms = 1509 µs

Delay ~ 4 * Tc

σ threshint = 1,84 µs

Tr Tr

ThreshInt ThreshInt

GDNET: measurement results

Threshold

Analog Input

23GDNET , Riccardo Ragnoli WFCS 2006

Threshold interception: Node 2 (the same switch of Node 1)Threshold interception: Node 2 (the same switch of Node 1)

Trigger Trigger Trigger

Delay in threshold interceptionDelay in threshold interception Delay in threshold interceptionDelay in threshold interception

Tr Tr

ThreshInt ThreshInt

0%1%2%3%4%5%6%7%8%9%

10%

9304,1 9307,4 9310,6 9313,9 9317,2

Time (us)

Freq

uenc

y

Ns = 6, Tc = 375

Average ThreShInt = 9,310 ms

Delay = ThreShInt – Tr

Delay = (9,310 – 7,8) ms = 1510 µs

Delay ~ 4 * Tc

σ threshint = 2,33 µs

GDNET: measurement results

Analog Input

Threshold

OutdigA

24GDNET , Riccardo Ragnoli WFCS 2006

Threshold interception: Node 6 (not the same switch of Node 1)Threshold interception: Node 6 (not the same switch of Node 1)

Trigger Trigger Trigger

Delay in threshold interceptionDelay in threshold interception Delay in threshold interceptionDelay in threshold interception

Tr Tr

ThreshInt ThreshInt

0%1%2%3%4%5%6%7%8%9%

10%

9304,5 9307,4 9310,3 9313,1 9316,0

Time (us)

Freq

uenc

y

Ns = 6, Tc = 375

Average ThreShInt = 9,311 ms

Delay = ThreShInt – Tr

Delay = (9,311 – 7,8) ms = 1511 µs

Delay ~ 4 * Tc

σ threshint = 2,29 µs

GDNET: measurement results

Analog Input

Threshold

OutdigA

25GDNET , Riccardo Ragnoli WFCS 2006

Plastic machinery: gdnet applications

Numberof

Nodes

Number of

installations

3000200800600

100050200150

EXTRUSION BLOW MOULDING INJECTION MOULDINGTHERMOFORMING

Since2005 until today

• Test measurement results are very satisfying and design compliant

• Machine applications confirm test measure results