Optimal Synthesis of Linear Reversible Circuits

Preview:

Citation preview

Optimal SynthesisOptimal Synthesisof Linear Reversible Circuitsof Linear Reversible Circuits

Ketan Patel, Igor Markov, and John Hayes

University of MichiganElectrical Engineering & Computer Science

DARPADARPA

OutlineOutline

• Motivation

• Background

• Lower Bound

• Synthesis Algorithm

• Application: [Quantum] Stabilizer Circuits

• Future work

MotivationMotivation

Reversible Computation

• “Energy-free” computation

• Reversible applications: cryptography, DSP, etc.

Quantum Computation

• Application to important quantum circuits: stabilizer circuits

CC--NOT GateNOT Gate

First input (control) passes through unchanged

Second input (target) inverted if control=1

C-NOT is linear (under bitwise XOR operation ⊕)

i.e.

C-NOT GateInput Output

00 0001 0110 1111 10

nxxfxfxxf }1,0{, xallfor )()()( 212121 ∈⊕=⊕

CC--NOT CircuitsNOT Circuits

Compute linear transformation over {0,1}n

Mapping of determine full mapping

Example:

C-NOT Circuit

x1x2x3x4

y1y2y3y4

0000|0000| →

1000|,0100|,0010|,0001|

)0100(|)1000(|)1100(| fff ⊕=

Matrix RepresentationMatrix Representation

Can use matrix representation

Example:

C-NOT action corresponds to multiplication by elementary matrix

⎥⎥⎥

⎢⎢⎢

⎡=

⎥⎥⎥

⎢⎢⎢

⎡•⎥⎥⎥

⎢⎢⎢

⎡→

⎥⎥⎥

⎢⎢⎢

⎡⇔

⎪⎭

⎪⎬

⎪⎩

⎪⎨

→→→

110

011

101110100

011| 101110100

101|100|110|010|100|001|

C-NOT Gate

⇔⎥⎥⎥

⎢⎢⎢

110010001

column (control)

row (target)

Matrix Representation (cont.)Matrix Representation (cont.)

Concatenation of C-NOT’s corresponds to matrix multiplication

Example:

Matrix row reduction ⇒ decomposition into elementary matrices

(recall Gaussian elimination)

G1 G2 G3434214342143421

123 G

100110001

G

101010001

G

100010101

101110100

⎥⎥⎥

⎢⎢⎢

⎡•

⎥⎥⎥

⎢⎢⎢

⎡•

⎥⎥⎥

⎢⎢⎢

⎡=

⎥⎥⎥

⎢⎢⎢

⎡⇒

⎥⎥⎥

⎢⎢⎢

⎡•

⎥⎥⎥

⎢⎢⎢

⎡•

⎥⎥⎥

⎢⎢⎢

⎡=

100110001

101010001

100010101

C-NOT Synthesis binary matrix row reduction# of gates = # of row operations

Example:

Gaussian Elimination Requires O(n2) row ops (gates)

CC--NOT SynthesisNOT Synthesis

⎥⎥⎥

⎢⎢⎢

⎡⇒

⎥⎥⎥

⎢⎢⎢

⎡⇒

⎥⎥⎥

⎢⎢⎢

⎡⇒

→→→

100010001

100110001

101110001

233113

3 2 1 3 3 1

⎥⎥⎥

⎢⎢⎢

101110100

⎥⎥⎥

⎢⎢⎢

101110100

Number of n-wire linear reversible transformations

If all transformations require ≤ d gates, then the number of d-gate circuits must be no smaller

⇒ c n2/log n ≤ d for some c>0Conclusion: need at least c n2/log n gates

Lower BoundLower Bound

)22(1

0∏ −−

=

n

i

in

dn

i

in nn )1)1(()22(1

0+−≤∏ −

=

OurOur Synthesis Algorithm (intuition)Synthesis Algorithm (intuition)

Assume n is large

• Use ≤ n row ops to eliminate duplicate sub-rows

• Leave no more than 3 non-zero sub-rows relatively few operations necessary to clear

Reduces number of ops by factor ~2⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥

⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢

10001101

1001101101

L

L

L

L

MMM

L

L

L

L

L

n

• Group columns into sections of size ≤ αlog n with α <1• Eliminate duplicate sub-rows in each column section

# row ops = O(n) • # sections = O(n2/log n)• Place 1s on the diagonal

# row ops = O(n)• Eliminate (relatively few) remaining off-diagonal 1s

# row ops = O(2 α log n) • # sections = O(nα) • n/(α log n) =O(n1+α/log n)

Total # of row operations: O(n2/log n)

Synthesis AlgorithmSynthesis Algorithm

Execution TimeExecution Time

Execution time dominated by row ops⇒ O(n3/log n)

Execution time for Gaussian Elimination⇒ O(n3)

...but how soon do the asymptotics kick in?

Empirical ResultsEmpirical Results

Gaussian Elimin.Algorithm 1

wires

circ

uit s

ize

• Important class of quantum circuits

• Composed of Hadamard, Phase, and C-NOT gates

• Can use blocks of H, P & C gates to synthesize (Aaronson & Gottesman)

Circuit size dominated by size of C-blocks

Application: Stabilizer CircuitsApplication: Stabilizer Circuits

H P

H P P P

H P P P

C P H P C P

ReRelatedlated TopicsTopics

• Optimal column partitioning

• Synthesis of general reversible circuits

– T-C-N-T decomposition

• Applications to synthesis of quantum circuits

– E.g., via the Gottesman-Knill theorem

• Reducing circuit depth rather than size

Thank you

Recommended