MIPS Arithmetic Instructions - Walla Walla Universitycurt.nelson/cptr280/lecture/mips...

1Cptr280, Autumn 2017

MIPS Arithmetic Instructions

Cptr280

Dr Curtis Nelson

Arithmetic for Computers

• Operations on integers– Addition and subtraction;– Multiplication and division;– Dealing with overflow;– Signed vs. unsigned numbers.

• Floating-point numbers– Representation and operations;– Dealing with overflow and underflow.

2Cptr280, Autumn 2017

MIPS arithmetic instructions

Instruction Example Meaning Commentsadd add $1,$2,$3 $1 = $2 + $3 3 operands; exception possiblesubtract sub $1,$2,$3 $1 = $2 – $3 3 operands; exception possibleadd immediate addi $1,$2,100 $1 = $2 + 100 + constant; exception possibleadd unsigned addu $1,$2,$3 $1 = $2 + $3 3 operands; no exceptionssubtract unsigned subu $1,$2,$3 $1 = $2 – $3 3 operands; no exceptionsadd imm. unsign. addiu $1,$2,100 $1 = $2 + 100 + constant; no exceptionsmultiply mult $2,$3 Hi, Lo = $2 x $3 64-bit signed productmultiply unsigned multu $2,$3 Hi, Lo = $2 x $3 64-bit unsigned productdivide div $2,$3 Lo = $2 ÷ $3, Lo = quotient, Hi = remainder

Hi = $2 mod $3 divide unsigned divu $2,$3 Lo = $2 ÷ $3, Unsigned quotient & remainder

Hi = $2 mod $3Move from Hi mfhi $1 $1 = Hi Used to get copy of HiMove from Lo mflo $1 $1 = Lo Used to get copy of Lo

Note: Move from Hi and Move from Lo are really data transfers

MIPS Arithmetic Instructions

Details

• Usually math operands and the result have a fixed number of bits (8, 16, 32, or 64). These are the sizes that processors use to represent integers.

• To keep the result the same size as the operands, you may have to include zero bits in some of the leftmost columns (sign extension).

• Compute the carry-out of the leftmost column, but don't write it as part of the answer (because there is no room if you have a fixed number of bits.)

• When the operands are represented using the unsigned binary scheme, a carry-out of 1 from the leftmost column means the sum does not fit into the fixed number of bits. This is called Overflow.

• When the operands are represented using the two's complement scheme (which will be described later), then a carry-out of 1 from the leftmost column is not necessarily overflow.

• Integers may be represented using a scheme called unsigned binary or a scheme called two's complement binary. The same binary addition hardware is used, but to interpret the result you need to know what scheme is being used.

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Unsigned Binary Addition

• Unsigned means no negative numbers are represented.• Add 12210 and 12510 in 8-bit unsigned binary:

– Result is 24710, carry = 0

• Now add 12210 and 14510 in 8-bit unsigned binary:– Result is 26710, binary = 00001011?

• Result is 1110, carry = 1, indicating an overflow occurred

• Overflow in unsigned binary addition (assembly instructions addu, addiu) means the result is incorrect – an error condition that is not flagged by the processor.

Unsigned Binary Subtraction

• Subtract 12210 from 12510 in 8-bit unsigned binary.– Result is 310, carry = 0

• Now subtract 12510 from 12210– Result is –310, binary = 11111101 (+25310?)

• Result is 25310, carry = 1, i.e. underflow

• Underflow in unsigned binary subtraction (subu) means the result is incorrect – an error condition that will not be flagged by the processor (or QTSpim).

4Cptr280, Autumn 2017

Unsigned - Detecting Overflow

• For unsigned numbers, overflow occurs if there is a carry out of the most significant bit.– For example,

1001 = 9+1000 = 80001 = 1

• With the MIPS architecture– Overflow exceptions occur for two’s complement

arithmetic• add, sub, addi

– Overflow exceptions do not occur for unsigned arithmetic• addu, subu, addiu

bn 1– b1 b0

MagnitudeMSB

(a) Unsigned numberbn 1– b1 b0

MagnitudeSign

(b) Signed number

bn 2–

0 denotes1 denotes

+– MSB

Unsigned Vs. Signed Numbers

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abcd Signandmagnitude 1’scomplement 2’scomplement

0111 +7 +7 +7

0110 +6 +6 +6

0101 +5 +5 +5

0100 +4 +4 +4

0011 +3 +3 +3

0010 +2 +2 +2

0001 +1 +1 +1

0000 +0 +0 0

1000 -0 -7 -8

1001 -1 -6 -7

1010 -2 -5 -6

1011 -3 -4 -5

1100 -4 -3 -4

1101 -5 -2 -3

1110 -6 -1 -2

1111 -7 -0 -1

Interpretation of Four-Bit Signed Integers

2’s Complement Representation

• To negate a two's complement integer, invert all the bits and add a one to the least significant bit.

• What are the two’s complements of:6 = 0110 -4 = 1100

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Examples

• What is the value of the two's complement integer 1101 in decimal?

• What is the value of the unsigned integer 1101 in decimal?

• What is the negation of the two's complement integer 1010 in binary?

0000 00010010

0011

0100

0101

01100111

10001001

1010

1011

1100

1101

11101111

1 + 1 –2 +

3 +

4 +

5 + 6 +

7 +

2 –3 –

4 –

5 –6 –

7 – 8 –

0

Graphical Representation of Four-bit 2’s Complement Numbers

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Two’s Complement Addition

• To add two's complement numbers, add the corresponding bits of both numbers with carry between bits.

• For example, 3 = 0011 -3 = 1101 -3 = 1101 3 = 0011

+ 2 = 0010 +-2 = 1110 + 2 = 0010 + -2 = 1110-------- --------- --------- ---------

• Unsigned and signed two’s complement addition are performed exactly the same way, but how they detect overflow differs.

++

1 1 0 1

1 0 1 10 0 1 0

0 1 1 1

0 1 0 10 0 1 0

++

1 0 0 1

1 0 1 11 1 1 0

0 0 1 1

0 1 0 11 1 1 0

11

ignore ignore

5+( )2+( )

7+( )

+

5+( )

3+( )

+ 2–( )

2+( )5–( )

3–( )

+

5–( )

7–( )

+ 2–( )

More 2’s Complement Addition Examples

8Cptr280, Autumn 2017

Two’s Complement Subtraction

• To subtract two's complement numbers, first negate the second number and then add the corresponding bits of both numbers.

• For example:

3 = 0011 -3 = 1101 -3 = 1101 3 = 0011- 2 = 0010 - -2 = 1110 - 2 = 0010 - -2 = 1110

---------- --------- --------- ---------

–0 1 0 10 0 1 0

5+( )2+( )

3+( )

–

1

ignore

+

0 0 1 1

0 1 0 11 1 1 0

–1 0 1 10 0 1 0–

1

ignore

+

1 0 0 1

1 0 1 11 1 1 0

–0 1 0 11 1 1 0

5+( )

7+( )

– +

0 1 1 1

0 1 0 10 0 1 0

5–( )

7–( )

2+( )

2–( )

–1 0 1 11 1 1 0– +

1 1 0 1

1 0 1 10 0 1 02–( )

5–( )

3–( )

More 2’s Complement Subtraction Examples

9Cptr280, Autumn 2017

Integer Addition

• Example: 7 + 6

• Overflow if result out of range➖ Adding a + and - operand, no overflow possible.➖ Adding two + operands

• Overflow if sign of result is 1.➖ Adding two – operands

• Overflow if sign of result is 0.

Integer Subtraction

• Add negation of second operand.• Example: 7 – 6 = 7 + (–6)

+7: 0000 0000 … 0000 0111–6: 1111 1111 … 1111 1010+1: 0000 0000 … 0000 0001

• Overflow if result out of range– Subtracting two + or two – operands, no overflow.– Subtracting + from – operand

• Overflow if result sign is 0.– Subtracting – from + operand

• Overflow if result sign is 1.

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Detecting Overflow Logically

• When adding two's complement numbers, overflow will only occur if: – The numbers being added have the same sign;– The sign of the result is different then the sign of the two operands.

• If we perform the additionan-1 an-2 ... a1 a0

+ bn-1bn-2… b1 b0----------------------------------= sn-1sn-2… s1 s0

• Overflow can be detected as

• Overflow can also be detected as

where cn-1and cn are the carry in and carry out of the most significant bit.

111111 -×-×-+-×-×-= nnnnnn sbasbaV

1-Ä= nn ccV

MIPS Arithmetic Logic Unit (ALU)

• Must support the Arithmetic/Logic operations of the ISAadd, addi, addiu, addusub, subumult, multu, div, divusqrtand, andi, nor, or, ori, xor, xoribeq, bne, slt, slti, sltiu, sltu

32

32

32

m (operation)

result

A

B

ALU

4

zero ovf

11

• With special handling for- Sign extend – addi, addiu, slti, sltiu- Zero extend – andi, ori, xori- Overflow detection – add, addi, sub

11Cptr280, Autumn 2017

Conclusions

In this presentation you learned about:• Representation of numbers in computers;• Signed vs. unsigned numbers;• Conditions which cause overflow;• Some MIPS instructions.