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EMC Control with PCB Design EMC Control with PCB Design for Working Engineersfor Working Engineers
April 2010
IBM
Dr. Bruce ArchambeaultIBM Distinguished Engineer and IEEE Fellow
barch@us.ibm.com
April 2010 Dr. Bruce Archambeault, IBM 2
About the Presenter• Dr. Bruce Archambeault
• Dr. Bruce Archambeault received his B.S.E.E degree from the University of New Hampshire in 1977 and his M.S.E.E degree from Northeastern University in 1981. He received his Ph. D. from the University of New Hampshire in 1997. His doctoral research was in the area of computational electromagnetics applied to real-world EMC problems. In 1981 he joined Digital Equipment Corporation and through 1994 he had assignments ranging from EMC/TEMPEST product design and testing to developing computational electromagnetic EMC-related software tools. In 1994 he joined SETH Corporation where he continued to develop computational electromagnetic EMC-related software tools and used them as a consulting engineer in a variety of different industries. In 1997 he joined IBM in Raleigh, N.C. where he is the EMC Distinguished Engineer, responsible for EMC tool development and use on a variety of products. During his career in the U.S. Air Force he was responsible for in-house communications security and TEMPEST/EMC related research and development projects.
• Dr. Archambeault has authored or co-authored a number of papers in computational electromagnetics, mostly applied to real-world EMC applications. He is a past Board of Directors member of the IEEE EMC Society and Applied Computational Electromagnetics Society (ACES). He is the author of the book “PCB Design for Real-World EMI Control” and the lead author of the book titled “EMI/EMC Computational Modeling Handbook”.
April 2010 Dr. Bruce Archambeault, IBM 3
Course Outline• Introduction• EM Review• Antennas• Grounding• Printed Circuit Board EMC Design• Summary and Review
April 2010 Dr. Bruce Archambeault, IBM 4
Details, Details, Details
• Course schedule• Rest rooms• Lunch• Informal !!!
April 2010 Dr. Bruce Archambeault, IBM 5
EMC Can Be Ugly
Design Engineer “thinks” he’s on schedule
April 2010 Dr. Bruce Archambeault, IBM 6
Why do we care?
• Interference with critical systems• Self jamming of internal radio systems• Physical destruction of sensitive electronics• Susceptibility and emissions• Legal requirements• Examples
April 2010 Dr. Bruce Archambeault, IBM 7
EM Review
• dB• Time and Frequency
Domain• wavelength• Integration
• Maxwell’s Equations• Skin Depth• Inductance• Capacitance• Far field vs. near field
April 2010 Dr. Bruce Archambeault, IBM 8
Decibel (dB)
• Unit of measure expressing a ratio of TWO quantities (no units)– 20 * LOG10 (1st number/ 2nd number)
• Absolute levels are related to a standard value– 20 * LOG10 (1st number/ standard value)
April 2010 Dr. Bruce Archambeault, IBM 9
Decibel Examples• A 10% pay raise would be only 0.8 dB!• The Pacific Ocean is 6.3 dB larger than the
Atlantic Ocean• the ratio of 10000:1 is 80 dB• The ratio of 0.000002345: 1 is -112 dB• One order of magnitude = 20 dB• Factor of 2 = 6 dB
April 2010 Dr. Bruce Archambeault, IBM 10
More on Decibels
• Absolute voltage is usually relative to 1 uv– dBuv– 20 * LOG10 (volts/1e-6)
• Absolute power is usually relative to 1 mw– dBm– 10 * LOG10 (power/1e-3)– Usually in a 50 ohm system
April 2010 Dr. Bruce Archambeault, IBM 11
Time and Frequency Domain
• Different ways to look at the same thing• Time domain is usually used by Logic
design engineers and signal integrity engineers
• Frequency domain is usually used by EMC engineers
April 2010 Dr. Bruce Archambeault, IBM 12
Time Domain Example Sine Wave
Time Domain Sine Wave
-1.5
-1
-0.5
0
0.5
1
1.5
0 1 2 3 4 5 6 7 8 9 10
Time (usec)
Volta
ge (v
olts
)
April 2010 Dr. Bruce Archambeault, IBM 13
Frequency Domain Example Sine Wave Spectrum
Sine Wave Spectrum
0
5
10
15
20
25
30
35
10 100 1000 10000 100000
Frequency (KHz)
Leve
l
April 2010 Dr. Bruce Archambeault, IBM 14
Perfect Square Wave
• Built from odd numbered harmonics of the fundamental frequency
• Harmonics add with 1/n relative amplitude
• Duty cycle = 50%
April 2010 Dr. Bruce Archambeault, IBM 15
Sinewave @ 50 MHz
-1.5
-1
-0.5
0
0.5
1
1.5
0 5 10 15 20 25
time (ns)
Am
plitu
de
fundamental
April 2010 Dr. Bruce Archambeault, IBM 16
Build a 50MHz Square Wave (3rd Harmonic)10/90% Rise Time = 2.8 ns
-1.5
-1
-0.5
0
0.5
1
1.5
0 5 10 15 20 25
time (ns)
Am
plitu
de
fundamental
3rd harmonic
(Normalized) Fundamental and 3rd harmonic
April 2010 Dr. Bruce Archambeault, IBM 17
Build a 50MHz Square Wave (5th Harmonic)10/90% Rise Time = 1.8 ns
-1.5
-1
-0.5
0
0.5
1
1.5
0 5 10 15 20 25
time (ns)
Am
plitu
de
fundamental
3rd harmonic
5th harmonic
(Normalized) Fundamental and 3rd & 5th harmonic
April 2010 Dr. Bruce Archambeault, IBM 18
Build a 50MHz Square Wave (7th Harmonic)10/90% Rise Time = 1.4 ns
-1.5
-1
-0.5
0
0.5
1
1.5
0 5 10 15 20 25
time (ns)
Am
plitu
de
fundamental
3rd harmonic
5th harmonic
7th harmonic
(Normalized) Fundamental and 3rd,5th, 7th
April 2010 Dr. Bruce Archambeault, IBM 19
Build a 50MHz Square Wave (9th Harmonic)10/90% Rise Time = 1.1 ns
-1.5
-1
-0.5
0
0.5
1
1.5
0 5 10 15 20 25
time (ns)
Am
plitu
de
fundamental3rd harmonic5th harmonic7th harmonic9th harmonic(Normalized) Fundamental and 3rd,5th,7th,9th harmonic
April 2010 Dr. Bruce Archambeault, IBM 20
Build a 50MHz Square Wave (11th Harmonic)10/90% Rise Time = 0.9 ns
-1.5
-1
-0.5
0
0.5
1
1.5
0 5 10 15 20 25
time (ns)
Am
plitu
de
fundamental
3rd harmonic
5th harmonic
7th harmonic
9th harmonic
11th harmonic
(Normalized) Fundamental and 3rd,5th,7th,9th,11th harmonic
April 2010 Dr. Bruce Archambeault, IBM 21
Build a 50MHz Square Wave (13th Harmonic)10/90% Rise Time = 0.8 ns
-1.5
-1
-0.5
0
0.5
1
1.5
0 5 10 15 20 25
time (ns)
Am
plitu
de
fundamental
3rd harmonic
5th harmonic
7th harmonic
9th harmonic
11th harmonic
13th harmonic
(Normalized) Fundamental and 3rd,5th,7th,9th,13th harmonic
April 2010 Dr. Bruce Archambeault, IBM 22
Harmonic Amplitude of 50 MHz Square Wave
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
10
0 100 200 300 400 500 600 700 800
Frequency (MHz)
Nor
mal
ized
Am
plitu
de (d
B)
April 2010 Dr. Bruce Archambeault, IBM 23
25 MHz Sinewave and 50 M bit/sec Squarewave
-1.5
-1
-0.5
0
0.5
1
1.5
0 10 20 30 40 50 60 70 80 90 100
Time (nsec)
Am
plitu
de
Pulse
Sinewave
April 2010 Dr. Bruce Archambeault, IBM 24
Pseudo-Random and Square Wave Harmonic Frequencies(Example @ 100 M bit/sec)
-60
-50
-40
-30
-20
-10
0
10
0 100 200 300 400 500 600 700 800 900 1000
Frequency (MHz)
Rel
ativ
e Le
vel (
dB)
Pseudo-randomSquarewave
April 2010 Dr. Bruce Archambeault, IBM 25
Non-Perfect Waveforms
• Even harmonics appear with duty cycle not exactly 50%
• Even harmonics appear with rise/fall time unbalance
• Overshoot/undershoot causes additional harmonics
April 2010 Dr. Bruce Archambeault, IBM 26
Field Propagation Speed• Depends on
– Permittivity (dielectric) – Permeability (magnetic)
• Free Space– Speed of Light c– 3 x 108 meters/second
μεcvp =
00
1με
=c
April 2010 Dr. Bruce Archambeault, IBM 27
Wavelength
• Length of wave in free space (or other media)
fvp=λ
Examples (in air):Wavelength = 1 meter @ 300MHz
Wavelength = 30 cm @ 1 GHz
Wavelength = 3 cm @ 10 GHz
April 2010 Dr. Bruce Archambeault, IBM 28
Derivative
• How fast is somethingchanging?
[ ]somethingdtd Changing with
respect to time
[ ]somethingdxd Changing with respect
to position (x)
April 2010 Dr. Bruce Archambeault, IBM 29
Partial Derivative
• How fast is something changing for one variable?
[ ]),( xtsomethingt∂∂
Changing with respect to time (as ‘x’ is constant)
Changing with respect to position (x) (as time is constant)
[ ]),( xtsomethingx∂∂
April 2010 Dr. Bruce Archambeault, IBM 30
Integration
• Simply the sum of parts (when the parts are very small)– Line Integral --- sum of small line segments– Surface Integral -- sum of small surface patches– Volume Integral -- sum of small volume blocks
April 2010 Dr. Bruce Archambeault, IBM 31
Line Integral (find the length of the path)
)( dlEVstop
start
•−=→
∫
dl
‘piece’ of E field
April 2010 Dr. Bruce Archambeault, IBM 32
Line Integral
[ ])()( dyEdxEV y
stop
startx ∗+∗−= ∫
dl
‘piece’ of E field
April 2010 Dr. Bruce Archambeault, IBM 33
Line Integral -- Closed∫= boxaroundpathnceCircumfere
x
y
∫∫∫∫=
=
=
=
=
=
=
=
+++=00
00
y
wy
x
lx
wy
y
lx
x
dydxdydx
April 2010 Dr. Bruce Archambeault, IBM 34
Line Integral -- Closed
• Closed line integrals find the path length
• And/or the amount of some quantity along that closed path length
April 2010 Dr. Bruce Archambeault, IBM 35
Surface Integral(find the area of the surface)
∫∫
∫
∗=
∗=
=
dydxArea
dydxda
daArea
As dx and dy become smaller and smaller, the area is better calculated
April 2010 Dr. Bruce Archambeault, IBM 36
Closed Surface Integral
• Find the surface area of a closed shape
∫∫ dashape
April 2010 Dr. Bruce Archambeault, IBM 37
Volume Integral(find the volume of an object)
∫∫∫
∫
∗∗=
∗∗=
=
][ dzdydxVolume
dzdydxdv
dvVolume
April 2010 Dr. Bruce Archambeault, IBM 38
From Math to Electromagnetics
April 2010 Dr. Bruce Archambeault, IBM 39
ElectromagneticsIn the Beginning
• Electric and Magnetic effects not connected• Electric and magnetic effects were due to
‘action from a distance’• Faraday was the 1st to propose a relationship
between electric lines of force and time-changing magnetic fields– Faraday was very good at experiments and
‘figuring out’ how things work
April 2010 Dr. Bruce Archambeault, IBM 40
Maxwell• Discovered the link
between the “electro” and the “magnetic”
• Scotland’s greatest contribution to the world next to Scotch
• Maxwell, Heavisideand Hertz
April 2010 Dr. Bruce Archambeault, IBM 41
Maxwell’s Equations are NOT Hard!
tBE
tDJH
∂∂
∂∂
−=×∇
+=×∇
April 2010 Dr. Bruce Archambeault, IBM 42
Maxwell’s Equations –Differential Form
tBE
tDJH
∂∂
∂∂
−=×∇
+=×∇
A difference in Magnetic Fieldacross a small piece of space
A difference in Electric Fieldacross a small piece of space
A change in Electric FluxDensity with respect to time
A change in Magnetic FluxDensity with respect to time
April 2010 Dr. Bruce Archambeault, IBM 43
Maxwell’s Equations are not Hard!
• Change in H-field across space ¡ Change in E-field (at that point) with time
• Change in E-field across space ¡ Change in H-field (at that point) with time
• (Roughly speaking, and ignoring constants)
April 2010 Dr. Bruce Archambeault, IBM 44
Other Famous Equations
• Faraday’s Law• Gauss’ Law• Ampere’s Law• Stokes Theorem• Many others
April 2010 Dr. Bruce Archambeault, IBM 45
Near Field vs. Far Field• Distance / Frequency
• Source Size
• Transition Distance Depends On Magnitude Of Error Allowed
• If Truly Far-Field Then Source Can Usually Be Modeled Simply
• Equations and Graphs Assume Far-Field Simplified Case
• Real Life Problems Are Seldom Simple Due to Multiple Effects
April 2010 Dr. Bruce Archambeault, IBM 46
In the Far Field
• Electric field source (dipole, etc) has high impedance near to the source
• Magnetic field source (loop, etc) has low impedance near to the source
ohmsHEZ 377== r
r
April 2010 Dr. Bruce Archambeault, IBM 47
EM Wave Impedance
April 2010 Dr. Bruce Archambeault, IBM 48
Important Concepts for Effective PCB Design
• Design intentionally• Pass the first time!
April 2010 Dr. Bruce Archambeault, IBM 49
Skin Depth
• Current flows only near surface at high frequencies
Frequency Skin Depth Skin Depth 60 Hz 260 mils 8.5 mm 1 KHz 82 mils 2.09 mm 10 KHz 26 mils 0.66 mm
100 KHz 8.2 mils 0.21 mm 1 MHz 2.6 mils 0.066 mm 10 MHz 0.82 mils 0.021 mm
100 MHz 0.26 mils 0.0066 mm 1 GHz 0.0823 mils 0.0021 mm
μσπδ
f1
=
April 2010 Dr. Bruce Archambeault, IBM 50
Current Migrates to Outer Portions of the Conductor at High Frequencies
Resistance is determined by the area of the copper conductor actually used at each frequency!
April 2010 Dr. Bruce Archambeault, IBM 51
At High Frequencies
• Resistive loss and dielectric loss are present• Inductance will usually dominate
April 2010 Dr. Bruce Archambeault, IBM 52
Inductance• Current flow through metal = inductance!• Fundamental element in EVERYTHING• Loop area first order concern• Inductive impedance increases with
frequency and is MAJOR concern at high frequencies
fLX L π2=
April 2010 Dr. Bruce Archambeault, IBM 53
Current Loop = Inductance
Courtesy of Elya Joffe
April 2010 Dr. Bruce Archambeault, IBM 54
Inductance Definition• Faraday’s Law
∫ ∫∫ ⋅∂∂
−=⋅ SdtBdlE
tBAV∂∂
−=V
B
Area = A
• For a simple rectangular loop
April 2010 Dr. Bruce Archambeault, IBM 55
Self Inductance
• Isolated circular loop ⎟⎟⎠
⎞⎜⎜⎝
⎛−≈ 28ln
00 r
aaL μ
⎟⎟
⎠
⎞
⎜⎜
⎝
⎛+−+−+
+
++= 2
20 11211
211
ln2
ppp
ppaL
πμ
• Isolated rectangular loop
Note that inductance is directly influenced by loop AREA and less influenced by conductor size!
radiuswiresideoflengthp =
April 2010 Dr. Bruce Archambeault, IBM 56
Mutual Inductance
1
221
1212
IM
IMΦ
=
=Φ
Loop #1Loop #2
( )∫ ⋅=Φ2
212 dSˆrBS
nr
How much magnetic flux is induced in loop #2 from a current in loop #1?
April 2010 Dr. Bruce Archambeault, IBM 57
Mutual Inductance
Loop #1Loop #2 Less loop area in loop #2
means less magnetic flux in loop #2 and less mutual inductance
Loop #1Loop #2 Less loop area perpendicular to
the magnetic field in loop #2 means less magnetic flux in loop #2 and less mutual inductance
April 2010 Dr. Bruce Archambeault, IBM 58
Partial Inductance
• Simply a way to break the overall loopinto pieces in order to find total inductance
L3
L4
L2
L1
L total=Lp11+ Lp22 + Lp33 + Lp44 - 2Lp13 - 2Lp24
April 2010 Dr. Bruce Archambeault, IBM 59
Important Points About Inductance
• Inductance is everywhere• Loop area most important• Inductance is everywhere
April 2010 Dr. Bruce Archambeault, IBM 60
ExampleDecoupling Capacitor Mounting
• Keep vias as close to capacitor pads as possible!
Height above Planes
Via Separation
Inductance Depends on Loop AREA
April 2010 Dr. Bruce Archambeault, IBM 61
Via Configuration Can Change Inductance
Via
Capacitor Pads
SMT Capacitor
The “Good”
The “Bad”
The “Ugly”
Really “Ugly”
Better
Best
April 2010 Dr. Bruce Archambeault, IBM 62
What is Capacitance?
• Capacitance is the ability of a structure to hold charge (electrons) for a given voltage
VQC = CVQ =
• Amount of charge stored is dependant on the size of the capacitance (and voltage)
April 2010 Dr. Bruce Archambeault, IBM 63
High Frequency Capacitors
• Myth or Fact?
April 2010 Dr. Bruce Archambeault, IBM 64
Comparison of Decoupling Capacitor Impedance100 mil Between Vias & 10 mil to Planes
0.01
0.1
1
10
100
1000
1.0E+06 1.0E+07 1.0E+08 1.0E+09 1.0E+10
Frequency (Hz)
Impe
danc
e (o
hms)
1000pF
0.01uF
0.1uF
1.0uF
April 2010 Dr. Bruce Archambeault, IBM 65
0603 Size Cap Typical Mounting
Via Barrel 10 mils
60 mils
20 mils
10 mils*
9 mils9 mils
10 mils*
108 mils minimum
128 mils typical*Note: Minimum distance is 10 mils but more typical distance is 20 mils
April 2010 Dr. Bruce Archambeault, IBM 66
0402 Size Cap Typical Mounting
Via Barrel 10 mils
40 mils
20 mils
10 mils*
8 mils8 mils
10 mils*
86 mils minimum
106 mils typical*Note: Minimum distance is 10 mils but more typical distance is 20 mils
April 2010 Dr. Bruce Archambeault, IBM 67
3.2 nH3.7 nH4.2 nH100
3.0 nH3.5 nH3.9 nH90
2.8 nH3.2 nH3.6 nH80
2.6 nH3.0 nH3.4 nH70
2.3 nH2.7 nH3.1 nH60
2.1 nH2.5 nH2.8 nH50
1.9 nH2.2 nH2.5 nH40
1.6 nH1.9 nH2.2 nH30
1.3 nH1.6 nH1.8 nH20
0.9 nH1.1 nH1.2 nH10
0402 typical/minimum(106 mils between
via barrels)
0603 typical/minimum
(128 mils between via
barrels)
0805 typical/minimum (148 mils between
via barrels)
Distance into board to planes (mils)
Connection Inductance for Typical Capacitor Configurations
April 2010 Dr. Bruce Archambeault, IBM 68
Connection Inductance for Typical Capacitor Configurations with 50 mils from Capacitor Pad to Via Pad
4.6 nH5.0 nH5.5 nH100
4.3 nH4.7 nH5.2 nH90
4.0 nH4.5 nH4.9 nH80
3.7 nH4.2 nH4.5 nH70
3.5 nH3.9 nH4.2 nH60
3.1 nH3.5 nH3.9 nH50
2.8 nH3.2 nH3.5 nH40
2.5 nH2.8 nH3.0 nH30
2.0 nH2.3 nH2.5 nH20
1.4 nH1.6 nH1.7 nH10
0402 (166 mils between
via barrels)
0603 (188 mils
between via barrels)
0805 (208 mils between
via barrels)Distance into board
to planes (mils)
April 2010 Dr. Bruce Archambeault, IBM 69
EM Summary
• Electromagnetics is not hard– Must get past the messy math
• Understanding what the basic equations mean is important
• CURRENT is important• “Ground” is a place for potatoes and carrots!• Where does the return current flow?
– #1 cause of EMC related problems
April 2010 Dr. Bruce Archambeault, IBM 70
PCB Design for EMI Control
• Design decisions WILL affect EMI emissions as well as internal system interoperability
• Thinking about signals/currents will help make the right choice!
April 2010 Dr. Bruce Archambeault, IBM 71
THINK
• Not here to give list of rules, or “do’s” and “don’ts”
• UNDERSTAND WHY• NO MAGIC!
April 2010 Dr. Bruce Archambeault, IBM 72
No Longer Separate!
• Signal Integrity• Functionality• EMC
– Emissions– Susceptibility
April 2010 Dr. Bruce Archambeault, IBM 73
‘Ground’• Ground is a place where
potatoes and carrots thrive!• ‘Earth’ or ‘reference’ is more descriptive • Original use of “GROUND”• Inductance is everywhere
fLX L π2=
April 2010 Dr. Bruce Archambeault, IBM 74
What we Really Mean when we say ‘Ground’
• Signal Reference• Power Reference• Safety Earth• Chassis Shield Reference
April 2010 Dr. Bruce Archambeault, IBM 75
‘Ground’ is NOT a Current Sink!
• Current leaves a driver on a trace and must return (somehow) to its source
• This seems basic, but it is often forgotten, and is most often the cause of EMC problems
April 2010 Dr. Bruce Archambeault, IBM 76
Single Point ‘Ground’ Myth
• At high frequencies, inductance makes this impossible!
• At high frequencies, parasitic capacitance makes this impossible!
• Depends on the amount of ‘Ground’ error your system can stand…...
April 2010 Dr. Bruce Archambeault, IBM 77
‘Grounding’ Needs Low Impedance at Highest Frequency
• Steel Reference Plate– 4 milliohms/sq @ 100KHz– 40 milliohms/sq @ 10 MHz– 400 milliohms/sq @ 1 GHz
• A typical via is about 2 nH– @ 100 MHz Z = 1.3 ohms– @ 500 MHz Z = 6.5 ohms– @ 1000 MHz Z = 13 ohms– @ 2000 MHz Z = 26 ohms
April 2010 Dr. Bruce Archambeault, IBM 78
Single-Point Ground Concept
GND via
Board A Board B
Metal Enclosure
GND via
GND viaGND via
GND via
GND planes
April 2010 Dr. Bruce Archambeault, IBM 79
Reality Overcomes Single-Point Ground Intentions
GND via
Board A Board B
Metal Enclosure
GND via
GND viaGND via
GND via
GND planes
April 2010 Dr. Bruce Archambeault, IBM 80
Where did the Term “GROUND” Originate?
• Original Teletype connections• Lightning Protection
April 2010 Dr. Bruce Archambeault, IBM 81
Ground/Earth
TeletypeReceiver
TeletypeTransmitter
April 2010 Dr. Bruce Archambeault, IBM 82
Ground/Earth
TeletypeReceiver
TeletypeTransmitter
April 2010 Dr. Bruce Archambeault, IBM 83
Lightning striking houseFIG 7
Lightning
April 2010 Dr. Bruce Archambeault, IBM 84
Lightning effect without rod
April 2010 Dr. Bruce Archambeault, IBM 85
Lightning effect with rod
Lightning rodLightning
April 2010 Dr. Bruce Archambeault, IBM 86
News from the Human Genome Project
“GROUND” is good gene
April 2010 Dr. Bruce Archambeault, IBM 87
What we Really Mean when we say ‘Ground’
• Signal Reference• Power Reference• Safety Earth• Chassis Shield Reference
Circuit “Ground”
Chassis “Ground”
Digital “Ground”
D
Analog “Ground”
A
April 2010 Dr. Bruce Archambeault, IBM 88
April 2010 Dr. Bruce Archambeault, IBM 89
Current Path
• Current will ALWAYS follow the path of least impedance– Low frequencies lowest resistance– High frequencies lowest inductance– Change over ~ 100 KHz
April 2010 Dr. Bruce Archambeault, IBM 90
Low Frequency Return CurrentPath of Least RESISTANCE
Data Cable
Signal
“Ground” wire
Large Ground Braid (low resistance)
System #1System #2
April 2010 Dr. Bruce Archambeault, IBM 91
High Frequency Return CurrentPath of Least Inductance
Data CableSignal
“Ground” wire
Large Ground Braid (low resistance)
Large Loop = high inductance
System #1System #2
April 2010 Dr. Bruce Archambeault, IBM 92
Schematic with return current shown
IC1 IC2 IC3
Return currents on ground
Signal trace currents
April 2010 Dr. Bruce Archambeault, IBM 93
Actual Current Return is 3-Dimensional
Ground Layer
Signal Trace
IC
Ground Vias
Ground Layer
Signal TraceICGround Via
BOARD STACK UP:
Ground Layer
Signal TraceCURRENT LOCATION:
April 2010 Dr. Bruce Archambeault, IBM 94
Low Frequency Return Currents Take Path of Least Resistance
Ground Plane
DriverReceiver
April 2010 Dr. Bruce Archambeault, IBM 95
High Frequency Return Currents Take Path of Least Inductance
Ground Plane
DriverReceiver
April 2010 Dr. Bruce Archambeault, IBM 96
PCB Example for Return Current Impedance
Trace
GND Plane
22” trace
10 mils wide, 1 mil thick, 10 mils above GND plane
April 2010 Dr. Bruce Archambeault, IBM 97
PCB Example for Return Current Impedance
Trace
GND Plane
Shortest DC path
For longest DC path, current returns under trace
April 2010 Dr. Bruce Archambeault, IBM 98
MoM Results for Current DensityFrequency = 1 KHz
April 2010 Dr. Bruce Archambeault, IBM 99
MoM Results for Current DensityFrequency = 1 MHz
April 2010 Dr. Bruce Archambeault, IBM 100
U-shaped Trace InductancePowerPEEC Results
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
0.5
0.55
0.6
1.0E+03 1.0E+04 1.0E+05 1.0E+06 1.0E+07 1.0E+08
Frequency (Hz)
indu
ctan
ce (u
H)
April 2010 Dr. Bruce Archambeault, IBM 101
Microstrip Transmission Line
Stripline Transmission Line
DielectricReference Planes
Signal Trace
Traces/nets over a Reference Plane
April 2010 Dr. Bruce Archambeault, IBM 102
Signal Traces
Reference Planes
(Power, “Ground”, etc.)
Traces/nets and Reference Planes in Many Layer Board Stackup
April 2010 Dr. Bruce Archambeault, IBM 103
Microstrip Electric/Magnetic Field Lines(8mil wide trace, 8 mils above plane, 65 ohm)
Electric Field Lines
Vcc
Courtesy of Hyperlynx
April 2010 Dr. Bruce Archambeault, IBM 104
Microstrip Electric/Magnetic Field LinesCommon Mode
8 mil wide trace, 8 mils above plane, 65/115 ohm)
Electric Field Lines
Vcc
Courtesy of Hyperlynx
April 2010 Dr. Bruce Archambeault, IBM 105
Microstrip Electric/Magnetic Field LinesDifferential Mode
8 mil wide trace, 8 mils above plane, 65/115 ohm)
Electric Field Lines
Vcc
Courtesy of Hyperlynx
April 2010 Dr. Bruce Archambeault, IBM 106
Electric/Magnetic Field LinesSymmetrical Stripline
Vcc
GND
Courtesy of Hyperlynx
April 2010 Dr. Bruce Archambeault, IBM 107
Electric/Magnetic Field LinesSymmetrical Stripline (Differential)
Vcc
GND
Courtesy of Hyperlynx
April 2010 Dr. Bruce Archambeault, IBM 108
Electric/Magnetic Field LinesAsymmetrical Stripline
Vcc
GND
Courtesy of Hyperlynx
April 2010 Dr. Bruce Archambeault, IBM 109
Electric/Magnetic Field LinesAsymmetrical Stripline (Differential)
Courtesy of Hyperlynx
April 2010 Dr. Bruce Archambeault, IBM 110
Pseudo-Differential Nets
• Are the drivers really differential? Or complementary single ended nets?
• True differential requires no nearby reference plane
• Currents will exist on reference plane
April 2010 Dr. Bruce Archambeault, IBM 111
Pseudo-Differential NetsReference Plane Currents
• Signal integrity is greatly helped by ‘differential’ nets
• Currents in reference plane– Balanced only if:
• Traces are equal length (within 10-20 mils)• Drivers are EXACTLY balanced
– Not likely!
April 2010 Dr. Bruce Archambeault, IBM 112
What About Pseudo-Differential Nets?
• So-called differential traces are NOT truly differential– Two complementary single-ended drivers
• Relative to ‘ground’
– Receiver is differential• Senses difference between two nets (independent of
‘ground’)• Provides good immunity to common mode noise• Good for signal quality/integrity
April 2010 Dr. Bruce Archambeault, IBM 113
Pseudo-Differential Nets Current in Nearby Plane
• Balanced/Differential currents have matching current in nearby plane– No issue for discontinuities
• Any unbalanced (common mode) currents have return currents in nearby plane that must return to source!– All normal concerns for single-ended nets
apply!
April 2010 Dr. Bruce Archambeault, IBM 114
Pseudo-Differential Nets
• Not really ‘differential’, since more closely coupled to nearby plane than each other
• Skew and rise/fall variation cause common mode currents!
April 2010 Dr. Bruce Archambeault, IBM 115
Differential Voltage Pulse with Skew1 Gbit/sec with 95 psec rise/fall time
0
0.2
0.4
0.6
0.8
1
1.2
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Time (nsec)
Volta
ge
Complementary -- Line1Complementary -- Line 2Skew=2psSkew=6psSkew = 10psSkew = 20psSkew = 30psSkew =40psSkew =50psSkew =60ps
April 2010 Dr. Bruce Archambeault, IBM 116
Common Mode VoltageFrom Differential Voltage Pulse with Skew
1 Gbit/sec with 95 psec rise/fall time
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Time (nsec)
Volta
ge
BalancedSkew=2psSkew=6psSkew =10psSkew =20psSkew =30psSkew =40psSkew =50ps
April 2010 Dr. Bruce Archambeault, IBM 117
Differential Voltage Pulse with Rise/Fall Variation/Unbalance1 Gbit/sec with 95 psec Nominal Rise/Fall Time
0
0.2
0.4
0.6
0.8
1
1.2
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Time (ns)
Leve
l (vo
lts) Original Pulse rise=95ps
Complementary Pulse Rise=90psComplementary Pulse Rise=80psComplementary Pulse Rise=105psComplementary Pulse Rise=115ps
April 2010 Dr. Bruce Archambeault, IBM 118
Common Mode VoltageFrom Differential Voltage Pulse with Various Rise/Fall Unbalance
1 Gbit/sec with 95 psec Nominal Rise/Fall Time
-0.2
-0.15
-0.1
-0.05
0
0.05
0.1
0.15
0.2
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Time (ns)
Volta
ge
Complementary Pulse Rise=90ps
Complementary Pulse Rise=80ps
Complementary Pulse Rise=105ps
Complementary Pulse Rise=115ps
April 2010 Dr. Bruce Archambeault, IBM 119
Board-to-Board Differential Pair Issues
Connector
PCB Plane 1
PCB Plane 2
Microstrip
Microstrip
VGround-to-Ground
noise
April 2010 Dr. Bruce Archambeault, IBM 120
Example Measured Differential Individual Signal-to-GND
Individual Differential Signals ADDED
Common Mode Noise 170 mV P-P
500 mV P-P (each)
April 2010 Dr. Bruce Archambeault, IBM 121
Measured GND-to-GND Voltage
205 mV P-P
April 2010 Dr. Bruce Archambeault, IBM 122
Antenna StructuresDipole antenna
PCB GND planes
Non-Dipole antenna
April 2010 Dr. Bruce Archambeault, IBM 123
Pin Assignment Controls Inductance for CM signals
Signal Pin Related Ground Pins
37.17 nH 25.21 nH
16.85 nH 20.97 nH
(a) (b)
(c) (d)
April 2010 Dr. Bruce Archambeault, IBM 124
Different pins within Same Pair may have Different Loop Inductance for CM
“Ground” pins Differential pair
2 1
34
“Ground” pins Differential pair
2 1
34pin 1 -- 26.6nH
pin 2 -- 23.6nH
pin 3 -- 31.8nH
pin 4 -- 28.8nH
April 2010 Dr. Bruce Archambeault, IBM 125
PCB LayoutThought Process
• Intentional Signals– Clock– Buss– I/O– Video
• Unintentional Signals– Common Mode Currents– Cross Talk Coupling– Power Plane Bounce– Above Board Structures
April 2010 Dr. Bruce Archambeault, IBM 126
Potential Problems• Intentional Signals
– Loop Mode– Common Mode
• Unintentional Signals– Common Mode– Crosstalk Coupling– Power Plane Bounce– Above Board Structures
So….. What can we do up front??
Design on PURPOSEnot by Magic!!
April 2010 Dr. Bruce Archambeault, IBM 128
Intentional Signal Emissions
• Loop Mode– Intentional signal current travels down trace to
receiver– Assume return current flows directly under
trace in reference plane– Microstrip creates small loop antenna
April 2010 Dr. Bruce Archambeault, IBM 129
What is the Intentional Signal?
• bit rate• rise time• not enough information!
April 2010 Dr. Bruce Archambeault, IBM 130
(d and t are in seconds)
Log Frequency (Hz)
20 dB/decade
Am
plitu
de (S
) Log
Sca
le
1/(πd) 1/(πt)
40 dB/decade
t t
d
A
Rule of Thumb for Spectral Envelope
April 2010 Dr. Bruce Archambeault, IBM 131
Faster Rise Time gives higher Frequency Harmonics!
Log Frequency (Hz)
20 dB/decade
Am
plitu
de (S
) Log
Sca
le
1/(πd) 1/(πtslow) 1/(πtfast)
Break frequency has significant impact
April 2010 Dr. Bruce Archambeault, IBM 132
Real Intentional Signal
• Note that Fmax= .35/risetime is not high enough!
• Previous guidelines is only a starting point– Real world is much different
• Significant over/under shoot!• example
April 2010 Dr. Bruce Archambeault, IBM 133
Maximum Frequency vs Rise Time(50 MHz Example)
0
100
200
300
400
500
600
700
0 0.5 1 1.5 2 2.5 3
Rise Time (ns)
Max
imum
Fre
quen
cy (M
Hz) 1/(3tr) freq
Harmonic Freq (MHz)
April 2010 Dr. Bruce Archambeault, IBM 134
Time Domain comparison of Effect on Voltage Waveformwith Good and Poor Termination
-0.5
0
0.5
1
1.5
2
2.5
3
3.5
0.0E+00 5.0E-09 1.0E-08 1.5E-08 2.0E-08 2.5E-08 3.0E-08 3.5E-08
Time (sec)
Am
plitu
de (v
olts
)
Poor-Term
Good-Term
April 2010 Dr. Bruce Archambeault, IBM 135
Current Radiates
• Voltage signal important for SI and Functionality
• NOT Important for emissions!• Current radiates, not voltage!!!
April 2010 Dr. Bruce Archambeault, IBM 136
Time Domain comparison of Effect on Current Waveformwith Good and Poor Termination
-8.E-02
-6.E-02
-4.E-02
-2.E-02
0.E+00
2.E-02
4.E-02
6.E-02
8.E-02
1.E-01
0.0E+00 5.0E-09 1.0E-08 1.5E-08 2.0E-08 2.5E-08 3.0E-08 3.5E-08
Time (sec)
Am
plitu
de (a
mps
)
Poor-Term
Good-Term
April 2010 Dr. Bruce Archambeault, IBM 137
Comparison of Frequency Spectrum of Source Voltage on Tracewith Good and Poor Termination
60
70
80
90
100
110
120
130
1.E+07 1.E+08 1.E+09
Frequency (Hz)
Am
plitu
de (d
Buv
)
Term-Poor
Good Term
April 2010 Dr. Bruce Archambeault, IBM 138
Comparison of Frequency Spectrum of Current on Tracewith Good and Poor Termination
0
10
20
30
40
50
60
70
80
90
1.E+07 1.E+08 1.E+09
Frequency (Hz)
Am
plitu
de (d
BuA
)
Term-Poor
Good Term
April 2010 Dr. Bruce Archambeault, IBM 139
• Risetime often controlled by Signal Integrity constraints -- can’t be slowed down
• Other ‘noise’ is caused by imperfect termination
• More details on this later
April 2010 Dr. Bruce Archambeault, IBM 140
Radiation from Traces• Who cares about the far field?
– using shielded boxes– even in unshielded products, most emissions
are from cables• Near field can excite shielded box
resonances– resonant frequency can be anything– changes with placement of inside stuff
April 2010 Dr. Bruce Archambeault, IBM 141
How can we find the near field 2” above a board?
Board with 10” microstrip
April 2010 Dr. Bruce Archambeault, IBM 142
Hertzian Dipole Approach
E IL jc r cr j rθ
θπ ε
ωω
= + +⎛⎝⎜
⎞⎠⎟
sin4
1 1
02 2 3
Break trace into small segments
April 2010 Dr. Bruce Archambeault, IBM 143
Hertzian Dipole Approach
• Previous equation reduces to – Electric Field = Current * Length * Constant
April 2010 Dr. Bruce Archambeault, IBM 144
Near Radiated Fields above Board
• For a single clock net • Near Electric Field is Linear with Current
– 20 dB difference in Current means 20 dB difference in Electric Field!
– Termination makes a Big Difference!
April 2010 Dr. Bruce Archambeault, IBM 145
Intentional Signal Analysis• Most EMC problems come from common-
mode currents• All common mode currents are caused by
intentional signals• Signal Integrity tools now allow analysis of
current spectrum• Reduce high frequency harmonics on the
current to lower EMC common mode currents!
April 2010 Dr. Bruce Archambeault, IBM 146
Why fight an emission problem which is due to a current that is
not required?!
• A little extra analysis• Use tools already available• cost of different value resistors is equal
– Therefore, reducing emissions by termination control is FREE !!!
April 2010 Dr. Bruce Archambeault, IBM 147
Effect of Exposed Length reduced to 3”
• Using Same Spectrum of Current• Near Electric field is linear with trace length
– Reducing exposed length from 12” to 3” reduces electric field by factor of 4 (12 dB)!
April 2010 Dr. Bruce Archambeault, IBM 148
Potential Problems• Intentional Signals
– Loop Mode– Common Mode
• Unintentional Signals– Common Mode– Crosstalk Coupling– Power Plane Bounce– Above Board Structures
April 2010 Dr. Bruce Archambeault, IBM 149
When Reference Plane not perfect
• Splits in power plane?• Traces across split
April 2010 Dr. Bruce Archambeault, IBM 150
Splits in Reference Plane
• Power planes often have splits• Return current path interrupted• Consider spectrum of clock signal• Consider stitching capacitor impedance• High frequency harmonics not returned
directly
April 2010 Dr. Bruce Archambeault, IBM 151
Split Reference Plane Example
PWR
GND
April 2010 Dr. Bruce Archambeault, IBM 152
Split Reference Plane Example With Stitching Capacitors
PWR
GND
Stitching Capacitors Allow Return current to Cross Splits ???
April 2010 Dr. Bruce Archambeault, IBM 153
Capacitor ImpedanceMeasured Impedance of .01 uf Capacitor
0.1
1.0
10.0
100.0
1.E+06 1.E+07 1.E+08 1.E+09
Frequency (Hz)
Impe
dnac
e (o
hms)
April 2010 Dr. Bruce Archambeault, IBM 154
Frequency Domain Amplitude of Intentional Current Harmonic AmplitudeFrom Clock Net
40
60
80
100
120
140
160
0 200 400 600 800 1000 1200 1400 1600 1800 2000
freq (MHz)
leve
l (dB
uA)
April 2010 Dr. Bruce Archambeault, IBM 155
Are Stitching Capacitors Effective ???
• YES, at low frequencies • No, at high frequencies• Need to limit the high frequency current
spectrum• Need to avoid split crossings with ALL
critical signals
April 2010 Dr. Bruce Archambeault, IBM 156
Near Field Radiation from Microstrip on Board with Split in Reference Plane
Comparison of Maximum Radiated E-Field for MicrostripWith and without Split Ground Reference Plane
20
30
40
50
60
70
80
90
100
110
120
10 100 1000
Frequency (MHz)
Max
imum
Rad
iate
d E-
Fiel
d (d
Buv
/m)
No-Split
Split
April 2010 Dr. Bruce Archambeault, IBM 157
With “Perfect” Stitching Capacitors Across SplitComparison of Maximum Radiated E-Field for Microstrip
With and without Split Ground Reference Plane and Stiching Capacitors
20
30
40
50
60
70
80
90
100
110
120
10 100 1000
Frequency (MHz)
Max
imum
Rad
iate
d E-
Fiel
d (d
Buv
/m)
No-Split
Split
Split w/ one Cap
Split w/ Two Caps
April 2010 Dr. Bruce Archambeault, IBM 158
Stitching Caps with Inductance and Via Inductance
Comparison of Maximum Radiated E-Field for MicrostripWith and without Split Ground Reference Plane and Stiching Capacitors
20
30
40
50
60
70
80
90
100
110
120
10 100 1000
Frequency (MHz)
Max
imum
Rad
iate
d E-
Fiel
d (d
Buv
/m)
No-SplitSplitSplit w/ one CapSplit w/ Two CapsSplit w/One Real CapSplit w/Two Real Caps
April 2010 Dr. Bruce Archambeault, IBM 159
Distance to ‘Capacitor’
Split Width
Perfect Capacitor
Trace
Distance to ‘Capacitor’Distance to ‘Capacitor’
Split Width
Perfect Capacitor
Trace
Effect of Stitching Capacitor Distance
April 2010 Dr. Bruce Archambeault, IBM 160
Estimated Transfer Inductance for Trace Crossing Split PlaneMicrostrip Configuration (Valid to 2 GHz)
0
2
4
6
8
10
12
0 100 200 300 400 500 600 700
Distance to Capacitor (mils)
Tran
sfer
Indu
ctan
ce (n
H)
Split Width = 20 milSplit Width = 40 milSplit Width = 60 mil
d
Estimated Transfer Inductance for Trace Crossing Split PlaneMicrostrip Configuration (Valid to 2 GHz)
0
2
4
6
8
10
12
0 100 200 300 400 500 600 700
Distance to Capacitor (mils)
Tran
sfer
Indu
ctan
ce (n
H)
Split Width = 20 milSplit Width = 40 milSplit Width = 60 mil
dd
April 2010 Dr. Bruce Archambeault, IBM 161
Estimated Transfer Inductance for Trace Crossing Split PlaneMicrostrip Configuration with Solid Plane Below (Valid to 400 MHz)
Split Width = 40 mils
0
0.5
1
1.5
2
2.5
0 100 200 300 400 500 600 700
Distance to Capacitor (mils)
Tran
sfer
Indu
ctan
ce (n
H)
Distance to Solid Plane = 4 milsDistance to Solid Plane = 6 milsDistance to Solid Plane = 8 mils
h1
h2Split Plane
Solid Plane
Estimated Transfer Inductance for Trace Crossing Split PlaneMicrostrip Configuration with Solid Plane Below (Valid to 400 MHz)
Split Width = 40 mils
0
0.5
1
1.5
2
2.5
0 100 200 300 400 500 600 700
Distance to Capacitor (mils)
Tran
sfer
Indu
ctan
ce (n
H)
Distance to Solid Plane = 4 milsDistance to Solid Plane = 6 milsDistance to Solid Plane = 8 mils
h1
h2Split Plane
Solid Plane
h1
h2Split Plane
Solid Plane
April 2010 Dr. Bruce Archambeault, IBM 162
Estimated Transfer Inductance for Trace Crossing Split PlaneStripline Configuration (Valid to 600 MHz)
Split Width = 40 mils (h2=Distance to Solid Plane, h1 = Distance to Split Plane)
0
0.5
1
1.5
2
2.5
3
0 100 200 300 400 500 600 700
Distance to Capacitor (mils)
Tran
sfer
Indu
ctan
ce (n
H)
Ratio h2/h1 = 0.5Ratio h2/h1 = 0.666Ratio h2/h1 = 1.0Ratio h2/h1 = 1.33Ratio h2/h1 = 2
h1
h2
Split Plane
Solid Plane
Estimated Transfer Inductance for Trace Crossing Split PlaneStripline Configuration (Valid to 600 MHz)
Split Width = 40 mils (h2=Distance to Solid Plane, h1 = Distance to Split Plane)
0
0.5
1
1.5
2
2.5
3
0 100 200 300 400 500 600 700
Distance to Capacitor (mils)
Tran
sfer
Indu
ctan
ce (n
H)
Ratio h2/h1 = 0.5Ratio h2/h1 = 0.666Ratio h2/h1 = 1.0Ratio h2/h1 = 1.33Ratio h2/h1 = 2
h1
h2
Split Plane
Solid Plane
h1
h2
Split Plane
Solid Plane
h1
h2
Split Plane
Solid Plane
April 2010 Dr. Bruce Archambeault, IBM 163
Estimated Transfer Inductance for Trace Crossing Split PlaneSymetrical Stripline Configuration (Valid to 600 MHz)
Split Width = 40 mils (h3=Distance to Solid Plane, h1 = Distance to Split Plane)
0
0.5
1
1.5
2
2.5
0 100 200 300 400 500 600 700
Distance to Capacitor (mils)
Tran
sfer
Indu
ctan
ce (n
H)
No Additional PlaneRatio h3/h1 = 1.0Ratio h3/h1 = .666Ratio h3/h1 = 1.333
h1
h2
Split Plane
Solid Plane
h3Solid Plane
Estimated Transfer Inductance for Trace Crossing Split PlaneSymetrical Stripline Configuration (Valid to 600 MHz)
Split Width = 40 mils (h3=Distance to Solid Plane, h1 = Distance to Split Plane)
0
0.5
1
1.5
2
2.5
0 100 200 300 400 500 600 700
Distance to Capacitor (mils)
Tran
sfer
Indu
ctan
ce (n
H)
No Additional PlaneRatio h3/h1 = 1.0Ratio h3/h1 = .666Ratio h3/h1 = 1.333
h1
h2
Split Plane
Solid Plane
h3Solid Plane
h1
h2
Split Plane
Solid Plane
h3Solid Plane
h1
h2
Split Plane
Solid Plane
h3Solid Plane
April 2010 Dr. Bruce Archambeault, IBM 164
Split Plane videos
• Stitching Cap close to crossing• Stitching cap far from crossing
April 2010 Dr. Bruce Archambeault, IBM 165
Stitching Capacitor MountingPower-to-Power
• Stitching Capacitor Performance at high frequencies depends on connection inductance!
Height above Planes
Via Separation
Inductance Depends on Loop AREA
April 2010 Dr. Bruce Archambeault, IBM 166
Pin Field Via Keepouts??
Return Current must go around entire keep out area --- just as bad as a slot
Return current path deviation minimal
sd
Recommend s/d > 1/3
April 2010 Dr. Bruce Archambeault, IBM 167
Are Stitching Capacitors Effective ???
• YES, at low frequencies • No, at high frequencies• Need to limit the high frequency current spectrum• Need to avoid split crossings with ALL critical
signals
• SAME for So-called ‘differential’ signals!!
April 2010 Dr. Bruce Archambeault, IBM 168
Referencing Nets(Where does the Return Current Flow??)
April 2010 Dr. Bruce Archambeault, IBM 169
Referencing Nets(Where does the Return Current Flow??)
• √ Microstrip/Stripline over unbroken reference plane
• √ Microstrip/Stripline across split in reference plane
• Microstrip/Stripline through via (change reference planes)
• Mother/Daughter card
April 2010 Dr. Bruce Archambeault, IBM 170
Microstrip/Stripline through via (change reference planes)
TraceVia
April 2010 Dr. Bruce Archambeault, IBM 171
How can the Return Current Flow When Signal Line Goes Through Via??
What happens to Return Current
in this Region?
Return Current
April 2010 Dr. Bruce Archambeault, IBM 172
How can the Return Current Flow When Signal Line Goes Through Via??
• Current can NOT go from one side of the plane to the other through the plane– skin depth
• Current must go around plane at via hole, through decoupling capacitor, around second plane at the second via hole!
• Displacement current spread
April 2010 Dr. Bruce Archambeault, IBM 173
Reference Planes
What happens to Return Current in this Region?
Return Current Trace Current
Displacement Current
Return Current Across Reference Plane Change
April 2010 Dr. Bruce Archambeault, IBM 174
GND
PWR
April 2010 Dr. Bruce Archambeault, IBM 175
Return Current Across Reference Plane Change
With Decoupling Capacitor
Reference Planes
Return Current
Decoupling Capacitor
Displacement Current
April 2010 Dr. Bruce Archambeault, IBM 176
Return Current Across Reference Plane Change
With Decoupling Capacitor (on Top)
Return Current
Decoupling Capacitor
Reference Planes
Displacement Current
Common-Mode Current
April 2010 Dr. Bruce Archambeault, IBM 177
Location of Decoupling Capacitors (Relative to Via) is
Important!
• One Decoupling Capacitor at 0.5”• Two Decoupling Capacitors at 0.5”• Two Decoupling Capacitors at 0.25”
April 2010 Dr. Bruce Archambeault, IBM 178
RF Current @ 700 MHz with One Capacitor 0.5” from Via
April 2010 Dr. Bruce Archambeault, IBM 179
RF Current @ 700 MHz with One Capacitor 0.5” from Via
(expanded view)
April 2010 Dr. Bruce Archambeault, IBM 180
RF Current @ 700 MHz with Two Capacitors 0.5” from Via
April 2010 Dr. Bruce Archambeault, IBM 181
RF Current @ 700 MHz with One Capacitor 0.5” from Via
(Expanded view)
April 2010 Dr. Bruce Archambeault, IBM 182
RF Current @ 700 MHz with Two Capacitors 0.25” from Via
April 2010 Dr. Bruce Archambeault, IBM 183
RF Current @ 700 MHz with Two Capacitors 0.25” from Via
(expanded view)
April 2010 Dr. Bruce Archambeault, IBM 184
RF Current @ 700 MHz with One REALCapacitor 0.5” from Via
April 2010 Dr. Bruce Archambeault, IBM 185
RF Current @ 700 MHz with Two REAL Capacitors 0.5” from Via
April 2010 Dr. Bruce Archambeault, IBM 186
RF Current @ 700 MHz with Two REAL Capacitors 0.25” from Via
April 2010 Dr. Bruce Archambeault, IBM 187
Critical Net Via Options6-layer Board
Bad Bad
Good
Possible Routing Layers Planes
Via
April 2010 Dr. Bruce Archambeault, IBM 188
Compromise Routing Option forMany Layer Boards
Good Compromise
Reference Plane
Gnd
Vcc1
Lot’s of Decoupling caps near ASIC
April 2010 Dr. Bruce Archambeault, IBM 189
Typical Driver/Receiver Currents
switch IC loadICdriver
VDC
GND
CL
VCC
Z0, vp
GND
IC loadICdriver
VCC
VCC
charge
logic 0-to-1
Z0, vp
ICdriver
logic 1-to-o
IC load
GND
VCC
0 V
discharge
Z0, vp
April 2010 Dr. Bruce Archambeault, IBM 190
Suppose The Trace is Routed Next to Power (not Gnd)
Vcc1
Vcc1
“Fuzzy” Return Path Area
“Fuzzy” Return Path Area
Return Path Options:
-- Decoupling Capacitors
-- Distributed Displacement Current
TEM Transmission Line Area
April 2010 Dr. Bruce Archambeault, IBM 191
Suppose The Trace is Routed Next to a DIFFERENT Power (not Gnd)
Return Path Options:
-- Decoupling Capacitors ??? May not be any nearby!!
-- Distributed Displacement Current – Increased current spread!!!
Vcc1
Vcc2
“Fuzzy” Return Path Area
“Fuzzy” Return Path Area
TEM Transmission Line Area
April 2010 Dr. Bruce Archambeault, IBM 192
Via SummaryRoute critical signals on either side of ONE reference planeDrop critical signal net to selected layer close to driver/receiver
Many decoupling capacitors (or GND vias) to help return currents
Do NOT change reference planes on critical nets unlessABSOLUTELY NECESSARY!!Make sure at least 2 decoupling capacitors within 0.25” of via (change reference planes) with critical signals
April 2010 Dr. Bruce Archambeault, IBM 193
Mother/Daughter Board Connector Crossing
• Critical Signals must be referenced to same plane on both sides of the connector
April 2010 Dr. Bruce Archambeault, IBM 194
Mother/Daughter Board Connector Crossing
Connector Signal Path
GNDPWRSignal
SignalP
WR
GN
DS
ignal
Signal
April 2010 Dr. Bruce Archambeault, IBM 195
Return Current from Improper Referencing Across Connector
Connector
De-cap
Signal Path
GNDPWRSignal
SignalP
WR
GN
DS
ignal
Signal
Return Path
De-cap
Displacement Current
April 2010 Dr. Bruce Archambeault, IBM 196
Return Current from Proper Referencing Across Connector
PW
RG
ND
Signal
Signal
Connector Signal Path
GNDPWRSignal
Signal
Return Path
April 2010 Dr. Bruce Archambeault, IBM 197
How Many “Ground” Pins Across Connector ???
• Nothing MAGICAL about “ground”• Return current flow!• Choose the number of power and “ground”
pins based on the number of signal lines referenced to power or “ground” planes
• Insure signals are referenced against same planes on either side of connector
April 2010 Dr. Bruce Archambeault, IBM 198
Think about Return Currents!!
Reference plane should be continuous under all critical tracesWhen Vias are necessary make sure there are two close decoupling capacitorsWhen crossing a connector to a second board, make sure the critical trace is referenced to the same reference plane as the primary board
April 2010 Dr. Bruce Archambeault, IBM 199
To Prevent/Reduce Loop Mode Emissions
Bury traces between planes whenever possible
No direct emissions from traces with no exposed length
Keep Exposed lengths shortShorter exposed traces radiate less
Improve termination to reduce high frequency content
If the high frequency currents are not created, they can not radiate!
April 2010 Dr. Bruce Archambeault, IBM 200
Potential Problems• Intentional Signals
– Loop Mode– Common Mode
• Unintentional Signals– Common Mode– Crosstalk Coupling– Power Plane Bounce– Above Board Structures
April 2010 Dr. Bruce Archambeault, IBM 201
Intentional Signals -- Common Mode Emissions
• Return Currents do NOT flow only under microstrip
• Return current spreads out over entire plane to find path of least inductance
• When traces are near board edge, the return current is high along the edge
April 2010 Dr. Bruce Archambeault, IBM 202
Current Spread in Ground-Reference Plane from Microstrip
MicrostripFinite GND plane
April 2010 Dr. Bruce Archambeault, IBM 203
Current Spread in Ground-Reference Plane from Microstrip
Difference in edge current
April 2010 Dr. Bruce Archambeault, IBM 204
Where’s the Radiation?
• Due to Current Build up Along the edge– Along Edge of board– Often near to enclosure seams, slots, airvents
April 2010 Dr. Bruce Archambeault, IBM 205
Return Current in Reference Plane with Trace Near Edge
High current
Low current
Trace
April 2010 Dr. Bruce Archambeault, IBM 206
E-field along edge vs. distance from edgefor 10”x4” board4” long microstrip
April 2010 Dr. Bruce Archambeault, IBM 207
Example Field vs. DistanceNear Electric Field along Board Side due to Close Microstrip
10" x 4" Board w/ 4" microstrip
60
70
80
90
100
110
120
0 200 400 600 800 1000 1200 1400 1600 1800 2000
Distance from Board Edge (mils)
Elec
tric
Fie
ld A
mpl
itude
(dB
uv/m
)
April 2010 Dr. Bruce Archambeault, IBM 208
Current Along Edge of Reference Plane
h
dw
Microstrip
( )[ ]⎟⎟⎠
⎞⎜⎜⎝
⎛⎟⎟⎠
⎞⎜⎜⎝
⎛ −−−=
hdwwI
I ggSignalEdge 2
2/2arctan
2π
π
Isignal = the current amplitude (in linear scale) for each harmonic of the current waveform.wg = the width of the ground-refer4ence plane (set to 1000 always)d = the distance from the trace to the edge of the ground-reference planeh = the height between the trace and the ground-reference plane
April 2010 Dr. Bruce Archambeault, IBM 209
Current Along Edge of Reference Plane
Isignal = the current amplitude (in linear scale) for each harmonic of the current waveform.wg = the width of the ground-refer4ence plane (set to 1000 always)d = the distance from the trace to the edge of the ground-reference planeh = the height between the trace and the ground-reference plane
h
dwh
Symmetrical Stripline
( )[ ]⎟⎟⎠
⎞⎜⎜⎝
⎛⎟⎟⎠
⎞⎜⎜⎝
⎛ −−−=
hdwwI
I ggSignalEdge 2
2/2arctan
22π
π
April 2010 Dr. Bruce Archambeault, IBM 210
Current Along Edge of Reference Plane
Isignal = the current amplitude (in linear scale) for each harmonic of the current waveform.wg = the width of the ground-refer4ence plane (set to 1000 always)d = the distance from the trace to the edge of the ground-reference planeh1 and h2 = the height between the trace and the ground-reference plane
h2
dwh1
Asymmetrical Stripline
( )[ ]⎟⎟⎠
⎞⎜⎜⎝
⎛⎟⎟⎠
⎞⎜⎜⎝
⎛ −−−⎟⎟
⎠
⎞⎜⎜⎝
⎛=−
21
2
22/2
arctan2 h
dwwhhI
I ggSignalNearestEdge
ππ
( )[ ]⎟⎟⎠
⎞⎜⎜⎝
⎛⎟⎟⎠
⎞⎜⎜⎝
⎛ −−−⎟⎟
⎠
⎞⎜⎜⎝
⎛=−
12
1
22/2
arctan2 h
dwwhhI
I ggSignalFurthestEdge
ππ
April 2010 Dr. Bruce Archambeault, IBM 211
To Prevent/Reduce Intentional Signal -- Common Mode
EmissionsKeep traces away from board edge– Reduces Return current along edge of reference plane
Improve termination to reduce high frequency content– If the high frequency currents are not created, they can
not radiate!
April 2010 Dr. Bruce Archambeault, IBM 212
Potential Problems• Intentional Signals
– Loop Mode– Common Mode
• Unintentional Signals– Common Mode– Crosstalk Coupling– Power Plane Bounce– Above Board Structures
April 2010 Dr. Bruce Archambeault, IBM 213
Unintentional Signal EmissionsCommon Mode
• Return current Spread• I/O connector’s pins directly connected to
ground-reference plane• results in high frequency common mode
currents on external cables• how can we stop those currents?
April 2010 Dr. Bruce Archambeault, IBM 214
Return Current in Reference Plane with Trace Near Edge
High current
Low current
Trace
“Ground” Pin on I/O Connector
April 2010 Dr. Bruce Archambeault, IBM 215
How Can We Stop These Currents?
• Split in Plane• Treat the “Ground” pin as a SIGNAL Pin
April 2010 Dr. Bruce Archambeault, IBM 216
I/O Ground Plane Split Example
Serial, Parallel
Audio,
keyboard, mouseHigh Speed Circuits
High Speed I/o, Video, SCSI, etc
Ferrite Beads
April 2010 Dr. Bruce Archambeault, IBM 217
Z of split in Reference PlaneImpedance (Magnitude) Across Split Plane
1
10
100
1000
10000
10 100 1000
Frequency (MHz)
Impe
danc
e (o
hms)
Split=.125cm
Split=.25cm
Split=.5cm
Split=.75
Split=1cm
April 2010 Dr. Bruce Archambeault, IBM 218
Results
• From experience --- Project X is prime example– Controlled Change
• From Models– Shielded Box with Internal PCB and single
Microstrip trace– Connector pin on “Ground” Reference plane
• NOT Connected to microstrip trace
April 2010 Dr. Bruce Archambeault, IBM 219
Shielded Box with Connector and Cable Attached
April 2010 Dr. Bruce Archambeault, IBM 220
Shielded Box
PCBMicrostrip Trace
External Cable
April 2010 Dr. Bruce Archambeault, IBM 221
Shielded Box
PCBMicrostrip Trace
External Cable
Split in Plane
April 2010 Dr. Bruce Archambeault, IBM 222
Comparison of Maximum Radiated E-Fieldfor Shielded Box with Internal PC Board
With and without Split Plane near I/O area
-40
-20
0
20
40
60
80
100
10 100 1000
Frequency (MHz)
Max
imum
Rad
iate
d E-
Fiel
d (d
Buv
/m)
Without Wire
No Split
Split I/O Ground Plane
April 2010 Dr. Bruce Archambeault, IBM 223
What About I/O Intentional Return Currents?
• Long way around through chassis– Functional and quality problems– Other EMC problems
• Low frequency I/O (compared to clocks)– Use ferrite bead across split near I/O trace
crossing• High impedance at high frequencies• Low impedance at low frequencies
April 2010 Dr. Bruce Archambeault, IBM 224
What About I/O Intentional Return Currents?
• NEVER use splits for high frequency I/O– Video– SCSI– USB 2.0
• Consider these signals critical signals
April 2010 Dr. Bruce Archambeault, IBM 225
I/O Ground Plane Split Example
Serial, Parallel
Audio,
keyboard, mouseHigh Speed Circuits
High Speed I/o, Video, SCSI, etc
Ferrite Beads
April 2010 Dr. Bruce Archambeault, IBM 226
Reference to the Chassis must be through as low an impedance path as possible, especially in the I/O connector area. Never use extra components
or traces (zero ohm resistors = zero ohm inductors)
April 2010 Dr. Bruce Archambeault, IBM 227
Reference to ChassisBest Design Practice Multiple vias for
each pad
April 2010 Dr. Bruce Archambeault, IBM 228
Low Impedance Path from PCB GND Plane to Chassis?
GND via
GND plane
Stand off
Metal Enclosure
ICI/O signal
To unbalanced
load
April 2010 Dr. Bruce Archambeault, IBM 229
To Prevent/Reduce Unintentional Common Mode Emissions
Use splits as close to I/O connector as possible– Keep currents away from connector pins
Ferrite across split– to allow intentional I/O signal return currents to
return to sourceGood Low Inductance/Impedance Path to Chassis– External Radiation uses chassis as reference
April 2010 Dr. Bruce Archambeault, IBM 230
To Prevent/Reduce Unintentional Common Mode Emissions
Never use splits for high frequency I/O– Same as critical signals -- keep return currents
closeTreat ALL connector pins as Signal pins– Ground pins are really signal return pins– Intentional signal currents are there too!
Use filters on all lines
April 2010 Dr. Bruce Archambeault, IBM 231
Potential Problems
• Intentional Signals– Differential Mode– Common Mode
• Unintentional Signals– Common Mode– Crosstalk Coupling– Power Plane Bounce– Above Board Structures
April 2010 Dr. Bruce Archambeault, IBM 232
“Ground Bounce”
Power Plane Noise Control
April 2010 Dr. Bruce Archambeault, IBM 233
Power/Ground-Reference Plane Noise
• Must consider TWO Major Factors– EMC -- Reduce noise along edge of board from IC
somewhere else– Functionality -- Provide IC with sufficient charge
• Decoupling strategies are FULL of Myths– Consider the physics– Don’t forget Inductance!
April 2010 Dr. Bruce Archambeault, IBM 234
Source of Power/Ground-Reference Plane Noise
• Power requirements from IC during switching
• Critical Net currents routed through via
April 2010 Dr. Bruce Archambeault, IBM 235
Power Bus SpectrumClock Driver IDT74FCT807
April 2010 Dr. Bruce Archambeault, IBM 236
Noise Injected between Planes Due to Critical Net Through Via
Signal Via
I/O Pin/Via
30 cm
20 cm
FR4 r=4.2 Loss tan=0.02
April 2010 Dr. Bruce Archambeault, IBM 237
Transfer Function from Via to I/O PinTransfer Function From Via-to-Via
20x30cm Board
-70
-60
-50
-40
-30
-20
-10
0
1.E+08 1.E+09 1.E+10
Frequency (Hz)
Tran
sfer
Fun
ctio
n (d
B)
5 mil Seperation10 mil Seperation15 mil Seperation25 mil Seperation35 mil Seperation
April 2010 Dr. Bruce Archambeault, IBM 238
Decoupling Must be Analyzed in Different Ways for Different Functions• EMC
– Resonance big concern– Requires STEADY-STATE analysis
• Frequency Domain
– Transfer function analysis• Eliminate noise along edge of board due to ASIC/IC
located far away
April 2010 Dr. Bruce Archambeault, IBM 239
Decoupling Must be Analyzed in Different Ways for Different Functions
• Provide Charge to ASIC/IC– Requires TRANSIENT analysis– Charge will NOT travel from far corners of the
board fast enough– Local decoupling capacitors dominate– Impedance at ASIC/IC pins important
April 2010 Dr. Bruce Archambeault, IBM 240
Steady-State Analysis
• Measurements and Simulations• Test Board with Decoupling capacitors
every 1” square
April 2010 Dr. Bruce Archambeault, IBM 241
5”
1”
9”10”
1”3”
6”9”
11”12”
Figure 1
Test Board Ports
#1 #2 #3 #4 #5
#6 #7 #8 #9 #10
#11 #12 #13 #14 #15
April 2010 Dr. Bruce Archambeault, IBM 242
S21 Used for Decoupling “Goodness”
• Ratio of Power ‘out’ to power ‘in’• Better Indicator of EMI noise transmission
across board• Also used to validate simulations
April 2010 Dr. Bruce Archambeault, IBM 243
Measured S21 for 12" x 10" PC Board Between Power/Ground Planeswith No Decoupling Capacitors
(Measured Center to Corner)
-80
-70
-60
-50
-40
-30
-20
-10
0
0.0E+00 1.0E+08 2.0E+08 3.0E+08 4.0E+08 5.0E+08 6.0E+08 7.0E+08 8.0E+08 9.0E+08 1.0E+09
Frequency (Hz)
S21
(dB
)
Board Capacitance Dominates
Physical Board Size Resonances Dominate
April 2010 Dr. Bruce Archambeault, IBM 244
Test Board Decoupling Capacitor Placement for 25 .01 uf Caps
Possible CapLocation
PopulatedCapLocations
April 2010 Dr. Bruce Archambeault, IBM 245
Test Board Decoupling Capacitor Placement for 51 .01 uf Caps
Possible CapLocation
PopulatedCapLocations
April 2010 Dr. Bruce Archambeault, IBM 246
Measured S21 for 12" x 10" PC Board Between Power/Ground Planeswith Various Amounts of Decoupling Capacitors
(Measured Center to Corner)
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
0.0E+00 2.0E+08 4.0E+08 6.0E+08 8.0E+08 1.0E+09 1.2E+09 1.4E+09 1.6E+09 1.8E+09
Frequency (Hz)
S21
(dB
)
No Caps25 Caps50 Caps99 Caps
Measured S21 for 12" x 10" PC Board Between Power/Ground Planeswith Various Amounts of Decoupling Capacitors
(Measured Center to Corner)
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
0.0E+00 2.0E+08 4.0E+08 6.0E+08 8.0E+08 1.0E+09 1.2E+09 1.4E+09 1.6E+09 1.8E+09
Frequency (Hz)
S21
(dB
)
No Caps25 Caps50 Caps99 Caps
April 2010 Dr. Bruce Archambeault, IBM 247
S21 Between Port #8 and Port #1 on Test BoardWith Various Amounts of .01 uf Decoupling Capacitors
-60
-50
-40
-30
-20
-10
0
0.0E+00 2.0E+08 4.0E+08 6.0E+08 8.0E+08 1.0E+09 1.2E+09 1.4E+09 1.6E+09 1.8E+09
Frequency (Hz)
S21
(dB
)
No Caps
25 Caps
51 Caps
99 Caps
April 2010 Dr. Bruce Archambeault, IBM 248
1.00E+6 1.00E+7 1.00E+8 1.00E+9 1.00E+10
Freq (Hz)
0.1
1
10
100
1000
10000
|Z| (
Ohm
s)
0.01uF22pF0.01uF in parallel with 22pF
Cap Impedance
April 2010 Dr. Bruce Archambeault, IBM 249
Test Board Decoupling Capacitor Placement for 41 22pf Caps
(In Addition to 99 .01uf Caps)
Possible CapLocation
PopulatedCapLocations
April 2010 Dr. Bruce Archambeault, IBM 250
S21 Between Port #8 and Port #1 on Test BoardWith 99 .01 uf Decoupling Capacitors and Various Amounts of 22pf
Capacitors Added
-60
-50
-40
-30
-20
-10
0
0.0E+00 2.0E+08 4.0E+08 6.0E+08 8.0E+08 1.0E+09 1.2E+09 1.4E+09 1.6E+09 1.8E+09
Frequency (Hz)
S21
(dB
)
9 22pf Caps17 22pf Caps21 22pf Caps33 22pf Caps41 22pf Caps99 22pf Caps99 Caps
April 2010 Dr. Bruce Archambeault, IBM 251
Measured Comparison of Multiple and Single Value Decoupling Capacitor Strategies
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
0.0E+00 2.0E+08 4.0E+08 6.0E+08 8.0E+08 1.0E+09 1.2E+09 1.4E+09 1.6E+09 1.8E+09
Frequency (Hz)
S21
Tran
sfer
Fun
ctio
n (d
B)
No Caps99 0.01 uF Caps0.01 uF and 330 pF Caps
April 2010 Dr. Bruce Archambeault, IBM 252
Comparison of Model and Measured Datafor 10" x 12" Board
99 caps -- alternating .01uF and 330pF
-100.0
-90.0
-80.0
-70.0
-60.0
-50.0
-40.0
-30.0
-20.0
-10.0
0.0
0.0E+00 1.0E+08 2.0E+08 3.0E+08 4.0E+08 5.0E+08 6.0E+08 7.0E+08 8.0E+08 9.0E+08 1.0E+09
Frequency (Hz)
S21
(dB
)
CIAO - .01uF & 330 pF
Measured
April 2010 Dr. Bruce Archambeault, IBM 253
S21 Transfer Function for Different Value CapacitorsCenter-to-Corner10" x 12" Board
-80
-70
-60
-50
-40
-30
-20
-10
0
0.0E+00 1.0E+08 2.0E+08 3.0E+08 4.0E+08 5.0E+08 6.0E+08 7.0E+08 8.0E+08 9.0E+08 1.0E+09
Frequency (Hz)
S21
(dB
)
99 .01uF caps
99 0.1uF caps
99 0.33uF caps
99 Caps (0.01uF and 330pF)
99 2nh shorts
April 2010 Dr. Bruce Archambeault, IBM 254
Voltage Distribution @ 350 MHz.01uF and 330pF Case (Source in Center)
April 2010 Dr. Bruce Archambeault, IBM 255
Voltage Distribution @ 750 MHz.01uF and 330pF Case (Source in Center)
April 2010 Dr. Bruce Archambeault, IBM 256
Voltage Distribution @ 950 MHz.01uF and 330pF Case (Source in Center)
April 2010 Dr. Bruce Archambeault, IBM 257
Voltage and Gradient99 caps @ 800 MHz
April 2010 Dr. Bruce Archambeault, IBM 258
Decoupling Capacitor Mounting
• Keep as to planes as close to capacitor pads as possible
Height above Planes
Via Separation
Inductance Depends on Loop AREA
April 2010 Dr. Bruce Archambeault, IBM 259
Decoupling Capacitor Mounting
• Keep as to planes as close to capacitor pads as possible
CapacitorICCapacitor Connection Inductance Loop
IC Connection Inductance Loop
Plane Inductance Loop
April 2010 Dr. Bruce Archambeault, IBM 260
Via Configuration Can Change Inductance
Via
Capacitor Pads
SMT Capacitor
The “Good”
The “Bad”
The “Ugly”
Really “Ugly”
Better
Best
April 2010 Dr. Bruce Archambeault, IBM 261
Comparison of Decoupling Capacitor Impedance100 mil Between Vias & 10 mil to Planes
0.01
0.1
1
10
100
1000
1.0E+06 1.0E+07 1.0E+08 1.0E+09 1.0E+10
Frequency (Hz)
Impe
danc
e (o
hms)
1000pF
0.01uF
0.1uF
1.0uF
April 2010 Dr. Bruce Archambeault, IBM 262
Via Seperation (mils) Inductance (nH) Impedance @ 1 GHz (ohms) 20 .06 .41 40 0.21 1.3 60 0.36 2.33 80 0.5 3.1
100 0.64 4.0 150 1.0 6.23 200 1.4 8.5 300 2.1 12.69 400 2.75 17.3 500 3.5 21.7
Comparison of Decoupling Capacitor Via Separation Distance Effects
0.1 uF Capacitor10 mils
Via Separation
April 2010 Dr. Bruce Archambeault, IBM 263
Example Connection Inductance Values
2.07 nH2.4 nH4.3 nH4.2 nH0603 + 2*160mil
1.5 nH2.1 nH3.15 nH3.3 nH0603 + 2*100mil
0.8 nH1.1 nH1.74 nH2.3 nH0603 + 2*10mil
2.5 nH3.5 nH5.1 nH5.1 nH0805 + 2*160mil
2.0 nH3 nH4.3 nH4.1 nH0805 + 2*100mil
1.38 nH2 nH3.1 nH3.0 nH0805 + 2*10mil
Simple rect loop(10 mils to plane)
Complex Formula(10 mils to plane)
Simple rect loop(20 mils to plane)
Complex Formula
(20 mils to plane)
Spacing between
Vias
Fan, Jun, Wei Cui, James L. Drewniak, Thomas Van Doren, and James L. Knighten, “Estimating the Noise Mitigating Effect of Local Decoupling in Printed Circuit Boards,” IEEE Trans. on Advanced Packaging, Vol. 25, No. 2, May 2002, pp. 154-165.
Knighten, James L., Bruce Archambeault, Jun Fan, Samuel Connor, James L. Drewniak, “PDN Design Strategies: II. Ceramic SMT Decoupling Capacitors – Does Location Matter?,” IEEE EMC Society Newsletter, Issue No. x, Winter 2006, pp. 56-67. (www.emcs.org)
Sources for complex formula:
April 2010 Dr. Bruce Archambeault, IBM 264
Other Design Possibilities
• So-called Buried Capacitance– Reduces high frequency transfer function– Allows less capacitors to be used– Really should be called ‘increased distributed
capacitance’• Lossy decoupling
– Reduces high frequency transfer function– Allows less capacitors to be used
April 2010 Dr. Bruce Archambeault, IBM 265
Buried Capacitance
• Planes very close together (2 mils)• Only effective for the power/ground plane
pair !!!• Other sets of Planes must still be decoupled
the traditional way
April 2010 Dr. Bruce Archambeault, IBM 266
Buried Capacitance ONLYApplies to Plane Pairs
Buried Capacitance Plane Pairs
Still Needs Decoupling
April 2010 Dr. Bruce Archambeault, IBM 267
Transfer function for Decoupling Board 10" x 12"with Various Power/Ground Plane Separation and No Capacitors
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Frequency (Ghz)
Tran
sfer
func
tion
(dB
)
2 mil - No Caps
10 mil - No Caps
20 mil - No Caps
35 mil - No Caps
April 2010 Dr. Bruce Archambeault, IBM 268
Transfer function for Decoupling Board 10" x 12"with Various Power/Ground Plane Separation
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Frequency (Ghz)
Tran
sfer
func
tion
(dB
)
2 mil - No Caps
10 mil - No Caps
20 mil - No Caps
35 mil - No Caps
35 mil w/99 caps
April 2010 Dr. Bruce Archambeault, IBM 269
Lossy Decoupling
• New technique• Series resistance and capacitance in same
SMT package• Need to use both low ESR capacitors and
lossy capacitors– fewer total parts
April 2010 Dr. Bruce Archambeault, IBM 270
Cause of Failure above400 - 500 MHz?
• Inductance is limiting factor for capacitors• Board size cause resonances which causes
problems• Need to reduce resonance effects by
lowering Q-factor– add resistive loss
April 2010 Dr. Bruce Archambeault, IBM 271
Modelled S21 Transfer Function10"x12" Board
R&C Decoupling (Port 8-to-1)
-80.0
-70.0
-60.0
-50.0
-40.0
-30.0
-20.0
0.0E+00 1.0E+08 2.0E+08 3.0E+08 4.0E+08 5.0E+08 6.0E+08 7.0E+08 8.0E+08 9.0E+08 1.0E+09
Frequency (Hz)
Tran
sfer
Fun
ctio
n (d
B)
99 RC Terminations
99 .01uF caps
Edge Term, 20 caps, 45 RCs
Edge Term, 35 caps, 30 RCs
Edge Term, 49 caps, 14 RCs
April 2010 Dr. Bruce Archambeault, IBM 272
Transfer Function with Resistive CapsPort 8 to Port 1
(Resistive Caps with ~10 ohms and 0.01 uF)
-80
-70
-60
-50
-40
-30
-20
-10
0
0.0E+00 2.0E+08 4.0E+08 6.0E+08 8.0E+08 1.0E+09 1.2E+09 1.4E+09 1.6E+09 1.8E+09 2.0E+09
Frequency (Hz)
Tran
sfer
Fun
ctio
n (d
B)
all 0.1 uF capsRC on outer edge onlyRC on two rowsRC on three rowsRC alternating everywhere
April 2010 Dr. Bruce Archambeault, IBM 273
Comparison of Impedance of SMT CapacitorsLossy and Normal Capacitor (0805 size)
0
1
10
100
1.0E+05 1.0E+06 1.0E+07 1.0E+08 1.0E+09 1.0E+10
Frequency (Hz)
Impe
danc
e M
agni
tude
(ohm
s)
Standard 0.01uF Capacitor
Resistive 0.01uF capacitor
April 2010 Dr. Bruce Archambeault, IBM 274
Transient Analysis(Time Limited)
• Provide charge to ASIC/IC• Inductance dominates impedance
– Loop area 1st order effect• Traditional analysis not accurate enough
April 2010 Dr. Bruce Archambeault, IBM 275
switch IC loadICdriverVDC
GND
CL
VCC
Z0, vp
GND
IC loadICdriver
VCC
VCC
charge
logic 0-1
Z0, vp
shoot-thru current
IC loadICdriver
GND
VCC
0 V
discharge
logic 1-0
Z0, vp
shoot-thru current
Current in IC During Logic Transitions (CMOS)
April 2010 Dr. Bruce Archambeault, IBM 276
Typical PCB Power Delivery
GND
VCC
DC/DC converter
(Power source)
GNDVCC
IC load
VCCGND
SMT capacitors
VCCGND
IC driver VCC
GND
electrolyticcapacitor
VCC
GND
April 2010 Dr. Bruce Archambeault, IBM 277
Equivalent Circuit for Power Current Delivery to IC
CLVDC
LtraceLps
Lbulk
Cbulk
Lvia
CSMT
Cplanes
connector and wiring capacitor
leads
electrolytic capacitors
via interconnect
SMT capacitors VCC/GND
plane
IC load
PCBwiring
DC/DCconverter
April 2010 Dr. Bruce Archambeault, IBM 278
Power Bus Charging Hierarchy
power supply
(DC/DC converter)
ultimate charge source
leaded capacitors
SMT capacitors
DC power planes CL
Lps Lbulk Lvia Lplanes
HUGE BIG SMALL TINY
100’s uF 0.01-100’s uF pF’s-100 nF
SLOW POKEY QUICK FASTEST
Ltrace
April 2010 Dr. Bruce Archambeault, IBM 279
Traditional Analysis #1
• Use impedance of capacitors in parallel
Impedance to IC power/gnd pins
ESR1 ESR4ESR3ESR2
ESL1 ESL4ESL3ESL2
1uF .001uF0.01uF0. 1uF
No Effect of Distance Between Capacitors and IC Included!
April 2010 Dr. Bruce Archambeault, IBM 280
Traditional Impedance Calculation for Four Decoupling Capacitor Values
0.01
0.1
1
10
100
1000
1.00E+07 1.00E+08 1.00E+09
Frequency (Hz)
Impe
danc
e (o
hms)
.1uF
.01uF
.001uF
.0001uFAll in Parallel
April 2010 Dr. Bruce Archambeault, IBM 281
Traditional Analysis #2• Calculate loop area – Traditional loop
Inductance formulas– Which loop area? Which size conductor
Impedance to IC power/gnd pins
ESR1 ESR4ESR3ESR2
ESL1+Ld1
1uF .001uF0.01uF0. 1uF
ESL2+Ld2 ESL3+Ld3 ESL4+Ld4
Over Estimates L and Ignores Distributed Capacitance
April 2010 Dr. Bruce Archambeault, IBM 282
More Accurate Model Includes Distributed Capacitance
Distributed
capacitors
Intentional Decoupling Capacitors
Distributed
capacitors
IC Power Pin
Intentional Decoupling Capacitors
April 2010 Dr. Bruce Archambeault, IBM 283
Distributed Capacitance Schematic
Loop L
Capacitance
ESR
Distributed CapacitanceIntentional Capacitor
Source
Note: L increases as distance from source increases
Loop L
Capacitance
ESR
Distributed CapacitanceIntentional Capacitor
SourceSource
Note: L increases as distance from source increases
April 2010 Dr. Bruce Archambeault, IBM 284
Effect of Distributed Capacitance
• Can NOT be calculated/estimated using traditional capacitance equation
• Displacement current amplitude changes with position and distance from the source
April 2010 Dr. Bruce Archambeault, IBM 285
Displacement Current 500 MHz via @450 mils from Source
April 2010 Dr. Bruce Archambeault, IBM 286
Need to Find the Real Effect of Decoupling Capacitor Distance
• Perfect decoupling capacitor is a via between planes
• FDTD simulation to find the effect of shorting via distance from source
• Vary spacing between planes, distance to via, frequency, etc
April 2010 Dr. Bruce Archambeault, IBM 287
Impedance Result
• Linear with frequency (on log scale)• Looks like an inductance only!• Consider this inductance an Apparent
Inductance• Apparent inductance is constant with
frequency
April 2010 Dr. Bruce Archambeault, IBM 288
Formulas to Predict Apparent Inductance
)1592.02774.0()()0403.01192.0()1763.02848.0()()0447.01242.0(
)1943.02948.0()()0492.01307.0()2675.02609.0()()0654.01336.0(
+−+−=+−+−=+−+−=+−+−=
−
−
−
−
sdistLnsLsdistLnsL
sdistLnsLsdistLnsL
viafour
viathree
viatwo
viaone
s = separation between plates (mils/10)
dist = distance to via
April 2010 Dr. Bruce Archambeault, IBM 289
LapparentLIC Lcap
IC Capacitor
PowerGnd
Lapparent
ESR
Lcap + LIC
Nominal Capacitance
Source
True Impedance for Decoupling Capacitor
April 2010 Dr. Bruce Archambeault, IBM 290
Impedance Calculation with Apparent Inductancefor Four Decoupling Capacitor Values
0.01
0.1
1
10
1.E+07 1.E+08 1.E+09
Frequency (Hz)
Impe
danc
e (o
hms)
Case1
Case2Case3
Traditional Calculation
Cap Value Distance to Cap from IC Case 1 Case 2 Case 30.1 uF 800mils 1200mils 1500mils0.01 uF 600mils 900mils 1100mils0.001uF 400mils 700mils 800mils0.0001uF 200mils 400mils 400mils
April 2010 Dr. Bruce Archambeault, IBM 291
Effect of Distributed Capacitance
• Can NOT be calculated/estimated using traditional capacitance equation
• Displacement current amplitude changes with position and distance from the source
• Following examples use cavity resonance technique (EZ-PowerPlane)– Frequency Domain to compare to measurements– Time Domain using SPICE circuit from cavity
resonance analysis
April 2010 Dr. Bruce Archambeault, IBM 292
Parameters for Comparison to Measurements
• Dielectric thickness = 35 mils• Dielectric constant = 4.5, Loss tan = 0.02• Copper conductivity = 5.8 e7 S/m
April 2010 Dr. Bruce Archambeault, IBM 293
Impedance at Port #1Single 0.01 uF Capacitor at Various Distances (35mil Dielectric)
-40
-30
-20
-10
0
10
20
30
1.0E+07 1.0E+08 1.0E+09 1.0E+10Frequency (Hz)
Impe
danc
e (d
Boh
ms)
no caps300 mils500 mils700 mils1000 mils
April 2010 Dr. Bruce Archambeault, IBM 294
Z11 Phase Comparison as Capacitor distance Varies for 35 mils FR4ESL = 0.5nH
-2
-1.5
-1
-0.5
0
0.5
1
1.5
2
1.0E+06 1.0E+07 1.0E+08 1.0E+09
Frequency (Hz)
Phas
e (r
ad)
100 mils200 mils300 mils400 mils1000 mils2000 mils
April 2010 Dr. Bruce Archambeault, IBM 295
Impedance at Port #1Single 0.01 uF Capacitor at Various Distances (10mil Dielectric)
-50
-40
-30
-20
-10
0
10
20
1.0E+07 1.0E+08 1.0E+09 1.0E+10
Frequency (Hz)
Impe
danc
e (d
Boh
ms) no caps
300 mils500 mils700 mils1000 mils
April 2010 Dr. Bruce Archambeault, IBM 296
Cavity Resonance (EZ-PowerPlane) Equivalent Circuit for HSPICE
Lii Ljj
Lij
N00i
N01i
Nmni Nmnj
N01j
N00jC0
C0
C0
G00
G01
Gmn
L01
Lmn
Port i Port j
Port n
April 2010 Dr. Bruce Archambeault, IBM 297
Impedance Comparison (EZ-PP vs HSPICE) at Port #1Single 0.01 uF Capacitor at Various Distances (10mil Dielectric)
-50
-40
-30
-20
-10
0
10
20
1.0E+07 1.0E+08 1.0E+09 1.0E+10
Frequency (Hz)
Impe
danc
e (d
Boh
ms)
300 mils300 mils (HSPICE)1000 mils1000 mils (HSPICE)
April 2010 Dr. Bruce Archambeault, IBM 298
Current Source Pulse for Simulated IC Power/GND750 ps Rise/Fall
-0.2
0
0.2
0.4
0.6
0.8
1
1.2
0 0.5 1 1.5 2 2.5 3 3.5 4
Time (ns)
Cur
rent
(am
ps)
April 2010 Dr. Bruce Archambeault, IBM 299
Time Domain Noise Voltage Across Simulated IC Power/GND Pin (1 amp)Single Capacitor (with 2 nH) at Various Distances (Fullwave Simulation)
-1.5
-1
-0.5
0
0.5
1
1.5
2
0 0.5 1 1.5 2 2.5 3 3.5 4
Time (ns)
Leve
l (vo
lts)
750ps Rise, 35 mil planes,1uF @ 10mils750ps Rise, 35 mil planes, 1uF @ 400mils750ps Rise, 35 mil planes,1uF @ 800mils750ps Rise, 35 mil planes,1uF @ 1200mils750ps Rise, 35 mil planes,1uF @ 1600mils
April 2010 Dr. Bruce Archambeault, IBM 300
Time Domain Current through Capacitor From Simulated IC Power/GND (1 amp)Single Capacitor (with 2nH) at Various Distances
-400
-350
-300
-250
-200
-150
-100
-50
0
50
0 0.5 1 1.5 2 2.5 3 3.5 4
Time (ns)
Cur
rent
(mill
iam
ps)
750ps Rise, 35 mil planes,1uF @ 10mils750ps Rise, 35 mil planes,1uF @ 400mils750ps Rise, 35 mil planes,1uF @ 800mils750ps Rise, 35 mil planes,1uF @ 1200mils750ps Rise, 35 mil planes,1uF @ 1600mils
April 2010 Dr. Bruce Archambeault, IBM 301
Time Domain Noise Voltage Across Simulated IC Power/GND Pin (1 amp)Single Capacitor (with No L) at Various Distances
-2
-1.5
-1
-0.5
0
0.5
1
1.5
2
0 0.5 1 1.5 2 2.5 3 3.5 4
Time (ns)
Leve
l (vo
lts)
750ps Rise, 35 mil planes,1uF @ 10mils750ps Rise, 35 mil planes,1uF @ 400mils750ps Rise, 35 mil planes,1uF @ 800mils750ps Rise, 35 mil planes,1uF @ 1200mils750ps Rise, 35 mil planes,1uF @ 1600mils
April 2010 Dr. Bruce Archambeault, IBM 302
Time Domain Current through Capacitor From Simulated IC Power/GND (1 amp)Single Capacitor (with no L) at Various Distances
-1200
-1000
-800
-600
-400
-200
0
200
400
0 0.5 1 1.5 2 2.5 3 3.5 4
Time (ns)
Cur
rent
(mill
iam
ps)
750ps Rise, 35 mil planes,1uF @ 10mils750ps Rise, 35 mil planes,1uF @ 10mils750ps Rise, 35 mil planes,1uF @ 800mils750ps Rise, 35 mil planes,1uF @ 1200mils750ps Rise, 35 mil planes,1uF @ 1600mils
April 2010 Dr. Bruce Archambeault, IBM 303
Time Domain Noise Voltage Across Simulated IC Power/GND Pin (1 amp)Single Capacitor with Various Capacitor Connection Inductance
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
0.6
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5
Time (ns)
Leve
l (vo
lts)
750ps Rise, 10 mil planes, 1uF @ 400mils750ps Rise, 10 mil planes, (2nH) 1uF @ 400mils750ps Rise, 10 mil planes, (1nH) 1uF @ 400mils
April 2010 Dr. Bruce Archambeault, IBM 304
Time Domain Noise Voltage Across Simulated IC Power/GND Pin (1 amp)Single Capacitor with Various Capacitor Connection Inductance
-1.5
-1
-0.5
0
0.5
1
1.5
2
0 0.5 1 1.5 2 2.5 3 3.5 4
Time (ns)
Leve
l (vo
lts)
750ps Rise, 10 mil planes, 1uF @ 400mils750ps Rise, 10 mil planes, (2nH) 1uF @ 400mils750ps Rise, 35 mil planes,1uF @ 400mils750ps Rise, 35 mil planes,(2nH) 1uF @ 400mils
April 2010 Dr. Bruce Archambeault, IBM 305
Maximum Time Domain Noise Voltage Across Simulated IC Power/GND Pin Single Capacitor at Various Distances (Fullwave Simulation)
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0 200 400 600 800 1000 1200 1400 1600 1800
Distance (mils)
Volta
ge (v
olts
)
750 ps Rise, 10 mil planes,1uF, 2 nH750 ps Rise, 10 mil planes,1uF, 1 nH750 ps Rise, 10 mil planes,1uF, 0.5 nH750 ps Rise, 10 mil planes,1uF, No L
April 2010 Dr. Bruce Archambeault, IBM 306
Maximum Time Domain Noise Voltage Across Simulated IC Power/GND Pin Single Capacitor at Various Distances (Fullwave Simulation)
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0 200 400 600 800 1000 1200 1400 1600 1800
Distance (mils)
Volta
ge (v
olts
)
1 ns Rise, 10 mil planes,1uF, 2 nH1 ns Rise, 10 mil planes,1uF, 1 nH1 ns Rise, 10 mil planes,1uF, 0.5 nH1 ns Rise, 10 mil planes,1uF, No L
April 2010 Dr. Bruce Archambeault, IBM 307
Maximum Time Domain Noise Voltage Across Simulated IC Power/GND Pin Single Capacitor at Various Distances (Fullwave Simulation)
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
0 200 400 600 800 1000 1200 1400 1600 1800
Distance (mils)
Volta
ge (v
olts
)
750 ps Rise, 35 mil planes,1uF, 2 nH
750 ps Rise, 35 mil planes,1uF, 1 nH
750 ps Rise, 35 mil planes,1uF, 0.5 nH
750 ps Rise, 35 mil planes,1uF, No L
April 2010 Dr. Bruce Archambeault, IBM 308
Maximum Time Domain Noise Voltage Across Simulated IC Power/GND Pin Single Capacitor at Various Distances (Fullwave Simulation)
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
0 200 400 600 800 1000 1200 1400 1600 1800
Distance (mils)
Volta
ge (v
olts
)
1 ns Rise, 35 mil planes,1uF, 2 nH1 ns Rise, 35 mil planes,1uF, No L1 ns Rise, 35 mil planes,1uF, 0.5 nH1 ns Rise, 35 mil planes,1uF, 1 nH
April 2010 Dr. Bruce Archambeault, IBM 309
Maximum Voltage vs Distance to Capacitor for 1 ns Rise/fall time0.01 uF Capacitor with 0.5 nH ESL and 30 mOhm ESR
0
0.2
0.4
0.6
0.8
1
1.2
1.4
0 200 400 600 800 1000 1200 1400 1600 1800 2000
Distance From Capacitor (mils)
Max
imum
Vol
tage
at s
ourc
e (v
olts
)
35 mil FR410 mil FR42 mil FR41 mil FR40.5 mil FR4
April 2010 Dr. Bruce Archambeault, IBM 310
Example #1 Low Cap Connection Inductance
IC
GND
PWR
Cap
PCB
April 2010 Dr. Bruce Archambeault, IBM 311
Example #2 High Cap Connection Inductance
IC
GND
PWR
Cap
PCB
April 2010 Dr. Bruce Archambeault, IBM 312
Example #1 Hi Cap Connection Inductance
IC
GND
PWR
Cap
PCB
April 2010 Dr. Bruce Archambeault, IBM 313
Example #1 Lower Cap Connection Inductance
IC
GND
PWR
Cap
PCB
April 2010 Dr. Bruce Archambeault, IBM 314
Capacitor Connection Inductance Ratio
3.362.671.981.290.9235
13.8811.509.136.751.6610
L3/L2 w/extra 300 mil trace
length
L3/L2 w/extra 200 mil trace
length
L3/L2 w/extra 100 mil trace
lengthL3/L2
0603 SMT L3'
(nH)
62mil brdcentered
power bus thickness,
mils
0.9525351.0713351.110350.2725100.30413100.321010
L2(nH)
via diameter,
(mils)
Power bus thickness,
(mils)
GND
PWR
Cap
PCB
L2L3’
ESLL3=L3’ + ESL
For local decoupling need L3/L2 < 3
April 2010 Dr. Bruce Archambeault, IBM 315
Effect of Capacitor Value??
• Need enough charge to supply need• Depends on connection inductance
April 2010 Dr. Bruce Archambeault, IBM 316
Time Domain Noise Voltage Across Simulated IC Power/GND Pin (1 amp)Single Capacitor (with No L) with Various Capacitor Values
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
0.6
0 0.5 1 1.5 2 2.5 3 3.5 4
Time (ns)
Leve
l (vo
lts)
750ps Rise, 10 mil planes, (0.0 nH) 1uF @ 400mils
750ps Rise, 10 mil planes,0.01uF @ 400mils
750ps Rise, 10 mil planes, 100pF @ 400mils
April 2010 Dr. Bruce Archambeault, IBM 317
Time Domain Noise Voltage Across Simulated IC Power/GND Pin (1 amp)Single Capacitor (with 0.5 nH Connection L) with Various Capacitor Values
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
0.6
0 0.5 1 1.5 2 2.5 3 3.5 4
Time (ns)
Leve
l (vo
lts)
750ps Rise, 10 mil planes, (0.5nH) 1uF @ 400mils
750ps Rise, 10 mil planes, (0.5nH) 0.01 uF @ 400mils
750ps Rise, 10 mil planes, (0.5nH) 100 pF @ 400mils
April 2010 Dr. Bruce Archambeault, IBM 318
Time Domain Noise Voltage Across Simulated IC Power/GND Pin (1 amp)Single Capacitor (with 1 nH Connection L) with Various Capacitor Values
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
0.6
0 0.5 1 1.5 2 2.5 3 3.5 4
Time (ns)
Leve
l (vo
lts)
750ps Rise, 10 mil planes, (1nH) 1uF @ 400mils
750ps Rise, 10 mil planes, (1nH) 0.01uF @ 400mils
750ps Rise, 10 mil planes, (1nH) 1000pF @ 400mils
750ps Rise, 10 mil planes, (1nH) 100pF @ 400mils
April 2010 Dr. Bruce Archambeault, IBM 319
So Far……• Frequency domain simulations not optimum
for charge delivery decoupling calculations (phase not considered)
• Time domain simulations using single pulse of current indicate limited capacitor location effect– Connection inductance of capacitor much higher
than inductance between planes– Charge delivered only from the planes
April 2010 Dr. Bruce Archambeault, IBM 320
Charge Depletion
• IC draws charge from planes• Capacitors will re-charge planes
– Location does matter!
April 2010 Dr. Bruce Archambeault, IBM 321
Model for Plane Recharge Investigations
Port2 Port2 (4,5)(4,5)
Port1Port1(8,7)(8,7)
a = 12a = 12
b = 10b = 10
d = 35 mild = 35 milCdec Cdec
(4.05,5)(4.05,5)
Decoupling Capacitor :C = 1uFESR = 30mOhmESL = 0.5nH
5.4=rε
DC voltage used to DC voltage used to charge the power charge the power
plane plane
VdcVdc
I inputI input
Port3 Port3 (4,4.95)(4,4.95)
Port2 Port2 (4,5)(4,5)
Port1Port1(8,7)(8,7)
a = 12a = 12
b = 10b = 10
d = 35 mild = 35 milCdec Cdec
(4.05,5)(4.05,5)
Decoupling Capacitor :C = 1uFESR = 30mOhmESL = 0.5nH
5.4=rε
DC voltage used to DC voltage used to charge the power charge the power
plane plane
VdcVdc
I inputI input
Port3 Port3 (4,4.95)(4,4.95)
Port 2 represents IC current draw
April 2010 Dr. Bruce Archambeault, IBM 322
Charge Between Planes vs.. Charge Drawn by IC
Board total charge : C*V = 3.5nF*3.3V = 11nC
Pulse charge 5A peak : I*dt/2 = (1ns*5A)/2=2.5nC
April 2010 Dr. Bruce Archambeault, IBM 323
Triangular pulses (5 Amps Peak)
April 2010 Dr. Bruce Archambeault, IBM 324
Charge Depletion Voltage Drop
0 2 4 6 8 101
1.5
2
2.5
3
3.5
4
Time [ns]
Vpl
ane [
V]
Ls = 1nHLs = 10 nH
Ls = 50 nH
April 2010 Dr. Bruce Archambeault, IBM 325
Charge Depletion vs. Capacitor Distance
April 2010 Dr. Bruce Archambeault, IBM 326
Charge Depletion for Capacitor @ 400 mils for Various connection Inductance
April 2010 Dr. Bruce Archambeault, IBM 327
Effect of Multiple Capacitors While Keeping Total Capacitance Constant
(power-ground pins at IC center)
12”
10”
Port1 (8,7)(Ls 50nH)
Port2 (4,5)(power pin)
εr =4.5
Decap
Ground pin1 inch
The decap locations are 800mils, 1200mils, 2700mils from the power pin
• C=1uF• ESL=0.5nH• ESR=1Ω
April 2010 Dr. Bruce Archambeault, IBM 328
Effect of Multiple Capacitors While Keeping Total Capacitance Constant
(power-ground pins at IC center)
12”
10”
Port1 (8,7)(Ls 50nH)
Port2 (4,5)(power pin)
εr =4.5
Decap
Ground pin1 inch
The decap locations are 800mils, 1200mils, 2700mils from the power pin
• C=0.5uF• ESL=0.5nH• ESR=1Ω
April 2010 Dr. Bruce Archambeault, IBM 329
Effect of Multiple Capacitors While Keeping Total Capacitance Constant
(power-ground pins at IC center)
12”
10”
Port1 (8,7)(Ls 50nH)
Port2 (4,5)(power pin) εr =4.5
Decap
Ground pin1 inch
The decap locations are 800mils, 1200mils, 2700mils from the power pin
• C=0.25uF • ESL=0.5nH• ESR=1Ω
April 2010 Dr. Bruce Archambeault, IBM 330
Constant Capacitance 800 mil Distance
April 2010 Dr. Bruce Archambeault, IBM 331
Constant Capacitance 800 mil Distance
April 2010 Dr. Bruce Archambeault, IBM 332
Effect of Capacitor Value??
• Need enough charge to supply need• Depends on connection inductance
April 2010 Dr. Bruce Archambeault, IBM 333
Time Domain Noise Voltage Across Simulated IC Power/GND Pin (1 amp)Single Capacitor (with No L) with Various Capacitor Values
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
0.6
0 0.5 1 1.5 2 2.5 3 3.5 4
Time (ns)
Leve
l (vo
lts)
750ps Rise, 10 mil planes, (0.0 nH) 1uF @ 400mils
750ps Rise, 10 mil planes,0.01uF @ 400mils
750ps Rise, 10 mil planes, 100pF @ 400mils
April 2010 Dr. Bruce Archambeault, IBM 334
Time Domain Noise Voltage Across Simulated IC Power/GND Pin (1 amp)Single Capacitor (with 0.5 nH Connection L) with Various Capacitor Values
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
0.6
0 0.5 1 1.5 2 2.5 3 3.5 4
Time (ns)
Leve
l (vo
lts)
750ps Rise, 10 mil planes, (0.5nH) 1uF @ 400mils
750ps Rise, 10 mil planes, (0.5nH) 0.01 uF @ 400mils
750ps Rise, 10 mil planes, (0.5nH) 100 pF @ 400mils
April 2010 Dr. Bruce Archambeault, IBM 335
Time Domain Noise Voltage Across Simulated IC Power/GND Pin (1 amp)Single Capacitor (with 1 nH Connection L) with Various Capacitor Values
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
0.6
0 0.5 1 1.5 2 2.5 3 3.5 4
Time (ns)
Leve
l (vo
lts)
750ps Rise, 10 mil planes, (1nH) 1uF @ 400mils
750ps Rise, 10 mil planes, (1nH) 0.01uF @ 400mils
750ps Rise, 10 mil planes, (1nH) 1000pF @ 400mils
750ps Rise, 10 mil planes, (1nH) 100pF @ 400mils
April 2010 Dr. Bruce Archambeault, IBM 336
Noise Voltage is INDEPENDENT of Amount of Capacitance!
As long as there is ‘enough’ chargeDist=400 mils
ESR=30mOhms
ESL=0.5nH
April 2010 Dr. Bruce Archambeault, IBM 337
What Happens if a 2nd Decoupling Capacitor is placed near the First
Capacitor?
Observation Point
Via #1Via #2 Moved in arc around Observation point while maintaining 500 mil distance to observation point
500 mils
distance
April 2010 Dr. Bruce Archambeault, IBM 338
Second Via Around a circle
Port 2
Port 1 θ
( )yx,Port 3
( ) ( )( )
⎟⎠⎞
⎜⎝⎛ +
⎟⎠⎞
⎜⎝⎛
++
−⎟⎟⎠
⎞⎜⎜⎝
⎛
+++
rrdrRrd
drdr
rdrRd2
12
23
21
2
ln
ln
4ln
4 πμ
πμ
2sin22
1
θRd
Rd
=
=
( )( ) ⎟⎟
⎠
⎞⎜⎜⎝
⎛
++
= 3
4
)2/sin(2ln
4 rrRrRd
θπμ
1d
2d R
Port 2
Port 1 θ
( )yx,Port 3
( ) ( )( )
⎟⎠⎞
⎜⎝⎛ +
⎟⎠⎞
⎜⎝⎛
++
−⎟⎟⎠
⎞⎜⎜⎝
⎛
+++
rrdrRrd
drdr
rdrRd2
12
23
21
2
ln
ln
4ln
4 πμ
πμ
2sin22
1
θRd
Rd
=
=
( )( ) ⎟⎟
⎠
⎞⎜⎜⎝
⎛
++
= 3
4
)2/sin(2ln
4 rrRrRd
θπμ
1d
2d R
theta: angle as shown in the figure in degree
d2: distance between Port 2 and Port 3 in mil
d1: distance between Port 3 and Port 1 in mil
d: thickness of dielectric layer in mil
r: radius for all ports in mil
R: distance between Port 1 and Port 2 in mil
Courtesy of Jingook Kim, Jun Fan, Jim Drewniak
Missouri University of Science and Technology
April 2010 Dr. Bruce Archambeault, IBM 339
Effective Inductance for Various Distances to Decoupling CapacitorWith Second Capacitor (Via) Equal Distance Around Circle
Plane Seperation = 35 mil -- Via Diameter = 20 mil
500
600
700
800
900
1000
1100
1200
1300
1400
1500
1600
1700
1800
1900
2000
2100
0 50 100 150 200
Angle (degrees)
Indu
ctna
ce (p
H)
250 mil
500mil
750 mil
1000 mil
April 2010 Dr. Bruce Archambeault, IBM 340
Effective Inductance for Various Distances to Decoupling CapacitorWith Second Capacitor (Via) Equal Distance Around Circle
Plane Seperation = 10 mil -- Via Diameter = 20 mil
0
50
100
150
200
250
300
350
400
450
500
0 50 100 150 200Angle (degrees)
Indu
ctna
ce (p
H)
500mil
250 mil
750 mil
1000 mil
April 2010 Dr. Bruce Archambeault, IBM 341
Effective Inductance for Various Distances to Decoupling CapacitorWith Second Capacitor (Via) Equal Distance Around Circle
Plane Seperation = 5 mil -- Via Diameter = 20 mil
0
50
100
150
200
250
300
350
400
0 50 100 150 200Angle (degrees)
Indu
ctna
ce (p
H)
500mil
250 mil
750 mil
1000 mil
April 2010 Dr. Bruce Archambeault, IBM 342
Second Via Along Side
Port 2
Port 1
( )yx,
R
Port 3
1d
2d
22
21 dRd +=
Port 2
Port 1
( )yx,
R
Port 3
1d
2d
22
21 dRd +=
d2: distance between Port 2 and Port 3 in mil
d1: distance between Port 3 and Port 1 in mil
d: thickness of dielectric layer in mil
r: radius for all ports in mil
R: distance between Port 1 and Port 2 in mil
April 2010 Dr. Bruce Archambeault, IBM 343
Effective Inductance for Various Distances to Decoupling CapacitorWith Second Capacitor (Via) Positioned Adjacent to First Capacitor
Plane Seperation = 35 mil -- Via Diameter = 20 mil
500
600
700
800
900
1000
1100
1200
1300
1400
1500
1600
1700
1800
1900
2000
2100
0 100 200 300 400 500 600 700 800 900 1000
Distance Between Capacitors (mils)
Indu
ctna
ce (p
H)
500mil
250 mil
750 mil
1000 mil
April 2010 Dr. Bruce Archambeault, IBM 344
Effective Inductance for Various Distances to Decoupling CapacitorWith Second Capacitor (Via) Equal Distance Around Circle
Plane Seperation = 10 mil -- Via Diameter = 20 mil
0
50
100
150
200
250
300
350
400
450
500
0 100 200 300 400 500 600 700 800 900 1000Angle (degrees)
Indu
ctna
ce (p
H)
250 mil
500mil
750 mil
1000 mil
April 2010 Dr. Bruce Archambeault, IBM 345
Effective Inductance for Various Distances to Decoupling CapacitorWith Second Capacitor (Via) Equal Distance Around Circle
Plane Seperation = 5 mil -- Via Diameter = 20 mil
0
50
100
150
200
250
300
350
400
0 100 200 300 400 500 600 700 800 900 1000Angle (degrees)
Indu
ctna
ce (p
H)
250 mil
500mil
750 mil
1000 mil
April 2010 Dr. Bruce Archambeault, IBM 346
Understanding Inductance Effects and Proximity
1 via
10mm
2 via with degree 30°
2 via with degree 90° 2 via with degree 180°
20cm
20cm
10cm
10cm
April 2010 Dr. Bruce Archambeault, IBM 347
Current DensityA/m2
[m]
[m]
A/m2
[m]
[m]
A/m2
[m]
[m]
A/m2
[m]
[m]
April 2010 Dr. Bruce Archambeault, IBM 348
Current Density in Planes8
8
8
8
8
8
16
16
1616
1624
24
24
24
32
32
32
40
40
40
48
48
48
56
56
56 646464
6472
72
8080
80
80
0.08 0.0850.09 0.095 0.1 0.1050.11 0.1150.120.08
0.085
0.09
0.095
0.1
0.105
0.11
0.115
0.12
8
8
8
8 8
8
16
16
16
16
16
24
24
24
24
32
32
32
32
40
40
40
4040
40
4848
48
48
48
48
56
56
5656
5656
6464
64
64
727272
72
728080
0.08 0.0850.09 0.095 0.1 0.1050.11 0.1150.120.08
0.085
0.09
0.095
0.1
0.105
0.11
0.115
0.12
8
8
8
8
8
816
16
16
16
1616
24
24
24 2432
32
32 32
40
40
40
48
48 4856
56
56
56
64
64
6 4
64 72
72
72
72
80
80
80
80
0.08 0.0850.09 0.095 0.1 0.105 0.11 0.1150.120.08
0.085
0.09
0.095
0.1
0.105
0.11
0.115
0.12
8
8
8
8
8
8
16
16
16
16
1624
24
24
2432
32
32
3240
40
40
40
40
40
48
4848
48
48
48
5656
56
56
56
56
64
64
64
6472
72
72
80 80
0.08 0.085 0.09 0.095 0.1 0.105 0.11 0.115 0.120.08
0.085
0.09
0.095
0.1
0.105
0.11
0.115
0.12
April 2010 Dr. Bruce Archambeault, IBM 349
Effect of Plane width on InductanceCase1 : 10 inches
Case2 : 5 inches
Case3 : 2 inches1 inch
Port1 Port2
April 2010 Dr. Bruce Archambeault, IBM 350
~ 250pH
~ 330pH
~ 560pH
Case1 : 10 inches
Case2 : 5 inches
Case2 : 2 inches
April 2010 Dr. Bruce Archambeault, IBM 351
Observations
• Added via (capacitor) does not lower effective inductance to 70-75% of original single via case
• Thicker dielectric results in higher inductance
• Normalizing inductance to single via case gives same curve for all dielectric thicknesses
April 2010 Dr. Bruce Archambeault, IBM 352
Decoupling Analysis Summary• EMC Frequency Domain analysis
– Steady-state conditions– Transfer function across the board– Measurements and simulations agree well– Distance of capacitors from ASIC load does not change steady-state
impedance
• Charge Delivery Time-Limited analysis– Using equivalent SPICE circuit from simulations– Current from capacitors change significantly as capacitor moves further
away from ASIC– Noise at ASIC pins increase significantly as capacitor moves further
away from ASIC
– Steady-state frequency domain analysis not sufficient for charge delivery design of decoupling capacitors
April 2010 Dr. Bruce Archambeault, IBM 353
Two Major Questions
How will structure respond?• What is the source of the noise?
– CURRENT!
April 2010 Dr. Bruce Archambeault, IBM 354
Predicting the Source of Decoupling Noise
• What is the source?• ICs need two types of current
– Current for the I/O drivers– “Core” current
• Current that does not go out the I/O drivers
• On-going research with Prof Jim Drewniak at UMR
April 2010 Dr. Bruce Archambeault, IBM 355
Modeling the Power Current WaveformFor Clock Buffer/Driver
• Ip2 = shoot through current• Ip1 = I/O current + core current
Δt1T/2
Δt2T/2
Δt1t
0
i(t)
IP1
IP2
April 2010 Dr. Bruce Archambeault, IBM 356
Core Current
• Cpd is specified for Clock drivers/buffers• m is number of I/O drivers• t2 = tr + tf
22
**t
VmCI ccpd
p Δ=
April 2010 Dr. Bruce Archambeault, IBM 357
I/O Driver Current• Simple Capacitive Load method• CL = 10 pF is typical• n = number of loads• t = tr
2/tnVCI ccL
L Δ=
April 2010 Dr. Bruce Archambeault, IBM 358
More Accurate I/O Driver Current
• Use Signal Integrity tools to find current waveform– Hyperlynx– Spectraquest– SPICE
April 2010 Dr. Bruce Archambeault, IBM 359
Example for Clock Buffers
60 MHz100 MHz100 MHzf (operating frequency)
10 nS/V
8 or 4
8 or 45 V
96 pF per bank(enable) or 12
pF per bank(disable)
CDC208
1.0 nS4 V/nStr(MAX)
86n (number of loads)
106m (number of outputs)
3.3 V3.3 VVCC
25 pF per output
19.5 pF per output
CPD
MPC946MPC905
April 2010 Dr. Bruce Archambeault, IBM 360
Motorola MPC905 Results
0.5 1 1.5 2 2.5 3-90
-80
-70
-60
-50
-40
-30
-20
-10
0
Frequency (GHz)
Spec
trum
(dB
m)
Measured results
Theoretical results
April 2010 Dr. Bruce Archambeault, IBM 361
Motorola MPC946 Results
0.5 1 1.5 2 2.5 3-90
-80
-70
-60
-50
-40
-30
-20
-10
0
Frequency (GHz)
Spec
trum
(dB
m) Measured results
Theoretical results
April 2010 Dr. Bruce Archambeault, IBM 362
CDC208 (4 loads)
0.5 1 1.5 2 2.5 3-90
-80
-70
-60
-50
-40
-30
-20
Frequency (GHz)
Spec
trum
(dB
m) Measured results
Theoretical results
April 2010 Dr. Bruce Archambeault, IBM 363
CDC208 (8 loads)
0.5 1 1.5 2 2.5 3-90
-80
-70
-60
-50
-40
-30
-20
Frequency (GHz)
Spec
trum
(dB
m) Measured results
Theoretical results
April 2010 Dr. Bruce Archambeault, IBM 364
Modeling results with different CPD
MPC905
0.5 1 1.5 2 2.5 3-90
-80
-70
-60
-50
-40
-30
-20
-10
Frequency (GHz)
Spec
trum
(dB
m)
Measured results
CPD=0 pFCPD=19.5 pFCPD=100 pF
April 2010 Dr. Bruce Archambeault, IBM 365
Modeling results for IDT807 (load C only)
0.5 1 1.5 2 2.5 3-80
-70
-60
-50
-40
-30
-20
-10
Frequency (GHz)
Spec
trum
(dB
m)
IDT807
Measured results
Theoretical results
April 2010 Dr. Bruce Archambeault, IBM 366
Modeling results for ICS9341 (load C only)ICS9341
0.5 1 1.5 2 2.5 3-110
-100
-90
-80
-70
-60
-50
-40
-30
Frequency (GHz)
Spec
trum
(dB
m)
Measured results
Theoretical results
Note: The chip has a lot of different clocks: 8 CPU (133 MHz), 8 PCI (33.3 MHz), 2 USB (64 MHz and 32 MHz) and 2 REF (14.318 MHz).
April 2010 Dr. Bruce Archambeault, IBM 367
Other Sources on Active Board
• Large ASICs do not specify Cpd
• Measured power/ground plane noise for large ASIC with and without decoupling capacitors installed
• Circuits operating with exerciser software• Examples for 1.5 volt and 2.5 volt supplies
April 2010 Dr. Bruce Archambeault, IBM 368
Illinois Power Noise Measured Across C534 (1.5 volt Supply)With Decoupling Capacitors Installed
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
0.0E+00 1.0E-07 2.0E-07 3.0E-07 4.0E-07 5.0E-07 6.0E-07 7.0E-07 8.0E-07 9.0E-07 1.0E-06
Time (seconds)
Am
plitu
de (v
olts
)
April 2010 Dr. Bruce Archambeault, IBM 369
Illinois Power Noise Measured Across C534 (1.5 volt Supply)With Decoupling Capacitors Removed
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
0.0E+00 1.0E-07 2.0E-07 3.0E-07 4.0E-07 5.0E-07 6.0E-07 7.0E-07 8.0E-07 9.0E-07 1.0E-06
Time (seconds)
Am
plitu
de (v
olts
)
April 2010 Dr. Bruce Archambeault, IBM 370
Voltage Histogram Power Noise Measured Across C534 (1.5 volt Supply)
0
10
20
30
40
50
60
70
1 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2Voltage
Perc
enta
ge %
Caps
Caps gone
April 2010 Dr. Bruce Archambeault, IBM 371
Power Noise Measured Across C534 (Tvcc 1.5v Supply)With Decoupling Capacitors Installed
0
10
20
30
40
50
60
70
80
90
100
0.0E+00 2.0E+08 4.0E+08 6.0E+08 8.0E+08 1.0E+09 1.2E+09 1.4E+09 1.6E+09 1.8E+09 2.0E+09
Frequency (Hz)
Am
plitu
de (d
Buv
)
April 2010 Dr. Bruce Archambeault, IBM 372
Power Noise Measured Across C534 (Tvcc 1.5v Supply)With Decoupling Capacitors Removed
0
10
20
30
40
50
60
70
80
90
100
0.0E+00 2.0E+08 4.0E+08 6.0E+08 8.0E+08 1.0E+09 1.2E+09 1.4E+09 1.6E+09 1.8E+09 2.0E+09
Frequency (Hz)
Am
plitu
de (d
Buv
)
April 2010 Dr. Bruce Archambeault, IBM 373
Illinois Power Noise Measured Across C533 (2.5 volt Supply)With Decoupling Capacitors Installed
2.2
2.3
2.4
2.5
2.6
2.7
2.8
0.0E+00 1.0E-07 2.0E-07 3.0E-07 4.0E-07 5.0E-07 6.0E-07 7.0E-07 8.0E-07 9.0E-07 1.0E-06
Time (seconds)
Am
plitu
de (v
olts
)
April 2010 Dr. Bruce Archambeault, IBM 374
Illinois Power Noise Measured Across C533 (2.5 volt Supply)With Decoupling Capacitors Removed
2.2
2.3
2.4
2.5
2.6
2.7
2.8
0.0E+00 1.0E-07 2.0E-07 3.0E-07 4.0E-07 5.0E-07 6.0E-07 7.0E-07 8.0E-07 9.0E-07 1.0E-06
Time (seconds)
Am
plitu
de (v
olts
)
April 2010 Dr. Bruce Archambeault, IBM 375
Voltage Histogram Power Noise Measured Across C533 (2.5 volt Supply)
0
10
20
30
40
50
60
2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3Voltage
Perc
enta
ge %
Caps
Caps gone
April 2010 Dr. Bruce Archambeault, IBM 376
Power Noise Measured Across C533 (2.5 volt Supply)With Decoupling Capacitors Installed
0
10
20
30
40
50
60
70
80
90
100
0.0E+00 2.0E+08 4.0E+08 6.0E+08 8.0E+08 1.0E+09 1.2E+09 1.4E+09 1.6E+09 1.8E+09 2.0E+09
Frequency (Hz)
Am
plitu
de (d
Buv
)
April 2010 Dr. Bruce Archambeault, IBM 377
Power Noise Measured Across C533 (2.5 volt Supply)With Decoupling Capacitors Removed
0
10
20
30
40
50
60
70
80
90
100
0.0E+00 2.0E+08 4.0E+08 6.0E+08 8.0E+08 1.0E+09 1.2E+09 1.4E+09 1.6E+09 1.8E+09 2.0E+09
Frequency (Hz)
Am
plitu
de (d
Buv
)
April 2010 Dr. Bruce Archambeault, IBM 378
Preliminary Results for Large ASICs/ICs
• Core current smoothes out to DC due to package inductance
• I/O current dominates for EMC• Pseudo-random data• Statistical analysis indicates half of data bus
at ‘1’ state most of the time• Statistical analysis indicates 1 – 2 data lines
switch high vs. low
April 2010 Dr. Bruce Archambeault, IBM 379
ASIC Rough Estimation Time Varying Current in Power
• Use 1/3rd Specified power for time varying power
• Use 2*tr for width of current pulse• Find height of current pulse to meet time
varying power– Use supply voltage
April 2010 Dr. Bruce Archambeault, IBM 380
ASIC Rough Estimation Time Varying Current in Power
time
curr
ent
Cycle time
2*Rise time
Area Equal
Current
for 1/3rd
Total Power
Current
Peak Pulse
April 2010 Dr. Bruce Archambeault, IBM 381
To prevent/Reduce Unintentional Signal -- Power Plane Bounce
Distribute Decoupling Capacitors evenly Across entire BoardCapacitor Value not Especially Important!– .01 uF or .1 uF the same!– Use the largest value of capacitor in the selected SMT
Package
Adding ‘high frequency’ capacitors does NOThelp, and may HURT at low frequencies!
April 2010 Dr. Bruce Archambeault, IBM 382
To prevent/Reduce Unintentional Signal Power Plane Bounce
Provide capacitors near ALL IC power pins for functionality– Distance from IC critical
Avoid routing critical nets through vias– This effect requires decoupling between all planes
Consider Alternative Solutions– Lossy Decoupling– Closely spaced Planes (Increased distributed capacitance)
April 2010 Dr. Bruce Archambeault, IBM 383
Power Decoupling Summary• Two different types of decoupling analysis
required– Transient analysis for functionality
• Apparent inductance must be included
– Steady state analysis for EMC• Resonance effects important
• Source of power/ground-reference plane noise– Current
April 2010 Dr. Bruce Archambeault, IBM 384
Shielding
• Basic requirement is for tangential electric fields to equal zero at perfect conductors– Induces current in conductor to meet this
requirement• Most shields are close enough to perfect• Most shields are thicker than effective skin
depth– Currents on surface only
April 2010 Dr. Bruce Archambeault, IBM 385
Perfect Shielded EnclosureCurrent on inside of metal enclosure due to internal fields (from PC board, cables, etc)
Perfect metal enclosure (no apertures/holes) will have NO currents on outside of enclosure
April 2010 Dr. Bruce Archambeault, IBM 386
Not-So-Perfect Shielded EnclosureCurrent on inside of metal enclosure due to internal fields (from PC board, cables, etc)
Slot interrupts currents on inside of enclosure
Currents must travel around slot!
April 2010 Dr. Bruce Archambeault, IBM 387
Current Path is Longer Around Aperture
-- Currents must flow in longer path
-- Inductance in this current path
-- Current through impedance = voltage across aperture
April 2010 Dr. Bruce Archambeault, IBM 388
Shield External View
• Voltage across slot– Creates currents on outside of enclosure– Currents cause fields
• Shield ‘leakage’– Amount of ‘leakage’ at a given frequency is
dependent on length of slot• Longer slots mean longer current path interruption• More inductance --- More impedance --- More
voltage across slot
April 2010 Dr. Bruce Archambeault, IBM 389
Joints with Gaskets are Three-Dimensional
April 2010 Dr. Bruce Archambeault, IBM 390
Metal-to-Metal Contact Required!
coating
coating
Iinj
Vgap
contact area
April 2010 Dr. Bruce Archambeault, IBM 391
Cables and Shielding
Shielded Box
Shielded Cable
Perfect connection between box and cable shields
Intentional Signal Current
Signal Return Current
All Currents are Enclosed within Shielded Enclosure and Cable Shield
April 2010 Dr. Bruce Archambeault, IBM 392
Not-so-Perfect Connection
Shielded Box
Shielded Cable
Not-Perfect connection between box and cable
shields (Impedance)
Intentional Signal Current
Voltage across connection impedance causes currents on
outside of shields
Signal Return Current
April 2010 Dr. Bruce Archambeault, IBM 393
Cable Connection to Chassis is Usually the Weak Point
VCM ICMVCM ICM
SMALL contact impedance (360°)SMALL VCM
SMALL ICM
SMALL radiation
HIGH contact impedance (<360°)HIGH VCM
HIGH ICM
HIGH radiation
April 2010 Dr. Bruce Archambeault, IBM 394
Cables Require 360 Degree contact for Good Shielding
GOOD contact points
Cable shield
Connector backshell
April 2010 Dr. Bruce Archambeault, IBM 395
CablesMetal chassis
360°: good to about infinity
4 points: good to about 100 MHz
2 points: good to about 10 MHz
EM TIGHT
April 2010 Dr. Bruce Archambeault, IBM 396
Antennas
• All metal conductors are antennas!• Some are more efficient than others
– especially at certain frequencies• The same antenna can radiate or receive
– reciprocity works!
April 2010 Dr. Bruce Archambeault, IBM 397
Simple Dipole Antenna
length
Dipole Antenna is most efficient when it’s length is one-half the wavelength
But --- it will work at ALL frequencies, just not as efficiently
April 2010 Dr. Bruce Archambeault, IBM 398
Hertzian Dipole Approach
E IL jc r cr j rθ
θπ ε
ωω
= + +⎛⎝⎜
⎞⎠⎟
sin4
1 1
02 2 3
--Break Antenna into small segments
-- solve for E field for each segment individually
-- Vector sum all contributions
April 2010 Dr. Bruce Archambeault, IBM 399
Monopole Antenna• Must work with a ‘ground’ image plane!• Image plane must be very large (infinite)
Image
h
h
Monopole Antenna
April 2010 Dr. Bruce Archambeault, IBM 400
This is not a Monopole Antenna
Metal Boxwire
This is more like a lumpy, unbalanced dipole!
April 2010 Dr. Bruce Archambeault, IBM 401
EMC Design SummaryEliminate at the sourceThink ahead -- Plan aheadIntentional and Unintentional currentsWhat is the Frequency Spectrum of the Current on Critical Nets ?Where does the Return Current Flow ?No magic!
April 2010 Dr. Bruce Archambeault, IBM 402
PCB EMC Design Summary
April 2010 Dr. Bruce Archambeault, IBM 403
Review of Important Things• Control the current• Consider each potential emissions cause
separately• Route Critical Traces first• Consider EMC effects early during board
design– First pass boards for functionality only is
usually a bad idea!
April 2010 Dr. Bruce Archambeault, IBM 404
Number ONE Problem
• Intentional signal return current
April 2010 Dr. Bruce Archambeault, IBM 405
Top Contributors• Non-optimum critical net termination• Critical nets over splits in planes• Critical nets routed to different layers with a
change in reference planes• Critical nets too close to I/O nets• Un-split ground-reference planes in low
speed I/O area– Treat I/O “ground” leads as I/O signal leads
April 2010 Dr. Bruce Archambeault, IBM 406
Top Contributors (cont)
• Decoupling– Largest value capacitance in selected package
size, spread over entire board– Extra capacitors near high speed ICs– Decouple all adjacent plane pairs
• I/O reference connected to chassis with low impedance path
• Filter all low speed I/O signal traces
April 2010 Dr. Bruce Archambeault, IBM 407
Top Contributors (cont)
• Bury Critical traces on internal layers• Keep high speed devices far from I/O area• USB and Ethernet special cases
– do not need planes under final I/O lines• Provide “grounding” option for large
heatsinks
April 2010 Dr. Bruce Archambeault, IBM 408
Where to Go for More?• Limited selection of EMC design books
– Beware of some popular books!!!– “PCB Design for Real-World EMI Control” (good choice)
• Bruce Archambeault
• EMC ‘experts’– Experience is important– Again, beware ---- ask questions and understand WHY
• Cookbooks do not work! Every case is special and different
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