Effects of Inductance on the Propagation Delay and Repeater Insertion in VLSI Circuits

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Effects of Inductance on the Propagation Delay and Repeater Insertion in VLSI Circuits. Yehea I. Ismail and Eby G. Friedman , Fellow, IEEE. Agenda. Introduction Propagation Delay Formula Comparison to an RC Model Dependence of Delay on wire Length Repeater Insertion for an RLC Interconnect - PowerPoint PPT Presentation

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Effects of Inductance on the Propagation Delayand Repeater Insertion in VLSI Circuits

Yehea I. Ismail and Eby G. Friedman, Fellow, IEEE

Agenda

Introduction

Propagation Delay Formula

Comparison to an RC Model

Dependence of Delay on wire Length

Repeater Insertion for an RLC Interconnect

Conclusions

Introduction

Propagation Delay Formula

npd wet /48.135.19.2

Close Form

2212......8202 1

0

nnn

x

x nnx

2/)1(......2100

nnnxn

x

Interconnect Model-RCL

A gate driving an RLC transmission line

The transfer function-a lossy transmission line

l

L

sl

L

sin

out

eZ

Z

Z

Ze

Z

Z

Z

ZsV

sV

1111

2

)(

)(

0

0

0

0

t

t

t

t

sL

R

C

LZ 10

t

ttt sL

RCLsl 1

trs RZ L

L sCZ

1

Zs is source impedance, ZL is load impedance

γ is propagation constant, Z0 is characteristic impedance

Laplace transform-1

Ltt

nCCL

W

1

'SWs n

Tline

t

CsC

sl

1

'

21

1

''

'

Tline

T

t CsC

LZZ 1

'

21'00

T

T

T

tLL C

C

sC

LZZ

1

'

1'

t

ttline

t

LT

L

CR

C

CC

2

Laplace transform-2

t

trT R

RR

t

LT C

CC

t

ttline L

CR

2

The parameter ζ

TTTTT

t

tt

C

CRCR

L

CR

1

5.0

2

TTTTT

lineC

CRCR

1

5.0

Three parameter:ζ,RT,CT

Laplace transform-3

The scaled 50% propagation delay t`pd can be calculated by solving

Thus, the propagation delay of an RCL line with a source Resistance Rtr and a load capacitance CL has the form

AS/X [20] simulations

the maximum error is 4.6% and the average error is 1.65%

AS/X [20] simulations

npd wet /48.135.19.2 Eq.(18):

Delay function is more accurate

npd wet /48.135.19.2

When CT And RT are high and ζ is lowEq(18) suffers high errors

This case can only occur for unreasonably high values of the inductance per unit length of the line as compared to the resistance and capacitance per unit lengthSuch a case does not exist in a practical VLSI circuit.

ζ characterize inductance effects

ζ characterize inductance effects

ζ characterize inductance effects

ζ characterize inductance effects

The Factor of Inductance

npd wet /48.135.19.2

TTTTT

t

tt

C

CRCR

L

CR

1

5.0

2

Comparison to an RC model

npd wet /48.135.19.2

Comparison to an RC model

copper interconnect line

copper interconnect line

copper interconnect line

Dependence of Delay on Interconnect Length

αasym is the asymptotic value at high frequencies of the attenuation per unit length of the signals

L 0 tpd =0.37RCl2

R 0 tpd = l(LC)0.5

Repeater Insertion for an RLC Interconnect

The buffer output impedance Rtr is R0/hThe input capacitance of the buffer CL is hC0

Curve Fitting Method

highly accurate

The error is less than 0.05%If Lt 0 hopt(RLC) = hopt(RC) kopt(RLC) = kopt(RC)

Comparison with RC model

Total delay in RC & RLC

When TL/R=3 ,tpdtotal increase by 10%When TL/R=5 ,tpdtotal increase by 20%When TL/R=10 ,tpdtotal increase by 30%

Repeater Insertion in RC & RLC

Area in RC & RLC

Amin is the area of a minimum size buffer

=

When TL/R=3 ,Area increase by 154%When TL/R=5 ,Area increase by 435%

conclusion

Propagation delay --- 35%

propagation delay has linear dependence on the length of the line.

Conclusion for repeater insertion

Insert less buffer

Reduce delay

Reduce buffer area

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