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فصل پنجم مدارهای ترتیبی هم زمان
بخش اول مجتمع آموزش عالی فنی و مهندسی اسفراین
اسما باقری
99-98بهمن
Digital System 1
Sequential Circuits
2
Combinational
Circuit Memory
Elements
Inputs Outputs
Asynchronous
Synchronous
Combinational
Circuit Flip-flops
Inputs Outputs
Clock
Memory
3
0 1
A B
Q Q′
Q Q′
(Latch) لچ 4
SR Latch
R
S
Q
Q
S R Q0 Q Q’ 0 0 0
0
1
0
0
0 1 Q = Q0
Initial Value
5
SR Latch
R
S
Q
Q
S R Q0 Q Q’ 0 0 0 0 1
0 0 1
1
0
0
0
1 0 Q = Q0
Q = Q0
6
SR Latch
R
S
Q
Q
S R Q0 Q Q’ 0 0 0 0 1
0 0 1 1 0
0 1 0 0 1
0 1 1 1
0
1
0
0 1
Q = 0
Q = Q0
Q = 0
7
SR Latch
R
S
Q
Q
S R Q0 Q Q’ 0 0 0 0 1
0 0 1 1 0
0 1 0 0 1
0 1 1 0 1
1 0 0 1 0
1 0 1
1
0
0
1
1 0
Q = 0
Q = Q0
Q = 1 Q = 1
8
SR Latch
R
S
Q
Q
S R Q0 Q Q’ 0 0 0 0 1
0 0 1 1 0
0 1 0 0 1
0 1 1 0 1
1 0 0 1 0
1 0 1 1 0
1 1 0 0 0
1 1 1
1
0
1
1
0 0
Q = 0
Q = Q0
Q = 1
Q = Q’
0
Q = Q’
9
SR Latch
R
S
Q
Q
S R Q
0 0 Q0
0 1 0
1 0 1
1 1 Q=Q’=0
No change
Reset
Set
Invalid
S
R
Q
Q
S R Q
0 0 Q=Q’=1
0 1 1
1 0 0
1 1 Q0
Invalid
Set
Reset
No change
10
𝑺 𝑹 Latch
R
S
Q
Q
S R Q
0 0 Q0
0 1 0
1 0 1
1 1 Q=Q’=0
No change
Reset
Set
Invalid
S’ R’ Q
0 0 Q=Q’=1
0 1 1
1 0 0
1 1 Q0
Invalid
Set
Reset
No change
S
R
Q
Q
Controlled Latches 11
SR Latch with Control Input
C S R Q
0 x x Q0
1 0 0 Q0
1 0 1 0
1 1 0 1
1 1 1 Q=Q’
No change
No change
Reset
Set
Invalid
S
R
Q
Q
S
R
C
S
RQ
QS
R
C
12
D Latch (D = Data)(Transparent Latch)
C D Q
0 x Q0
1 0 0
1 1 1
No change
Reset
Set
S
R
Q
Q
D
C
C
Timing Diagram
D
Q
t
Output may change
13
D Latch (D = Data)
C D Q
0 x Q0
1 0 0
1 1 1
No change
Reset
Set
C
Timing Diagram
D
Q
Output may change
S
R
Q
Q
D
C
Graphical Symbols
14
Flip-Flop (فلیپ فالپ) 15
Controlled latches are level-triggered
Flip-Flops are edge-triggered
C
CLK Positive Edge
CLK Negative Edge
16
Master-Slave D Flip-Flop
D Latch (Master)
D
C
Q D Latch (Slave)
D
C
Q Q D
CLK CLK
D
QMaster
QSlave
Looks like it is negative edge-triggered
Master Slave
17
Edge-Triggered D Flip-Flop
D
CLK
Q
Q
D Q
Q
D Q
Q
Positive Edge
Negative Edge
S′
R′
18
JK Flip-Flop
D Q
Q
Q
QCLK
J
K
J Q
Q K D = JQ’ + K’Q
J K Q(t+1)
0 0 Q(t)
0 1 0
1 0 1
1 1 Q’(t)
19
T Flip-Flop
D = TQ’ + T’Q = T Q
J Q
Q K
T D Q
Q
T
D = JQ’ + K’Q T Q
Q
Review Flip-Flop Characteristic Tables
20
D Q
Q
D Q(t+1)
0 0
1 1
Reset
Set
J K Q(t+1)
0 0 Q(t)
0 1 0
1 0 1
1 1 Q’(t)
No change
Reset
Set
Toggle
J Q
Q K
T Q
Q
T Q(t+1)
0 Q(t)
1 Q’(t)
No change
Toggle
Flip-Flop Characteristic Equations
21
D Q
Q
D Q(t+1)
0 0
1 1
Q(t+1) = D
J K Q(t+1)
0 0 Q(t)
0 1 0
1 0 1
1 1 Q’(t)
Q(t+1) = JQ’ + K’Q
J Q
Q K
T Q
Q
T Q(t+1)
0 Q(t)
1 Q’(t)
Q(t+1) = T Q
22
Analysis / Derivation
J Q
Q K
J K Q(t) Q(t+1)
0 0 0 0
0 0 1 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
No change
Reset
Set
Toggle
23
Analysis / Derivation
J Q
Q K
J K Q(t) Q(t+1)
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0
1 0 1
1 1 0
1 1 1
No change
Reset
Set
Toggle
24
Analysis / Derivation
J Q
Q K
J K Q(t) Q(t+1)
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0
1 1 1
No change
Reset
Set
Toggle
25
Analysis / Derivation
J Q
Q K
J K Q(t) Q(t+1)
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 0
No change
Reset
Set
Toggle
26
Analysis / Derivation
J Q
Q K
J K Q(t) Q(t+1)
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 0
K
0 1 0 0
J 1 1 0 1
Q
Q(t+1) = JQ’ + K’Q
Flip-Flops with Direct Inputs
27
Asynchronous Reset
D Q
Q
R
Reset
R’ D CLK Q(t+1)
0 x x 0
28
Asynchronous Reset
D Q
Q
R
Reset
R’ D CLK Q(t+1)
0 x x 0
1 0 ↑ 0
1 1 ↑ 1
Flip-Flops with Direct Inputs
29
30
Asynchronous Preset and Clear
PR’ CLR’ D CLK Q(t+1)
1 0 x x 0
0 1 x x 1
1 1 0 ↑ 0
1 1 1 ↑ 1
D Q
Q
CLR
Reset
PR
Preset
دو دسته اساسی مسائل مطرح شدهI. Analysis of Clocked Sequential Circuits
آنالیز مدارهای ترتیبی I. Design of Clocked Sequential Circuits
طراحی مدارهای ترتیبی
31
تحلیل یک مدار ترتیبی/ مراحل آنالیز
شماتیک مدار معادالت حالت، معادالت ورودی و معادالت خروجی جدول حالت نمودار حالت
32
An example for Analysis
33
State =Values of all Flip-Flops حالت مدار
Example
A B = 0 0
D Q
Q
CLK
D Q
Q
A
B
y
x
34
State(Transition) Equations حالت( گذر) معادالت
D Q
Q
CLK
D Q
Q
A
B
y
xA(t+1) = DA
= A(t) x(t)+B(t) x(t)
= A x + B x
B(t+1) = DB
= A’(t) x(t)
= A’ x
y(t) = [A(t)+ B(t)] x’(t)
= (A + B) x’
Output Equations خروجی معادالت
35
State Table (Transition Table) جدول حالت
D Q
Q
CLK
D Q
Q
A
B
y
x
A(t+1) = A x + B x
B(t+1) = A’ x
y(t) = (A + B) x’
Present
State Input
Next
State Output
A B x A B y
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
t+1 t t
0 0 0
0 1 0
0 0 1
1 1 0
0 0 1
1 0 0
0 0 1
1 0 0
36
State Table دیگری برای جدول حالت نمایش
D Q
Q
CLK
D Q
Q
A
B
y
x
A(t+1) = A x + B x
B(t+1) = A’ x
y(t) = (A + B) x’
Present
State
Next State Output
x = 0 x = 1 x = 0 x = 1
A B A B A B y y
0 0 0 0 0 1 0 0
0 1 0 0 1 1 1 0
1 0 0 0 1 0 1 0
1 1 0 0 1 0 1 0
t+1 t t
37
State Diagram
حالت دیاگرام/نمودار
D Q
Q
CLK
D Q
Q
A
B
y
x
0 0 1 0
0 1 1 1
0/0
0/1
1/0
1/0
1/0
1/0 0/1
0/1
AB input/output
Present
State
Next State Output
x = 0 x = 1 x = 0 x = 1
A B A B A B y y
0 0 0 0 0 1 0 0
0 1 0 0 1 1 1 0
1 0 0 0 1 0 1 0
1 1 0 0 1 0 1 0
مثال38
D Flip-Flops D Q
Q
x
CLK
y A Present
State Input
Next
State
A x y A
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
0
1
1
0
1
0
0
1
0 1 00,11 00,11
01,10
01,10
A(t+1) = DA = A x y
39
JK Flip-Flop J Q
QK
CLK
J Q
QK
x
A
B
JA = B KA = B x’
JB = x’ KB = A x
A(t+1) = JA Q’A + K’A QA = A’B + AB’ + Ax
B(t+1) = JB Q’B + K’B QB = B’x’ + ABx + A’Bx’
Present
State I/P
Next
State
Flip-Flop
Inputs
A B x A B JA KA JB KB
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
0 0 1 0
0 0 0 1
1 1 1 0
1 0 0 1
0 0 1 1
0 0 0 0
1 1 1 1
1 0 0 0
0 1
0 0
1 1
1 0
1 1
1 0
0 0
1 1
مثال
...ادامه40
Present
State I/P
Next
State
Flip-Flop
Inputs
A B x A B JA KA JB KB
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
0 0 1 0
0 0 0 1
1 1 1 0
1 0 0 1
0 0 1 1
0 0 0 0
1 1 1 1
1 0 0 0
0 1
0 0
1 1
1 0
1 1
1 0
0 0
1 1
0 0 1 1
0 1 1 0
1 0 1
0
1
0 0
1
مثال41
T Flip-Flops
TA = B x , TB = x , y = A B
A(t+1) = TA Q’A + T’A QA = AB’ + Ax’ + A’Bx
B(t+1) = TB Q’B + T’B QB = x B
A
B
T Q
QR
T Q
QR
CLK Reset
xy
Present
State I/P
Next
State
F.F
Inputs O/P
A B x A B TA TB y
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
0 0
0 1
0 0
1 1
0 0
0 1
0 0
1 1
0 0
0 1
0 1
1 0
1 0
1 1
1 1
0 0
0
0
0
0
0
0
1
1
42
Present
State I/P
Next
State
F.F
Inputs O/P
A B x A B TA TB y
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
0 0
0 1
0 0
1 1
0 0
0 1
0 0
1 1
0 0
0 1
0 1
1 0
1 0
1 1
1 1
0 0
0
0
0
0
0
0
1
1
00/0 01/0
11/1 10/0
0
1
0
1
1
1
0 0
...ادامه
Mealy and Moore Model (machine) میلی و مور( ماشین)مدل
43
مدار حالت و هم هم ورودی ها تابعی از خروجی ها :مدل میلی است برای یک حالت به ازای ورودیهای مختلف خروجی عوض ممکن
(در طول یک تناوب از کالک پالس. )شود راهکار؟؟. لحظه ای داشته باشندمقادیر خطا خروجی ها ممکنه فقط تابعی از حالت فعلی مدار خروجی ها :مدل مور
نمی شودیک حالت خروجی عوض برای . خروجی ها با کالک هم زمان هستندواقع در.
Mealy and Moore Models
44
Mealy and Moore Models
45
Present
State I/P
Next
State O/P
A B x A B y
0 0 0 0 0 0
0 0 1 0 1 0
0 1 0 0 0 1
0 1 1 1 1 0
1 0 0 0 0 1
1 0 1 1 0 0
1 1 0 0 0 1
1 1 1 1 0 0
Mealy
For the same state, the output changes with the input
Present
State I/P
Next
State O/P
A B x A B y
0 0 0 0 0 0
0 0 1 0 1 0
0 1 0 0 1 0
0 1 1 1 0 0
1 0 0 1 0 0
1 0 1 1 1 0
1 1 0 1 1 1
1 1 1 0 0 1
Moore
For the same state, the output does not change with the input
Moore State Diagram
46
State / Output
0 0 / 0 0 1 / 0
1 1 / 1 1 0 / 0
0
1
1
1
0 0
0
1
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