Device Models PN Diode, MOSFET - University of...

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© Digital Integrated Circuits2nd Devices

Device Models Device Models ((PN Diode, MOSFET PN Diode, MOSFET ))

Instructor: Steven P. Levitan steve@ece.pitt.eduTA: Gayatri Mehta, José MartínezBook: Digital Integrated Circuits: A Design Perspective; Jan RabaeyLab Notes: Handed outhttp://infopad.EECS.Berkeley.EDU/~icdesign/

ECE 1192 ©, 2006, Steven Levitan, University of Pittsburgh

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Goal of this chapterGoal of this chapterPresent intuitive understanding of device operationIntroduction of basic device equationsIntroduction of models for manual analysisIntroduction of models for SPICE simulationAnalysis of secondary and deep-sub-micron effectsFuture trends

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The DIODEThe DIODE

n

p

p

n

B A SiO2Al

A

B

Al

A

B

Cross-section of pn-junction in an IC process

One-dimensionalrepresentation diode symbol

Mostly occurring as parasitic element in Digital ICs

© Digital Integrated Circuits2nd DevicesCopyright © 2005 Pearson Addison-Wesley. All rights reserved.

Diodes in a CMOS circuitDiodes in a CMOS circuit

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Depletion Region FormationDepletion Region Formationhole diffusion

electron diffusion

p n

hole driftelectron drift

ChargeDensity

Distancex+

-

ElectricalxField

x

PotentialV

ξ

ρ

W2-W1

ψ0

(a) Current flow.

(b) Charge density.

(c) Electric field.

(d) Electrostaticpotential.

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Formation and characteristics of a Formation and characteristics of a pnpn junctionjunction

Introduction to Circuits, Fourth Edition by Peter Uyemura, Copyright © 2004 John Wiley & Sons. All rights reserved.

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Forward BiasForward Bias

x

pn0

np0

-W1 W20p n

(W2)

n-regionp-region

Lp

diffusion

Typically avoided in Digital ICs

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Reverse BiasReverse Bias

x

pn0

np0

-W1 W20n-regionp-region

diffusion

The Dominant Operation Mode

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Diode Current Diode Current –– a Simple Modela Simple Model

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Models for Manual AnalysisModels for Manual Analysis

VD

ID = IS(eVD/φT – 1)+

VD

+

+–

VDon

ID

(a) Ideal diode model (b) First-order diode model

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PN Junction Diode DC Model PN Junction Diode DC Model ((DetailsDetails))

Thermal VoltageФT = kT/q ≈ 0.0259 V ( 300 ˚K)

k Boltzmann constant (1.38066x10-23 J/K)T Absolute temperature (˚K) q Electron charge (1.60218x10-19 C)

Is In practice, this term has to be obtained by characterization since it is highly dependent on doping concentration, dimension, operative temperature etc.

ECE 1192 © 2006, Steven Levitan, University of Pittsburgh

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PN Junction: Dynamic EffectsPN Junction: Dynamic Effects

Primary effectsJunction CapacitanceDiffusion Capacitance

Secondary EffectsAvalanche Breakdown

ECE 1192 © 2006, Steven Levitan, University of Pittsburgh

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Junction CapacitanceJunction Capacitance

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Diffusion CapacitanceDiffusion Capacitance

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Integrated Diode ModelIntegrated Diode Model

ID

RS

CD

+

-

VD

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SPICE ParametersSPICE Parameters

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The MOS TransistorThe MOS Transistor

Polysilicon Aluminum

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Controlling current flow in an Controlling current flow in an nFETnFET..

Introduction to Circuits, Fourth Edition by Peter Uyemura, Copyright © 2004 John Wiley & Sons. All rights reserved.

© Digital Integrated Circuits2nd DevicesIntroduction to Circuits, Fourth Edition by Peter Uyemura, Copyright © 2004 John Wiley & Sons. All rights reserved.

Controlling current flow in an Controlling current flow in an pFETpFET..

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What is a Transistor?What is a Transistor?

VGS ≥ VT

RonS D

A Switch!

|VGS|

An MOS Transistor

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MOS Transistors MOS Transistors -- Types and SymbolsTypes and Symbols

D

S

G

D

S

G

G

S

D D

S

G

NMOS Enhancement NMOS Depletion

PMOS Enhancement

B

NMOS withBulk Contact

© Digital Integrated Circuits2nd DevicesCopyright © 2005 Pearson Addison-Wesley. All rights reserved.

MOS Transistors MOS Transistors –– Regions Transitions Regions Transitions

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n+n+

p-substrate

DSG

B

VGS

+

-

DepletionRegion

n-channel

Threshold Voltage: ConceptThreshold Voltage: Concept

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Threshold Voltage Threshold Voltage -- DerivationDerivation

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The Body EffectThe Body Effect

-2.5 -2 -1.5 -1 -0.5 00.4

0.45

0.5

0.55

0.6

0.65

0.7

0.75

0.8

0.85

0.9

VBS

(V)

VT (V

)

2-input NAND gate

B

VDD

A

N1

N2

Drain of N1 is Source of N2 VSB of N2 >= 0

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MOS Transistors MOS Transistors –– Operating regions Operating regions

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Transistor in LinearTransistor in Linear

n+n+

p-substrate

D

SG

B

VGS

xL

V(x) +–

VDS

ID

MOS transistor and its bias conditions

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n+n+

p-substrate

D

SG

B

VGS

xL

V(x) +–

VDS

ID

Linear Region Linear Region VVgsgs>>VVtt & & VVgdgd>>VVtt

Positive Charge on Gate:Channel exists, Current Flows

since Vds > 0Ids = k’(W/L)((Vgs-Vt)Vds-Vds

2/2)

R

Vgd

Vgs

Ids

Vds

I=V/R

R= 1/(k’(W/L)(Vgs-Vt))

Ids

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Transistor in SaturationTransistor in Saturation

n+n+

S

G

VGS

D

VDS > VGS - VT

VGS - VT+-

Pinch-off

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n+n+

S

G

VGS

D

VDS > VGS - VT

VGS - VT+-

Saturation: Saturation: VVgsgs>>VVtt & & VVgdgd<<VVtt

Positive Charge on Gate:Channel exists, Current Flows

since Vds > 0But: channel is “pinched off”

Ids = (k’/2)(W/L)(Vgs-Vt)2

Vgd

Vgs

Ids

Ids

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CurrentCurrent--Voltage RelationsVoltage RelationsA good A good olol’’ transistortransistor

QuadraticRelationship

0 0.5 1 1.5 2 2.50

1

2

3

4

5

6x 10

-4

VDS (V)

I D(A

)VGS= 2.5 V

VGS= 2.0 V

VGS= 1.5 V

VGS= 1.0 V

Resistive Saturation

VDS = VGS - VT

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CurrentCurrent--Voltage RelationsVoltage RelationsLongLong--Channel DeviceChannel Device

Cut-off (VGS – VT < 0) “no current” (not really)

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Computed CurvesComputed Curves

Vgs = 5v

Vgs = 4.5v

Vgs = 4.0v

Linear Resistor

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CurrentCurrent--Voltage RelationsVoltage RelationsThe DeepThe Deep--Submicron EraSubmicron Era

LinearRelationship

-4

VDS (V)0 0.5 1 1.5 2 2.5

0

0.5

1

1.5

2

2.5x 10

I D(A

)

VGS= 2.5 V

VGS= 2.0 V

VGS= 1.5 V

VGS= 1.0 V

Early Saturation

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Velocity SaturationVelocity Saturation

ξ (V/µm)ξc = 1.5

υsat = 105

υn

( m/ s

)

Constant mobility (slope = µ)

Constant velocity

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PerspectivePerspective

IDLong-channel device

Short-channel device

VDSVDSAT VGS - VT

VGS = VDD

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IIDD versus Vversus VGSGS

0 0.5 1 1.5 2 2.50

1

2

3

4

5

6x 10

-4

VGS(V)

I D(A

)

0 0.5 1 1.5 2 2.50

0.5

1

1.5

2

2.5x 10

-4

VGS(V)

I D(A

)

quadratic

quadratic

linear

Long Channel Short Channel

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IIDD versus Vversus VDSDS

-4

VDS(V)0 0.5 1 1.5 2 2.50

0.5

1

1.5

2

2.5x 10

I D(A

)

VGS= 2.5 V

VGS= 2.0 V

VGS= 1.5 V

VGS= 1.0 V

0 0.5 1 1.5 2 2.50

1

2

3

4

5

6x 10-4

VDS(V)

I D(A

)

VGS= 2.5 V

VGS= 2.0 V

VGS= 1.5 V

VGS= 1.0 V

Resistive Saturation

VDS = VGS - VT

Long Channel Short Channel

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A unified modelA unified modelfor manual analysisfor manual analysis

S D

G

B

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Simple Model versus SPICE Simple Model versus SPICE

0 0.5 1 1.5 2 2.50

0.5

1

1.5

2

2.5x 10

-4

VDS (V)

I D(A

)

VelocitySaturated

Linear

Saturated

VDSAT=VGT

VDS=VDSAT

VDS=VGT

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A PMOS TransistorA PMOS Transistor

-2.5 -2 -1.5 -1 -0.5 0-1

-0.8

-0.6

-0.4

-0.2

0x 10

-4

VDS (V)

I D(A

)

Assume all variablesnegative!

VGS = -1.0V

VGS = -1.5V

VGS = -2.0V

VGS = -2.5V

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Transistor Model Transistor Model for Manual Analysisfor Manual Analysis

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The Transistor as a SwitchThe Transistor as a Switch

VGS ≥ VT

RonS D

ID

VDS

VGS = VD D

VDD/2 VDD

R0

Rmid

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The Transistor as a SwitchThe Transistor as a Switch

0.5 1 1.5 2 2.50

1

2

3

4

5

6

7x 10

5

VDD

(V)

Req

(Ohm

)

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The Transistor as a SwitchThe Transistor as a Switch

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Saturation EffectsSaturation Effects

Which is the resistor?

Discharge of 1pf capacitor, with Vgs of 3,4,5 volts. Also, 12k resistor.

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MOS CapacitancesMOS CapacitancesDynamic BehaviorDynamic Behavior

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Dynamic Behavior of MOS TransistorDynamic Behavior of MOS Transistor

DS

G

B

CGDCGS

CSB CDBCGB

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Physical visualization of FET Physical visualization of FET capacitancescapacitances

Introduction to Circuits, Fourth Edition by Peter Uyemura, Copyright © 2004 John Wiley & Sons. All rights reserved.

© Digital Integrated Circuits2nd DevicesCopyright © 2005 Pearson Addison-Wesley. All rights reserved.

MOS Capacitances Behavior !MOS Capacitances Behavior !

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The Gate Capacitance in an nThe Gate Capacitance in an n--channel channel MOSFETMOSFET

Introduction to Circuits, Fourth Edition by Peter Uyemura, Copyright © 2004 John Wiley & Sons. All rights reserved.

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The Gate Capacitance The Gate Capacitance

tox

n+ n+

Cross section

L

Gate oxide

xd xd

L d

Polysilicon gate

Top view

Gate-bulkoverlap

Source

n+

Drain

n+W

© Digital Integrated Circuits2nd DevicesCopyright © 2005 Pearson Addison-Wesley. All rights reserved.

Gate CapacitanceGate Capacitance

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Gate Capacitance Gate Capacitance –– BehaviorBehavior

S D

G

CGC

S D

G

CGCS D

G

CGC

Cut-off Resistive Saturation

Most important regions in digital design: saturation and cut-off

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WLCox

WLCox2

2WLCox3

CGC

CGCS

VDS /(VGS-VT)

CGCD

0 1

CGC

CGCS = CGCDCGC B

WLCox

WLCox2

VGS

Capacitance as a function of VGS(with VDS = 0)

Capacitance as a function of the degree of saturation

Gate Capacitance Gate Capacitance –– BehaviorBehavior

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Measuring the Gate CapMeasuring the Gate Cap

2 1.52 1 2 0.5 0

3

4

5

6

7

8

9

103 102 16

2

VGS (V)

VGS

Gat

e C

apac

itanc

e (F

)

0.5 1 1.5 22 2

I

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Diffusion CapacitanceDiffusion Capacitance

Bottom

Side wall

Side wallChannel

SourceND

Channel-stop implantNA1

Substrate NA

W

xj

L S

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Junction capacitances in a MOSFETJunction capacitances in a MOSFET

Introduction to Circuits, Fourth Edition by Peter Uyemura, Copyright © 2004 John Wiley & Sons. All rights reserved.

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Calculation of the FET junction Calculation of the FET junction capacitancecapacitance

Introduction to Circuits, Fourth Edition by Peter Uyemura, Copyright © 2004 John Wiley & Sons. All rights reserved.

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Junction capacitance variation with Junction capacitance variation with reverse voltagereverse voltage

Introduction to Circuits, Fourth Edition by Peter Uyemura, Copyright © 2004 John Wiley & Sons. All rights reserved.

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Final construction of the Final construction of the nFETnFET RC RC modelmodel

Introduction to Circuits, Fourth Edition by Peter Uyemura, Copyright © 2004 John Wiley & Sons. All rights reserved.

CG

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Capacitances in 0.25 Capacitances in 0.25 μμm CMOS m CMOS processprocess

Values for a Typical Device:

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The SubThe Sub--Micron MOS TransistorMicron MOS Transistor

Threshold VariationsSub-threshold ConductionParasitic Resistances

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Threshold VariationsThreshold Variations

VT

L

Long-channel threshold Low VDS threshold

Threshold as a function of the length (for low VDS)

Drain-induced barrier lowering (for low L)

VDS

VT

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SubSub--Threshold Threshold IIDD vsvs VVGSGS

VDS from 0 to 0.5V

⎟⎟⎠

⎞⎜⎜⎝

⎛−=

−kT

qVnkT

qV

D

DSGS

eeII 10

Log Scale

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SubSub--Threshold Threshold IIDD vsvs VVDSDS

( )DSkT

qVnkT

qV

D VeeIIDSGS

⋅+⎟⎟⎠

⎞⎜⎜⎝

⎛−=

−λ110

VGS from 0 to 0.3V

Linear scale

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Summary of MOSFET Operating Summary of MOSFET Operating RegionsRegions

Strong Inversion VGS > VTLinear (Resistive) VDS < VDSAT

Saturated (Constant Current) VDS ≥VDSAT

Weak Inversion (Sub-Threshold) VGS ≤VTExponential in VGS with linear VDS dependence

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Parasitic ResistancesParasitic Resistances

W

LD

Drain

Draincontact

Polysilicon gate

DS

G

RS RD

VGS,eff

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LatchupLatchup

(a) Origin of latchup (b) Equivalent circuit

VDD

Rpsubs

Rnwell p-source

n-source

n+ n+p+ p+ p+ n+

p-substrateRpsubs

Rnwell

VDD

n-well

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SPICE MODELSSPICE MODELS

Level 1: Long Channel Equations - Very Simple

Level 2: Physical Model - Includes VelocitySaturation and Threshold Variations

Level 3: Semi-Emperical - Based on curve fittingto measured devices

Level 4 (BSIM): Emperical - Simple and Popular

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Main MOS SPICE ParametersMain MOS SPICE Parameters

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SPICE Parameters for ParasiticsSPICE Parameters for Parasitics

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SPICE Transistors ParametersSPICE Transistors Parameters

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Circuit Simulation Model of CMOS InverterCircuit Simulation Model of CMOS Inverter

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