APD, CSP and T-card Characteristics

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APD, CSP and T-card Characteristics. for PHOS FEE Review / PRR Meeting in Wuhan, China on May 30/31, 2005. Toru Sugitate / Hiroshima University sugitate@hiroshima-u.ac.jp. PHOS electronics embedded. PHOS signal processing scheme. PbW0 4 crystal. lead-tungstate crystal (PWO). - PowerPoint PPT Presentation

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APD, CSP and T-card Characteristics

Toru Sugitate / Hiroshima University

sugitate@hiroshima-u.ac.jp

for PHOS FEE Review / PRR Meeting in Wuhan, China

on May 30/31, 2005

PHOS electronics embedded

PHOS signal processing scheme

PbW04 crystal

lead-tungstate crystal (PWO)

Fluorescence decay-time of around 25ns at the operation point; i.e. -25deg.

Inorganic scintillating crystal of 22x22x180 mm3, corresponding to 20X0.

Emission spectrum has blue(420nm) and green(500nm) components.

Light yield of 7-12 pe/MeV for crystals produced in Apatity.

Larger LY as cooling down, but increase slower components.

High QE in blue, low noise and capacitance, and thin photo-sensor, operational at low temperature and in magnetic field is required.

Silicon avalanche photo diode (APD)

Smaller sensitive area, but 3-4 times higher QE than PMT.

Abrupt breakdown at a certain reverse voltage.

NB; data are given at 25 deg.

Gain depends on temp and reverse voltage, and

higher performance as cooling down.

Both the precise temperature and reverse voltage controls are required.

Reality of APD’s(for samples ~ 1800)

Inverse current at M=50

1

10

100

1000

0 5 10 15 20 25 30 35 40 45 50

Inverse current at M=50

num

ber

of

APD

Inverse current (nA) at op. voltage

0 10 20 30 40 50 0

100

200

300

400

500

15 20 25 30

15 20 25 30

num

ber

of

APD

Vop.= 350 - 440VVbreak – Vop.= 20 - 25VIdark peaks at 5nA, and

mostly below 15nA.

Inverse current (nA)voltage difference (V)

Vbreak – Vop.

0

50

100

150

200

250

300 350 400 450 500Bias Voltage (V)

num

bers

break down voltagebias voltage at M=50

num

ber

of

APD

Breakdown voltage and Op. voltage at M=50

300 350 400 450 500inverse voltage (V)

J-FET

Sensitivity

Rise time

Noise (ENC)

Output polarity

Feedback loop Power

dissipation

2SK932 (IDSS rank =23) by SANYO

0.833V/pC

15-20 ns over full range

200 e + 3.2 e /pF x Cin(pF)

Positive

100M // 1pF

64mW (4.2mA @12V & 2.2mA @-6V)

APD: Hamamatsu S8148/S8664-55

APD preamplifier: Originally designed and built at CCNU & Bergen.

Re-designed in 2002 at Hiroshima using components available in Japan.

Hiroshima ver.2 is successfully performed in PHOS256 in 2003/04.

Minor modification for ver.3 in 2004.5,000 of Hiroshima ver.3 has been

produced for the first module.

C5 only for test

100M // 1pF

T-card: 8 CSP outputs into single base connector. Originally built at Bergen in 2003.Re-deigned at Hiroshima in 2005 to;

fit with the new frame design at Sarov, remove a test pulse generator, andremove serial registers R11 to R16 in p

ower lines, since they are on CSP. 10 samples of the new version for testing. Connectors onboard;

MOLEX 53047-0610 AMP 747470-2

Sarov design

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