7th ASEAN ANSYS Conference: Inspiring Engineering AAC/Slides/CADIT_Wendy.pdf · 7th ASEAN ANSYS...

© 2008 ANSYS, Inc. All rights reserved. 1 ANSYS, Inc. Proprietary

77thth ASEAN ANSYS Conference:ASEAN ANSYS Conference:

Inspiring EngineeringInspiring Engineering

Application of ANSYS POLYFLOW for Semiconductor Industries

Application of ANSYS POLYFLOW for Semiconductor Industries

Wendy Kurniawan

Applications Engineer

CAD-IT Consultants

wendy.tjia@cadit.com.sg

Wendy Kurniawan

Applications Engineer

CAD-IT Consultants

wendy.tjia@cadit.com.sg

© 2008 ANSYS, Inc. All rights reserved. 2 ANSYS, Inc. Proprietary

• About POLYFLOW

- Introduction

- Type of Flows and Fluids

- Applications and Capabilities

• POLYFLOW for Semiconductor Applications

- Wafer Level Packaging (WLP)

- Paste Flow

Outline

© 2008 ANSYS, Inc. All rights reserved. 3 ANSYS, Inc. Proprietary

ANSYS POLYFLOW

Overview

Finite Element Analysis

(FEA)

Free surface deformation

ALE remeshing technique

Contact Detection

Viscoelastic Modeling

FLUENT

CFX

Computational Fluid Dynamics

(CFD)

Generalized Newtonian models

Fluids boundary conditions

Chemical reaction

Mixing

+

Fully coupled,

native Fluid

Structure

Integration (FSI)

© 2008 ANSYS, Inc. All rights reserved. 4 ANSYS, Inc. Proprietary

Type of Flows and Fluids

• POLYFLOW is ideally suited for viscous and viscoelastic flows:

a. Isothermal and non-isothermal

b. Two- or three-dimensional

c. Steady-state or time-dependent

• Newtonian, non-Newtonian and rheologically complex fluids:

a. Polymer

b. Glass

c. Rubber

d. Plastics

e. Food materials

f. Oils & Paints

g. Clay & concrete

© 2008 ANSYS, Inc. All rights reserved. 5 ANSYS, Inc. Proprietary

Applications

Twin Screw ExtruderBottle ProcessingBumper Moulding

Blow Moulding Thermoforming

© 2008 ANSYS, Inc. All rights reserved. 6 ANSYS, Inc. Proprietary

Capabilities

Contact Detection

• Contact between moving solid

mold and inflating free surface

can be detected.

Starting with 4 elements (!) the mesh is

progressively refined

Adaptive Meshing• Adaptive meshing techniques are

used to ensure the quality of the

meshes despite the large

deformation.

© 2008 ANSYS, Inc. All rights reserved. 7 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

Wafer Level Packaging (WLP)

• Wafer level packaging refers to the technology of packaging an integrated

circuit at wafer level, instead of the traditional process of assembling the

package of each individual unit.

• Numerical modeling using simulation software is useful to address some of

the potential yield and reliability issues (VOIDs) and give insight into the flow

characteristics of compression molding process.

• ANSYS POLYFLOW 3.12.1 is chosen because of its advanced compression

flow analysis capabilities for POLYMERIC materials.

© 2008 ANSYS, Inc. All rights reserved. 8 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

Wafer Level Packaging (WLP)

• The modeling work is basically the simulation of compression molding with

a COMPLEX BOUNDARY. ANSYS POLYFLOW offers the flexibility that

needed in terms of simulating the COMPLEX CHIP GEOMETRY in the

compression flow problem.

• The output quantities selected for the simulation study are:

a. Void formation;

b. Fluid pressure distribution;

d. Fluid velocities and streamlines.

e. Contact time between molds and material

• The simulation works are designed as three-dimensional, quarter-symmetric

model, free surface flows and transient flow problems.

© 2008 ANSYS, Inc. All rights reserved. 9 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

Wafer Level Packaging (WLP) – 3D Model

Geometry model for WLP process with high viscosity compound material

© 2008 ANSYS, Inc. All rights reserved. 10 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

Wafer Level Packaging (WLP) – 3D Quarter Symmetry

Reduce the number of elements and CPU

time for adaptive and contact remeshing!!!

© 2008 ANSYS, Inc. All rights reserved. 11 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

Wafer Level Packaging (WLP) – Material & BCs

Density = 130 Pa.s

Viscosity = 2100 kg/m3

Free surface

flows

Pressing speed = 0.05 mm/s

Isothermal condition

Symmetry wallsFixed bottom molds

© 2008 ANSYS, Inc. All rights reserved. 12 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

Wafer Level Packaging (WLP) – POLYMAN GUI• POLYMAN: a unified environment managing various modules and workflow in POLYFLOW package (similar to ANSYS Workbench).

© 2008 ANSYS, Inc. All rights reserved. 13 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

Wafer Level Packaging (WLP) – GAMBIT GUI

• Preprocessor (Geometry + Meshing) of POLYFLOW.

© 2008 ANSYS, Inc. All rights reserved. 14 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

Wafer Level Packaging (WLP) – POLYDATA GUI

• POLYDATA: Preprocessor (physics defintion + numerical control) of POLYFLOW

software with the Wizard style and very user-friendly window.

© 2008 ANSYS, Inc. All rights reserved. 15 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

Wafer Level Packaging (WLP) – POLYFLOW solver

• POLYFLOW: the solver; run in batch (No GUI); outputs are listed in POLYMAN GUI.

Output of iterations is

displayed in POLYMAN GUI

© 2008 ANSYS, Inc. All rights reserved. 16 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

• Wafer Level Packaging (WLP) – ANSYS CFX-Post

CFX-Post: the common post-processor for all ANSYS CFD products (CFX, Fluent,

POLYFLOW) with modern GUI & very user-friendly environment.

© 2008 ANSYS, Inc. All rights reserved. 17 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

Wafer Level Packaging (WLP) – Results

• Pressure contour of its compound material when going downward under pressing

speed with appropriate time range and time step size [Pa].

© 2008 ANSYS, Inc. All rights reserved. 18 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

Wafer Level Packaging (WLP) – Results

• The vector components of velocity occurred in the model when it is moving downward

in the X, Y and Z axis [mm/s].

© 2008 ANSYS, Inc. All rights reserved. 19 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

Wafer Level Packaging (WLP) – Results• The residence time between upper mold and compound material during the contact

conditions between them with suitable pressing speed [second].

© 2008 ANSYS, Inc. All rights reserved. 20 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

Wafer Level Packaging (WLP) – Results

• The pressure contour of its compound material shown in several cutting section plane

in the X, Y and Z axis to determine the occurrence of VOIDs.

VOIDs !!!

© 2008 ANSYS, Inc. All rights reserved. 21 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

Wafer Level Packaging (WLP) – Results• The adaptive meshing and contact remeshing techniques used by ANSYS POLYFLOW

to accommodate the small geometric detail in our models.

© 2008 ANSYS, Inc. All rights reserved. 22 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

Wafer Level Packaging (WLP) – Results

Adaptive Meshing

© 2008 ANSYS, Inc. All rights reserved. 23 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

Paste Flow

• The Paste Flow analysis is to simulate Die Attach process in the

semiconductor process. Die Attach is the process of attaching the silicon

chip to the die pad (adhesive die attach).

• The numerical study will identify the occurrence of VOIDs in the die pad of

semiconductor package.

• The presence of VOIDs may cause delamination problem, which lead to

reliability issues on the products.

© 2008 ANSYS, Inc. All rights reserved. 24 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

Paste Flow

• Similar to WLP, the simulation work is basically compression molding to

represent the Paste Flow process with COMPLEX BOUNDARY.

• The output quantities selected for the numerical study are:

a. Fluid pressure distribution;

b. Fluid velocities and streamlines.

c. Local shear rates;

d. Contact time between molds and compound material

e. Void occurrence

• The simulation works are designed as three-dimensional, quarter-symmetric

model, free surface flows and transient problems.

© 2008 ANSYS, Inc. All rights reserved. 25 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

Paste Flow – 3D Model

Geometry for Paste Flow process with high viscosity compound material

© 2008 ANSYS, Inc. All rights reserved. 26 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

Paste Flow – 3D Quarter Symmetry

Reduce the number of elements and CPU time

for contact remeshing!!!

© 2008 ANSYS, Inc. All rights reserved. 27 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

Paste Flow – Material & BCs

Density = 130 Pa.s

Viscosity = 2100 kg/m3Free surface flows

Pressing speed = 0.01 mm/s

Isothermal condition

Fixed bottom molds

© 2008 ANSYS, Inc. All rights reserved. 28 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

Paste Flow – Results

• Pressure contour of its compound material when going downward under pressing

speed with appropriate time range and time step size [Pa].

FULL

COVERAGE!!

© 2008 ANSYS, Inc. All rights reserved. 29 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

Paste Flow – Results

• The vector components of velocity occurred in the model when it is moving downward

in the X, Y and Z axis [mm/s].

[mm/s]

© 2008 ANSYS, Inc. All rights reserved. 30 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

Paste Flow – Results

• The residence time between upper mold and compound material during the contact

conditions between them with suitable pressing speed [s].

[s]

© 2008 ANSYS, Inc. All rights reserved. 31 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

Paste Flow – Results

• The rate of local shear existed in the compound material with respect to the time,

which influenced by the temperature, velocity and pressure fields [1/s].

© 2008 ANSYS, Inc. All rights reserved. 32 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

Paste Flow – Results

• Contact remeshing techniques used by ANSYS POLYFLOW to accommodate the

spread out of compound materials due to pressing force and speed.

© 2008 ANSYS, Inc. All rights reserved. 33 ANSYS, Inc. Proprietary

Polyflow for Semiconductor

Applications

Advantages:

a. Determine proper loading speed of upper mold

b. Understand behavior of compound during the pressing process

c. Define better microchip configuration for perfectly coverage;

d. Determine volume of the compound required to achieve optimal usage;

e. Identify the VOIDs locations after final pressing.

f. Gain the output parameters generated from POLYFLOW analysis, such as pressure contours, local shear rate and velocity vectors.

© 2008 ANSYS, Inc. All rights reserved. 34 ANSYS, Inc. Proprietary

Conclusion

• POLYFLOW is capable in modeling compressing processes for

WLP and Paste Flow in the Semiconductor industries with the

conditions:

– Compound material with high viscosity

– Large deformation

– Transient

– Complex Geometry

– Automatic contact detection

• The contact remeshing and adaptive meshing technique is able to

handle and capture the large deformations.

© 2008 ANSYS, Inc. All rights reserved. 35 ANSYS, Inc. Proprietary

References

• Pascarella, N.W. & Baldwin,D.F. 1998. Compression flow modeling of underfill

encapsulation for low cost flip-chip assembly. IEEE Transactions on Components,

Packaging and Manufacturing Technology – Part C, Vol. 21, No. 4, October 1998, pp.

325-335.

• Chuang, S.F. & Kee, D.R. 1997. Effects of polymer die attach-leadframe interface integrity

on thermal performance of power semiconductor packages. Electronic Components and

Technology Conference 0-7803-3857-X/97.

• Brunnbauer, M., Furgut, E., Beer, G. & Meyer, T. 2006. Embedded Wafer Level Ball Grid

Array (eWLB). 1-4244-0665-X./06 IEEE.

• High Density Interconnect & Wafer Level Packaging

(www.izm.fraunhofer.de/Images/hdi_wlp_en_tcm358-91809.pdf)

• Solder Paste Printing (http:/smt.pennet.com/Articles)

© 2008 ANSYS, Inc. All rights reserved. 36 ANSYS, Inc. Proprietary

THANK YOU

wendy.tjia@cadit.com.sg