4th VIRTUS Postgraduate Research...

LIEN Wee Liang MediaTek Singapore Pte Ltd 01 October 2014

4th VIRTUS Postgraduate Research Workshop RF : From Discrete Devices to Single-Chip Integrated Solutions

AGENDA

Early years of RF Design

Factors leading to Single-Chip Integrated Solutions

How MediaTek overcomes technical challenges

Challenges ahead for RF-IC Design

Conclusion

AGENDA

Conclusion

HISTORY OF RADIO

Year Milestone

1860s Scottish physicist, James Clerk Maxwell predicted the existence of radio waves.

1885 Heinrich Hertz proved that electricity can be transmitted in electromagnetic waves. He conducted experiments in sending and receiving these waves during the late 1880s.

1893 Nikola Tesla wirelessly transmitted electromagnetic energy. He made the first public demonstration of radio in St. Louis in 1893.

1918 Edwin Armstrong patented the Super Heterodyne Receiver based on work he did as an officer in the Army Signal Corp.

1930 Regular analog TV broadcasting began in some parts of Europe & North America.

1961 First FM station to broadcast in stereo.

1987 The GPS constellation of satellites was launched

1994 The Bluetooth specification was developed as a cable replacement by Jaap Haartsen and Sven Mattisson, who were working for Ericsson in Lund, Sweden.

1995 The first cellular system using digital CDMA technology was commercially launched.

1997 Original version of the standard IEEE 802.11 was released in 1997.

EARLY DAYS OF RADIO & TELEPHONY

Lumped and distributed inductors and transformers

– realization of maximum gain

– conjugate matching to tune out reactive parasitics optimal power transfer

– Provides reactive energy in power amplifiers (PA) Optimal impedance match

Maximize power efficiency

“PIONEERS” OF RFIC

On-chip inductors and transformers : enablers for RFIC technology in GHz range

– Demonstrated in JSSC 1990 by Prof. Meyer and his graduate student Nhat Nguyen.

800MHz LPF

0.7-1.9GHz bandpass amplifier fT=9GHz

Reference : [1]

AGENDA

Early years of RF design

Challenges ahead in RF-IC Design

Conclusion

WHY RF INTEGRATED SOLUTIONS?

Consumer trend

Process Technology Improvements

Innovative Circuit Techniques

Consumer trend

CONSUMER TREND

…. Wireless technology will be a key foundation of the smart home and most of the device categories will be connected wirelessly although no single technology will dominate. Gartner expects Wi-Fi, Bluetooth, ZigBee, cellular and various proprietary and mesh networking wireless technologies will all find a place in the smart home. It's therefore likely that a range of gateways and adapters will be necessary to bridge between the many different standards and protocols. Many domestic wireless smart objects will be portable and won't have ready access to a wired power supply, so battery manufacturers will profit from the smart home as will developers of power supply and storage technologies such as wireless charging …

WIRELESS TECHNOLOGIES

Strong demand from consumers to have portable access to these technologies

- Form factor & cost becomes very important

1997 Mode: GSM Band: 900MHz PCB size: ~ 90 cm2

Off-chip components (RF): 280

2002 Mode: GSM/ GPRS Band: 900MHz/ 1.9GHz PCB size: ~ 35 cm2

Off-chip components (RF): 60

2013 (Samsung S4) Mode: GSM/ GPRS/ EDGE/ 3.5G/ LTE Band: 800MHz/ 850MHz/ 900MHz/ 1.8GHz/ 1.9GHz/ 2.1GHz/ 2.6GHz Connectivity: WIFI 802.11 a/b/g/n/ac, BT, GPS, FM, NFC

EVOLUTION OF WIRELESS SYSTEM

CELLULAR TRANSCEIVERS TREND

Reference : [2]

On-going trend to reduce form factor and cost as much as possible

Consumer trend

STANDARD CMOS

Standard CMOS technologies replacing specialty semiconductor technologies as the process technology of choice for RF circuits

– Increase in fT and fmax as technology scales

– Replace GaAs and Silicon-on-Sapphire (SOS) Lack of digital integration solutions

Reference : [3]

STANDARD CMOS

1-5 GHz RF solutions does not require such high fT in advanced processes

– Use lower Ids for similar fT in advance nodes (lower power!)

Reference : [16]

PROCESS FINE-TUNE FOR RF (DNWELL)

Deep NWELL

– Require extra mask & process steps

– For better isolation (low resistive current sink)

Reference : [16]

PROCESS FINE-TUNE FOR RF (TM)

Thick Top Metal (TM) to improve inductor Q

Reference : [16]

PROCESS FINE-TUNE FOR RF (LDMOS)

Laterally diffused MOS (LDMOS)

– Higher breakdown voltage (>10V)

– For high output power PA

Process HR-SOI BULK CMOS

Leakage Low High

Junction capacitance Low High

Intrinsic Gain Low High

Industry Adoption Low High

Die cost Low High (FinFETs)

ADVANCE PROCESS FOR RF (SOI)

Consumer trend

DIRECT-CONVERSION ARCHITECTURE

Popular alternative to heterodyne architecture

Translate desired RF spectrum direct to DC

Advantages – Does not face conventional image problems (remove high-

Q image-reject filters)

– Channel selection with simple analog LPF

– Lower cost, smaller die area, lower power consumption

Disadvantages – I-Q downconversion

– Second-order distortion

– DC-offsets

– 1/f noise

DIGITAL “REPAIRS” RF IMPAIRMENTS

Digital circuits complement RF circuits for calibration schemes and data processing functions

– DC offset calibration

– IQ calibration

– Analog Filter Bandwidth calibration

– Gain calibration

– VCO LC tank calibration

– PA pre-distortion

– Etc ..

Digital and RF front-end residing within the same chip greatly enhance “system design-in experience”

OTHER CIRCUIT TECHNIQUES

Receiver

– Multipath approach (noise cancelling topology)

– Blocker tolerant Feedback / Feedforward blocker cancellation

Transmitter

– Analog / digital pre-distortion

– Envelope tracking

– Multipath solutions Doherty etc.

Synthesizer

– Class C & D VCOs for better power efficiency

Reference : [13-15]

AGENDA

Conclusion

MEDIATEK RF PAPERS SHARING

S/No Topic Reference

1 FM with embedded antenna ASSCC 2013

2 GPS/GALILEO with adaptive in-band blocker cancellation

ISSCC 2011

3 Universal Global Navigation Satellite System ISSCC 2013

4 Multiband Mobile Analog TV Tuner JSSC 2013

5 Universal Silicon TV Tuner ASSCC 2013

6 4-in-1 Connectivity Combo ISSCC 2012

7 4-in-1 Radio-in-a-package with IPD Front-end RFIC 2014

ISSCC 2011

FM WITH EMBEDDED ANTENNA

Reference : ASSCC 2013 [4]

RF System : FM RX, FM TX

Technology : 65nm CMOS

Background/Challenges :

– FM RX : enhance user experience, target to use embedded antenna on a PCB

– FM TX : emit >120dBmVrms output signal (>2.8Vpp)

– Sharing of embedded antenna for RX and TX

Solution

– Embedded on-chip antenna calibration scheme

– Low distortion transmit / receive switch

PCB antenna

Solution

– Embedded on-chip antenna calibration scheme

negative gm

Carray

• Oscillator formed with embedded antenna resonance circuits. • Calculation of pulses with an on-chip precision crystal clock

Solution

– Low distortion low Ron T/R switch

TX mode: DC 0V AC +/–ve swing

couple TX swing to bulk to prevent CDB from turning on

M2 turns on during TX –ve swing so that M1 gate tracks it’s drain (always off)

Prevents CSB1 from turning on during TX +ve swing

Results

– TX output level exceeds 120dBmVrms for all channels

– Accurate calibration to within 0.2dB of desired output power

Power difference between automatic and manual calibrations for each channel

ISSCC 2011

GPS/GALILEO WITH ADAPTIVE IN-BAND BLOCKER CANCELLATION

Reference : ISSCC 2011 [5]

RF System : GPS/Galileo SoC

– SoC introduces unwanted in-band blockers (e.g. CPU system clocks, LCD display, PMU, etc.) degrades sensitivity and Time-to-first-fix (TTFF)

Solution :

– Adaptive in-band blocker cancellation

Solution :

– Adjust the frequency, phase and amplitude of local CW replicas to learn and predict the blocker j(t)

x(t)=s(t)+n(t)+j(t) y(t)=x(t)-j(t)=s(t)+n(t) E{y(t)}=E{x(t)-j(t)}=E{s(t)+n(t)}=0 s(t) : signal, PSD < noise n(t) : thermal noise, AWGN j(t) : multiple narrow-band CW blocker

Results :

– Better performance compared to other solutions

Blocker level when CNR degrade 3dB Comparing CNR degradation versus blocker power

ISSCC 2011

UNIVERSAL GNSS

RF System : GPS, Galileo, Glonass, Beidou

– Support multi-standard GNSS, dual reception

– Improve time-to-first-lock and location accuracy

UNIVERSAL GNSS

Solution – Configurable LO

– Single reconfigurable low-IF RX

– Single fractional-N PLL

fLO LO Frequency (MHz)

System IF Frequency (MHz)

fLO_GG 1588.606 GPS/Galileo + Glonass

fLO_GB 1568.256 GPS/Galileo + Beidou

fLO_GPS 1571.328 GPS/Galileo-only 4.092

UNIVERSAL GNSS

Results

ISSCC 2011

MULTIBAND MOBILE ANALOG TV TUNER

Reference : JSSC 2013 [7]

RF System : VHF I, VHF III, UHF

– Achieve highly integrated compact and low-cost tuner design

Solution

– Direct Conversion Receiver (DCR) Highest form of integration

DC offset cancellation

76dB high dynamic range ADC

fully differential implementation

Solution

– Broadband harmonic rejection mixer (HRM) Odd LO harmonics suppressed to mitigate harmonic mixing

Results – Based on 20 samples from 3 different lots including corner wafers

ISSCC 2011

UNIVERSAL SILICON TV TUNER

Reference : ASSCC 2013 [8]

RF System : ATV, DTV, EN55020

Technology : 0.18mm CMOS

– Replace CAN tuners

– Integrate multi-TV standard

– Reduce external BOM (e.g. avoid using external LF capacitor)

Can tuner modules Integrated Si tuners Si tuner SoC

Solution

– Dual path loop filter in PLL Reduce the effective capacitance value in loop filter

Reference : [17]

Solution

Conventional 3rd order LF Dual path 3rd order LF

(1) (2)

(3) (4)

'3'2'1

321 CCC

)'3'1('2'2

'3'2'1

)31(22

'1'3'3

C3'VCP'

C2'R2'

C3'VCP'

C2'R2'

Solution

Icp CL_BW C1’ C2’ C3’ R2’ R3’

5uA 100K 4.04pF 25.15pF 6pF 60.79K 7.45K

RC value for conventional LF

RC value for Dual-path LF (Vcp0=0.5VDD)

Icp CL_BW C1 C2 C3 R2 R3

25uA 100K 4pF 160pF 12pF 30K 6K 176pF

Results

– PLL closed-loop phase-noise Loop filter corner 20kHz

Fractional spur > 70dBc

ISSCC 2011

4-IN-1 CONNECTIVITY COMBO

RF System : 11a/b/g/n, BT, FM TRX, GPS Combo

– Integrate multiple radios into single SoC (reduce cost & form factor)

– Concurrent operation radio co-existence issue

– Thermal effects due to embedded PA

Solution

– Detailed planning of non-overlapping VCO frequency ranges for 4 radios

– Offset LO to prevent VCO pulling by PA

– Field cancelling inductors in VCO layout

– Metal shielding structure to critical signal traces

– Power supply RC-filtering techniques (reduce current loop area)

– Adaptive clock frequency selection algorithm

Solution

Placed furthest away from WLAN/BT /PMU to minimize impact of clock harmonics

Placed far away from WiFi PA to

minimize thermal effects on GPS

performance

Results

– WiFi/BT PER/BER test Sweep

blocker vs RX signal

Frequency separation 25 MHz

% error rate

ISSCC 2011

4-IN-1 RADIO-IN-A-PACKAGE WITH IPD FRONT-END

Reference : RFIC 2014 [10]

RF System : 11b/g/n, BT, FM, GPS Combo

Technology : 55nm CMOS with IPD

Background/Challenges : – RF transceivers do not

scale with advance process node (inductors, pads, etc)

– Wafer cost increases 30-40% for each new process node.

– Discrete FEM (occupy significant PCB area)

Solution

– Move RF transceiver to a mature process node

– Implement front-end passive components on a low-cost integrated passive device (IPD) process

– House both in the same package

Solution

Separate signal from antenna to feed into the ISM band TRX & GPS RX

Balanced BPF for differential to single-ended conversion

Protects GPS from GSM and WCDMA blockers

Results

HISTORY OF RF MULTI-IP INTEGRATION

Year Milestone Notes

< 2000 RF discretes RF discretes + Baseband IC

2001 RF-IC (RF front end) Front-end modules + RF front-end IC + Baseband IC

2006 RF-IC (RF in SoC) Front-end modules + RF & Baseband IC

2008 RF-SiP (multi RF-IC dies in a package)

Front-end modules + different RF-IC functions integrated in a package

2011 RF-IC (multi RF system in single IC)

Front-end modules + multi system RF-IC

2012 RF-SiP (multi RF system with IPD)

Fewer FEMs + IPD + multi system RF-IC

COST OF RFICs IN TYPICAL PHONE

Source :

AGENDA

Conclusion

WHY RF DESIGNS BECOMES EVEN MORE CHALLENGING

RF TRX capable of supporting multi-mode and multi-band capabilities – Forces engineers to develop increasingly dense and

complex solutions

– Multi-RF co-existence issues

Develop cost-competitive solutions – Avoid using full suite of RF process recipes (reduce mask /

fabrication / die cost)

– Use low cost packaging options with poorer RF characteristics

– Use lesser silicon area to achieve similar better performance!

DOWNSIDE OF RFIC IN CMOS

Reduction of VDD as technology scales

Reference : [3] RFIC trends

DOWNSIDE OF RFIC IN CMOS

Linearity suffers as technology scales

– Need larger bias current to maintain linearity

Reference : [3]

ON-GOING TRENDS

Integration of front-end modules (FEM) into silicon

– RF (transmit-receive) switch

– Antenna tuners

– Low noise amplifiers (LNA) & Power Amplifiers (PAs)

Digitally-assisted RF

– Improve TRX through reduction of analog impairments at system level

– Spur cancellation/reduction

– IIP2 improvements

– Digital Pre-distortion

Co-existence

– Multi bands & Multi standards

Reference : [13-15]

PROCESS & PACKAGING TRENDS

RFIC design still have lots of work to do!

AGENDA

Conclusion

CONCLUSION

Consumer demand for wireless connectivity in all domains continue to push strong need for compact high-performing RF-IC solutions

New IC technologies and evolving RF standards continue to push RF-IC system and design engineers for innovative solutions

There’s still lot’s of (challenging)

work to do!

ACKNOWLEDGEMENTS

VIRTUS – NTU

– Professor Siek Liter

MediaTek reviewers

– Chee Lee Heng

– Conan Zhan JH

REFERENCES [1] N.M. Nguyen and R.G. Meyer, “Si IC-compatible inductors and LC passive filters,” IEEE JSSC, vol. 25, no. 4, pp. 1028-

1031, Aug 1990. [2] H. Darabi, “SoC Integration of RF Front-end Passives,” Tutorials, ISSCC, 2010 [3] S. Wong, “Technology Options for RF IC,” Short Courses, ISSCC, 2005 [4] X. Jiang, et al. “A Compact Mobile FM TX with Automatic Embedded Antenna Tuning & Low Spurious Emission in

65nm CMOS,” ASSCC, pp. 201-204, 2013. [5] C.H. Wu, et al. “A GPS/Galileo SoC with Adaptive In-Band Blocker Cancellation in 65nm CMOS,” ISSCC, pp. 462-463,

2011. [6] C.G. Tan, et al. “A Universal GNSS (GPS/Galileo/Glonass/Beidou) SoC with a 0.25mm2 Radio in 40nm CMOS,” ISSCC,

pp. 334-335, 2013. [7] T.Y. Choke, et al. “A Multiband Mobile Analog TV Tuner SoC With 78-dB Harmonic Rejection and GSM Blocker

Detection in 65-nm CMOS,” JSSC, pp 14-27, May 2013. [8] B.H. Ong, et al. “A Universal Silicon TV Tuner with a Compact Synthesizer in 0.18mm CMOS,” ASSCC, pp 337-340,

2013. [9] Y.H. Chung, et al. “A 4-in-1 (WiFi/BT/FM/GPS) Connectivity SoC with Enhanced Co-Existence Performance in 65nm

CMOS,” ISSCC, pp 172-173, 2012. [10] J.H.C Zhan, et al. “A 55nm CMOS 4-in-1 (11b/g/n, BT,FM, and GPS) Radio-In-a-Package with IPD Front-End

Components Directly Connected to Antenna,” IEEE RFIC Symposium, pp 209-212, 2013. [11] A.M. Niknejad, “Inductors and Transformers : Enabling the GHz silicon IC revolution,” IEEE Solid-State Circuits

Magazine Winter, pp. 30-32, 2014. [12]“Future Outlook for the RF & Microwave Industry,” RF Globalnet, May 2007 [13] “ISSCC 2014 trends,” 2013 [14] “ISSCC 2013 trends,” 2012 [15] “ISSCC 2012 trends,” 2011 [16] C.H. Jan, et al.”RF CMOS Technology Scaling in High-K/Metal Gate Era for RF SoC Applications,” IEDM, Dec 2010 [17] C. G. Jones, et al. “Low Noise Filter,” USPTO, US6891412B1, May 2005.

[4-10] MediaTek papers

AN ANALOGY (RF DESIGN WITH ART)

RF DISCRETE DESIGN RF-IC DESIGN

SOLUTION

4th VIRTUS Postgraduate Research...

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