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1
Computers
Internal and External Memory
2
Characteristics of Computer Memory
LocationCapacityUnit of transferAccess MethodPerformancePhysical TypeOrganization
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UNIVAC Console and CPU
5
Memory Hierarchy
CACHE
MAIN MEMORY
MAGNETIC DISK | DISK CACHE
MAGNETIC TAPE | OPTICAL DISK
SPEEDCOST
REGISTERS
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Capacity Units
BitByteKilobyte MegabyteGigabyteTerabyte
bB = 8 bKB = 1,000 BMB = 1,000,000 BGB = 1,000,000,000 BTB = 1,000,000,000,000
B
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Memory Access Method
Sequential - tapeDirect - floppy or hard diskRandom - internal memory
Dynamic (DRAM) simple, small, must be refreshed Static (SRAM)no refresh needed
Associative - some cache
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Random Access Memory
Chips and chip technology
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Flip Flop Circuit Diagram
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Memory Cells
0/1SELECTselect cell
CONTROLread or write
DATA IN / SENSEinput or output
SELECTselect cell
CONTROLread or write
1
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Write to Memory
COLADDRESSBUFFER
MUX
REFRESH
ARRAY
DATAINPUT
BUFFER
DATAOUTPUTBUFFER
A0...
A10
D1..
D4
ROWADDRESSBUFFER
Read Enable
Col AddressRow AddressWrite EnableRow Address
ROWADDRESSBUFFER
COLADDRESSBUFFER
Col Address
MUX
Write Enable
DATAINPUT
BUFFER
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Pin Assignments
A0 … A10: address location (multiplexed)D1 … D4: data in or outVcc: power supplyVss: groundRAS: row address selectCAS: column address selectWE: write enableOS: output enable
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Cache Operation
ALU CNTL.....
BUS
MAIN MEMORY
CACHE
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Cache
Main Memory
CPU
CACHE
Word
Block
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CacheSlot
NumberTag Block
0
1
2
3
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Random Access
Direct Access Storage Device (DASD) or disk drives Optical Magnetic
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Optical Disks (CD’s)
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How CD’s work
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Cylinder/Track/Block
Block (Sector)Track
Cylinder
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Disk Organization
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DASD Structure
Read-Write Heads
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Data Storage
FAT (File Access Tables), Directories and Catalogs
Update and DeleteFragmentation and reorganizationBlocks, Headers and Interblock Gaps
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DASD Access (PC)
MAIN MEMORY
DASD
BUFFER
CONTROLLER
CPU
CACHE
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27
DASD Access (Mainframe)
MAIN MEMORY
DASD
BUFFER
CONTROLLER
CPU
CHANNEL
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Data Structure
HEADER DATA CRCHEADER
BLOCK
• Header written when disk is formatted• Data copied into block• Cyclical Redundancy Check calculated
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Controller Operation(DASD retrieval)
CPU passes parameters to registers in the controller
The controller transfers data into the card buffer
The controller checks the CRC to assure the data was copied correctly
The controller (or CPU) transfers buffered data to memory one word at a time
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Time Units
MillisecondMicrosecon
dNanosecondPicosecond
ms = 1/1000 sµs = 1/1,000,000 sns = 1/1,000,000,000 sps = 1/1,000,000,000,000
s
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Representative Times
Network speed = megabits per second
Disk transfer = megabytes per second
Disk access = millisecondsMemory access = nanosecondsMachine cycle =
microseconds/nanoseconds
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Error Correction and Checking
Add bits to a block to use for error discovery Detection only Detection and retransmission Detection and recovery
Check Body Header
Block
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Error Detection Only (Asynchronous Transmission)
*******
Parity Bit
7 Data Bits
27 = 128 distinct characters
*
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Error Detection &Correction (Hamming Code: 4 bit word)
****
3 Error Checking Bits
4 Data Bits
***
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DATA
1
1
10
Error Detection &Correction (Hamming Code: 4 bit word)
1110
***
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PARITY (even)
1
1
10
1 0
0
Error Detection
1110
100
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PARITY (even)
0
1
10
1 0
0
Error Correction (4 bit word)
0110
100
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Error Correction & Detection
Error detection takes fewer bits than error correction
Longer packets take a smaller percent for correction but have more types of errors
Hamming’s scheme detects all errors at a high overhead cost; others may correct only single bit or double bit errors with shorter check fields
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CRC Error Checking
The transmitted messages are divided into predetermined blocks
The blocks are divided by a fixed divisor
The remainder is appended to the message
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IBM 1107 with tape drives
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Memory
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