HSA-4122, "HSA Queuing Mode," by Ian Bratt

HSA QUEUEING APU13 - NOVEMBER 2013

IAN BRATT, PRINCIPAL ENGINEER ARM

HSA QUEUEING, MOTIVATION

MOTIVATION (TODAY’S PICTURE)

© Copyright 2012 HSA Foundation. All Rights Reserved. 3

Application OS GPU

Transfer buffer to GPU

Copy/Map Memory

Queue Job

Schedule Job Start Job

Finish Job

Schedule Application

Get Buffer

Copy/Map Memory

HSA QUEUEING: REQUIREMENTS

REQUIREMENTS

!  Requires four mechanisms to enable lower overhead job dispatch. !  Shared Virtual Memory !  System Coherency !  Signaling !  User mode queueing


SHARED VIRTUAL MEMORY

PHYSICAL MEMORY

SHARED VIRTUAL MEMORY (TODAY) !  Multiple Virtual memory address spaces


CPU0 GPU

VIRTUAL MEMORY1

PHYSICAL MEMORY

VA1->PA1 VA2->PA1

VIRTUAL MEMORY2

PHYSICAL MEMORY

SHARED VIRTUAL MEMORY (HSA) !  Common Virtual Memory for all HSA agents


CPU0 GPU

VIRTUAL MEMORY

PHYSICAL MEMORY

VA->PA VA->PA


!  Advantages !  No mapping tricks, no copying back-and-forth between different PA

addresses !  Send pointers (not data) back and forth between HSA agents.

!  Implications !  Common Page Tables (and common interpretation of architectural

semantics such as shareability, protection, etc). !  Common mechanisms for address translation (and servicing

address translation faults) !  Concept of a process address space (PASID) to allow multiple, per

process virtual address spaces within the system.


GETTING THERE …


Application OS GPU


Copy/Map Memory

Queue Job


Finish Job


Get Buffer

Copy/Map Memory


!  Specifics !  Minimum supported VA width is 48b for 64b systems, and 32b for

32b systems. !  HSA agents may reserve VA ranges for internal use via system

software. !  All HSA agents other than the host unit must use the lowest

privelege level !  If present, read/write access flags for page tables must be

maintained by all agents. !  Read/write permissions apply to all HSA agents, equally.


CACHE COHERENCY

CACHE COHERENCY DOMAINS (1/3)

!  Data accesses to global memory segment from all HSA Agents shall be coherent without the need for explicit cache maintenance.



!  Advantages !  Composability !  Reduced SW complexity when communicating between agents !  Lower barrier to entry when porting software

!  Implications !  Hardware coherency support between all HSA agents !  Can take many forms

!  Stand alone Snoop Filters / Directories !  Combined L3/Filters !  Snoop-based systems (no filter) !  Etc …


GETTING CLOSER …


Application OS GPU


Copy/Map Memory

Queue Job


Finish Job


Get Buffer

Copy/Map Memory


!  Specifics !  No requirement for instruction memory accesses to be

coherent !  Only applies to the Primary memory type. !  No requirement for HSA agents to maintain coherency

to any memory location where the HSA agents do not specify the same memory attributes

!  Read-only image data is required to remain static during the execution of an HSA kernel. ! No double mapping (via different attributes) in order

to modify. Must remain static


SIGNALING

SIGNALING (1/3)

!  HSA agents support the ability to use signaling objects !  All creation/destruction signaling objects occurs via HSA

runtime APIs !  From an HSA Agent you can directly access signaling

objects. ! Signaling a signal object (this will wake up HSA

agents waiting upon the object) ! Query current object ! Wait on the current object (various conditions

supported).


SIGNALING (2/3)

!  Advantages !  Enables asynchronous interrupts between HSA agents,

without involving the kernel !  Common idiom for work offload !  Low power waiting

!  Implications !  Runtime support required !  Commonly implemented on top of cache coherency

flows


ALMOST THERE…


Application OS GPU


Copy/Map Memory

Queue Job


Finish Job


Get Buffer

Copy/Map Memory

SIGNALING (3/3)

!  Specifics !  Only supported within a PASID !  Supported wait conditions are =, !=, < and >= !  Wait operations may return sporadically (no guarantee

against false positives) ! Programmer must test.

!  Wait operations have a maximum duration before returning.

!  The HSAIL atomic operations are supported on signal objects.

!  Signal objects are opaque


USER MODE QUEUEING

ONE BLOCK LEFT


Application OS GPU


Copy/Map Memory

Queue Job


Finish Job


Get Buffer

Copy/Map Memory

USER MODE QUEUEING (1/3)

!  User mode Queueing !  Enables user space applications to directly, without OS intervention, enqueue jobs

(“Dispatch Packets”) for HSA agents. !  Queues are created/destroyed via calls to the HSA runtime. !  One (or many) agents enqueue packets, a single agent dequeues packets. !  Requires coherency and shared virtual memory.


USER MODE QUEUEING (2/3)

!  Advantages !  Avoid involving the kernel/driver when dispatching work for an Agent. !  Lower latency job dispatch enables finer granularity of offload !  Standard memory protection mechanisms may be used to protect communication

with the consuming agent.

!  Implications !  Packet formats/fields are Architected – standard across vendors!

!  Guaranteed backward compatibility !  Packets are enqueued/dequeued via an Architected protocol (all via memory

accesses and signalling) !  More on this later……


SUCCESS!


Application OS GPU


Copy/Map Memory

Queue Job


Finish Job


Get Buffer

Copy/Map Memory

SUCCESS!


Application OS GPU

Queue Job

Start Job

Finish Job

ARCHITECTED QUEUEING LANGUAGE, QUEUES

ARCHITECTED QUEUEING LANGUAGE

!  HSA Queues look just like standard shared memory queues, supporting multi-producer, single-consumer !  Support is allowed for single-producer,

single-consumer

!  Queues consist of storage, read/write indices, ID, etc.

!  Queues are created/destroyed via calls to the HSA runtime

!  “Packets” are placed in queues directly from user mode, via an architected protocol

!  Packet format is architected


Producer Producer

Consumer

Read Index

Write Index

Storage in coherent, shared memory

Packets

ARCHITECTED QUEUEING LANGUAGE !  Packets are read and dispatched for execution from the queue in order, but

may complete in any order. !  There is no guarantee that more than one packet will be processed in parallel at a

time

!  There may be many queues. A single agent may also consume from several queues.

!  A packet processing agent may also enqueue packets.

!  Once a packet is enqueued, the producer signals the doorbell !  Consumers are not required to wait on the doorbell – the consumer could instead be

polling. !  The doorbell is not the synchronization mechanism (the shared memory updates to

the read/write indices ensure the synchronization). !  Modifications to the read/write indices occur via HSA intrinsics, to support portability

across different platforms.


POTENTIAL MULTI-PRODUCER ALGORITHM // Read the current queue write offset tmp_WriteOffset = hsa_WriteOffset(); // wait until the queue is no longer full. while(tmp_WriteOffset == hsa_ReadOffset() + Size) {} // Atomically bump the WriteOffset if (hsa_WriteOffset.compare_exchange(tmp_WriteOffset, tmp_WriteOffset + 1){

// calculate index uint32_t index = tmp_WriteOffset & (Size -1);

// copy over the packet, the format field is INVALID BaseAddress[index] = pkt;

// Update format field with release semantics BaseAddress[index].hdr.format.store(DISPATCH, std::memory_order_release);

// ring doorbell, with release semantics (could also amortize over multiple packets)

hsa_ring_doorbell(tmp_WriteOffset+1); }


POTENTIAL CONSUMER ALGORITHM // spin while empty (could also perform low-power wait on doorbell) while (BaseAddress[hsa_ReadOffset() & (Size - 1)].hdr.format == INVALID) { } // calculate the index uint32_t index = hsa_ReadOffset() & (Size - 1); // copy over the packet pkt = BaseAddress[index]; // set the format field to invalid BaseAddress[index].hdr.format.store(INVALID, std::memory_order_relaxed); // Update the readoffset using HSA intrinsic hsa_ReadOffset.store(hsa_ReadOffset()); © Copyright 2012 HSA Foundation. All Rights Reserved. 32

ARCHITECTED QUEUEING LANGUAGE, PACKETS

DISPATCH PACKET


!  Packets come in two main types (Dispatch and Barrier), with architected layouts

!  Dispatch packet is the most common type of packet

!  Contains !  Pointer to the kernel !  Pointer to the arguments !  WorkGroupSize (x,y,z) !  gridSize(x,y,z) !  And more…… !  dispatch_agent packet more general

!  Packets contain an additional “barrier” flag. When the barrier flag is set, no other packets will be launched until all previously launched packets from this queue have completed.

DISPATCH PACKET


Start Offset (Bytes)

Format Field Name Description

0 uint16_t header Packet header

2 uint16_t dimensions Number of dimensions specified in gridSize. Valid values are 1, 2, or 3.

4 uint16_t workgroupSize.x x dimension of work-group (measured in work-items). 6 uint16_t workgroupSize.y y dimension of work-group (measured in work-items). 8 uint16_t workgroupSize.z z dimension of work-group (measured in work-items).

10 uint16_t reserved2 Must be 0. 12 uint32_t gridSize.x x dimension of grid (measured in work-items). 16 uint32_t gridSize.y y dimension of grid (measured in work-items). 20 uint32_t gridSize.z z dimension of grid (measured in work-items).

24 uint32_t privateSegmentSizeBytes

Total size in bytes of private memory allocation request (per work-item).

28 uint32_t groupSegmentSizeBytes

Total size in bytes of group memory allocation request (per work-group).

32 uint64_t kernelObjectAddress Address of an object in memory that includes an implementation-defined executable ISA image for the kernel.

40 uint64_t kernargAddress Address of memory containing kernel arguments. 48 uint64_t reserved3 Must be 0. 56 uint64_t completionSignal Address of HSA signaling object used to indicate completion of

the job.

AGENT_DISPATCH PACKET


Start Offset (Bytes)

Format Field Name Description

0 uint16_t header Packet header

2 uint16_t type

The function to be performed by the destination Agent. The type value is split into the following ranges: •  0x0000:0x3FFF – Vendor specific •  0x4000:0x7FFF – HSA runtime •  0x8000:0xFFFF – User registered function

4 uint32_t reserved2 Must be 0. 8 uint64_t returnLocation Pointer to location to store the function return value in.

16 uint64_t arg[0]

64-bit direct or indirect arguments. 24 uint64_t arg[1] 32 uint64_t arg[2] 40 uint64_t arg[3] 48 uint64_t reserved3 Must be 0.

56 uint64_t completionSignal Address of HSA signaling object used to indicate completion of the job.

BARRIER PACKET

!  Used for specifying dependences between packets

!  HAS agent will not launch any further packets from this queue until the barrier packet signal conditions are met

!  Used for specifying dependences on packets dispatched from any queue. !  Execution phase completes only when all of the dependent signals (up to five) have

been signaled (with the value of 0). !  Or if an error has occurred in one of the packets upon which we have a dependence.


BARRIER PACKET


Start Offset (Bytes) Format Field Name Description

0 uint16_t header Packet header, see 2.8.1 Packet header (p. 16).

2 uint16_t reserved2 Must be 0.


8 uint64_t depSignal0

Address of dependent signaling objects to be evaluated by the packet processor.






56 uint64_t completionSignal Address of HSA signaling object used to indicate completion of the job.

DEPENDENCES

!  A user may never assume more than one packet is being executed by an HSA agent at a time.

!  Implications: !  Packets can’t poll on shared memory values which will be set by packets issued

from other queues, unless the user has ensured the proper ordering. !  To ensure all previous packets from a queue have been completed, use the Barrier

bit. !  To ensure specific packets from any queue have completed, use the Barrier packet.


HSA QUEUEING, PACKET EXECUTION

PACKET EXECUTION

!  Launch phase !  Initiated when launch conditions are met

!  All preceeding packets in the queue must have exited launch phase !  If the barrier bit in the packet header is set, then all preceding packets in the

queue must have exited completion phase

!  Active phase !  Execute the packet !  Barrier packets remain in Active phase until conditions are met.

!  Completion phase !  First step is memory release fence – make results visible. !  CompletionSignal field is then signaled with a decrementing atomic.


PACKET EXECUTION


Pkt1 Launch

Pkt2 Launch

Pkt1 Execute

Pkt2 Execute

Pkt1 Complete

Pkt3 Launch (barrier=1)

Pkt2 Complete

Pkt3 Execute

Time

Pkt3 stays in Launch phase until all packets have completed.

PUTTING IT ALL TOGETHER (FFT)


Packet 1

Packet 2

Packet 3

Packet 4

Packet 5

Packet 6

Barrier Barrier

X[0]

X[1]

X[2]

X[3]

X[4]

X[5]

X[6]

X[7]

Time

PUTTING IT ALL TOGETHER


AQL Pseudo Code // Send the packets to do the first stage. aql_dispatch(pkt1); aql_dispatch(pkt2); // Send the next two packets, setting the barrier bit so we //know packets 1 &2 will be complete before 3 and 4 are //launched. aql_dispatch_with _barrier_bit(pkt3); aql_dispatch(pkt4); // Same as above (make sure 3 & 4 are done before issuing 5 //& 6) aql_dispatch_with_barrier_bit(pkt5); aql_dispatch(pkt6); // This packet will notify us when 5 & 6 are complete) aql_dispatch_with_barrier_bit(finish_pkt);

SUMMARY


REQUIREMENTS

!  HAS Requires four mechanisms to enable lower overhead job dispatch. !  Shared Virtual Memory !  System Coherency !  Signaling !  User mode queueing


QUESTIONS?


HSA-4122, "HSA Queuing Mode," by Ian Bratt

hsa foundation

hsa kernel

shared virtual memory

hsa queueing apu13

hsa runtime apis

common virtual memory

memory attributes

memory location

Text of HSA-4122, "HSA Queuing Mode," by Ian Bratt

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HSA-4122, "HSA Queuing Mode," by Ian Bratt

Text of HSA-4122, "HSA Queuing Mode," by Ian Bratt