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Automotive Ethernet WebinarPhysical Layer Compliance Testing
Bob MartProduct Line [email protected]
Upcoming Events: teledynelecroy.com/events
Live Seminar: Automotive Ethernet DayBasics Of Automotive Ethernet and Physical Compliance Santa Clara, CA
Live Seminar: Automotive Ethernet DayBasics Of Automotive Ethernet and Physical Compliance Farmington Hills, MI
Agenda
What is Compliance Testing for Automotive Ethernet?
Overview of Required Test Modes
Description of Each Test
Review of Required Test Equipment
Hands on Testing
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Defining Automotive Ethernet
Can refer to any Ethernet-based network for in-vehicle electrical systems
Enables faster data communication to meet rising demand
Specifically tailored to meet the needs of automotive industry
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BroadR-Reach
Automotive Ethernet
100Base-T1 1000Base-T1
OABR (OPEN Alliance BroadR-Reach)
RTPGE(Reduced Twisted
Pair Gigabit Ethernet)
What is 100Base-T1? IEEE 802.3bw Physical Layer Specifications and Management Parameters for 100
Mb/s Operation over a Single Balanced Twisted Pair Cable (100Base-T1)
IEEE specification for 100 Mb/s Automotive Ethernet Interoperable with OPEN Alliance BroadR-Reach Same RAND terms apply
Nearly the same thing as BroadR-Reach Often times names are used interchangeably Few exceptions
Electrical PMA has a Transmit Peak Differential Output Changes in the protocol timing for wake up commands
Why create a new spec? Driven by other applications: industrial automation and avionics
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Physical Layer Compliance TestingOverview of Compliance Testing
Categories of Automotive Ethernet Testing
Electrical Signaling: Physical Media Attachment (PMA) Determine if product conforms to electrical transmitter and receiver
specifications
Physical Coding Sublayer (PCS) & PHY Control Evaluates functionality of the protocol
PCS transmit/receive State diagrams Encoding/decoding Scrambling/descrambling
There are recommendations for other elements Common Mode Choke (CMC), EMC, Communication Channel, ECU, switches
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We will focus on Electrical Signaling
Electrical Signaling: Physical Media Attachment (PMA) Determine if product conforms to electrical transmitter and receiver
specifications
Physical Coding Sublayer (PCS) & PHY Control Evaluates functionality of the protocol
PCS transmit/receive State diagrams Encoding/decoding Scrambling/descrambling
There are recommendations for other elements Common Mode Choke (CMC), EMC, Communication Channel, ECU, switches
6/7/2017 8
What is Compliance Testing in the Context of Automotive Ethernet?
The 100Base-T1 spec includes requirements for PMA, PCS, and PHY Control
IEEE does not write test specifications UNH has traditionally written test documents which describe how tests can
be performed
It is up to the OEM, Tier 1, PHY Vendor, etc. to work with a test equipment manufacturer or test house to perform testing
6/7/2017 9
Automotive Ethernet Test Suites
OPEN Alliance licensed UNL-IOL to create test suites for each group of testing
UNH-IOL maintains Test Suites which contain a description of how they perform testing
These act as pseudo test specs PMA PCS PHY Control
6/7/2017 10
PMA Tests have two groups
Group 1: Electrical Measurements
Group 2: PMA Receive Tests
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PMA Electrical Measurements
We will focus on the electrical transmitter tests performed with an oscilloscope
There are also MDI tests which are performed using a VNA MDI Return Loss MDI Mode Conversion Loss
6/7/2017 12
A Quick Note About PMA Receive Tests
Group 2 is analogous to a protocol level test
PCS testing is typically done by silicon vendors
6/7/2017 13
Why is PHY Compliance Important?
OEMs have a lengthy development cycle for an ECU Need assurance that PHY chip meets requirements prior to implementation
Once the PHY chip has been incorporated into the ECU it should also be tested – testing is not just for PHY vendors This may be full compliance testing or a subset of compliance tests
Compliance to 100BASE-T1 does not guarantee interoperability Transmitter requirements are well defined, the receiver is left up to the
implementer
6/7/2017 14
Where is the Electrical Compliance Testing Defined?
6/7/2017 15
Defined at the connector of the transmitter
Governed by channel/connector recommendations
Physical Layer Compliance Testing100Base-T1 Test Modes
100Base-T1 has 5 Test Modes
Why do we have test modes? Allow for a common pattern to test stressful conditions across all devices Improves odds of interoperability
Based off of IEEE 802.3 Clause 40.6.1.1.2
6/7/2017 17
Test Modes Tests PerformedTest Mode 1 Output Droop
Test Mode 2 Master Jitter & Clock Frequency
Test Mode 3 (optional) Slave Jitter
Test Mode 4 Distortion
Test Mode 5 Power Spectral Density & Peak Differential Output
Test Mode 1 – Transmit Droop
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N “+1” symbols followed by N “-1” symbols ie: square wave
N symbol period must be greater than 500 nsN > 34 symbols
Test Mode 2 – Transmit Jitter in Master Mode
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33 1/3 MHz clock
Repeating sequence of {-1,1}
Test Mode 3 – Transmit Jitter in Slave Mode (optional)
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33 1/3 MHz clock – timed in Slave mode
Repeating sequence of {-1,1}
Test Mode 4 – Transmitter Distortion Test
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PAM-3 signal with a symbol interval of 15 ns
Repeating pattern every 2047 symbolsg(x) = 1 + x9 + x11
Test Mode 5 – Normal Operation at Full Power
6/7/2017 22
PAM-3 symbol with a symbol interval of 15 ns
Random sequence of {-1,0,1}
Generation of Test Modes
Each PHY vendor has a “backdoor” method to modify the necessary registers to enter each test mode
This often not publically available and the method will vary from vendor to vendor You must ask your PHY vendor how to generate these test modes
6/7/2017 23
Physical Layer Compliance TestingTest Detail
7 Differential Electrical Physical Layer Compliance Tests
BroadR-Reach & 100Base-T1 Maximum Transmitter Output Droop Transmitter Clock Frequency Transmitter Timing Master Jitter Transmitter Timing Slave Jitter Transmitter Distortion Transmitter Power Spectral Density (PSD)
100Base-T1 Only Transmitter Peak Differential Output
6/7/2017 25
Test Setup for PMA Compliance Testing
6/7/2017 26
Oscilloscope
DUT
“Short” Automotive Ethernet CableEthernet Test Fixture
Close up of Test Setup for PMA Compliance Testing
6/7/2017 27
DUT
Pair A Differential
Signal
SMA Cables to oscilloscope RJ45 Breakout Section
Maximum Transmitter Output Droop – Description
Test Mode 1
Measure positive and negative droop
Test limit is 45%
Verify that the transmitter does not droop more than the specified amount
6/7/2017 28
Source: IEEE 100Base-T1 Figure 96-23
Maximum Transmitter Output Droop – Methodology
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1. Locate Initial Peak (Vpk+ & Vpk-)
2. Measure Voltage after 500 ns(Vdrooped+ & Vdrooped-)
Maximum Transmitter Output Droop – Methodology
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3. Calculate Droop+ & Droop-Droop = 100 x (Vdrooped/Vpk)
4. Compare to limit of 45%
Transmitter Clock Frequency – Description
Test Mode 2
Measure symbol transmission rate in Master Mode
Test limit is 66 2/3 MBd +/- 100 ppm
Verify that the frequency of the transmitted clock meets the spec limits
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Transmitter Clock Frequency – Methodology
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1. Measure frequency or bitrate
Transmitter Clock Frequency – Methodology
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2. Compare to limit Note: 33 MHz is half the baud rate, since it takes two symbols to create one cycle
Transmitter Timing Master Jitter – Description
Test Mode 2
Measure RMS (root mean squared) of the MDI output jitter over at least 1 ms
Test limit is 50 ps
This test will verify that the jitter on the transmitted clock is within the specified limits
6/7/2017 34
Transmitter Timing Master Jitter – Methodology
6/7/2017 35
1. Measure Time Interval Error (TIE)
Transmitter Timing Master Jitter – Methodology
6/7/2017 36
2. Create a track of TIE measurements
What is a track?
6/7/2017 37
A plot of each measured value in an acquisition
In this case there are 13 measured values
1
2
3
4
5
6
7
8
9
10
11
12
13
Provides insight into temporal trends of measured data
Transmitter Timing Master Jitter – Methodology
6/7/2017 38
3. Measure rms of TIE track
4. Compare to 50 ps
Transmitter Timing Slave Jitter – Description
In normal operation as Slave Probe TX_TCLK or Test mode 3
Measure RMS (root mean squared) jitter of Slave TX_TCLK
Test limit is 0.01 UI (150 ps)
This test will verify that the jitter on the signals received by the slave is within the specified limits
6/7/2017 39
Source: IEEE 100Base-T1 Figure 96-24
Access to TX_TCLK
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TX_TCLK = transmitted clock
The spec says that each DUT must provide a means to access this clock Rarely the case unless testing a PHY eval board
ie: ECU
Without access to the TX_TCLK this test cannot be performed
Source: IEEE 100Base-T1
Transmitter Timing Slave Jitter – Methodology
6/7/2017 41
3. Measure rms of TIE track
4. Compare to 150 ps 1. Measure TIE
2. Create a track of TIE measurements
Transmitter Distortion – Description Test mode 4
Requires access to the TX_TCLK
A disturbing sine wave is sent to DUT and distortion is measured
Test limit is 15 mV
Make sure the transmitted signal has minimal distortion so the link partner's receiver can interoperate with the DUT
6/7/2017 42
Source: IEEE 100Base-T1 Figure 96-21
Setup for Disturbing Sine Wave (Vd) Simulates the presence of a remote
transmitter
If the DUT is not sufficiently linear Vdwill cause significant distortion products to appear in the DUT output
Frequency must be exactly 1/6 of the DUTs symbol rate
DUT must be subjected to Vd of 5.4 Vpk-pk
Test can be performed with or without Vd
6/7/2017 43
Matlab Code is Provided in the Spec for Peak Distortion Calculation
Any error from ideal reference is counted as distortion
Removes the disturbing sine wave and measures peak distortion at equally spaced phases of the symbol period
Can be run on a separate PC
Teledyne LeCroy embeds Matlabcode in the scope software Doesn’t require a Matlab license
to process
6/7/2017 44
Source: IEEE 100Base-T1
The Distortion Test Setup is Very Complicated
Disturbing sinewave source, oscilloscope, and DUT all need to locked in frequency
DUT has a reference clock of 66 2/3 MHz
All test equipment takes a reference clock in of 10 MHz
6/7/2017 45
Software Clock Recovery – Distortion Testing Made Easy
Teledyne LeCroy has developed a unique software clock recovery algorithm First demonstrated at UNH Plugfest in November 2016
Removes the need to synchronize the DUT with the scope and disturbing sine wave
Enables test to be completed without a hardware frequency converter board Makes setup simpler and cheaper
Possible to perform testing on DUTs without access to TX_TCLK
6/7/2017 46
Teledyne LeCroy Simplified the Distortion Test Setup
6/7/2017 47
Matlab code is all run on the scope
Clock recovery removes the need for frequency locking
Teledyne LeCroy Test Setup for the Distortion Test
6/7/2017 48
Oscilloscope
AWG (for Vd)
DUT
“Short” Automotive Ethernet CableEthernet Test Fixture
Close up of Test Setup for the Distortion Test
6/7/2017 49
DUT
Pair A Differential
Signal
SMA Cables to oscilloscope
Distortion TestSection
Differential Vd from AWG
Directional couples
DUT sees Vdbut very little is
seen by the oscilloscope
How Does the Software Clock Recovery Work?
Aligns the oscilloscope’s sampled points with DUT’s TX_TCLK
1. Find the correct frequency offset of the DUT Measure a reference waveform without disturbing signal
2. Re-sampling the input data to the nominal bitrate
6/7/2017 50
1. Finding the Correct Frequency Offset of the DUT
Pattern length of 2047 bits which repeats after 30.705 μs
Using two zoom windows with an offset of 30.705 μs the same pattern will be found
6/7/2017Company Confidential 51
30.705 μs
1. Finding the Correct Frequency Offset of the DUT
Measure the delta time for all edges in Zoom 1 to the correspondent edge in Zoom 2 and calculate the average of all measurements
6/7/2017Company Confidential 52
∆ ∆
6/7/2017Company Confidential 53
P1 = average of measurements between Z1 and Z2
P3 = offset in ns from the ideal length of the pattern
P5 = offset of the clock in ppm
1. Finding the Correct Frequency Offset of the DUT
2. Re-sampling the Input Data to the Nominal Bitrate
6/7/2017Company Confidential 54
First step is to add additional points between the sampling points (interpolation)
In this example we have interpolated by a factor of 10
Sampling points
Interpolation
2. Re-sampling the Input Data to the Nominal Bitrate
6/7/2017Company Confidential 55
To increase the frequency by 10% we have to use every 9th point (9, 18, 27,…) from the interpolated waveform
To decrease the frequency by 10% it would be every 11nd point
Point for new waveform
Maximum Transmitter Output Droop – Methodology
6/7/2017 56
1. Calculate Distortion
2. Compare to 15 mV3. Measure 10 phases
over the UI
Transmitter Power Spectral Density (PSD) – Description
Test Mode 5
Calculates the PSD of signal in normal operation
Can be performed with a spectrum analyzer or oscilloscope with spectrum capabilities
Verifies that the PSD does not exceed the specified mask
6/7/2017 57
Source: IEEE 100Base-T1 Figure 96-25
Maximum Transmitter Output Droop – Methodology
6/7/2017 58
1. Calculate PSD
Maximum Transmitter Output Droop – Methodology
6/7/2017 59
2. Average PSD over 60 seconds
Maximum Transmitter Output Droop – Methodology
6/7/2017 60
3. Test against mask
Transmitter Peak Differential Output – Description
Test Mode 5
Measures peak-peak voltage during normal operation
Measured during PSD test We recommend to use 10 us/div
Verifies that the signal does not exceed maximum amplitude of 2.2 Vpk-pk
6/7/2017 61
Maximum Transmitter Output Droop – Methodology
6/7/2017 62
1. Measure Peak to Peak voltage
2. Compare to 2.2 V
Physical Layer Compliance TestingTest Equipment Requirements
Test Equipment Requirements
1 GHz Oscilloscope with at least 2 GS/s sample rate We recommend 10 GS/s
Oscilloscope with Spectral Analysis capability or Spectrum Analyzer
Disturbing Sine Wave Generator 5.4 Vpk-pk at 11.11 MHz 2 BNC cables 2 BNC-SMA adapters
6/7/2017 64
Ethernet Test Fixture 2 SMA cables 2 SMA-BNC Adapters
1 GHz Differential Probe
Short Automotive Cable
Vector Network Analyzer For return loss and common
mode
Ethernet Test Fixture (TF-ENET-B)
Fixture used for 10/100/1000 Base-T testing RJ45 Interface
Breakout section
Distortion test section Designed so that only DUT sees
the disturbing signal
Need to pay attention to which pair the signal is brought out on the RJ45 connector
6/7/2017 65
Connecting the DUT to the Ethernet Fixture
The Medium Dependent Interface (MDI) is not mechanically specified
The tester is responsible for creating a mating fixture/cable This is referred to as a “Short Automotive Cable”
This cable should be as short as possible
6/7/2017 66
Example of Custom Short Automotive Cables
6/7/2017 67
Example of Custom Short Automotive Cables
6/7/2017 68
Example of Custom Breakout Fixture
6/7/2017 69
Physical Layer Compliance TestingAutomated Compliance Software
Why use Automated Compliance Software?
Automation will greatly decrease the test time Complete testing takes less than 10 minutes
Complete documentation of test results
You don’t need to be an expert to perform testing Software guides you through each step
Results are fully repeatable – tested the same way every time
6/7/2017 71
QPHY-BroadR-Reach: Teledyne LeCroy’s Automated Test Package
BroadR-Reach V3.2 and 100Base-T1
Industry’s first test package
Support for all PMA Transmitter tests
Only test platform to perform software clock recovery for distortion test
6/7/2017 72
Guides the User Through the Each Step
Prompts notify user to output correct test pattern
6/7/2017 73
Detailed connection diagrams ensure the proper setup
Fully Documented Report Automatically Generated
Report conations: Test values Specified test limits Screen captures
Can be created as: HTML PDF XML
6/7/2017 74
Fully Documented Report Automatically Generated
6/7/2017 75
Advanced Debugging
Stop On Test User can pause testing after each individual test Seamlessly resume testing after debugging
Pause on Failure During the test the software notify
the user if a failure occurs
Each test can be looped to easily perform optimization and margin testing
6/7/2017 76